TW201415603A - Connecting substrate and package on package structure - Google Patents
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本發明涉及一種半導體封裝技術,特別涉及一種連接基板及層疊封裝(package-on-package, POP)結構。The present invention relates to a semiconductor package technology, and more particularly to a connection substrate and a package-on-package (POP) structure.
隨著半導體器件尺寸的不斷減小,具有半導體器件的層疊封裝結構也逐漸地備受關注。層疊封裝結構一般通過層疊製作方法製成。在傳統的層疊製作方法中,為了實現高密度集成及小面積安裝,通常通過直徑為200微米至300微米的焊球將上下兩個封裝器件電連接。然而,直徑為200微米至300微米的焊球不僅體積較大,而且容易在焊球與其連接的電性接觸墊之間產生斷裂,因此,不僅使得下封裝器件上與錫球對應的焊盤的面積也較大,進而難以縮小層疊封裝結構的體積,而且降低了層疊封裝結構的成品率及可靠性。下封裝器件封裝於上下兩個電路載板之間,其產生的熱量並不容易發散出,下封裝器件的散熱性較差,影響整個層疊封裝結構使用壽命。As the size of semiconductor devices continues to decrease, laminated package structures having semiconductor devices are also receiving increasing attention. The package structure is generally made by a laminate manufacturing method. In the conventional laminate fabrication method, in order to achieve high-density integration and small-area mounting, the upper and lower package devices are usually electrically connected by solder balls having a diameter of 200 μm to 300 μm. However, a solder ball having a diameter of 200 μm to 300 μm is not only bulky, but also easily breaks between the solder ball and the electrical contact pad to which it is connected, so that not only the pad corresponding to the solder ball on the lower package device is made. The area is also large, which makes it difficult to reduce the volume of the package structure and reduce the yield and reliability of the package structure. The lower package device is packaged between the upper and lower circuit carriers, and the heat generated by the package is not easily dissipated, and the heat dissipation of the lower package device is poor, which affects the service life of the entire package package structure.
有鑑於此,提供一種可靠性較高並且散熱性良好的連接基板及層疊封裝結構實屬必要。In view of the above, it is necessary to provide a connection substrate and a laminated package structure which are highly reliable and have good heat dissipation properties.
一種連接基板,其包括絕緣基材、多個導電柱及導熱金屬框。所述絕緣基材具有相對的第一表面和第二表面,所述絕緣基材內形成有多個貫穿所述第一表面和第二表面的多個通孔,所述多個導電柱一一對應地收容於多個通孔內,自所述絕緣基材的第二表面向絕緣基材內部,形成有收容槽,所述導熱金屬框配合收容於所述收容槽內。A connection substrate includes an insulating substrate, a plurality of conductive pillars, and a thermally conductive metal frame. The insulating substrate has opposite first and second surfaces, and a plurality of through holes penetrating the first surface and the second surface are formed in the insulating substrate, and the plurality of conductive columns are one by one Correspondingly, it is accommodated in the plurality of through holes, and a receiving groove is formed in the insulating substrate from the second surface of the insulating base material, and the heat conductive metal frame is fitted and received in the receiving groove.
一種層疊封裝結構,其包括第一封裝基板、封裝於第一封裝基板的第一晶片、第二封裝基板、封裝於第二封裝基板的第二晶片、第一焊接材料、第二焊接材料及所述的連接基板,所述第一封裝基板設置於所述連接基板的第二表面一側,所述第一封裝基板與連接基板相接觸的表面具有多個第三電性接觸墊及多個第四電性接觸墊,所述第一晶片通過多個第三電性接觸墊與第一封裝基板電連接,每個所述導電柱的一端通過第一焊接材料與一個對應的第三電性接觸墊相互電連接,所述第一晶片收容於所述連接基板的導熱金屬框內,所述第二封裝基板設置於連接基板的第一表面的一側,所述第二封裝基板具有與多個導電柱一一對應的第七電性接觸墊,每個導電柱的另一端通過第二焊接材料與對應的第七電性接觸墊電連接。A stacked package structure comprising a first package substrate, a first wafer packaged on the first package substrate, a second package substrate, a second wafer packaged on the second package substrate, a first solder material, a second solder material, and a The first package substrate is disposed on a side of the second surface of the connection substrate, and the surface of the first package substrate that is in contact with the connection substrate has a plurality of third electrical contact pads and a plurality of a fourth electrical contact pad, the first wafer is electrically connected to the first package substrate through a plurality of third electrical contact pads, and one end of each of the conductive posts is electrically connected to a corresponding third through the first solder material The pads are electrically connected to each other, the first chip is received in a thermally conductive metal frame of the connection substrate, the second package substrate is disposed on a side of the first surface of the connection substrate, and the second package substrate has a plurality of The seventh electrical contact pads corresponding to the conductive columns are one-to-one, and the other end of each of the conductive posts is electrically connected to the corresponding seventh electrical contact pad through the second solder material.
本技術方案提供的連接基板,其內部形成有導熱金屬框,以用於收容晶片並將晶片產生的熱量快速傳導。本技術方案提供的層疊封裝機構,由於第一晶片收容於連接基板的導熱金屬框中,從而第一晶片產生的熱量能夠快速地從第一晶片傳導出來,使得第一晶片在使用過程中不會溫度過高,提高第一晶片的使用壽命。The connection substrate provided by the technical solution has a heat conductive metal frame formed therein for accommodating the wafer and rapidly transferring heat generated by the wafer. According to the technical solution of the present invention, since the first wafer is housed in the heat conductive metal frame of the connection substrate, heat generated by the first wafer can be quickly conducted from the first wafer, so that the first wafer does not be used during use. The temperature is too high to increase the life of the first wafer.
下面將結合附圖及實施例,對本技術方案提供的連接基板及層疊封裝結構作進一步的詳細說明。The connection substrate and the package structure provided by the present technical solution will be further described in detail below with reference to the accompanying drawings and embodiments.
請一併參閱圖1及圖2,本技術方案第一實施例提供一種連接基板100,連接基板100包括絕緣基材110、多個導電柱120及導熱金屬框130。Referring to FIG. 1 and FIG. 2 , the first embodiment of the present invention provides a connection substrate 100 . The connection substrate 100 includes an insulating substrate 110 , a plurality of conductive pillars 120 , and a heat conductive metal frame 130 .
絕緣基材110具有相對的第一表面111和第二表面112。在絕緣基材110內形成有多個貫穿第一表面111和第二表面112的相互分離的多個通孔113。自第二表面112向絕緣基材110還形成有收容槽114。本實施例中,收容槽114形成的收容空間為長方體形,所述收容槽114用於收容電子器件。收容槽114具有底壁1141及與底壁1141垂直連接的四個依次垂直連接的四個側壁1142。底壁1141與第二表面112平行,四個側壁1142連接於底壁1141與第二表面112之間。收容槽114的形狀可以根據其需要收容的電子器件的形狀進行設定。多個通孔113環繞所述收容槽114設置,且並不與收容槽114相互連通。The insulating substrate 110 has opposing first and second surfaces 111, 112. A plurality of mutually separated through holes 113 penetrating the first surface 111 and the second surface 112 are formed in the insulating substrate 110. A receiving groove 114 is further formed from the second surface 112 to the insulating base material 110. In this embodiment, the receiving space formed by the receiving slot 114 is a rectangular parallelepiped shape, and the receiving slot 114 is for receiving an electronic device. The receiving slot 114 has a bottom wall 1141 and four four side walls 1142 that are vertically connected to the bottom wall 1141. The bottom wall 1141 is parallel to the second surface 112, and the four side walls 1142 are coupled between the bottom wall 1141 and the second surface 112. The shape of the receiving groove 114 can be set according to the shape of the electronic device that needs to be accommodated. A plurality of through holes 113 are disposed around the receiving groove 114 and do not communicate with the receiving groove 114 .
多個導電柱120一一對應地形成於多個通孔113中。每個導電柱120具有相對的第一端面121和第二端面122。本實施例中,每個導電柱120的長度均與絕緣基材110的厚度相等。第一端面121與第一表面111平齊。第二端面122與第二表面112平齊。A plurality of conductive pillars 120 are formed in the plurality of through holes 113 in a one-to-one correspondence. Each of the conductive pillars 120 has an opposite first end surface 121 and a second end surface 122. In this embodiment, each of the conductive pillars 120 has a length equal to the thickness of the insulating substrate 110. The first end surface 121 is flush with the first surface 111. The second end surface 122 is flush with the second surface 112.
導熱金屬框130收容於收容槽114內。導熱金屬框130的週邊形狀與收容槽114的形狀相對應。本實施例中,導熱金屬框130包括頂板131及與頂板131相互垂直連接的四個側板132。頂板131與收容槽114的底壁1141項接觸,四個側板132一一對應地與收容槽114的四個側壁1142向接觸。本實施例中,每個側板132具有遠離頂板131的底面1321。底面1321與第二表面112平齊。導熱金屬框130採用導熱金屬,如銅、鋁及銀等製成。優選地,導熱金屬框130的材料與導電柱120的材料相同,均採用金屬銅製成。The heat conductive metal frame 130 is received in the receiving groove 114. The shape of the periphery of the heat conductive metal frame 130 corresponds to the shape of the receiving groove 114. In this embodiment, the heat conductive metal frame 130 includes a top plate 131 and four side plates 132 perpendicularly connected to the top plate 131. The top plate 131 is in contact with the bottom wall 1141 of the receiving groove 114, and the four side plates 132 are in contact with the four side walls 1142 of the receiving groove 114 in one-to-one correspondence. In this embodiment, each side plate 132 has a bottom surface 1321 away from the top plate 131. The bottom surface 1321 is flush with the second surface 112. The heat conductive metal frame 130 is made of a heat conductive metal such as copper, aluminum, and silver. Preferably, the material of the heat conductive metal frame 130 is the same as that of the conductive pillar 120, and is made of metal copper.
請一併參閱圖3至圖5,連接基板100還可以包括多個第一電性接觸墊150和/或多個第二電性接觸墊160。Referring to FIG. 3 to FIG. 5 , the connection substrate 100 may further include a plurality of first electrical contact pads 150 and/or a plurality of second electrical contact pads 160 .
請參閱圖3,連接基板100a包括多個第一電性接觸墊150。每個第一電性接觸墊150均與一個導電柱120電連接。第一電性接觸墊150形成於第一表面111。優選地,每個第一電性接觸墊150與其相互電連接的導電柱120一體成形。Referring to FIG. 3, the connection substrate 100a includes a plurality of first electrical contact pads 150. Each of the first electrical contact pads 150 is electrically connected to a conductive post 120. The first electrical contact pad 150 is formed on the first surface 111. Preferably, each of the first electrical contact pads 150 is integrally formed with the conductive pillars 120 electrically connected to each other.
請參閱圖4,連接基板100b包括多個第二電性接觸墊160。每個第二電性接觸墊160均與一個導電柱120電連接。第二電性接觸墊160形成於第二表面112。優選地,每個第二電性接觸墊160與其相互電連接的導電柱120一體成形。Referring to FIG. 4, the connection substrate 100b includes a plurality of second electrical contact pads 160. Each of the second electrical contact pads 160 is electrically connected to a conductive post 120. A second electrical contact pad 160 is formed on the second surface 112. Preferably, each of the second electrical contact pads 160 is integrally formed with the conductive pillars 120 electrically connected to each other.
請參閱圖5,連接基板100c包括多個第一電性接觸墊150和多個第二電性接觸墊160。每個第一電性接觸墊150均與一個導電柱120電連接。第一電性接觸墊150形成於第一表面111。每個第二電性接觸墊160均與一個導電柱120電連接。第二電性接觸墊160形成於第二表面112。請參閱圖6,本技術方案第二實施例提供一種連接基板200,連接基板200的結構與第一實施例提供的連接基板100的結構相近。連接基板200包括絕緣基材210、多個導電柱220、多個導電盲孔250及導熱金屬框230。Referring to FIG. 5 , the connection substrate 100 c includes a plurality of first electrical contact pads 150 and a plurality of second electrical contact pads 160 . Each of the first electrical contact pads 150 is electrically connected to a conductive post 120. The first electrical contact pad 150 is formed on the first surface 111. Each of the second electrical contact pads 160 is electrically connected to a conductive post 120. A second electrical contact pad 160 is formed on the second surface 112. Referring to FIG. 6, the second embodiment of the present invention provides a connection substrate 200. The structure of the connection substrate 200 is similar to that of the connection substrate 100 provided by the first embodiment. The connection substrate 200 includes an insulating substrate 210, a plurality of conductive pillars 220, a plurality of conductive blind vias 250, and a thermally conductive metal frame 230.
絕緣基材210具有相對的第一表面211和第二表面212。在絕緣基材210內形成有多個貫穿第一表面211和第二表面212且相互分離的多個通孔213。本實施例中,自第一表面211向第二表面212,每個通孔213包括相互連接的第一孔段2131和第二孔段2132。其中,第一孔段2131為錐形孔,第二孔段2132為直孔。即第一孔段2131的縱截面為梯形,第二孔段2132的縱截面的形狀為長方形。自第二表面212向絕緣基材210還形成有收容槽214。本實施例中,收容槽214形成的收容空間為長方體形,所述收容槽214用於收容電子器件。多個通孔213環繞所述收容槽214設置,且並不與收容槽214相互連通。The insulating substrate 210 has opposing first and second surfaces 211, 212. A plurality of through holes 213 penetrating the first surface 211 and the second surface 212 and separated from each other are formed in the insulating substrate 210. In this embodiment, from the first surface 211 to the second surface 212, each of the through holes 213 includes a first hole segment 2131 and a second hole segment 2132 that are connected to each other. The first hole segment 2131 is a tapered hole, and the second hole segment 2132 is a straight hole. That is, the longitudinal section of the first hole section 2131 is trapezoidal, and the shape of the longitudinal section of the second hole section 2132 is a rectangle. A receiving groove 214 is further formed from the second surface 212 toward the insulating base material 210. In this embodiment, the receiving space formed by the receiving groove 214 is a rectangular parallelepiped shape, and the receiving groove 214 is for receiving an electronic device. A plurality of through holes 213 are disposed around the receiving groove 214 and do not communicate with the receiving groove 214 .
多個導電柱220及多個導電盲孔250一一對應地形成於多個通孔213中。其中,每個導電柱220的形狀與第二孔段2132的形狀相對應,每個導電盲孔250的形狀與第一孔段2131的形狀相對應。每個導電盲孔250與對應的導電柱220相互電連接。每個導電盲孔250為圓臺狀,其對應收容於一個通孔213的第一孔段2131內,每個導電柱220對應收容於一個通孔213的第二孔段2132內。導電每個導電柱220具有遠離對應的導電盲孔250的第二端面222,每個導電盲孔250具有遠離對應導電柱220的第一端面251。本實施例中,每個導電柱120的高度及對應的導電盲孔250的厚度之和與絕緣基材110的厚度相等。第一端面251與第一表面211平齊。第二端面222與第二表面212平齊。A plurality of conductive pillars 220 and a plurality of conductive blind vias 250 are formed in the plurality of through vias 213 in a one-to-one correspondence. The shape of each of the conductive pillars 220 corresponds to the shape of the second hole segment 2132, and the shape of each of the conductive blind holes 250 corresponds to the shape of the first hole segment 2131. Each of the conductive blind vias 250 is electrically connected to the corresponding conductive pillars 220. Each of the conductive vias 250 is in the shape of a truncated cone, and is correspondingly received in the first hole segment 2131 of the through hole 213 . Each of the conductive posts 220 is correspondingly received in the second hole segment 2132 of the through hole 213 . Each of the conductive pillars 220 has a second end surface 222 away from the corresponding conductive blind hole 250, and each of the conductive blind holes 250 has a first end surface 251 away from the corresponding conductive pillar 220. In this embodiment, the sum of the height of each of the conductive pillars 120 and the thickness of the corresponding conductive blind vias 250 is equal to the thickness of the insulating substrate 110. The first end surface 251 is flush with the first surface 211. The second end surface 222 is flush with the second surface 212.
導熱金屬框230收容於收容槽214內。導熱金屬框230的週邊形狀與收容槽214的形狀相對應。導熱金屬框230採用導熱金屬,如銅、鋁及銀等製成。優選地,導熱金屬框230的材料與導電柱220的材料相同,均採用金屬銅製成。The heat conductive metal frame 230 is received in the receiving groove 214. The shape of the periphery of the heat conductive metal frame 230 corresponds to the shape of the receiving groove 214. The heat conductive metal frame 230 is made of a heat conductive metal such as copper, aluminum, and silver. Preferably, the material of the thermally conductive metal frame 230 is the same as that of the conductive post 220, and is made of metallic copper.
可以理解,如圖7所示的連接基板200a,其可以包括多個第一電性接觸墊260。每個第一電性接觸墊260均與一個導電盲孔250電連接。第一電性接觸墊260形成於第一表面211。優選地,每個第一電性接觸墊260與其相互電連接的導電盲孔250一體成形。請參閱圖8,連接基板200b還包括多個第二電性接觸墊270。每個第二電性接觸墊270均與一個導電柱220電連接。第二電性接觸墊270形成於第二表面212。It can be understood that the connection substrate 200a shown in FIG. 7 can include a plurality of first electrical contact pads 260. Each of the first electrical contact pads 260 is electrically connected to a conductive via 250. The first electrical contact pad 260 is formed on the first surface 211. Preferably, each of the first electrical contact pads 260 is integrally formed with the conductive blind holes 250 electrically connected to each other. Referring to FIG. 8 , the connection substrate 200 b further includes a plurality of second electrical contact pads 270 . Each of the second electrical contact pads 270 is electrically connected to a conductive post 220. A second electrical contact pad 270 is formed on the second surface 212.
請參閱圖9,本技術方案第三實施例提供一種連接基板300,連接基板300的結構與第一實施例提供的連接基板100的結構相近,連接基板300包括絕緣基材310、多個導電柱320、導熱金屬框330及導熱連接體340。Referring to FIG. 9 , a third embodiment of the present invention provides a connection substrate 300. The structure of the connection substrate 300 is similar to that of the connection substrate 100 provided by the first embodiment. The connection substrate 300 includes an insulating substrate 310 and a plurality of conductive pillars. 320, a thermally conductive metal frame 330 and a thermally conductive connector 340.
其中,絕緣基材310、導電柱320及導熱金屬框330的結構與第一實施例提供的連接基板100的結構相同。The structures of the insulating substrate 310, the conductive pillars 320, and the heat conductive metal frame 330 are the same as those of the connection substrate 100 provided in the first embodiment.
導熱連接體340設置於絕緣基材310內,導熱連接體340連接於導熱金屬框330與部分導電柱320之間。用於將導熱金屬框330的熱量傳送至與其連接的導電柱320,以便於熱量的散發。可以理解,本實施例的連接基板300的導電柱320的一端或者兩端也可以形成電性接觸墊。請參閱圖10,連接基板300a的導電柱320的兩端分別形成第一電性接觸墊350和第二電性接觸墊360。The thermally conductive connector 340 is disposed in the insulative substrate 310, and the thermally conductive connector 340 is coupled between the thermally conductive metal frame 330 and the portion of the conductive post 320. It is used to transfer the heat of the heat conductive metal frame 330 to the conductive pillars 320 connected thereto to facilitate the heat dissipation. It can be understood that one or both ends of the conductive pillar 320 of the connection substrate 300 of the embodiment may also form an electrical contact pad. Referring to FIG. 10, the first electrical contact pads 350 and the second electrical contact pads 360 are respectively formed at two ends of the conductive pillars 320 of the connection substrate 300a.
請參閱圖11,本技術方案第四實施例提供一種連接基板400,連接基板400的結構與第二實施例提供的連接基板200的結構相近,連接基板400包括絕緣基材410、多個導電柱420、多個導電盲孔450、導熱金屬框430及導熱連接體440。Referring to FIG. 11 , a fourth embodiment of the present invention provides a connection substrate 400. The structure of the connection substrate 400 is similar to that of the connection substrate 200 provided by the second embodiment. The connection substrate 400 includes an insulating substrate 410 and a plurality of conductive pillars. 420. A plurality of conductive blind vias 450, a thermally conductive metal frame 430, and a thermally conductive connector 440.
其中,絕緣基材410、導電柱420、導電盲孔450及導熱金屬框430的結構與第二實施例提供的連接基板200的結構相同。The structure of the insulating substrate 410, the conductive pillars 420, the conductive blind vias 450, and the thermally conductive metal frame 430 is the same as that of the connection substrate 200 provided in the second embodiment.
導熱連接體440設置於絕緣基材410內,導熱連接體440連接於導熱金屬框430與部分導電柱420之間。用於將導熱金屬框430的熱量傳送至與其連接的導電柱420,以便於熱量的散發。The thermally conductive connector 440 is disposed within the insulative substrate 410, and the thermally conductive connector 440 is coupled between the thermally conductive metal frame 430 and the portion of the conductive post 420. It is used to transfer the heat of the heat conductive metal frame 430 to the conductive pillars 420 connected thereto to facilitate the heat dissipation.
可以理解,本實施例的連接基板400的導電柱420的一端形成第二電性接觸墊470,導電盲孔450的一端形成第一電性接觸墊460。It can be understood that one end of the conductive pillar 420 of the connection substrate 400 of the present embodiment forms a second electrical contact pad 470, and one end of the conductive blind via 450 forms a first electrical contact pad 460.
請參閱圖12,本技術方案第五實施例提供一種連接基板500,連接基板500的結構與第一實施例提供的連接基板100的結構相近,連接基板500包括絕緣基材510、多個導電柱520及導熱金屬框530。Referring to FIG. 12 , a fifth embodiment of the present invention provides a connection substrate 500. The structure of the connection substrate 500 is similar to that of the connection substrate 100 provided by the first embodiment. The connection substrate 500 includes an insulating substrate 510 and a plurality of conductive columns. 520 and a thermally conductive metal frame 530.
絕緣基材510具有相對的第一表面511和第二表面512。在絕緣基材510內形成有多個貫穿第一表面511和第二表面512的相互分離的多個通孔513。自第二表面512向絕緣基材510還形成有收容槽514。所述收容槽514用於收容電子器件。收容槽514具有底壁5141及與底壁5141垂直連接的四個依次垂直連接的四個側壁5142。底壁5141與第二表面512平行,四個側壁5142連接於底壁5141與第二表面512之間。收容槽514的形狀可以根據其需要收容的電子器件的形狀進行設定。多個通孔513環繞所述收容槽514設置,且並不與收容槽514相互連通。The insulating substrate 510 has opposing first and second surfaces 511, 512. A plurality of mutually spaced through holes 513 penetrating the first surface 511 and the second surface 512 are formed in the insulating substrate 510. A receiving groove 514 is further formed from the second surface 512 toward the insulating base material 510. The receiving slot 514 is for receiving an electronic device. The receiving groove 514 has a bottom wall 5141 and four four side walls 5142 vertically connected to the bottom wall 5141. The bottom wall 5141 is parallel to the second surface 512, and the four side walls 5142 are connected between the bottom wall 5141 and the second surface 512. The shape of the receiving groove 514 can be set according to the shape of the electronic device that needs to be accommodated. A plurality of through holes 513 are disposed around the receiving groove 514 and do not communicate with the receiving groove 514.
多個導電柱520一一對應地形成於多個通孔513中。每個導電柱520具有相對的第一端面521和第二端面522。本實施例中,每個導電柱520的長度均大於絕緣基材110的厚度。第一端面521與第一表面511平齊。第二端面522突出於第二表面512。A plurality of conductive pillars 520 are formed in the plurality of through holes 513 in a one-to-one correspondence. Each of the conductive pillars 520 has an opposite first end surface 521 and a second end surface 522. In this embodiment, each of the conductive pillars 520 has a length greater than a thickness of the insulating substrate 110. The first end surface 521 is flush with the first surface 511. The second end surface 522 protrudes from the second surface 512.
導熱金屬框530收容於收容槽514內。導熱金屬框530的週邊形狀與收容槽514的形狀相對應。本實施例中,導熱金屬框530包括頂板531及與頂板531相互垂直連接的四個側板532。頂板531與收容槽514的底壁5141相接觸,四個側板532一一對應地與收容槽514的四個側壁5142向接觸。本實施例中,每個側板532具有遠離頂板531的底面5321。底面5321也突出於第二表面512。導熱金屬框530採用導熱金屬,如銅、鋁及銀等製成。優選地,導熱金屬框530的材料與導電柱520的材料相同,均採用金屬銅製成。The heat conductive metal frame 530 is received in the receiving groove 514. The shape of the periphery of the heat conductive metal frame 530 corresponds to the shape of the receiving groove 514. In this embodiment, the heat conductive metal frame 530 includes a top plate 531 and four side plates 532 perpendicularly connected to the top plate 531. The top plate 531 is in contact with the bottom wall 5141 of the receiving groove 514, and the four side plates 532 are in contact with the four side walls 5142 of the receiving groove 514 in one-to-one correspondence. In this embodiment, each side plate 532 has a bottom surface 5321 away from the top plate 531. The bottom surface 5321 also protrudes from the second surface 512. The heat conductive metal frame 530 is made of a heat conductive metal such as copper, aluminum, and silver. Preferably, the material of the thermally conductive metal frame 530 is the same as that of the conductive post 520, and is made of metallic copper.
可以理解,請參閱圖13,本實施例的連接基板500a局的導電柱520的第一端面521可以形成第一電性接觸墊550。並且,連接基板500也可以形成有導熱連接體540,以連接導熱金屬框530及部分導電柱520。It can be understood that, referring to FIG. 13 , the first end surface 521 of the conductive pillar 520 of the connection substrate 500 a of the present embodiment may form a first electrical contact pad 550 . Moreover, the connection substrate 500 may also be formed with a heat conductive connection 540 to connect the heat conductive metal frame 530 and the partial conductive pillars 520.
請參閱圖14,本技術方案第六實施例提供一種連接基板600,連接基板600的結構與第二實施例提供的連接基板400的結構相近,連接基板600包括絕緣基材610、多個導電柱620、多個導電盲孔650、導熱金屬框630及導熱連接體640。不同之處在於,導電柱620的第二端面622及導熱金屬框630的底面6321均突出於第二表面612。Referring to FIG. 14 , a sixth embodiment of the present invention provides a connection substrate 600. The structure of the connection substrate 600 is similar to that of the connection substrate 400 provided by the second embodiment. The connection substrate 600 includes an insulating substrate 610 and a plurality of conductive pillars. 620. A plurality of conductive blind vias 650, a thermally conductive metal frame 630, and a thermally conductive connector 640. The difference is that the second end surface 622 of the conductive pillar 620 and the bottom surface 6321 of the heat conductive metal frame 630 protrude from the second surface 612.
可以理解,本實施例的連接基板600的導電盲孔650從第一表面611露出的端面可以形成第一電性接觸墊660。It can be understood that the end surface of the conductive blind via 650 of the connection substrate 600 exposed from the first surface 611 of the present embodiment may form the first electrical contact pad 660.
可以理解,本技術方案第一實施例至第六實施例提供的連接基板均可以包括防焊層,所述防焊層形成於絕緣基材的第一表面,所述防焊層內形成有多個開口,使得第一電性接觸墊從對應的開口露出。It is to be understood that the connection substrates provided in the first to sixth embodiments of the present technical solution may each include a solder resist layer formed on the first surface of the insulating substrate, and the solder resist layer is formed in the solder resist layer. The openings are such that the first electrical contact pads are exposed from the corresponding openings.
請參閱圖15,本技術方案第七實施例提供一種層疊封裝結構10,其包括第一封裝基板20、封裝於第一封裝基板20的第一晶片30、第二封裝基板40、封裝於第二封裝基板40的第二晶片50、第一焊接材料60、第二焊接材料70及本技術方案第一實施例至第六實施例提供的任意一個連接基板。本實施例中,以本技術方案第一實施例提供的如圖5所示的連接基板100c為例來進行說明。Referring to FIG. 15 , a seventh embodiment of the present invention provides a package structure 10 including a first package substrate 20 , a first wafer 30 packaged on the first package substrate 20 , a second package substrate 40 , and a second package . The second wafer 50 of the package substrate 40, the first solder material 60, the second solder material 70, and any one of the connection substrates provided by the first to sixth embodiments of the present technical solutions. In this embodiment, the connection substrate 100c shown in FIG. 5 according to the first embodiment of the present technical solution is taken as an example for description.
第一封裝基板20包括第一基底層21、分別設置於該第一基底層21相對的兩個表面的第一導電線路圖形22和第二導電線路圖形23、以及分別形成於該第一導電線路圖形22和第二導電線路圖形23上的第一防焊層24和第二防焊層25及多個錫球26。The first package substrate 20 includes a first base layer 21, first conductive trace patterns 22 and second conductive trace patterns 23 respectively disposed on opposite surfaces of the first base layer 21, and respectively formed on the first conductive traces The first solder resist layer 24 and the second solder resist layer 25 and the plurality of solder balls 26 on the pattern 22 and the second conductive line pattern 23.
該第一基底層21為多層基板,包括交替排列的多個層樹脂層與多個層導電線路圖形(圖未示)。該第一基底層21包括相對的第三表面2110及第四表面2120,該第一導電線路圖形22設置於該第一基底層21的第三表面2110上,該第二導電線路圖形23設置於該第一基底層21的第四表面2120上。該第一基底層21的多個層導電線路圖形之間及該第一基底層21的多個層導電線路圖形與該第一導電線路圖形22和第二導電線路圖形23分別通過導電孔(圖未示)電連接。The first substrate layer 21 is a multi-layer substrate comprising a plurality of layer resin layers and a plurality of layer conductive line patterns (not shown) alternately arranged. The first substrate layer 21 includes an opposite third surface 2110 and a fourth surface 2120. The first conductive trace pattern 22 is disposed on the third surface 2110 of the first substrate layer 21, and the second conductive trace pattern 23 is disposed on The fourth surface 2120 of the first substrate layer 21 is on the surface. The plurality of layer conductive line patterns of the first base layer 21 and the plurality of layer conductive line patterns of the first base layer 21 and the first conductive line pattern 22 and the second conductive line pattern 23 respectively pass through the conductive holes (Fig. Not shown) Electrical connection.
該第一防焊層24覆蓋部分該第一導電線路圖形22及從該第一導電線路圖形22露出的第三表面2110,使部分該第一導電線路圖形22從該第一防焊層24露出,構成多個第三電性接觸墊2210及多個第四電性接觸墊2220。該第三電性接觸墊2210呈陣列式排布,該多個第四電性接觸墊2220圍繞該多個第三電性接觸墊2210設置,該多個第四電性接觸墊2220設置於該多個第三電性接觸墊2210的四周。The first solder resist layer 24 covers a portion of the first conductive trace pattern 22 and the third surface 2110 exposed from the first conductive trace pattern 22 to expose a portion of the first conductive trace pattern 22 from the first solder resist layer 24. A plurality of third electrical contact pads 2210 and a plurality of fourth electrical contact pads 2220 are formed. The third electrical contact pads 2210 are arranged in an array, the plurality of fourth electrical contact pads 2220 are disposed around the plurality of third electrical contact pads 2210, and the plurality of fourth electrical contact pads 2220 are disposed on the A plurality of third electrical contact pads 2210 are circumferentially.
該第二防焊層25覆蓋部分該第二導電線路圖形23及從該第二導電線路圖形23露出的第四表面2120,使部分該第二導電線路圖形23從該第二防焊層25露出,構成多個第五電性接觸墊2310,該第五電性接觸墊2310呈陣列式排布。該多個第三電性接觸墊2210和多個第四電性接觸墊2220通過第一導電線路圖形22、第二導電線路圖形23的導電線路及第一基底層21內的導電線路圖形及導電孔與該多個第五電性接觸墊2310電連接。The second solder resist layer 25 covers a portion of the second conductive trace pattern 23 and the fourth surface 2120 exposed from the second conductive trace pattern 23, so that a portion of the second conductive trace pattern 23 is exposed from the second solder resist layer 25. A plurality of fifth electrical contact pads 2310 are formed, and the fifth electrical contact pads 2310 are arranged in an array. The plurality of third electrical contact pads 2210 and the plurality of fourth electrical contact pads 2220 pass through the first conductive line pattern 22, the conductive lines of the second conductive line pattern 23, and the conductive line patterns and conductive lines in the first base layer 21. The holes are electrically connected to the plurality of fifth electrical contact pads 2310.
多個錫球26一一對應地形成於多個第五電性接觸墊2310上。A plurality of solder balls 26 are formed one by one on the plurality of fifth electrical contact pads 2310.
第一晶片30封裝於第一封裝基板20的第一防焊層24的一側。本實施例中,第一晶片30通過第一封裝膠體32黏結於第一封裝基板20的第一防焊層24表面。所述第一封裝膠體32採用高散熱黏著材料製成,其可以為導熱膠。所述第一晶片30通過覆晶封裝技術構裝於所述第一封裝基板20上。第一晶片30具有多個與第三電性接觸墊2210一一對應的多個電連接墊(圖未示),第三電性接觸墊2210與對應的電連接墊之間通過導電盲孔31相互電連接。可以理解,所述導電盲孔31可以為錫球或者銅膏,也可以為金屬導電柱與錫球相互結合,或者銅膏與銅導電盲孔相互結合。The first wafer 30 is encapsulated on one side of the first solder resist layer 24 of the first package substrate 20. In this embodiment, the first wafer 30 is bonded to the surface of the first solder resist layer 24 of the first package substrate 20 through the first encapsulant 32. The first encapsulant 32 is made of a high heat dissipation adhesive material, which may be a thermal adhesive. The first wafer 30 is mounted on the first package substrate 20 by a flip chip packaging technology. The first wafer 30 has a plurality of electrical connection pads (not shown) corresponding to the third electrical contact pads 2210. The third electrical contact pads 2210 and the corresponding electrical connection pads pass through the conductive blind holes 31. Electrically connected to each other. It can be understood that the conductive blind hole 31 may be a solder ball or a copper paste, or a metal conductive pillar and a solder ball may be combined with each other, or a copper paste and a copper conductive blind hole may be combined with each other.
連接基板100c的第二電性接觸墊160與第一封裝基板20的第四電性接觸墊2220一一對應。相互對應的一個第二電性接觸墊160與一個第四電性接觸墊2220通過第一焊接材料60相互電連接。第一晶片30收容於所述導熱金屬框130內。為了提高熱地傳導效率,在導熱金屬框130與第一晶片30之間,還形成有第二封裝膠片33。所述第二封裝膠片33也採用高散熱黏著材料製成,其可以為導熱膠。The second electrical contact pads 160 of the connection substrate 100c are in one-to-one correspondence with the fourth electrical contact pads 2220 of the first package substrate 20. A second electrical contact pad 160 and a fourth electrical contact pad 2220 corresponding to each other are electrically connected to each other by the first solder material 60. The first wafer 30 is housed in the thermally conductive metal frame 130. In order to improve the thermal conduction efficiency, a second package film 33 is further formed between the thermally conductive metal frame 130 and the first wafer 30. The second package film 33 is also made of a high heat dissipation adhesive material, which may be a thermal conductive adhesive.
第二封裝基板40形成於連接基板100遠離第一封裝基板20的一側。第二封裝基板40包括包括第二基底層42、分別設置於該第二基底層42相對的兩個表面的第三導電線路圖形43和第四導電線路圖形44、以及分別形成於該第三導電線路圖形43和第四導電線路圖形44上的第三防焊層45和第四防焊層46。The second package substrate 40 is formed on a side of the connection substrate 100 away from the first package substrate 20 . The second package substrate 40 includes a third conductive layer pattern 43 and a fourth conductive line pattern 44 respectively disposed on two opposite surfaces of the second substrate layer 42 and respectively formed on the third conductive layer The third solder resist layer 45 and the fourth solder resist layer 46 on the line pattern 43 and the fourth conductive line pattern 44.
該第二基底層42括相對的第五表面421及第六表面422,該第三導電線路圖形43設置於該第二基底層42的第五表面421上,該第四導電線路圖形44設置於該第二基底層42的第六表面422上。該第三導電線路圖形43與該第四導電線路圖形44通過多個導電孔47電導通。The second substrate layer 42 includes an opposite fifth surface 421 and a sixth surface 422. The third conductive trace pattern 43 is disposed on the fifth surface 421 of the second substrate layer 42. The fourth conductive trace pattern 44 is disposed on the second conductive trace pattern 43. The sixth surface 422 of the second substrate layer 42 is on. The third conductive line pattern 43 and the fourth conductive line pattern 44 are electrically conducted through the plurality of conductive holes 47.
該第三防焊層45覆蓋部分該第三導電線路圖形43及從該第三導電線路圖形43露出的第五表面421,使部分該第三導電線路圖形43從該第三防焊層45露出,構成多個第六電性接觸墊431。該第三防焊層45的表面具有晶片固定區用於使晶片固定於其上。該多個第六電性接觸墊431圍繞該晶片固定區設置。The third solder resist layer 45 covers a portion of the third conductive trace pattern 43 and the fifth surface 421 exposed from the third conductive trace pattern 43 to expose a portion of the third conductive trace pattern 43 from the third solder resist layer 45. A plurality of sixth electrical contact pads 431 are formed. The surface of the third solder resist layer 45 has a wafer holding area for fixing the wafer thereon. The plurality of sixth electrical contact pads 431 are disposed around the wafer holding area.
該第四防焊層46覆蓋部分該第四導電線路圖形44及從該第四導電線路圖形44露出的第二基底層42的第六表面422,使部分該第四導電線路圖形44從該第四防焊層46露出,構成多個第七電性接觸墊441,該多個第七電性接觸墊441與該多個第一電性接觸墊150一一對應。該多個第六電性接觸墊431通過第三導電線路圖形43和第四導電線路圖形44的導電線路及導電孔47與該多個第七電性接觸墊441電導通。第七電性接觸墊441與多個第一電性接觸墊150一一對應,每個第一電性接觸墊150與其對應的第七電性接觸墊441通過第二焊接材料70相互電連接。The fourth solder resist layer 46 covers a portion of the fourth conductive trace pattern 44 and the sixth surface 422 of the second base layer 42 exposed from the fourth conductive trace pattern 44, such that the portion of the fourth conductive trace pattern 44 is from the first The four solder resist layers 46 are exposed to form a plurality of seventh electrical contact pads 441 , and the plurality of seventh electrical contact pads 441 are in one-to-one correspondence with the plurality of first electrical contact pads 150 . The plurality of sixth electrical contact pads 431 are electrically connected to the plurality of seventh electrical contact pads 441 through the conductive lines of the third conductive trace pattern 43 and the fourth conductive trace pattern 44 and the conductive vias 47. The seventh electrical contact pad 441 is in one-to-one correspondence with the plurality of first electrical contact pads 150 , and each of the first electrical contact pads 150 and the corresponding seventh electrical contact pads 441 are electrically connected to each other through the second solder material 70 .
該第三導電線路圖形43和第四導電線路圖形44可以採用選擇性蝕刻銅層的方法製成。本實施例中,該第二封裝基板40為雙面線路板,當然,該第二封裝基板40也可以為導電線路圖形多於兩層的多層板,即第二基底層42可以為多層基板,包括交替排列的多層樹脂層與多層導電線路圖形。The third conductive line pattern 43 and the fourth conductive line pattern 44 may be formed by selectively etching a copper layer. In this embodiment, the second package substrate 40 is a double-sided circuit board. Of course, the second package substrate 40 may also be a multi-layer board having more than two layers of conductive line patterns, that is, the second base layer 42 may be a multi-layer substrate. The multilayer resin layer and the multilayer conductive wiring pattern are alternately arranged.
第二晶片50封裝於第二封裝基板40的第三防焊層45的表面。本實施例中,該第二晶片50為導線鍵合(wire bonding, WB)晶片,並將第二晶片50與第六電性接觸墊431電性連接。具體的,第二晶片50具有多個鍵合接點以及自多個鍵合接點延伸的多個條鍵合導線501,鍵合導線501與第六電性接觸墊431一一對應。多個條鍵合導線501的一端電性連接該第二晶片50,另一端分別電性連接該多個第六電性接觸墊431,從而使第二晶片50與第三導電線路圖形43電連接。The second wafer 50 is encapsulated on the surface of the third solder resist layer 45 of the second package substrate 40. In this embodiment, the second wafer 50 is a wire bonding (WB) wafer, and the second wafer 50 is electrically connected to the sixth electrical contact pad 431. Specifically, the second wafer 50 has a plurality of bonding contacts and a plurality of strip bonding wires 501 extending from the plurality of bonding contacts, and the bonding wires 501 are in one-to-one correspondence with the sixth electrical contact pads 431. One end of the plurality of strip bonding wires 501 is electrically connected to the second wafer 50, and the other end is electrically connected to the plurality of sixth electrical contact pads 431, respectively, so that the second wafer 50 is electrically connected to the third conductive line pattern 43. .
優選的,該第二晶片50通過一黏膠層固定於該第三防焊層45表面的晶片固定區,該鍵合導線501可通過焊接的方式連接於第六電性接觸墊431。該鍵合導線501的材料一般為金。本實施例中,採用第三封裝膠體502將鍵合導線501、第二晶片50及第二封裝基板40外露的第三防焊層45和第六電性接觸墊431表面進行包覆封裝。該鍵合導線501、第二晶片50均完全包覆於該第三封裝膠體502內。本實施例中,該第三封裝膠體502為黑膠,當然,該第三封裝膠體502也可以其他封裝膠體材料,並不以本實施例為限。Preferably, the second wafer 50 is fixed to the wafer fixing area on the surface of the third solder resist layer 45 by an adhesive layer, and the bonding wire 501 can be connected to the sixth electrical contact pad 431 by soldering. The material of the bonding wire 501 is generally gold. In this embodiment, the surface of the third solder resist 45 and the sixth electrical contact pad 431 exposed by the bonding wires 501, the second wafer 50 and the second package substrate 40 are encapsulated by the third encapsulant 502. The bonding wires 501 and the second wafer 50 are completely covered in the third encapsulant 502. In this embodiment, the third encapsulant 502 is a black plastic. Of course, the third encapsulant 502 can also be a other encapsulating colloidal material, which is not limited to the embodiment.
可以理解,當連接基板100c及第二封裝基板40的橫截面積小於第一封裝基板20的橫截面積時,可以在連接基板100c及第二封裝基板40的側面也形成第三封裝膠體502,從而將連接基板100c及第二封裝基板40也被第三封裝膠體502包覆。It can be understood that when the cross-sectional area of the connection substrate 100c and the second package substrate 40 is smaller than the cross-sectional area of the first package substrate 20, the third encapsulant 502 may be formed on the sides of the connection substrate 100c and the second package substrate 40, Thereby, the connection substrate 100c and the second package substrate 40 are also covered by the third encapsulant 502.
本技術方案提供的層疊封裝結構10,由於第一晶片30收容於連接基板100c的導熱金屬框130內,第一晶片30在工作過程中產生的熱量可以快速的傳遞至導熱金屬框130,並傳送至連接基板100c的絕緣基材110,使得熱量快速擴散出層疊封裝結構10,從而可以提高第一晶片30產生的熱量的傳導速率。In the laminated package structure 10 provided by the present technical solution, since the first wafer 30 is received in the heat conductive metal frame 130 of the connection substrate 100c, the heat generated by the first wafer 30 during the operation can be quickly transferred to the heat conductive metal frame 130 and transmitted. The insulating substrate 110 to the connection substrate 100c allows heat to be quickly diffused out of the package structure 10, so that the conduction rate of heat generated by the first wafer 30 can be increased.
可以理解,如圖16所示,本技術方案提供的層疊封裝結構也可以採用本技術方案第三實施例提供的連接基板,即在導熱金屬框130與部分導電柱120之間形成導熱連接體140,從而使得第一晶片30產生的熱量可以通過導熱金屬框130傳遞至導電柱120,並傳導致第一封裝基板20及第二封裝基板40,進一步提高第一晶片30產生的熱量的傳導速率。It can be understood that, as shown in FIG. 16 , the laminated package structure provided by the present technical solution can also adopt the connection substrate provided by the third embodiment of the present technical solution, that is, the thermal conductive connection body 140 is formed between the thermal conductive metal frame 130 and the partial conductive pillars 120 . Therefore, the heat generated by the first wafer 30 can be transferred to the conductive pillars 120 through the heat conductive metal frame 130, and the first package substrate 20 and the second package substrate 40 are transferred, thereby further increasing the conduction rate of heat generated by the first wafer 30.
如圖17所示,本技術方案提供的層疊封裝結構也可以採用本技術方案第五實施例提供的連接基板,即導電柱120及導熱金屬框130突出於第二表面1112。第一焊接材料60連接於與導電柱120突出於第二表面1112的部分與第四電性接觸墊2220相互電連接。As shown in FIG. 17 , the laminated package structure provided by the present technical solution may also adopt the connection substrate provided by the fifth embodiment of the present technical solution, that is, the conductive pillar 120 and the heat conductive metal frame 130 protrude from the second surface 1112 . The first solder material 60 is electrically connected to a portion of the conductive pillar 120 protruding from the second surface 1112 and the fourth electrical contact pad 2220.
本技術方案提供的層疊封裝結構也可以採用本技術方案第二、四及六實施例提供的連接基板,即連接基板內還包括導電盲孔,則第二封裝基板40的第七電性接觸墊441與對應的導電盲孔或者形成於導電盲孔上的第一電性接觸墊150通過第二焊接材料70相互對電連接。The laminated package structure provided by the technical solution can also adopt the connection substrate provided by the second, fourth and sixth embodiments of the technical solution, that is, the connection substrate further comprises a conductive blind hole, and the seventh electrical contact pad of the second package substrate 40 441 and the corresponding conductive blind holes or the first electrical contact pads 150 formed on the conductive blind holes are electrically connected to each other through the second solder material 70.
本技術方案提供的連接基板,其內部形成有導熱金屬框,以用於收容晶片並將晶片產生的熱量快速傳導。本技術方案提供的層疊封裝機構,由於第一晶片收容於連接基板的導熱金屬框中,從而第一晶片產生的熱量能夠快速地從第一晶片傳導出來,使得第一晶片在使用過程中不會溫度過高,提高第一晶片的使用壽命。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。The connection substrate provided by the technical solution has a heat conductive metal frame formed therein for accommodating the wafer and rapidly transferring heat generated by the wafer. According to the technical solution of the present invention, since the first wafer is housed in the heat conductive metal frame of the connection substrate, heat generated by the first wafer can be quickly conducted from the first wafer, so that the first wafer does not be used during use. The temperature is too high to increase the life of the first wafer. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.
10...層疊封裝結構10. . . Cascaded package structure
20...第一封裝基板20. . . First package substrate
21...第一基底層twenty one. . . First substrate layer
2110...第三表面2110. . . Third surface
2120...第四表面2120. . . Fourth surface
22...第一導電線路圖形twenty two. . . First conductive line pattern
2210...第三電性接觸墊2210. . . Third electrical contact pad
2220...第四電性接觸墊2220. . . Fourth electrical contact pad
23...第二導電線路圖形twenty three. . . Second conductive line pattern
2310...第五電性接觸墊2310. . . Fifth electrical contact pad
24...第一防焊層twenty four. . . First solder mask
25...第二防焊層25. . . Second solder mask
26...錫球26. . . Solder balls
30...第一晶片30. . . First wafer
31...導電盲孔31. . . Conductive blind hole
32...第一封裝膠體32. . . First encapsulant
40...第二封裝基板40. . . Second package substrate
42...第二基底層42. . . Second base layer
421...第五表面421. . . Fifth surface
422...第六表面422. . . Sixth surface
43...第三導電線路圖形43. . . Third conductive line pattern
431...第六電性接觸墊431. . . Sixth electrical contact pad
44...第四導電線路圖形44. . . Fourth conductive line pattern
441...第七電性接觸墊441. . . Seventh electrical contact pad
45...第三防焊層45. . . Third solder mask
46...第四防焊層46. . . Fourth solder mask
47...導電孔47. . . Conductive hole
50...第二晶片50. . . Second chip
501...鍵合導線501. . . Bond wire
502...第三封裝膠體502. . . Third encapsulant
60...第一焊接材料60. . . First welding material
70...第二焊接材料70. . . Second welding material
100、100a、100b、100c、200、200a、200b、300、300a、400、500、500a、600...連接基板100, 100a, 100b, 100c, 200, 200a, 200b, 300, 300a, 400, 500, 500a, 600. . . Connection substrate
110、210、310、410、510、610...絕緣基材110, 210, 310, 410, 510, 610. . . Insulating substrate
111、211、511、611...第一表面111, 211, 511, 611. . . First surface
112、212、512...第二表面112, 212, 512. . . Second surface
113、213、513...通孔113, 213, 513. . . Through hole
114、214、514...收容槽114, 214, 514. . . Storage slot
1141、5141...底壁1141, 5141. . . Bottom wall
1142、5142...側壁1142, 5142. . . Side wall
120、220、320、420、520、620...導電柱120, 220, 320, 420, 520, 620. . . Conductive column
121、251、521...第一端面121, 251, 521. . . First end face
122、222、522、622...第二端面122, 222, 522, 622. . . Second end face
130、230、330、430、530、630...導熱金屬框130, 230, 330, 430, 530, 630. . . Thermal metal frame
131、531...頂板131, 531. . . roof
132、532...側板132, 532. . . Side panel
1321、5321、6321...底面1321, 5321, 6321. . . Bottom
150、260、350、460、550、660...第一電性接觸墊150, 260, 350, 460, 550, 660. . . First electrical contact pad
160、270、360、470...第二電性接觸墊160, 270, 360, 470. . . Second electrical contact pad
2131...第一孔段2131. . . First hole
2132...第二孔段2132. . . Second hole section
250、450、650...導電盲孔250, 450, 650. . . Conductive blind hole
340、440、540、640...導熱連接體340, 440, 540, 640. . . Thermal connection
圖1為本技術方案第一實施例提供的連接基板的剖面示意圖。FIG. 1 is a schematic cross-sectional view of a connection substrate according to a first embodiment of the present technical solution.
圖2為圖1的俯視圖。Figure 2 is a plan view of Figure 1.
圖3-5分別為本技術方案第一實施例提供的另外的連接基板的剖面示意圖。3-5 are schematic cross-sectional views of additional connection substrates provided by the first embodiment of the present technical solution.
圖6-8分別為本技術方案第二實施例提供的連接基板的剖面示意圖。6-8 are schematic cross-sectional views of a connection substrate provided by a second embodiment of the present technical solution.
圖9-10分別為本技術方案第三實施例提供的連接基板的剖面示意圖。9-10 are schematic cross-sectional views of a connection substrate provided by a third embodiment of the present technical solution.
圖11為本技術方案第四實施例提供的連接基板的剖面示意圖。FIG. 11 is a cross-sectional view of a connection substrate according to a fourth embodiment of the present technology.
圖12為本技術方案第五實施例提供的連接基板的剖面示意圖。FIG. 12 is a cross-sectional view of a connection substrate according to a fifth embodiment of the present technology.
圖13-14分別為本技術方案第六實施例提供的連接基板的剖面示意圖。13-14 are schematic cross-sectional views of a connection substrate provided in a sixth embodiment of the present technical solution.
圖15-17分別為本技術方案提供的層疊封裝結構的剖面示意圖。15-17 are schematic cross-sectional views of a package package structure provided by the present technical solution, respectively.
100...連接基板100. . . Connection substrate
110...絕緣基材110. . . Insulating substrate
111...第一表面111. . . First surface
112...第二表面112. . . Second surface
113...通孔113. . . Through hole
114...收容槽114. . . Storage slot
1141...底壁1141. . . Bottom wall
1142...側壁1142. . . Side wall
120...導電柱120. . . Conductive column
130...導熱金屬框130. . . Thermal metal frame
131...頂板131. . . roof
132...側板132. . . Side panel
1321...底面1321. . . Bottom
Claims (16)
The stacked package structure of claim 14, wherein the first package substrate has a plurality of fourth electrical contact pads away from the surface of the connection substrate, and each of the fourth electrical contact pads is formed with a solder ball.
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| TWI552290B (en) * | 2014-04-22 | 2016-10-01 | 矽品精密工業股份有限公司 | Package substrate and its preparation method |
| TWI730891B (en) * | 2019-09-08 | 2021-06-11 | 聯發科技股份有限公司 | A semiconductor package structure |
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| CN107123601B (en) * | 2017-05-27 | 2020-03-17 | 华进半导体封装先导技术研发中心有限公司 | High-heat-dissipation device packaging structure and board-level manufacturing method |
| CN107123626B (en) * | 2017-05-27 | 2019-10-18 | 华进半导体封装先导技术研发中心有限公司 | A method for manufacturing a high heat dissipation device package |
| CN110010491B (en) * | 2018-12-25 | 2021-05-28 | 浙江集迈科微电子有限公司 | A fabrication process of a multi-layer stacked radio frequency microsystem cube structure |
| CN112201652A (en) * | 2019-07-07 | 2021-01-08 | 深南电路股份有限公司 | Circuit board and manufacturing method thereof |
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| TWI249231B (en) * | 2004-12-10 | 2006-02-11 | Phoenix Prec Technology Corp | Flip-chip package structure with embedded chip in substrate |
| KR20070076084A (en) * | 2006-01-17 | 2007-07-24 | 삼성전자주식회사 | Stacked package and its manufacturing method |
| KR100817075B1 (en) * | 2006-11-09 | 2008-03-26 | 삼성전자주식회사 | Multistack Package and Manufacturing Method Thereof |
| KR100840788B1 (en) * | 2006-12-05 | 2008-06-23 | 삼성전자주식회사 | Chip Lamination Package and Manufacturing Method Thereof |
| TWI355050B (en) * | 2007-06-22 | 2011-12-21 | Light Ocean Technology Corp | Thin double-sided package substrate and manufactur |
| TWI348213B (en) * | 2007-08-15 | 2011-09-01 | Packaging substrate structure with capacitor embedded therein and method for fabricating the same | |
| KR101329355B1 (en) * | 2007-08-31 | 2013-11-20 | 삼성전자주식회사 | stack-type semicondoctor package, method of forming the same and electronic system including the same |
| TWI357650B (en) * | 2008-03-27 | 2012-02-01 | Unimicron Technology Corp | Package substrate with high heat dissipation capab |
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| TWI730891B (en) * | 2019-09-08 | 2021-06-11 | 聯發科技股份有限公司 | A semiconductor package structure |
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