TW201301238A - Display device, liquid crystal display device, and driving method - Google Patents

Abstract

The purpose of a display device of the present invention is to prevent a charge from being left in a pixel when turning off display on a display panel. A display device (1) of the present invention is provided with a display end time control unit (20), which controls a display panel (2) such that a first voltage for removing the charge accumulated in each of a plurality of pixels is applied to each pixel when turning off display on the display panel (2).

Description

Display device, liquid crystal display device and driving method

The present invention relates to a display device, a liquid crystal display device, and a driving method.

In recent years, display devices that are thin, lightweight, and low in power consumption, which are represented by liquid crystal display devices, have been actively applied. Such a display device is prominently mounted on, for example, a mobile phone, a smart phone, a PDA (portable information terminal), an electronic book, a laptop personal computer, and the like. In addition, development and popularization of electronic paper, which is expected to be a thinner display device, is also rapidly developing.

In such a display device, when the display of the display panel is turned off, the charge accumulated in the pixel capacitance of each pixel included in the display panel is gradually reduced by natural discharge, but since the speed is very slow, the charge is still long. Remains in the state of the pixel capacitor.

In particular, the TFT (Thin Film Transistor) used as a switching element in each pixel has improved disconnection performance, and accordingly, the natural discharge amount of each pixel is reduced, and the charge remains in the state of the pixel capacitor. Long period of time.

When the charge accumulated in the pixel capacitance remains in a long period of time, a display abnormality such as afterimage or flicker occurs. Moreover, since there is a voltage in the pixel, the lifetime of the pixel is lowered, which impairs the reliability of the display panel.

As described above, in the display device, how to prevent the electric charge accumulated in the pixel capacitance from remaining is a problem, and various techniques for solving the problem have been studied.

For example, in the following Patent Document 1, it is disclosed that when the power switch of the main body of the display device is turned off, the power supply voltage of the source bus bar driver is gradually decreased to a common potential, and the potential of the output terminal of the source bus bar driver is also When the voltage is gradually lowered to the common potential, the display electrodes of the respective pixels are electrically connected to the signal driving circuit, and the electric charges accumulated in the capacitance of each pixel are discharged by simultaneously turning on all the TFTs of the liquid crystal display element.

[Previous Technical Literature] [Patent Literature] [Patent Document 1]

Japanese Patent Laid-Open Publication No. Hei 10-214062 (Publication Date: August 11, 1998)

However, according to the technique disclosed in Patent Document 1, since the potential of each pixel gradually decreases, the potential of each pixel cannot be lowered to the common potential in a short time, and the period until the potential of each pixel falls to the common potential is long. Therefore, display abnormalities such as afterimages are generated. When the power switch of the main body of the display device is turned on again during the above-described period, the display is restarted because the electric charge remains in each of the pixel capacitors, so that display abnormality such as flickering occurs.

The present invention has been made in view of the above problems, and an object thereof is to provide a display device and a driving method capable of effectively discharging charges accumulated in respective pixels of a display panel when display of the display panel is broken.

In order to solve the above problems, the display device of the present invention includes: a display panel including a plurality of pixels, a plurality of gate signal lines, and a plurality of source signal lines; and a common electrode for each of the plurality of pixels, a common electrode driving circuit for supplying a common voltage; a scanning line driving circuit for sequentially selecting and scanning the plurality of gate signal lines; and a plurality of source signal line supply sources for each of a plurality of pixels on the selected gate signal line a signal line driving circuit for the pole signal; and when the display of the display panel is turned off, the display is terminated by applying a first voltage for discharging the charge accumulated in the pixel for each of the pixel electrodes of the plurality of pixels Time control mechanism.

According to the display device, the voltage level of the pixel electrode of each pixel can be shifted to a first voltage for discharging the charge accumulated in the pixel in a short time. In other words, since the electric charges accumulated in the respective pixels of the display panel can be discharged in a short time, the display of the display panel can be broken without causing abnormal display such as afterimage or flicker.

Moreover, the liquid crystal display device of the present invention is characterized by comprising the display device described in any of the above.

According to the liquid crystal display device of the present invention, a liquid crystal display device which exhibits the same effects as the above display device can be provided.

Moreover, the driving method of the present invention is characterized in that it is a driving method of a display device, and the display device includes: a display panel including a plurality of pixels, a plurality of gate signal lines, and a plurality of source signal lines; a common electrode of the pixel, a common electrode driving circuit for supplying a common voltage; sequentially selecting and scanning the scanning line driving of the plurality of gate signal lines a circuit line driving circuit for supplying a source signal from the plurality of source signal lines for each of a plurality of pixels on the selected gate signal line, and the driving method includes: when the display of the display panel is disconnected, A display termination control step for controlling the respective pixel electrodes of the plurality of pixels to control the first voltage of the charge accumulated in the pixels is applied.

According to the driving method of the present invention, by using the driving method as a driving method of the display device, it is possible to provide a display device that exhibits the same effects as those of the above display device.

According to the display device, the liquid crystal display device, and the driving method thereof of the present invention, it is possible to effectively discharge the electric charge accumulated in each pixel of the display panel when the display panel is turned off.

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)

First, the first embodiment of the present invention will be described.

(Composition of display device)

First, a configuration example of the display device 1 according to the first embodiment will be described with reference to Fig. 1 . Fig. 1 is a view showing a configuration example of a display device 1 of the first embodiment. As shown in FIG. 1, the display device 1 includes a display panel 2, a scanning line driving circuit 4, a signal line driving circuit 6, a common electrode driving circuit 8, a timing controller 10, and a power generating circuit 12.

In the first embodiment, an active matrix type liquid crystal display device is used as the display Display device 1. However, the display panel 2 of the first embodiment is an active matrix type liquid crystal display panel, and the other constituent elements described above are those for driving the liquid crystal display panel.

The display panel 2 includes a plurality of pixels, a plurality of gate signal lines G, and a plurality of source signal lines S.

A plurality of pixels are arranged in a grid shape.

The plurality of gate signal lines G are arranged side by side in the pixel row direction (in the direction of the pixel row). Each of the plurality of gate signal lines G is connected to a corresponding pixel column of the plurality of pixels.

The plurality of source signal lines S are arranged side by side in the pixel column direction (in the direction of the pixel column), and either of them is orthogonal to each of the plurality of gate signal lines G. Each of the plurality of source signal lines S is connected to a corresponding one of the plurality of pixels.

In the following description, the gate signal line G connected to the pixel column of the nth column (n is an arbitrary integer) is represented as G(n). For example, when G(n) is connected to the gate signal line G of the pixel column of the 10th column, G(n+1), G(n+2), and G(n+3) are respectively connected to the The gate signal line G of the pixel column of the 11th column, the 12th column, and the 13th column.

In the following description, the source signal line S connected to the pixel row of the i-th row (i is an arbitrary integer) is represented as S(i). For example, when S(i) is used as the source signal line S connecting the pixels of the 10th row, S(i+1), S(i+2), and S(i+3) respectively indicate the connection of the 11th line, The source signal line S of the pixel row of the 12th row and the 13th row.

The scanning line driving circuit 4 sequentially selects and scans the plurality of gate signal lines G. Specifically, the scanning line driving circuit 4 sequentially selects a plurality of gate signal lines G, and supplies a switching element (TFT) for each pixel on the gate signal line G to the selected gate signal line G. ) Switch to the turn-on voltage of the turn-on.

The signal line drive circuit 6 supplies a source signal to the corresponding source signal line S for each pixel on the gate signal line G while the gate signal line G is being selected. Specifically, the signal line drive circuit 6 calculates the value of the voltage to be output to each of the pixels on the selected gate signal line G based on the input video signal, and applies the voltage of the value from the source output amplifier to each Source signal amplifier output. As a result, a source signal is supplied to each pixel on the selected gate signal line G, and a source signal is written.

The common electrode driving circuit 8 supplies a specific common voltage for driving the common electrode to a common electrode provided in each of the plurality of pixels.

In the timing controller 10, a video signal is input from the outside (in the example shown in FIG. 1, the system side control unit). The image signal mentioned here includes a clock signal, a sync signal, and a video data signal. Further, the timing controller 10 outputs a signal which serves as a reference for causing each drive circuit to operate in synchronization with each drive circuit. For example, the timing controller 10 supplies a gate start pulse signal, a gate clock signal GCK, and a gate output control signal GOE with respect to the scanning line drive circuit 4. Further, the timing controller 10 outputs a source start pulse signal, a source latch selection communication number, and a source clock signal to the signal line drive circuit 6.

The scanning line driving circuit 4 starts the operation of the plurality of gate signal lines G upon receiving the gate start pulse signal. And the scan line driving circuit 4, according to The gate clock signal GCK and the gate output control signal GOE are sequentially supplied with a turn-on voltage for each gate signal line G.

The signal line driving circuit 6 accumulates the pixel data of each input pixel according to the source clock signal according to the source start pulse signal, and accumulates the selected communication number according to the second source, for each source signal line. S, supplying a source signal corresponding to the image data.

The power generation circuit 12 generates voltages Vdd, Vdd2, Vcc, Vgh, and Vgl required to operate the respective circuits in the display device 1. Further, Vcc, Vgh, and Vgl are supplied to the scanning line driving circuit 4, Vdd and Vcc are supplied to the signal line driving circuit 6, Vcc is supplied to the timing controller 10, and Vdd2 is supplied to the common electrode driving circuit 8.

(display termination control unit 20)

Here, the display device 1 of the first embodiment further includes a display termination control unit 20. For example, in the example shown in FIG. 1, the display device 1 is provided with one function of the timing controller 10 as the display termination control unit 20.

When the display is terminated, the control unit 20 controls the operation when the display of the display device 1 is terminated. When the display is terminated, when the display of the display panel 2 is turned off, each of the display devices 1 is controlled so that the first voltage is applied to the respective pixel electrodes of the plurality of pixels on the display panel 2.

The first voltage is a voltage applied to the pixel electrode to release the charge accumulated in the pixel. For example, in the first voltage, as a voltage for discharging more charge accumulated in the pixel in a shorter time, it is set to be at least closer to the ground voltage GND than the voltage for displaying the normal state at the time of normal driving (0 V The voltage is preferably set to the ground voltage GND (0 V).

For example, as a voltage for displaying a normal state during normal driving, a voltage of about 0.5 to 1.0 V is used for a common voltage.

Therefore, as the first voltage, it is preferable to set the ground voltage GND (0 V) to be better than the ground voltage GND ± 0 to ± 0.5.

In the display device 1 of the first embodiment, the ground voltage GND (0 V) is employed as the first voltage.

However, in consideration of variations in the voltage level of the pixel electrode or variations in the voltage level of the common voltage, there is a case where the voltage which is intentionally increased or decreased from the ground voltage GND is set to the first voltage.

Hereinafter, a specific example of the operation at the time of termination of display by the display device 1 will be described.

(composition of pixels)

First, the configuration of the pixels included in the display panel 2 will be described. FIG. 2 is a view showing the configuration of pixels included in the display panel 2. In FIG. 2, two pixels (pixels (i, n) and pixels (i+1, n)) of the plurality of pixels included in the display panel 2 are displayed. The pixel (i, n) represents a pixel connected to the source signal line S(i) and the gate signal line G(n). The pixel (i+1, n) represents a pixel connected to the source signal line S(i+1) and the gate signal line G(n). The other pixels included in the display panel 2 are also configured in the same manner as the pixels.

As shown in FIG. 2, the pixel has a TFT 200 as a switching element. The gate electrode of the TFT 200 is connected to the corresponding gate signal line G. Further, the source electrode of the TFT 200 is connected to the corresponding source signal line S. Further, the drain electrode of the TFT 200 is connected to the liquid crystal capacitor Clc and the holding capacitor Ccs.

When writing pixel data for the pixel, first, for TFT 200 The gate electrode is supplied with a turn-on voltage from the gate signal line G. Thereby, the TFT 200 is switched to the on state.

When the TFT 200 is in the ON state, if the source signal is supplied from the corresponding source signal line S, the source signal is supplied from the drain electrode of the TFT 200 to the pixel electrode of the liquid crystal capacitor Clc and the holding capacitor Ccs. .

In this way, by supplying a source signal to the pixel electrode of the liquid crystal capacitor Clc, the alignment direction of the liquid crystal between the pixel electrode and the common electrode of the liquid crystal capacitor Clc is sealed in the pixel, according to the voltage level of the source signal supplied. The difference is changed from the voltage level supplied to the common electrode, thereby displaying an image corresponding to the difference.

Further, by supplying the source signal to the holding capacitor Ccs, the charge corresponding to the voltage of the source signal is accumulated in the holding capacitor Ccs. Further, by the electric charge accumulated in the holding capacitor Ccs, the state of the display image can be maintained while the pixel is in a certain period of time.

In particular, in the display device 1 of the first embodiment, a so-called oxide semiconductor is used as the TFT 200. When the oxide semiconductor is in an off state, the breakdown characteristic in which leakage current hardly occurs is extremely excellent. Thereby, the electric charge accumulated in the liquid crystal capacitor Clc and the holding capacitor Ccs is held by the liquid crystal capacitor Clc and the holding capacitor Ccs for a longer period of time without any control for releasing the electric charge or the like.

(action when the display is terminated)

Next, the operation at the time of termination of display of the display device 1 of the first embodiment will be described. Fig. 3 shows various voltage values of the operation of the display device 1 of the first embodiment when the display is terminated.

In Fig. 3, Fig. 3(a) shows the respective voltage values of the two source signal lines S (source signal lines S(i) and (i+1)) shown in Fig. 2.

Further, Fig. 3(b) shows the voltage values of the drain electrodes of the TFTs of the two pixels (pixel (i, n) and pixel (i+1, n)) shown in Fig. 2.

Further, Fig. 3(c) shows the voltage value of the common voltage applied to the respective common electrodes of the plurality of pixels.

Further, Fig. 3(d) shows voltage values of the respective two gate signal lines G (gate signal lines G(n) and (n+1)) shown in Fig. 2.

Further, in FIG. 3, the timing t1 indicates the timing at which the display of the display panel 2 is switched to off.

(When the display of the display panel is on)

When the display of the display panel is in the ON state, the gate signal lines G are sequentially selected, and each time the gate signal line G is sequentially selected, the voltage of the source signal is applied to each of the source signal lines S.

The signal line drive circuit 6 of the first embodiment includes a source signal (a first source signal, hereinafter referred to as a "source signal (+)") whose source voltage level is more on the + side than the common voltage. The output amplifier (first source output amplifier) and the supply voltage level become the source of the source signal (the second source signal. Hereinafter, the "source signal (-)") is the source of the more common voltage. Both of the output amplifiers (second source output amplifiers).

Thereby, the signal line drive circuit 6 of the first embodiment can simultaneously supply the supply of the source signal (+) of a certain source signal line S and the supply of the source signal (-) of the other source signal line S. .

For example, in FIG. 3(a), the source signal for the source signal line S(i) is displayed. The supply is performed simultaneously with the supply of the source signal to the source signal line S(i+1).

Here, the polarity (positive and negative) of the voltage supplied to each source signal line S can be alternately switched every specific period.

For example, in FIG. 3(a), the polarity (positive and negative) of the voltage supplied to the source signal line S(i) and the voltage supplied to the source signal line S(i+1) is displayed for every horizontal scan. During the period (ie, each time the gate signal line G is selectively switched), the switching is performed interactively.

As described above, when the display of the display panel 2 is in the ON state, the signal line drive circuit 6 supplies the source signal to each of the source signal lines S every horizontal scanning period. Thereby, the source signal is written to each pixel included in the display panel 2, and the display panel 2 displays an image.

Here, in each pixel, the electric charge corresponding to the voltage level of the source signal written to the pixel is held between the frame periods by the liquid crystal capacitor Clc and the holding capacitor Ccs shown in FIG. 2 .

For example, in FIG. 3(b), among the display pixels (i, n) and the pixels (i+1, n), the charge levels corresponding to the voltage levels of the source signals written to the pixels continue to be maintain.

Thereby, each pixel can maintain the state of the displayed image during its frame period.

Further, as shown in FIG. 3(c), in the display device 1 of the first embodiment, the voltage level of the common voltage COM is slightly larger than the ground voltage GND in consideration of the introduction of Cgd (see FIG. 2).

Moreover, the voltage level of the source signal (+) is set to be more + side than the ground voltage GND, and the voltage level of the source signal (-) is set to be more than the ground voltage GND. On the side.

That is, the display device 1 of the first embodiment employs a positive and negative power supply system, and the withstand voltage design range of the source output amplifier that supplies the source signal (+) is set to be more + side than the ground voltage GND, and the source signal (-) is supplied. The withstand voltage design range of the source output amplifier is set to be more - side than the ground voltage GND.

(When the display of the display panel is switched to off)

At the time t1, when the display of the display panel 2 is switched off, the display device 1 performs the following display termination operations (1) to (3) by the control of the display termination control unit 20.

(1) As shown in FIG. 3(d), a turn-on voltage is applied to all of the gate signal lines G. Thereby, the TFTs of all the pixels included in the display panel 2 are turned on.

(2) A ground voltage GND is applied to each of the source signal lines S. As a result, as shown in FIG. 3(a), the voltage level of each source signal line S gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t2.

(3) According to this, as shown in FIG. 3(b), the display panel 2 is provided with the voltage level of the drain electrode of each pixel (that is, the voltage level of the pixel electrode), and gradually changes to the ground voltage GND. T2 becomes the ground voltage GND.

At this time, since the TFTs of all the pixels included in the display panel 2 are in an on state, when a ground voltage GND is applied to a certain source signal line S, the gate electrodes connected to all the pixels of the source signal line S are connected. The voltage level (that is, the voltage level of the pixel electrode) gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t2.

In addition, after the above (3), the display device 1 is for any of the gate signal lines G. No disconnection voltage is applied. That is, the TFTs of all the pixels on the display panel 2 are not switched off.

When the TFT is switched off, the voltage of the gate signal line G changes due to the voltage level of the gate electrode of the TFT of the parasitic capacitance Cgd (refer to FIG. 2) (so-called Cgd introduction) .

As a result, even when the potential level of the voltage level of the pixel electrode and the voltage level of the common electrode does not occur, the potential difference due to display abnormality or the like may occur due to the above variation.

On the other hand, in the display device 1 of the first embodiment, since the TFTs of all the pixels on the display panel 2 are not switched off, the potential difference does not occur.

(effect)

As described above, in the display device 1 of the first embodiment, when the display of the display panel 2 is switched off, the ground voltage GND is applied to the pixel electrodes of the respective pixels included in the display panel 2.

Thereby, the voltage level of the pixel electrode of each pixel can be converted into the ground voltage GND in a short time. In other words, since the electric charges accumulated in the respective pixels of the display panel 2 can be discharged in a short time, the display of the display panel 2 can be broken without causing abnormal display such as afterimage or flicker.

(Embodiment 2)

Next, a second embodiment of the present invention will be described. In the first embodiment, when the display of the display panel 2 is switched off, the ground voltage GND is applied to the pixel electrodes of the respective pixels included in the display panel 2.

In the second embodiment, when the display of the display panel 2 is switched off, not only the pixel electrodes of the respective pixels included in the display panel 2 are applied. The ground voltage GND is also an example in which the ground voltage GND is applied to the common electrode of each pixel included in the display panel 2. In the display device 1 of the second embodiment, since the configuration of the display device 1 of the first embodiment is the same as that of the first embodiment, the description thereof will be omitted.

(action when the display is terminated)

Hereinafter, an operation at the time of termination of display of the display device 1 according to the second embodiment will be described with reference to Fig. 4 . Fig. 4 shows various voltage values of the operation of the display device 1 of the second embodiment when the display is terminated.

In Fig. 4, Fig. 4(a) shows the respective voltage values of the two source signal lines S (source signal lines S(i) and (i+1)) shown in Fig. 2.

Further, Fig. 4(b) shows the voltage values of the gate electrodes of the TFTs of the two pixels (pixels (i, n) and pixels (i+1, n)) shown in Fig. 2.

Further, Fig. 4(c) shows the voltage value of the common voltage applied to the respective common electrodes of the plurality of pixels.

Further, Fig. 4(d) shows the respective voltage values of the two gate signal lines G (gate signal lines G(n) and (n+1)) shown in Fig. 2.

Further, in FIG. 4, the timing t1 indicates the timing at which the display of the display panel 2 is switched to off.

(When the display of the display panel is switched to off)

In the display device 1 of the second embodiment, when the display of the display panel 2 is switched off at the timing t1, the following display termination operations (1) to (4) are performed by the control of the display termination control unit 20.

(1) As shown in FIG. 4(d), a turn-on voltage is applied to all of the gate signal lines G. Thereby, the TFTs of all the pixels of the display panel 2 are connected to each other. state. Thereby, in the subsequent processing, since voltage is applied to one source signal line S, voltage can be simultaneously applied to a plurality of pixels connected to the source signal line S, so that the processing time can be shortened.

(2) A ground voltage GND is applied to each of the source signal lines S. As a result, as shown in FIG. 4(a), the voltage level of each source signal line S gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t2.

(3) According to this, as shown in FIG. 4(b), the voltage level of the drain electrode of each pixel of the display panel 2 (that is, the voltage level of the pixel electrode) gradually changes toward the ground voltage GND at the timing r2. , becomes the ground voltage GND.

At this time, since the TFTs of all the pixels included in the display panel 2 are turned on, when a ground voltage GND is applied to a certain source signal line S, the voltage of the drain electrode connected to all the pixels of the source signal line S is turned on. The level (i.e., the voltage level of the pixel electrode) gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t2.

(4) The ground voltage GND is applied to the common electrode of all the pixels included in the display panel 2. As a result, as shown in FIG. 4(c), the voltage level of each source signal line S gradually changes to the ground voltage GND, and becomes the ground voltage GND before the timing t2.

(effect)

As described above, in the display device 1 of the second embodiment, when the display of the display panel 2 is switched off, the ground voltage GND is applied to each of the pixel electrode and the common electrode of each pixel included in the display panel 2.

Therefore, not only can the voltage level of each of the pixel electrode and the common electrode of each pixel be converted to the ground voltage GND in a short time, but also The step is to reduce the potential difference between the pixel electrode and the common electrode of each pixel which is the cause of the display remaining, so that the display residue can be prevented, and the display of the display panel 2 can be broken without causing display abnormality such as afterimage or flicker. .

(Embodiment 3)

Next, a third embodiment of the present invention will be described. In the first and second embodiments, when the display of the display panel 2 is switched off, the ground voltage GND is applied to the pixel electrodes of the respective pixels included in the display panel 2.

In the third embodiment, an example in which the ground voltage GND is applied to the pixel electrode of each pixel included in the display panel 2 when the display of the display panel 2 is switched off is described. In the display device 1 of the third embodiment, the configuration of the display device 1 of the first embodiment is the same as that of the first embodiment, and thus the description thereof is omitted.

(action when the display is terminated)

Hereinafter, an operation at the time of termination of display of the display device 1 according to the third embodiment will be described with reference to Fig. 5 . Fig. 5 shows various voltage values of the operation of the display device 1 of the third embodiment when the display is terminated.

In Fig. 5, Fig. 5(a) shows the respective voltage values of the two source signal lines S (source signal lines S(i) and (i+1)) shown in Fig. 2.

5(b) shows voltage values of the drain electrodes of the TFTs of the two pixels (pixels (i, n) and pixels (i+1, n)) shown in FIG. 2, and applied to a plurality of The voltage value of the common voltage of the respective common electrodes of the pixels.

Further, Fig. 5(c) shows voltage values of the respective two gate signal lines G (gate signal lines G(n) and (n+1)) shown in Fig. 2.

In addition, in FIG. 5, the timing t1 indicates that the display of the display panel 2 is switched to be off. Timing.

(When the display of the display panel is on)

When the display of the display panel is in the on state, the gate signal lines G are sequentially selected, and each gate signal line G is sequentially selected, that is, the voltage of the source signal is applied to each of the source signal lines S.

In the third embodiment, a single-sided power supply system is used, and the voltage level of the common voltage, the source signal (+), and the source signal (-) are all set to be + side of the ground voltage GND.

That is, the withstand voltage design range of the source output amplifier for supplying the source signal (+) and the withstand voltage design range of the source output amplifier for supplying the source signal (-) are set to be more + side than the ground voltage GND.

For example, in the diagram (5), the supply of the source signal to the source signal line S(i) and the supply of the source signal to the source signal line S(i+1) are simultaneously performed, and the display is performed. Any voltage level of the source signal is also set to be more + side than the ground voltage GND.

Further, in FIG. 5(b), it is shown that the common voltage, the voltage level of the pixel (i, n), and the voltage level of the pixel (i+1, n) are set to be more than the ground voltage GND. + side.

(When the display of the display panel is switched to off)

In the display device 1 of the third embodiment, when the display of the display panel 2 is switched off at the timing t1, the following display termination operations (1) to (6) are performed by the control of the display termination control unit 20.

(1) As shown in FIG. 5(c), a turn-on voltage is applied to all of the gate signal lines G. Thereby, the TFTs of all the pixels of the display panel 2 are connected to each other. state.

(2) A common voltage COM is applied to each of the source signal lines S. As a result, as shown in FIG. 5(a), the voltage level of each source signal line S gradually changes to the common voltage COM, and becomes the common voltage COM at the timing t2.

(3) According to this, as shown in FIG. 5(b), the voltage level of the drain electrode of each pixel of the display panel 2 (that is, the voltage level of the pixel electrode) is gradually changed to the common voltage COM, and the timing is T2 becomes the common voltage COM.

That is, at the timing t2, the potential difference between the voltage level of the pixel electrode of each pixel included in the display panel 2 and the voltage level of the common electrode is eliminated.

At this time, since the TFTs of all the pixels included in the display panel 2 are turned on, when a common voltage COM is applied to a certain source signal line S, the voltage of the drain electrode connected to all the pixels of the source signal line S is turned on. The level (i.e., the voltage level of the pixel electrode) gradually changes to the common voltage COM, and becomes the common voltage COM at the timing t2.

(4) At the timing t2, the ground voltage GND is applied to each of the source signal lines S. As a result, as shown in FIG. 5(a), the voltage level of each source signal line S gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t3.

(5) According to this, as shown in FIG. 5(b), the voltage level of the drain electrode of each pixel of the display panel 2 (that is, the voltage level of the pixel electrode) gradually changes to the ground voltage GND, and the timing is T3 becomes the ground voltage GND.

(6) At the same time as (4) above, the ground voltage GND is applied to the common electrode of all the pixels included in the display panel 2. Thereby, as shown in FIGS. 5( a ) and ( b ), the display panel 2 includes the common electrode of all the pixels, and the ground voltage is applied. GND gradually changes, and becomes the ground voltage GND at timing t3.

(effect)

As described above, in the display device 1 of the third embodiment, when the display of the display panel 2 is switched off, the pixel of each pixel included in the display panel 2 is applied to the pixel electrode of each pixel included in the display panel 2. A ground voltage GND is applied to each of the electrode and the common electrode.

In this way, the potential difference between the pixel electrode and the common electrode of each pixel can be changed in a short time while eliminating the potential difference between the pixel electrode and the common electrode of each pixel which causes display residue in a shorter time. Since the ground voltage GND is generated, display residue does not occur, and the display of the display panel 2 is not turned off without causing display abnormalities such as afterimages and flicker.

(Embodiment 4)

Next, a fourth embodiment of the present invention will be described. In the third embodiment, when the display of the display panel 2 is switched off, a common voltage is applied to the pixel electrodes of the respective pixels included in the display panel 2, and then the ground voltage GND is applied.

In the fourth embodiment, an example in which the ground voltage GND is applied to the pixel electrode of each pixel included in the display panel 2 when the display of the display panel 2 is switched off is described.

The second voltage is a voltage applied to the pixel electrode in order to display a normal state during normal driving. For example, the second voltage system uses a voltage of about ±0.5 to 1.0 V from the common electrode.

In addition, the display device 1 of the fourth embodiment is the same as the display device 1 of the third embodiment except for the following description, and thus the description thereof is omitted.

(action when the display is terminated)

Hereinafter, an operation at the time of termination of display of the display device 1 according to the fourth embodiment will be described with reference to Fig. 6 . Fig. 6 shows various voltage values of the operation of the display device 1 of the fourth embodiment when the display is terminated.

In Fig. 6, Fig. 6(a) shows the respective voltage values of the two source signal lines S (source signal lines S(i) and (i+1)) shown in Fig. 2.

6(b) shows voltage values of the gate electrodes of the TFTs of the two pixels (pixels (i, n) and pixels (i+1, n)) shown in FIG. 2, and applied to a plurality of The voltage value of the common voltage of the respective common electrodes of the pixels.

Further, Fig. 6(c) shows the respective voltage values of the two gate signal lines G (the gate signal lines G(n) and (n+1)) shown in Fig. 2.

Further, in FIG. 6, the timing t1 indicates the timing at which the display of the display panel 2 is switched off.

(When the display of the display panel is switched to off)

In the display device 1 of the fourth embodiment, when the display of the display panel 2 is switched off at the timing t1, the following display termination operations (1) to (6) are performed by the control of the display termination control unit 20.

(1) As shown in FIG. 6(c), a turn-on voltage is applied to all of the gate signal lines G. Thereby, the TFTs of all the pixels included in the display panel 2 are turned on.

(2) For each of the source signal lines S, a second voltage for displaying a normal state during normal driving is applied. As a result, as shown in FIG. 6(a), the voltage level of each source signal line S gradually changes to the second voltage, and becomes the second voltage at the timing t2.

(3) According to this, as shown in FIG. 6(b), the voltage level of the drain electrode of each pixel included in the display panel 2 (that is, the voltage level of the pixel electrode) gradually changes to the second voltage, and is time-series T2 becomes the second voltage.

That is, at the timing t2, each pixel included in the display panel 2 displays a normal state.

At this time, since the TFTs of all the pixels included in the display panel 2 are turned on, when a second voltage is applied to a certain source signal line S, the voltage of the drain electrode connected to all the pixels of the source signal line S is turned on. The level (that is, the voltage level of the pixel electrode) gradually changes to the second voltage, and becomes the second voltage at the timing t2.

(4) At the timing t2, the ground voltage GND is applied to each of the source signal lines S. As a result, as shown in FIG. 6(a), the voltage level of each source signal line S gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t3.

(5) According to this, as shown in FIG. 6(b), the display panel 2 is provided with the voltage level of the drain electrode of each pixel (that is, the voltage level of the pixel electrode), and gradually changes to the ground voltage GND. T3 becomes the ground voltage GND.

(6) At the same time as (4) above, the ground voltage GND is applied to the common electrode of all the pixels included in the display panel 2. As a result, as shown in FIGS. 6(a) and 6(b), the common electrode of all the pixels included in the display panel 2 gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t3.

(effect)

As described above, in the display device 1 of the fourth embodiment, when the display of the display panel 2 is switched off, the pixel of each pixel included in the display panel 2 is electrically charged. After the second voltage is applied to the electrode, the ground voltage GND is applied to each of the pixel electrode and the common electrode of each pixel included in the display panel 2.

Thereby, since the normal state can be displayed in a shorter time for all the pixels, the voltage levels of the pixel electrodes and the common electrodes of the respective pixels are converted into the ground voltage GND in a short time, so that display residue does not occur, and The display of the display panel 2 is not broken without causing an abnormal display such as afterimage or flicker.

(Embodiment 5)

Next, a fifth embodiment of the present invention will be described. In the first to fourth embodiments, when the display of the display panel 2 is switched to be off, the gate signal lines G are turned on in unison.

In the fifth embodiment, when the display of the display panel 2 is switched off as in the case of normal driving, the gate signal lines G are sequentially scanned, and each time the gate signal line G is switched, that is, the connection is made. An example of applying a ground voltage GND to each of the pixels of the gate signal line G.

In the display device 1 of the fifth embodiment, since the configuration of the display device 1 of the first embodiment is the same as that of the first embodiment, the description thereof is omitted.

(action when the display is terminated)

Hereinafter, an operation at the time of termination of display of the display device 1 according to the fifth embodiment will be described with reference to Fig. 7 . Fig. 7 shows various voltage values of the operation of the display device 1 of the fifth embodiment when the display is terminated.

In Fig. 7, Fig. 7(a) shows the respective voltage values of the two source signal lines S (source signal lines S(i) and (i+1)) shown in Fig. 2.

7(b) shows two pixels (pixels (i, n) and pixels shown in FIG. 2 (i+1, n)) The voltage value of the drain electrode of each of the TFTs.

Further, Fig. 7(c) shows the voltage value of the common voltage applied to the respective common electrodes of the plurality of pixels.

Moreover, FIG. 7(d) shows voltage values of the respective gate signal lines G (gate signal lines G(n) to (N)) included in the display device 1.

Further, in FIG. 7, the timing t1 indicates the timing at which the display of the display panel 2 is switched off.

(When the display of the display panel is switched to off)

At the timing t1, when the display of the display panel 2 is switched off, the display device 1 is controlled by the display termination control unit 20, and sequentially applied to all the gate signal lines G as shown in FIG. 7(d). Through voltage. Thereby, the TFTs of all the pixels included in the display panel 2 are sequentially turned on on each of the gate signal lines G.

Further, the display device 1 performs the following display termination operations (1) and (2) each time the gate signal line G in the ON state is switched.

(1) A ground voltage GND is applied to each of the source signal lines S. As a result, as shown in FIG. 7(a), the voltage level of each source signal line S gradually changes to the ground voltage GND, and becomes the ground voltage GND at the timing t2.

(2) According to this, as shown in FIG. 7(b), the voltage level of the gate electrode connected to all the pixels of the gate signal line G in the ON state (that is, the voltage level of the pixel electrode) is The ground voltage GND gradually changes, and becomes the ground voltage GND at the timing t2.

The display device 1 performs the above (1) and (2) by switching the gate signal line G every time, and sets the voltage level of the pixel electrode of all the pixels to the ground. Voltage GND.

In addition, the common voltage COM does not change until all the pixels are converted to the ground voltage GND. The reason is to prevent the voltage level of the pixel electrode and the voltage level of the common electrode by using the voltage change of the gate signal line G due to the introduction of Cgd (refer to FIG. 2) when the gate signal line G is switched on. A potential difference is generated.

Further, if at least the voltage level of the pixel electrode connected to all of the gate signal lines G can be set to the ground voltage GND, the period during which the gate signal line G is turned on can be shorter than that during normal driving.

(effect)

As described above, in the display device 1 of the fifth embodiment, when the display of the display panel 2 is switched off, the gate signal lines G are sequentially turned on, and the pixel electrodes of the respective pixels included in the display panel 2 are applied. Ground voltage GND.

Thereby, even if the gate signal lines G are not turned on together, the voltage level of the pixel electrode of each pixel can be converted to the ground voltage GND in a short time. In other words, since the electric charges accumulated in the respective pixels of the display panel 2 can be discharged in a short time, display abnormality such as afterimage or flicker does not occur, and the display of the display panel 2 is turned off.

(Backlight backlight off timing)

Although the above embodiments 1 to 5 have been described, in the respective embodiments, the display control unit 20 may be used to ground the pixel electrodes of the plurality of pixels when the display of the display panel 2 is broken. Voltage GND, the voltage level of each pixel electrode of a plurality of pixels is grounded After the voltage GND is changed, the backlight of the display panel 2 is controlled to be off.

In other words, the display termination control unit 20 can control the backlight of the display panel 2 not to be turned off until the voltage level of each of the pixel electrodes of the plurality of pixels is shifted to the ground voltage GND.

In a general pixel, when light is irradiated, the amount of fluctuation in the voltage level of the drain electrode tends to increase as compared with the case where the light is not irradiated.

Therefore, by irradiating light before the voltage level of each pixel electrode is shifted toward the ground voltage GND, the time during which the voltage level of each pixel electrode is converted to the ground voltage GND can be further shortened.

(specific control method)

Hereinafter, a specific example of the control by the display termination control unit 20 described in each embodiment will be described.

In the display termination control unit 20 of each embodiment, by controlling the scanning line driving circuit 4, the signal line driving circuit 6, and the common electrode driving circuit 8, the display device 1 described above is terminated when the display is terminated.

Specifically, the display termination control unit 20 instructs the signal line drive circuit 6 to transmit a specific instruction signal (specific voltage output instruction signal), and instructs application of a specific voltage to each of the source signal lines S (the first voltage, Second voltage, common voltage, ground voltage, etc.).

Further, the display termination control unit 20 transmits a specific instruction signal (specific voltage output instruction signal) to the scanning line drive circuit 4, and instructs application of a specific voltage (turn-on voltage, disconnection) to each gate signal line G. Voltage).

Further, the display termination control unit 20 instructs the common electrode drive circuit 8 to transmit a specific instruction signal (specific voltage output instruction signal), and instructs application of a specific voltage (common voltage, ground voltage) to each common electrode of each of the plurality of pixels. Wait).

(displays the start timing of the action at the end)

Here, the timing at which the display device 1 starts the display termination operation will be described.

As described above, the display device 1 starts the display termination operation when the display of the display panel 2 is turned off by the control of the display termination control unit 20.

Therefore, the display end control unit 20 needs to determine the timing at which the display panel 2 is turned off. For example, the display termination control unit 20 determines the timing at which the display panel 2 is turned off by the following method.

Here, an example of a configuration for detecting the timing at which the display panel 2 is turned off will be described with reference to FIGS. 8 and 9.

(First configuration example)

FIG. 8 is a view showing a first configuration example of a display device incorporating a configuration in which the display of the display panel 2 is turned off.

As shown in FIG. 8, in the first configuration example, the display end control unit 20 is received from the outside (in the example shown in FIG. 8, the system side control unit) as shown by an arrow 802 in FIG. When the notification signal indicating that the display panel 2 is turned off is notified, it is determined that the display of the display panel 2 is off.

In this case, the notification signal may be transmitted to the display termination control unit 20 according to an instruction such as SPI, or the input terminal of the notification signal may be set to The display termination control unit 20 controls from the input terminal based on the High/Low signal.

(Second judgment method)

On the other hand, FIG. 9 is a view showing a second configuration example of the display device 1 incorporating the display off-time of the detection display panel 2.

As shown in FIG. 9, in the second configuration example, the display device 1 includes a power supply voltage supplied from the outside (in the example shown in FIG. 9 as a system side control unit) to the display device, which is lower than a specific threshold. The power drop detection circuit 900.

When the display power-down detection circuit 900 detects that the power supply voltage is lower than the specific threshold value, the control unit 20 determines that the display of the display panel 2 is off.

Specifically, the power supply drop detecting circuit 900 is provided with a comparator 902. The positive input terminal of the comparator 902 is connected to the supply line of the power supply voltage Vi supplied to the display device. That is, the power supply voltage Vi detected on the supply line of the power supply voltage is input to the positive input terminal of the comparator 902.

On the other hand, the reference voltage Vref is input to the negative input terminal of the comparator 902. The reference voltage Vref is set to a voltage value at which the display panel 2 is turned off when the voltage is equal to or lower than the voltage.

According to this configuration, the comparator 902 outputs a control signal of the Hi level as long as the power supply voltage Vi is higher than the reference voltage Vref. Further, the comparator 902 switches the output control signal from the Hi level control signal to the Low level control signal at a timing when the power supply voltage Vi is lower than the reference voltage Vref.

The display termination control unit 20 switches the timing of the control signal received from the comparator 902 from the Hi level control signal to the Low level control signal. It is determined that the display of the display panel 2 is off.

(Method of applying the turn-on voltage of the gate signal line G)

In the first to fourth embodiments, when the display of the display panel 2 is turned off, the control unit 20 controls the scanning line drive circuit 4 so as to apply a turn-on voltage to all of the gate signal lines G.

Hereinafter, a specific example of the control method will be described with reference to Fig. 10 . Fig. 10 is a view showing various signal waveforms of input and output in the scanning line driving circuit 4.

The scanning line driving circuit 4 of each embodiment is provided with an XAO input terminal. Normally, the display termination control unit 20 supplies a Hi signal to the XAO input terminal.

When the display of the display panel 2 is turned off, the control unit 20 supplies a Low signal to the XAO input terminal when the display is terminated.

The scanning line driving circuit 4 applies a turn-on voltage to all of the gate signal lines G while supplying a Low signal to the XAO input terminal.

For example, in the example shown in FIG. 10, at the timing t1 at which the display panel 2 is turned off, the input signal to the XAO input terminal is switched from the Hi level to the Low level. Further, in FIG. 10, it is shown that the scanning line driving circuit 4 applies a turn-on voltage to all of the gate signal lines G in accordance with the switching.

Furthermore, in the example shown in FIG. 10, at timing t2, the input signal to the XAO input terminal is switched from the Low level to the Hi level. Further, in Fig. 10, it is shown that the scanning line driving circuit 4 terminates the application of the turn-on voltage for all of the gate signal lines G in accordance with the switching.

(Method of applying a ground voltage to the source signal line S)

Hereinafter, a method of applying a ground voltage to the source signal line S will be specifically described. FIG. 11 is a view showing a configuration example of the signal line drive circuit 6 included in the display device 1.

As shown in FIG. 11, the signal line drive circuit 6 includes a source output amplifier circuit 1100 and a source output amplifier circuit control unit 1120. The source output amplifier circuit 1100 has a voltage control circuit 1110, a source output amplifier 1102, and a source output amplifier 1104.

The source output amplifier 1102 supplies a source signal (+) to the source signal line S. The source output amplifier 1104 supplies a source signal (-) to the source signal line S.

The voltage control circuit 1110 is provided between the source output amplifier 1102 and the source output amplifier 1104 and the source signal line S. The voltage control circuit 1110 includes switches S1, S2, S3, and S4.

The switch S1 is disposed between the source output amplifier 1102 and the source signal line S. The switch S2 is disposed between the source output amplifier 1104 and the source signal line S. The switches S3 and S4 are disposed between the ground and the source signal line S.

The voltage control circuit 1110 switches the connection of the source signal line S between the source output amplifier 1102 and the source output amplifier 1104 and the ground by controlling the on/off of the switches.

Thereby, the voltage control circuit 1110 switches the voltage (source output voltage) supplied to the source signal line S between the voltage corresponding to the normal source signal and the ground voltage.

Specifically, the voltage control circuit 1110 is usually turned on by connecting the switch S1 or S2, thereby connecting the source output amplification to the source signal line S. The device 1102 or the source output amplifier 1104 supplies a voltage corresponding to a normal source signal.

Further, when the display of the display panel 2 is turned off, the voltage control circuit 1110 is connected to the source signal line S by the switches S3 and S4, and supplies the ground voltage.

The operation of the voltage control circuit 1110 is controlled by the source output amplifier circuit control unit 1120.

FIG. 12 is a view showing waveforms of various control signals supplied from the source output amplifier circuit control unit 1120 to the voltage control circuit 1110.

As shown in FIG. 12, in general, the source output amplifier circuit control unit 1120 alternately supplies a control signal for switching the switch S1 to ON (ON: ON) and switches the switch S2 to ON for the voltage control circuit 1110. control signal.

At the same time, the source output amplifier circuit control unit 1120 supplies a control signal for turning off each of the switches S3 and S4 to the voltage control circuit 1110.

Thereby, the source output amplifier 1102 and the source output amplifier 1104 are alternately connected to the source signal line S, and the normal source signal is alternately supplied from the source output amplifier 1102 and the source output amplifier 1104.

On the other hand, the timing t1 of FIG. 12 is a timing at which the specific voltage output instruction signal is supplied from the control unit 20 at the time of termination of display, and the display of the display panel 2 is turned off. At the timing t1, the source output amplifier circuit control unit 1120 supplies a control signal for switching the switches S3 and S4 to ON for the voltage control circuit 1110.

At the same time, the source output amplifier circuit control unit 1120 supplies a control signal for turning off each of the switches S1 and S2 to the voltage control circuit 1110.

Thereby, for the source signal line S, the ground is connected to the source output amplifier 1102 as a source, and a ground voltage is supplied.

Hereinafter, a power supply system used in the display device 1 of each embodiment will be described.

(positive and negative power system)

The display device 1 of the first, second, and fifth embodiments employs a so-called positive and negative power supply system. The positive and negative power supply system supplies a source signal (+) to a source output amplifier (+) and a source signal (-) at a voltage range on the + side in a voltage range more on the + side than the ground voltage (0 V). Two source output amplifiers of the source output amplifier are supplied to the power supply system of each source signal.

Fig. 13 is a view showing an example of an amplifier power supply voltage range and an amplifier output range of a positive and negative power supply system.

In the example shown in Fig. 13, the source output amplifier that supplies the source signal (+) sets the amplifier supply voltage range to Vdd1 (6 V) to GND (0 V), and sets its amplifier output range as the source. Very high output (highest output value: 5 V) ~ GND (0 V).

On the other hand, for the source output amplifier that supplies the source signal (-), set its amplifier supply voltage range to GND (0 V) to Vdd2 (-6 V) to GND (0 V), and set its amplifier output range. Set to GND (0 V) ~ source Low output (lowest output value: -5 V).

That is, although the center value (source center) becomes the ground voltage GND (0 V), Considering the introduction of the center value (source center) caused by Cgd, the common voltage COM is set to be slightly closer to the side than the center value (ground voltage (0 V)).

In addition, since the amount of introduction caused by Cgd is different in each module, the common voltage COM is adjusted within the individual adjustment range of the illustrated module.

(one-sided voltage system)

On the other hand, the display devices 1 of the third and fourth embodiments employ a so-called one-sided voltage system. The single-sided voltage system supplies a source signal (+) and a source in a voltage range of either a voltage range of more + side than a ground voltage (0 V) or a voltage range of a more-side voltage range. A source output amplifier of both sides of the signal (-) supplies a power supply system for each source signal.

Figure 14 is a diagram showing an example of an amplifier supply voltage range and an amplifier output range of a single-sided power supply system.

In Fig. 14, the amplifier supply voltage range and the amplifier output range of the source output amplifiers that supply both the source signal (+) and the source signal (-) are shown.

In this example, set the amplifier supply voltage range to Vdd (12 V) to GND (0 V), and set the amplifier output range to source high output (highest output value: 11 V) to source low output (lowest output value). :1 V).

That is, although the center value (source center) is 6 V, the common voltage COM is set to be slightly more side-center than the center value (6 V) in consideration of the introduction of the center value (source center) caused by Cgd.

In this case, since the amount of introduction caused by Cgd is different in each module, the common voltage COM is adjusted within the individual adjustment range of the illustrated module.

(Other examples of positive and negative power systems)

Figure 15 is a diagram showing another example of the amplifier supply voltage range and the amplifier output range of the positive and negative power supply systems.

As described above, in the display device 1 of the first, second, and fifth embodiments, the positive and negative power supply systems in which the common voltage COM shown in FIG. 13 is set to be slightly more than the center value (0 V) are used.

Here, in the display device 1 of the first, second, and fifth embodiments, a positive and negative power supply system in which the common voltage COM and the ground voltage GND are substantially equal to 0 V as shown in FIG. 15 can be employed.

Therefore, when the display of the display panel 2 is switched off, since the common voltage COM has become the ground voltage GND, it is not necessary to perform the operation of changing the common voltage COM to the ground voltage GND, and each of the pixel electrodes of each pixel can be used. The voltage level is changed to be the ground voltage GND and the common voltage COM which are the states in which the charge is most released.

(Specific instructions for the introduction of Cgd)

Hereinafter, the introduction of the zeta potential by Cgd will be specifically described. Fig. 16 is a view for explaining the introduction of the zeta potential caused by Cgd.

As shown in FIG. 16, the potential level of the drain electrode of the TFT 200 of the pixel (i, n) of the display device 1 is set to correspond to the source supplied from the source signal line S(i) via the transistor element 200. The voltage of the signal is charged. Thereafter, the voltage level of the gate electrode of the TFT 200 changes with the voltage of the turn-on voltage Vgl from the gate signal line G(n), and the potential level of the drain electrode of the TFT 200 changes via the Cgd parasitic capacitance.

Due to the above change, both of the positive polarity and the negative polarity are introduced to the Vgl side, so the center value (source center) of the positive and negative polarities is deviated. therefore, The common electrode COM needs to be adjusted.

The fluctuation amount (introduction amount) ΔVgd received by Cgd of the above-described drain electrode is calculated by the following formula (1).

ΔVgd=(Cgd/ΣC)×ΔVg.........Formula (1)

In the above formula (1), ΣC is substantially equal to Cls+Ccs+Cgd+Csd1+Csd2, and ΔVg is equal to the absolute value of Vgh-Vgl.

Clc is the source capacitance between the drain electrode and the common electrode, Ccs is the holding capacitance between the drain electrode and the CS electrode, Csd1 is the parasitic capacitance between the drain electrode and the source signal line S(i), and the Csd2 is the drain The parasitic capacitance between the electrode and the source signal line S(i+1), and the parasitic capacitance between the Cgd gate electrode and the gate signal line G(n).

Further, when the highest value of the signal voltage Vs supplied from the source signal line S(i) is Vsh, and the lowest value is Vsl, the drain potential of the highest value of the signal voltage Vs is changed (after introduction) The voltage) is Vsh-ΔVgd, and the drain potential (voltage after introduction) after the fluctuation of the lowest value of the signal voltage Vs is Vsl - ΔVgd.

Further, the voltage after the variation of the center value of the drain electrode (the voltage after the introduction) is the voltage after the fluctuation of the highest value of the signal voltage Vs (the voltage after the introduction) and the lowest value of the signal voltage Vs ( The average value of the voltage after the introduction {(Vsh - ΔVgd) + (Vsl - ΔVgd) / 2} becomes (Vsh + Vsl) / 2 - ΔVgd.

In the display device 1 of the embodiment, a TFT using a so-called oxide semiconductor is used as the TFT. The oxide semiconductor contains, for example, IGZO (InGaZnOx). As described above, in the display device 1 of each embodiment, it is preferable to use so-called oxygen in the semiconductor layer as the TFT. The TFT of the semiconductor. Below, the advantages are explained.

(TFT characteristics)

Figure 17 shows the characteristics of various TFTs. In FIG. 17, the characteristics of each of a TFT using an oxide semiconductor, a TFT using a-Si (amorphous silicon), and a TFT using LTPS (Low Temperature Poly Silicon) are shown.

In Fig. 17, the horizontal axis (Vgh) shows the voltage value of the on-voltage supplied to the gate in each of the TFTs, and the vertical axis (Id) shows the amount of current between the source and the drain of each of the TFTs.

In particular, the timing shown as "TFT-on" in the figure indicates the timing at which the voltage value corresponding to the turn-on voltage is turned on, and the timing shown as "TFT-off" in the figure indicates the voltage corresponding to the turn-on voltage. The value becomes the timing of the disconnected state.

As shown in FIG. 17, the amount of current (i.e., electron mobility) of the TFT using the oxide semiconductor is higher than that of the TFT using the a-Si.

Although not shown in the drawing, specifically, a TFT using a-Si has an Id current of 1 uA with respect to the TFT-on, and an TFT using an oxide semiconductor has an Id current of 20 to 50 at the time of TFT-on. uA or so.

According to this, it is understood that the TFT using the oxide semiconductor has a higher electron mobility of about 20 to 50 times in the on state than the TFT using the a-Si, and the on-characteristic is excellent.

As described above, in the display device 1 of each of the embodiments, a TFT using a so-called oxide semiconductor is used as the TFT.

Thereby, the display device 1 of each embodiment is connected to the TFT of each pixel. Very good characteristics. Therefore, the amount of electron movement when data is written for each pixel can be increased, so that the time required for writing can be made shorter. Therefore, the voltage level of the pixel electrode of each pixel can be converted into the first voltage for discharging the charge accumulated in the pixel in a shorter time. That is, the electric charges accumulated in the respective pixels of the display panel can be discharged in a shorter time.

(variation)

Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. That is, the embodiment obtained by combining the technical means suitable for modification in the range indicated by the scope of the patent application is also included in the technical scope of the present invention.

(to sum up)

As described above, the display device of the present invention includes: a display panel having a plurality of pixels, a plurality of gate signal lines, and a plurality of source signal lines; and a common electrode for the respective common electrodes of the plurality of pixels a common electrode driving circuit for voltage; a scanning line driving circuit for sequentially selecting and scanning the plurality of gate signal lines; and supplying a source signal from the plurality of source signal lines for each of a plurality of pixels on the selected gate signal line And a signal line driving circuit; and when the display of the display panel is turned off, the display termination control is performed by applying a first voltage for discharging the charge accumulated in the pixel to each of the pixel electrodes of the plurality of pixels mechanism.

According to the display device of the present invention, the voltage level of the pixel electrode of each pixel can be converted into a first voltage for discharging the charge accumulated in the pixel in a short time. In other words, since the electric charges accumulated in the respective pixels of the display panel can be discharged in a short time, display abnormality such as afterimage or flicker does not occur, and the display of the display panel is turned off.

Preferably, in the display device, the display termination control means applies the first electrode to each of the pixel electrode and the plurality of pixels of the plurality of pixels when the display panel is turned off. 1 voltage control.

According to this configuration, not only the voltage levels of the pixel electrodes and the common electrodes of the respective pixels can be converted into the first voltage in a short time, but also the pixel electrodes of the respective pixels which are the cause of the display residual can be further reduced and common. Since the potential difference of the electrodes does not cause display residue, the display of the display panel is broken without causing abnormal display such as afterimage or flicker.

Further, in the display device, preferably, the display termination control means controls the pixel electrodes of the plurality of pixels to apply the common voltage when the display of the display panel is turned off. The respective pixel electrodes of the plurality of pixels and the common electrode of each of the plurality of pixels are controlled such that the first voltage is applied.

According to this configuration, the potential difference between the pixel electrode and the common electrode of each pixel can be made in a short time while eliminating the potential difference between the pixel electrode and the common electrode of each pixel which causes display retention in a shorter time. Since the display voltage is changed to the first voltage, display residue does not occur, and the display of the display panel is turned off without causing display abnormality such as afterimage or flicker.

Further, in the above display device, it is preferable that the display termination control means applies a display for displaying a normal state during normal driving when the display of the display panel is turned off for each of the pixel electrodes of the plurality of pixels. After the voltage is controlled, the first voltage is applied to the respective pixel electrodes of the plurality of pixels and the common electrode of the plurality of pixels.

According to this configuration, since the normal state of all the pixels can be displayed in a shorter time, the voltage level of each of the pixel electrode and the common electrode of each pixel is converted into the first voltage in a short time, so that no display is generated. Remaining, in addition, the display of the display panel is not abnormally displayed without further display of an afterimage or flicker.

Further, in the above display device, it is preferable that the display termination control means transmits a specific instruction signal to the signal line drive circuit and the common electrode drive circuit when the display of the display panel is turned off. The signal line driving circuit controls the pixel electrodes of the plurality of pixels by applying the first voltage method, and applies the first voltage to the common electrode of each of the plurality of pixels from the common electrode driving circuit. The way to control.

According to this configuration, it is possible to realize the operation of the display device of the present invention by simply transmitting a specific instruction signal to the signal line drive circuit and the common electrode drive circuit. Therefore, the display device of the present invention can be realized by simply adding a simple improvement of the display termination control mechanism for transmitting the specific instruction signal to the signal line drive circuit and the common electrode drive circuit with respect to the previous display device. action.

Further, the display device further includes a detecting means for detecting that the power source supplied to the display device is lower than a predetermined threshold value, and preferably the display end control means detects that the power source voltage is lower than the detecting means by the detecting means When the specific threshold value is exceeded, it is determined that the display of the display panel is off.

According to this configuration, the operation of the display device of the present invention can be performed at a timing more suitable when the power supply voltage is lower than a specific threshold value. In particular, in the case where an unexpected power supply voltage drop occurs when the battery in the portable terminal or the like is removed, the timing can be appropriately determined to perform the operation of the display device of the present invention.

Further, in the display device described above, preferably, when the display termination control means receives an instruction signal for disconnecting the display of the display panel from the outside, it is determined that the display of the display panel is turned off.

According to this configuration, since the display of the display panel can be appropriately determined based on the instruction signal received from the outside, the operation of the display device of the present invention can be performed at a more appropriate timing.

Further, in the above display device, it is preferable that the display termination control means controls the display signal on the display panel to be turned off by supplying the ON signal to all of the gate signal lines from the scanning line drive circuit. At the same time, the TFTs of all the pixels on the display panel are switched on, and after the first voltage is applied to the pixel electrodes of the plurality of pixels, the TFTs of all the pixels on the display panel are not switched off.

When the TFT is switched to off, according to the voltage change of the gate signal line, The voltage level of the drain electrode of the TFT due to the parasitic capacitance between the gate electrode of the TFT and the gate signal line varies (so-called introduction due to parasitic capacitance). As a result, in the case where the potential level of the voltage level of the pixel electrode and the voltage level of the common electrode does not occur, the potential difference due to display abnormality or the like occurs due to the above variation.

Therefore, according to this configuration, since the TFTs of all the pixels on the display panel are not switched to be turned off, such a potential difference does not occur.

Further, in the above display device, it is preferable that the display termination control means applies the first voltage to the respective common electrodes of the plurality of pixels after applying the first voltage to the pixel electrodes of the plurality of pixels.

According to this configuration, when the gate signal line is switched off, the potential difference between the voltage level of the pixel electrode and the voltage level of the common electrode can be prevented by the voltage change of the gate signal line due to the introduction of Cgd. .

Further, in the display device described above, the first voltage is preferably a ground voltage.

According to the present invention, the voltage level of the pixel electrode of each pixel can be converted into a ground voltage in a state in which the charge is most released in a short time. In other words, since the electric charges accumulated in the respective pixels of the display panel can be discharged more and more in a short time, the display of the display panel is not broken without causing abnormal display such as afterimage or flicker.

Further, in the display device described above, it is preferable that an oxide semiconductor is used as the semiconductor layer of each of the plurality of pixels. In particular, in the above display device, the oxide semiconductor is preferably IGZO (InGaZnOx).

Leakage current is hardly generated when the oxide semiconductor is in an off state Since the disconnection characteristics are excellent, it is possible to obtain a more remarkable effect by using the present invention for a display device using such a semiconductor.

Moreover, with the above configuration, the ON characteristics of the TFTs of the respective pixels are extremely excellent. Therefore, the amount of electron movement when data is written for each pixel can be increased, so that the time required for the writing can be further shortened. Therefore, the voltage level of the pixel electrode of each pixel can be converted into a first voltage for discharging the charge accumulated in the pixel in a shorter time. That is, the electric charges accumulated in the respective pixels of the display panel can be discharged in a shorter time.

Further, in the display device, preferably, the display termination control means causes the display panel to be turned off after applying the first voltage to each of the pixel electrodes of the plurality of pixels when the display of the display panel is turned off. The way the lights are controlled.

In a general pixel, when light is irradiated, there is a tendency that the amount of fluctuation of the voltage level of the drain electrode increases as compared with the case where the light is not irradiated. Therefore, according to this configuration, by irradiating light before the voltage level of each pixel electrode is converted into the first voltage, the time during which the voltage level of each pixel electrode is shifted to the first voltage can be further shortened.

Further, in the above display device, it is preferable that the signal line drive circuit has a first source output amplifier that supplies a source signal potential higher than a ground voltage, and a signal source potential that is lower than a ground voltage. a second source output amplifier of the source signal, wherein the first source signal and the second source signal are alternately supplied to each of the plurality of source signal lines, and the first voltage and the common voltage are The ground voltage is approximately equal.

According to this configuration, when the display of the display panel is switched off, since the common voltage has become the ground voltage, it is not necessary to perform the operation of changing the common voltage to the ground voltage, and the voltage levels of the pixel electrodes of the respective pixels are converted to The ground voltage and the common voltage in the state in which the charge is most released are consistent.

Moreover, the liquid crystal display device of the present invention is characterized by comprising the display device described in any of the above.

According to the liquid crystal display device of the present invention, a liquid crystal display device which exhibits the same effects as the above display device can be provided.

Moreover, the driving method of the present invention is characterized in that it is a driving method of a display device, and the display device includes: a display panel having a plurality of pixels, a plurality of gate signal lines, and a plurality of source signal lines; a common electrode of each pixel, a common electrode driving circuit for supplying a common voltage; a scanning line driving circuit for sequentially selecting and scanning the plurality of gate signal lines; for each of a plurality of pixels on the selected gate signal line, The plurality of source signal lines are supplied to the signal line driving circuit of the source signal, and the driving method includes: when the display of the display panel is turned off, applying a release to each of the pixel electrodes of the plurality of pixels The control is terminated when the display of the first voltage of the pixel is controlled.

According to the driving method of the present invention, by using the driving method as a driving method of the display device, it is possible to provide a display device that exhibits the same effects as those of the above display device.

[Industrial availability]

The display device and the driving method of the present invention can be utilized in various display devices using an active matrix method such as a liquid crystal display device.

1‧‧‧Display device (liquid crystal display device)

2‧‧‧ display panel

4‧‧‧Scan line driver circuit

6‧‧‧Signal line driver circuit

8‧‧‧Common electrode drive circuit

10‧‧‧Sequence Controller

12‧‧‧Power Generation Circuit

20‧‧‧Display termination control unit (display control mechanism at termination)

Fig. 1 is a view showing a configuration example of a display device of the first embodiment.

Fig. 2 is a view showing the configuration of pixels provided in the display panel.

3(a) to 3(d) show various voltage values of the operation of the display device of the first embodiment when the display is terminated.

4(a) to 4(d) show various voltage values of the operation of the display device of the second embodiment when the display is terminated.

Fig. 5 (a) - (c) show various voltage values of the operation of the display device of the third embodiment at the time of termination of display.

Fig. 6 (a) - (c) show various voltage values of the operation of the display device of the fourth embodiment at the time of termination of display.

7(a) to 7(d) show various voltage values of the operation of the display device 1 of the fifth embodiment when the display is terminated.

FIG. 8 is a view showing a first configuration example of a display device incorporating a timing at which the display of the display panel is turned off.

Fig. 9 is a view showing a second configuration example of a display device which is configured to be added to the timing at which the display of the display panel is turned off.

Fig. 10 is a view showing various signal waveforms of input and output in a scanning line driving circuit.

Fig. 11 is a view showing an example of the configuration of a signal line drive circuit included in the display device.

Figure 12 shows the supply from the source output amplifier circuit control unit to the voltage control A diagram of the waveforms of various control signals of the circuit.

Fig. 13 is a view showing an example of an amplifier power supply voltage range and an amplifier output range of a positive and negative power supply system.

Figure 14 is a diagram showing an example of an amplifier supply voltage range and an amplifier output range of a single-sided power supply system.

Fig. 15 is a view showing another example of the amplifier power supply voltage range and the amplifier output range of the positive and negative power supply systems.

Fig. 16 is a view for explaining the introduction of the zeta potential caused by Cgd.

Fig. 17 is a view showing the characteristics of various TFTs.

1‧‧‧ display device

2‧‧‧ display panel

4‧‧‧Scan line driver circuit

6‧‧‧Signal line driver circuit

8‧‧‧Common electrode drive circuit

10‧‧‧Sequence Controller

12‧‧‧Power Generation Circuit

20‧‧‧Display termination control unit (display control mechanism at termination)

Claims (16)

A display device comprising: a display panel including a plurality of pixels, a plurality of gate signal lines, and a plurality of source signal lines; and a common electrode driving circuit for supplying a common voltage to the respective common electrodes of the plurality of pixels a scan line driving circuit for sequentially selecting and scanning the plurality of gate signal lines; and a signal line driving circuit for supplying a source signal from the plurality of source signal lines for each of the plurality of pixels on the selected gate signal line; And when the display of the display panel is turned off, a display termination control means for controlling the first voltage of the charge accumulated in the pixel is applied to each of the pixel electrodes of the plurality of pixels. The display device of claim 1, wherein the display termination control means applies the common electrode to each of the pixel electrode and the plurality of pixels of the plurality of pixels when the display of the display panel is broken. The first voltage is controlled in a manner. The display device of claim 2, wherein the display termination control means, when the display of the display panel is turned off, is controlled by applying the common voltage to each of the pixel electrodes of the plurality of pixels, Each of the pixel electrodes of the pixels and the common electrode of each of the plurality of pixels are controlled to apply the first voltage. The display device of claim 2, wherein the display control mechanism is terminated When the display of the display panel is turned off, the pixel electrodes of the plurality of pixels are respectively applied with a second voltage for displaying a normal state during normal driving, and then the respective pixels of the plurality of pixels are controlled. The pixel electrode and the common electrode of each of the plurality of pixels are controlled to apply the first voltage. The display device according to any one of claims 2 to 4, wherein the display termination control means transmits a specific indication by the signal line driving circuit and the common electrode driving circuit when the display of the display panel is turned off. And the signal line driving circuit controls the application of the first voltage method to the respective pixel electrodes of the plurality of pixels, and applies the first electrode to the common electrode of the plurality of pixels from the common electrode driving circuit. 1 voltage control. The display device of claim 5, further comprising: a detection mechanism for detecting that the power supply to the display device is lower than a certain threshold; and the display termination control means detects that the power supply voltage is lower than the above When the threshold value is specified, it is determined that the display of the display panel is off. The display device of claim 5, wherein when the display termination control means receives an indication signal for disconnecting the display of the display panel from the outside, it is determined that the display of the display panel is broken. The display device according to any one of claims 1 to 4, wherein the display of the control panel is disconnected from the display panel when the display is terminated And controlling the TFT signals of all the pixels on the display panel to be turned on by simultaneously supplying the ON signals from all of the gate signal lines from the scan line driving circuit; and for the plurality of pixels After the first voltage is applied to each of the pixel electrodes, the TFTs of all the pixels on the display panel are not switched off. The display device according to any one of claims 2 to 4, wherein the display termination control means applies the respective common electrodes of the plurality of pixels after applying the first voltage to the respective pixel electrodes of the plurality of pixels. The first voltage described above. The display device according to any one of claims 1 to 4, wherein the first voltage is a ground voltage. The display device according to any one of claims 1 to 4, wherein the semiconductor layer of the TFT of each of the plurality of pixels uses an oxide semiconductor. The display device of claim 11, wherein the oxide semiconductor is IGZO. The display device according to any one of claims 1 to 4, wherein the display termination control means, when the display of the display panel is turned off, applies the first voltage to each of the pixel electrodes of the plurality of pixels, The backlight of the display panel is controlled to be turned off. The display device of claim 1, wherein the signal line driving circuit includes a first source output amplifier that supplies a first source signal whose source signal potential is positive compared to a ground voltage, and a supply source signal potential and a ground voltage phase. The second source signal is negative a second source output amplifier; and the first source signal and the second source signal are alternately supplied to each of the plurality of source signal lines; wherein each of the first voltage and the common voltage is substantially equal to the ground voltage . A liquid crystal display device comprising the display device according to any one of claims 1 to 4. A driving method is characterized in that it is a driving method of a display device, and the display device comprises: a display panel including a plurality of pixels, a plurality of gate signal lines, and a plurality of source signal lines; and for each of the plurality of pixels a common electrode, a common electrode driving circuit for supplying a common voltage; a scanning line driving circuit for sequentially selecting and scanning the plurality of gate signal lines; and a plurality of source signals for each of a plurality of pixels on the selected gate signal line a signal line driving circuit for supplying a source signal to the line; and the driving method includes: applying a charge for releasing the charge accumulated in the pixel for each of the pixel electrodes of the plurality of pixels when the display of the display panel is broken The control step of the display termination when the voltage is controlled in the manner of 1 voltage.