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TW201228200A - Power converter with low current ripple - Google Patents

Power converter with low current ripple Download PDF

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Publication number
TW201228200A
TW201228200A TW99145585A TW99145585A TW201228200A TW 201228200 A TW201228200 A TW 201228200A TW 99145585 A TW99145585 A TW 99145585A TW 99145585 A TW99145585 A TW 99145585A TW 201228200 A TW201228200 A TW 201228200A
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Taiwan
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switch
series
voltage
capacitor
winding
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TW99145585A
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Chinese (zh)
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TWI407669B (en
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Ching-Shan Leu
Pin-Yu Huang
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Univ Nat Taiwan Science Tech
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Abstract

A power converter with low current ripple is provided, and which includes at least a secondary winding of a transformer and three series circuits. A first series circuit and a second series circuit are parallel connected with a DC input separately. A third series circuit is parallel connected with a third capacitor, and which includes a first switch and a second switch connected in mutual series. Two center endpoints of the first and the third series circuits are connected together. The power converter can effectively reduce the current ripple and avoid high-intensity electromagnetic interference, and can make the voltage stress of the switches of the power converter to be reduced. In addition, this power converter can be flexibly applied to a variety of the circuits of the prior art.

Description

201228200 0990033TW 34644twf.doc/n 六、發明說明: 【發明所屬之技術領域】 最精轉換電路有關,且特別是與-種 I 轉換電路㈣,其可財效地減少電 ==關:電壓應力。此-拓撲結構’除了能夠 吳4電路也可應用於整流器電路。 【先前技術】 屮。f流11電路是將直流輸人電源,轉換成交流電形式輸 —。σ圖1所示,半橋式電路是現有換流器電路技術中的 =電路域。錢輪人電壓源會提供直讀人電流,並 t、、、’且串聯的電容器C1和C2和一組串聯的開關 σ Q2並聯。變壓器T1的初級繞組ρι係分別與前述的 聯電容器和串聯開關的中間端點連接。上、下半橋開關 和Q2會在不同時段導通及截止,因❿得以在變壓器 的-人級繞組S1產生交流輸出電壓ac。 在同樣規格下,相較於純讀㈣雜與全橋式電 未構’半橋式電路架構因為變壓器T1的初級繞組p j只有輸人錢的-半,所以初級繞組ρι會有兩倍的 電流漣波,而導致產生較高強度的電磁干擾(ΕΜι)。 【發明内容】 本發明是針對現有技術的拓撲架構的換流器電路和整 201228200 0990033TW 34644twf.doc/n 流器電路進行改良’以改善其m皮現象。 本發明之主要目標是提供一組切換式電力轉換器,並 藉著使用換流n㈣或整流電路,來達祕低輸入或輸出 之電流漣波之效果。 /士!明之另一目標是要提供一組切換式電力轉換器, ,係糟著使職流H電路或整流電路,並利用變壓器漏電 t電容器來作為無損緩衝器(Snubber),以達錢漏能 篁的回收效果。因此,可以改善該轉換器的效率。 本發明之進'步目標是要提供-組切換式電力轉換 益,其係藉著使用換流器電路或整流電路,並利用兩植電 昼應力較低且相互串聯解導體關,來減 因此,得以進一步提高效率。 貝夭 —為讓本發明的上述特徵和優點能更賴祕,下文特 舉實施例,並配合所附圖式作詳細說明如下。 【實施方式】 現在將詳細參考本發明之實施例,並參照附圖來說明 所述實施例。科,在圖式及實施方式巾使用相同標號的 元件/構件’係代表相同或類似的部分。為能使貴審查委 員清楚本發明電職構組成,以及整體運作方式,兹配合 圖式說明如下: σ ^了實現上述目標,本發明之—實施例的—換流器電 路架構’是用來將直流輸人電壓源Vin,轉換為交流電壓 輸出,如圖2所示’該換流器電路係由包括至少一組變壓 4 201228200 0990033TW 34644twf.doc/n 益的次級k組及二、,且串聯電路所組成,其中三組串聯電路 係.由變壓器T1的兩匝數相同的初級繞組P1和p2、兩個 關Q1和Q2、三個電容器ci、C2和Cc所組成。 幵 第一串聯電路係與直流輸入電壓源Vin相並聯,並由 兩個相互串聯的第一電容器二電容器02所構成。 第二組串聯電路係與直流輸入電壓源Vin相並聯,且 由依序串聯的第一初級繞組P1、第三電容器Cc和第二 級繞組P2所組成,其中第-和第二初級繞植P1和打之 極性相_端點’係分別與直流輸人電壓源Vin的 負端連接,而初級繞組P1和P2之另—極性相同點, 則係分別與第三電容器Cc的兩端點連接。 第三組串聯電路係與前述之第三電容器^相並聯, 且由兩個相互串聯的第-開關^和第二開關吸所 相互串聯的第-電容器C1和第二電容器C2的中 :妾T二互串聯的第一和第二開關Q1和Q2的中間端點 在-個開關週期内,會由兩組交替的控制信號, =動第-和第二開關Q1和Q2之導通或截止。因此,變 适益T1的次級繞組S1將因而產生交流輪出電壓Ac 經過整流濾波後(未繪示),可由電力轅 供直流輸出電壓給負載。 、相輸出化提 本發明的實施例與電路操作原理,將分別以圖3和圖 來說明’圖2的第一和第二開關Q1和Q2將以 %效應電晶體⑽SFETs)代替。假定第—電容器α和 201228200 0990033TW 34644twf.doc/n 第一電容器C2係為兩個相同容值的元件,則第一電容器 ci和第二電容器C2的跨壓將分別等於1/2直流輸入電壓 源Vin。如圖4⑴至圖4 (d)所示,在穩態中,一個開 關週期内有四個操作階段,並詳述如下: 如圖4 (a),為了在第—個時區間,操作驅動控制信 號以使第—開關Q1導通。除了第-電容器C1上的電壓(即 1/2直流輪人電壓源Vin)被提供至第一初級繞、组ρι電壓 外,第三電容器Cc也會經由第三電容器Cc的正端、第— 開關Φ、第二電容器C2、第二初級繞⑽和第三電容哭 =的負端的路徑,而將1/2的直流輸人電壓源—提供至 一::級繞組P2。在第一個時區間,第-電容器ci和第 以二,莫式下操作,而第二電容器則在 2 4⑴所示,在第二個時區間’會操作驅動信號 —關Q1截止。直流輸人電壓源Vin與儲存在 益T1的漏電感的能量對第三電容器&充電。由於變 壓器=的第-和第二初級繞組pl和p2的極性相反,因 而使,第—和第二初級繞組P1和P2的電壓相互抵消,第 三電容器Cc上的電壓即等於直流輸入電壓源Vin。由於漏 電Ϊΐ能量被魏,因此第—開關Q1的麵波形上沒有 電壓犬波’其電壓應力會等於直流輸入電壓源Vin。 如圖4 (c)所示,在第三個時區間,將操作驅動信號 以使得^第二開關Q2導通。除了第二電容器C2上的電壓(即 1/2直流輸入電壓)被提供至第二初級繞組P2電壓外,第 201228200 0990033TW 34644twf.doc/n =第Ϊ電=的正端、第-— 負端,而提供1/2的直流輸人_=^容器的 P1。在第三個日_,第二電容器C2和第三電—/器級^ =電模式下操作,而第―電容器C1則係在^電模式下 以使斤示:在第四個時區間,則操作驅動信號201228200 0990033TW 34644twf.doc/n VI. Description of the invention: [Technical field to which the invention pertains] The most sophisticated conversion circuit, and particularly the I-transformation circuit (4), can effectively reduce electricity == off: voltage stress. This -topology can be applied to the rectifier circuit in addition to the Wu 4 circuit. [Prior Art] 屮. The f-flow 11 circuit converts the DC input power into an AC form. As shown in Figure 1, the half-bridge circuit is the = circuit domain in the existing inverter circuit technology. The money wheel human voltage source provides direct reading of the human current, and t, , , and the series connected capacitors C1 and C2 are connected in parallel with a set of series connected switches σ Q2 . The primary winding ρι of the transformer T1 is connected to the intermediate terminals of the aforementioned junction capacitor and series switch, respectively. The upper and lower half-bridge switches and Q2 will be turned on and off at different times because the AC output voltage ac is generated at the transformer-human winding S1. Under the same specifications, the primary winding ρι has twice the current compared to the purely read (four) hybrid and full-bridge electric unstructured 'half-bridge circuit architecture because the primary winding pj of the transformer T1 has only half the input cost. Chopping, resulting in higher intensity electromagnetic interference (ΕΜι). SUMMARY OF THE INVENTION The present invention is directed to an inverter circuit of the prior art topology and an improved circuit of the 201228200 0990033 TW 34644 twf.doc/n streamer circuit to improve its m skin phenomenon. The main object of the present invention is to provide a set of switched power converters and to achieve the effect of low input or output current chopping by using a commutation n(4) or a rectifying circuit. /Shi! Another goal of Ming is to provide a set of switched power converters, which is a messy H circuit or rectifier circuit, and uses the transformer leakage t-capacitor as a lossless buffer (Snubber) to achieve energy leakage. Recycling effect. Therefore, the efficiency of the converter can be improved. The goal of the present invention is to provide a set-switching power conversion benefit by using an inverter circuit or a rectifying circuit, and using two electrophysical enthalpy stresses and decoupling the conductors in series to reduce To further improve efficiency. In order to make the above features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail below with reference to the accompanying drawings. [Embodiment] The embodiment will now be described in detail with reference to the embodiments of the invention, and with reference to the drawings. The same reference numerals are used to designate the same or similar parts in the drawings and embodiments. In order to enable the reviewing committee to understand the composition of the electrical structure of the present invention, and the overall mode of operation, the following diagram is described as follows: σ ^ to achieve the above objectives, the embodiment of the present invention - the converter circuit architecture is used Converting the DC input voltage source Vin into an AC voltage output, as shown in Fig. 2 'The converter circuit is composed of a secondary k group including at least one set of transformers 4 201228200 0990033TW 34644twf.doc/n And a series circuit, wherein three sets of series circuits are composed of two primary windings P1 and p2 of the same number of turns of the transformer T1, two closed Q1 and Q2, three capacitors ci, C2 and Cc.幵 The first series circuit is connected in parallel with the DC input voltage source Vin, and is composed of two first capacitors and two capacitors 02 connected in series. The second series circuit is connected in parallel with the DC input voltage source Vin, and is composed of a first primary winding P1, a third capacitor Cc and a second winding P2 connected in series, wherein the first and second primary windings P1 and The polarity phase _end point ' is respectively connected to the negative terminal of the DC input voltage source Vin, and the other poles of the primary windings P1 and P2 are the same, and are respectively connected to the two ends of the third capacitor Cc. The third series circuit is connected in parallel with the aforementioned third capacitor, and is in the middle of the first capacitor C1 and the second capacitor C2 which are connected in series by two first-switches and second switches connected in series: 妾T The intermediate terminals of the first and second switches Q1 and Q2 connected in series with each other are turned on or off by two sets of alternate control signals, the second and second switches Q1 and Q2, in one switching cycle. Therefore, the secondary winding S1 of the modified T1 will thus produce an AC output voltage Ac which is rectified and filtered (not shown), and the DC output voltage can be supplied to the load by the power supply. Phase Outputs Embodiments of the present invention and circuit operation principles will be described with respect to Figures 3 and 3, respectively. The first and second switches Q1 and Q2 of Figure 2 will be replaced by % effect transistor (10) SFETs. Assuming that the first capacitor α and 201228200 0990033TW 34644twf.doc/n the first capacitor C2 are two components of the same capacitance value, the voltage across the first capacitor ci and the second capacitor C2 will be equal to 1/2 DC input voltage source, respectively. Vin. As shown in Fig. 4(1) to Fig. 4(d), in the steady state, there are four operation phases in one switching cycle, and the details are as follows: As shown in Fig. 4 (a), in order to operate the drive control in the first time interval The signal is such that the first switch Q1 is turned on. In addition to the voltage on the first capacitor C1 (ie, the 1/2 dc voltage source Vin) is supplied to the first primary winding, the group ρι, the third capacitor Cc is also passed through the positive terminal of the third capacitor Cc, The path of the switch Φ, the second capacitor C2, the second primary winding (10) and the negative terminal of the third capacitor crying =, and the 1/2 DC input voltage source - are supplied to a::-stage winding P2. In the first time interval, the -capacitor ci and the second are operated in the mode, and the second capacitor is shown in 24 (1), and in the second time interval 'the drive signal is operated - the Q1 is turned off. The DC input voltage source Vin and the energy stored in the leakage inductance of the T1 charge the third capacitor & Since the polarities of the first and second primary windings pl and p2 of the transformer = are opposite, the voltages of the first and second primary windings P1 and P2 cancel each other, and the voltage on the third capacitor Cc is equal to the DC input voltage source Vin . Since the leakage energy is Wei, there is no voltage dog wave on the surface waveform of the first switch Q1, and its voltage stress is equal to the DC input voltage source Vin. As shown in Fig. 4(c), in the third time interval, the drive signal will be operated so that the second switch Q2 is turned on. Except that the voltage on the second capacitor C2 (ie, 1/2 DC input voltage) is supplied to the voltage of the second primary winding P2, the 201228200 0990033TW 34644twf.doc/n = the positive terminal, the first-negative terminal of the second power= And provide 1/2 of the DC input _=^ container P1. On the third day _, the second capacitor C2 and the third electric-/--------- electrical mode, and the first capacitor C1 is in the electro mode to indicate: in the fourth time interval, Operating the drive signal

變壓! τ二、Λ92截止。直流輸入電壓源、Vin與儲存在 支堡裔T1的漏電感中的能量會對第三電容器C H1111的初級繞組PM°P2的極性相反,因而使得 初U且Ρ1和Ρ2的電壓相互抵消, ^壓會等於直流輪人電壓源Vln。由於漏電感的能量^ ,吸收’因此第—開關Q1的電壓波形上沒有電壓突波, 其電壓應力係等於直流輸入電壓源Vin。 如圖5 (a)和圖5 (b)所*,其等分別齡現有半橋 式換流器技術’以及本發明半橋式換流器技術的幾個主要 的電流波形,並進行電路特性比較。如圖5⑻所示,因 =有第二電各S Ce將在半個卫作週期内分別充電及放 ’邊壓a T1的漏感與第三電容器Ce會形成二階效應 second order effect),而使得本發明之輸入電流加的電 ==幅降低。因此’其所需的輸入電容器數量將 本發明所提出的換流器中的開關^和吸,除了可使 上述提到的M0SFET開關外,還可以其他主動式半導體 201228200 0990033TW 34644twf.doc/n 開關替換。 如圖6所示為本發明的第二實施例,其中標號^及 Φ之兩個半導體開關會形成第一對開關Q1-Q3,以取代圖 2的第一半導體開關Q1 ’標號Q2及Q4之兩個半導體開 關則會形成第二對開關q2_q4,以取代圖2的第二半導體 開關Φ ’而在圖6卿電路帽分別加人兩個箝位二極體 DCl和Dc2,以確保相互串聯的第一對開關Qi, ^二 對開關Q2 · Q4中的各個半導體_,都具有綱的電壓應 力。因此,可以使用較低電賴格的半導體開關來降低導 通損耗’並提高轉換效率。與第_實施例進行比較,只有 第三組串聯電路的組成及操作行為需要作進-步的補充, 第三組串聯電路係與第三電容器Cc相並聯,且係由 兩個相互串聯的第一對及第二對開關qi_q3和Q2_Q4組 成。^-箝位二極體Del是連接在直流輸人龍-的正 =rf開關φ·φ的中心端點,而第二箝位二極體 疋?,二對開關Q2_Q4的令心端點和直流輸入 的負端。第-電容器C1和第二電容器c2的中心 端點係與第一半導體開關Q1和第― 端點連接。 Μ第-體開關φ的中心 用’兩對交替的驅動信號係分別 ,來同時驅動第-對或第二對開關Q1_Q3或Q2_Q4。由於 I甘位二極體Del和Dc2t交替的導通,而使得第一對 二對開關Q1-Q3與q2_q4的電壓,分別籍制在一半的輪 201228200 0990033TW 34644twf.doc/n 入電壓(l/2Vin)。 因此’次級繞組S1將會產生一個交流輸出電壓ac。 在經過整流和濾波後(未繪示),電力轉換器會對負載提 供直流輸出電壓。Transforming pressure! τ 2, Λ 92 cutoff. The DC input voltage source, Vin and the energy stored in the leakage inductance of the Fortune T1 will have opposite polarities of the primary winding PM°P2 of the third capacitor C H1111, thus causing the initial U and the voltages of Ρ1 and Ρ2 to cancel each other out, ^ The pressure will be equal to the DC wheel human voltage source Vln. Since the energy of the leakage inductance ^, absorption', there is no voltage surge on the voltage waveform of the first switch Q1, and the voltage stress is equal to the DC input voltage source Vin. As shown in Fig. 5 (a) and Fig. 5 (b), the main half-bridge converter technology of the respective ages and the main current waveforms of the half bridge converter technology of the present invention, and circuit characteristics Comparison. As shown in Fig. 5 (8), because there is a second power, each Ce will charge and discharge the leakage inductance of the side voltage a T1 and the third capacitor Ce to form a second order effect in a half of the guard cycle, and The electric current == amplitude of the input current of the present invention is lowered. Therefore, the number of input capacitors required by the present invention will be the switch and the suction in the converter proposed by the present invention, in addition to the above-mentioned MOSFET switch, other active semiconductors 201228200 0990033TW 34644twf.doc/n switch replace. FIG. 6 shows a second embodiment of the present invention, wherein two semiconductor switches labeled with ^ and Φ form a first pair of switches Q1-Q3 instead of the first semiconductor switch Q1' of FIGS. 2, Q2 and Q4. The two semiconductor switches form a second pair of switches q2_q4 instead of the second semiconductor switch Φ' of FIG. 2, and two clamping diodes DC1 and Dc2 are respectively added to the circuit cap of FIG. 6 to ensure mutual connection. The first pair of switches Qi, ^ each of the two pairs of switches Q2 · Q4 have a voltage stress. Therefore, a semiconductor switch of a lower electric grid can be used to reduce the conduction loss' and improve the conversion efficiency. Compared with the first embodiment, only the composition and operation behavior of the third series circuit need to be supplemented by the further step, and the third series circuit is connected in parallel with the third capacitor Cc, and is connected by two series in series. A pair and a second pair of switches qi_q3 and Q2_Q4 are formed. ^-Clamp diode diode is connected to the center terminal of the positive =rf switch φ·φ of the DC input dragon--, and the second clamp diode 疋?, the second pair of switches Q2_Q4 The negative side of the DC input. The center terminals of the first capacitor C1 and the second capacitor c2 are connected to the first semiconductor switch Q1 and the first terminal. The center of the Μ-body switch φ is used to drive the first pair or the second pair of switches Q1_Q3 or Q2_Q4, respectively, by 'two pairs of alternate drive signals. Due to the alternating conduction of the I-gland diodes Del and Dc2t, the voltages of the first pair of two pairs of switches Q1-Q3 and q2_q4 are respectively made in half of the round 201228200 0990033TW 34644twf.doc/n input voltage (l/2Vin ). Therefore, the secondary winding S1 will produce an AC output voltage ac. After rectification and filtering (not shown), the power converter provides a DC output voltage to the load.

再次說明,針對一應用實施例,本發明所提出的轉換 器中的開關,除了如圖7所示的,可以使用上述提到的 MOSFET半導體開關元件以纟卜,還可則域其他主動式半 導體開關或是任何機電開關。 本發明的前述兩實施例可以將它的功能從一個換流器 電路延伸到整流器電路,將說明如下: β —如圖8所示,其係為本發明的第三實施例。其是將變 =T1 ^級繞組P1上的交流電壓,轉換成直流輸出電 由包括至少一組變壓器T1白勺初級繞組P1及 之=心J所組成,其中三組串聯電路係由變壓器T1Again, for an application embodiment, the switch in the converter proposed by the present invention, in addition to the one shown in FIG. 7, may use the above-mentioned MOSFET semiconductor switching element, and may also be other active semiconductors. Switch or any electromechanical switch. The foregoing two embodiments of the present invention can extend its function from an inverter circuit to a rectifier circuit, as will be explained below: β - as shown in Figure 8, which is a third embodiment of the present invention. It converts the AC voltage on the winding P1 of the variable =T1^ into a DC output power. It consists of a primary winding P1 comprising at least one set of transformers T1 and a core J, wherein the three series of series circuits are connected by a transformer T1.

Cc所組成。電谷裔C〇1和Co2以及一個第三電容器 w 係與錢如麵〜相並聯 兩個相互串聯的輪出電容器㈤和如。聯 括依序串聯㈣壓V。相並聯,並包 C〇 T1 S1和第二次級繞組s二、組S2 ’其中第-次級繞組 輸出電壓化的⑼連m無’係分別與直流 鲕連接而第一次級繞組S1和第 201228200 0990033TW 34644twf.doc/n --人級繞組S2之另—相同極性 電容器兩端點連接。 ,則係分別與第三 第二組串聯電路係與第三 個相互串聯的二極體m和m组成。C相並聯,且由兩 相互串聯的輪出電容器Cowcw、、山、 相互串聯的二極體D 々中〜螭點,以及 假設第-輸出電容哭端點係連接在一起。 相同電容值,第—幹出;—和第一輸出電容器C02具有 乐輸出電容器Col和笫-认b兩― 的跨壓,分別為直流輸出電壓v〇的一輪出電谷器C〇2 級繞組P1上的電壓,軸合到第—欠Ti的初 級繞組S2以產生交流電壓。因此,如圖= 且S1和第二次 所示’二極體m和D2係分別因順 』:,d) 導通和截止。在轉能 ""向偏壓而父替地 段: 穩態中,一個開關週期内會有四個操作階 路。變:器的所T ’其係操作在第-個時區間的等效電 變壓器η的次二、fnpl會將輸人的交流電壓相合到 次級繞纽S1的正=楚並經由變壓器T1的第-及第輸出電容11C。2、二極體m if提=的負端點迴路,來對第-輪出電容 ΐ 八電電流;同時,經由變壓器Τ1的第一次級W S1之正端點、自番Ώ _ 人、,及繞組 及第-.欠級輸出電容器c。2、二極體如 且1之負端點迴路,來提供負載R所兩Μ 電f:此外’變壓器蝴二次級繞組S2之正端之: 纹第—輸出電容器co2、二極體D1及第三電容器Cc: 201228200 0990033TW 34644twf.doc/n 路徑’而使得第三電容器Ce於充電模式下操作。在第〜 個時區間内,第-輪出電容器㈤和第三電容器&係於 充電的工作模式下操作。反之,第二輸出電容器㈤則係 於放電的工作模式下操作。 如圖9(b),為了操作在第二個時區間的等效電略。 變壓器T1的次級側的交流電壓為零電位。第一或第二欠 級繞組S1和S2 ’都無法使二極體D1導通。此時,餘f 在變壓器τι的次級側漏感和第三電容器Cc的能量,會二 由變壓器T1的第一次級繞組S1、輸出負载R、變壓器丁 的第二次級繞組S2’來提供負载R所需的電流。由於 器T1的兩組次級繞組S1和S2的極性減,跨在 Ή的第—和第二次级繞組S1 * S2的電壓將相互抵消,^ 三電容器Cc的電壓會等於輸出電壓。 | 收,從而第一二極體m的電壓波形沒== ^力專於輸出電Φ Vo。此外’由於變壓器τι的 電容器C:的能量會形成二階效應,所輸出的 仟以大幅降而所需的輪出電容器就可以大大 如圖9(c),其係操作在第三個時區 T1的初級繞組P1會將輸人的交流電_合到變壓 器T1的次級繞、组S1和S2,經由變壓器τι的第二 ,S2之正端點、二極體D2、第二輪出電容器Cq第、·: 負端::卜供第 充電電流’同時’經由㈣器T1的第二次級繞組S2之正 11 201228200 0990033TW 34644twf.doc/n 點、一極體D2、第一輸出電容器c〇i、負載r、及二次 繞組S2之負端點迴路,來提供負載所需的電流。此外, 變壓器T1的第一次級繞組S1正端點,會經由第三電容器 Cc、二極體D2、第一輸出電容器c〇卜及第一次級繞纽 S1負端點的路徑,而使得第三電容器以於充電模式下操 作。在第二個時區間内,第一輸出電容器c〇1和第三電容 器Cc係於充電的工作模式下操作。反之,第二輸出電容 器C〇2則於放電的工作模式下操作。 如圖9 (d) ’其係操作在第四個時區間的等效電路。 、楚壓器T1的次級側的交产雷 T1的第-戍第-.欠jit 為零電位。無論是賴器 導iTm;? si和s2,都無法使二極體仍 导通此時’储存在變厭 芎垩°〇 T1的次級侧漏感和第三電容 窃的此里,將經由變壓考 負載r及變壓器T1的第_。的第一m组s卜輸出 需的電流。由於_ 3 ΤΓ人級繞組S2,而提供負載R所 性相反,跨在變壓器°T1 ^的兩組次級繞組S1 *S2的極 的電壓會相互抿消1 一 ^第—和第二次級繞組S1和S2 由於洩漏能量被吸收,:^ CC的電壓等於輸出電壓。 電壓突波,其麵庫力1^;二極體D2的電壓波形沒有 器η的次級侧於^電壓%。此外,由於變壓 應,輪出電流漣油胳/苐二電容器Cc的能量會形成二階效 可以大大降低。/侍以大幅降低,所需的輸出電容器便 在圖8的實施例中 件,也可以使用如圖二極體D1和D2作為整流元 M u甲所示的M0SFET同步整流,或 201228200 0990033TW 34644twf.doc/n 是二極體與mosfet同步整流的組合以提高轉換效率。 圖11所示是根據本發明的第四實施例,其中標號D1 及D3之兩個整流元件會形成第一對整流元件D1_D3,以 取代圖8的二極體D1,標號D2及D4之兩個整流元件會 形成第二對整流元件D2-D4,以取代圖8的二極體D2,且 在圖11所示電路中另外增加兩個箝位二極體DC1和Dc2, 以保證第一對整流元件D1-D3和第二對整流元件D2-D4 的各個整流元件’都有相同的電壓應力,丨/2輸出電壓v〇。 因此,得以使用低電壓規格的整流元件,來減少導通損施, 提南轉換效率。 與第三實施例比較,其只有第三組串聯電路的組成與 操作原理需要作進一步的補充,並說明如下: 第三組串聯電路係與第三電容器CC相並聯,並由兩 個相互串聯的第一對整流元件D1-D3以及第二對整流元件 D2-D4組成。第一箝位二極體Dcl是連接在直流輸入電壓 源Vin的正端,以及第一對整流元件D1D3的中心端點, 而第二箝位二極體Dc2則是連接在第二對整流元件D2_D4 的中心端點和直流輸入電壓源Vin的負端。第一輸出電容 器Col和第二輸出電容器Co2的中心端點,係與第一整流 元件D1和第二整流元件D2的中心端點連接。 在一個開關切換周期内,第一對整流元件D1_D3和第 二對整流元件D2_D4,會因順向偏壓或逆向偏壓而分別導 通或截止。由於箝位二極體Del和De2係交替地導通,而 使得兩對整流元件D1_D3與D2-D4魏,係分別籍制在 13 201228200 tWy〇U33'r\V 34644twf.doc/n 一半的輸出電壓(l/2V〇)。 在圖11的實施例中,以二極體D卜D2、D3和D4來 作為整流器之元件。為提高效率,整流元件亦可為本發明 第五實施例的圖12之MOSFET同步整流元件,或是任何 二極體與同步整流元件的組合之衍生實施例。 本發明之「低電流漣波電力轉換電路」的所有實施例 中之s亥開關’係以使用二極體或金屬氧化場效應電晶體(内 建二極體body diode可資利用作為嵌位二極體)為範例。 但其他合適的元件,包括現有的或未來發展的技術所開發 之半導體主動開關元件:如電晶體(BJT)、絕緣閘級電 晶體(IGBT),甚至微機電開關(Micro Machined Switch ), 都可資利用。 本發明之「低電流漣波電力轉換電路」所揭露的技術 可以與各種習知電路架構組合使用。以本發明整流器電路 為例,先前技藝的各種電路架構之換流器電路,可以搭配 本發明之整流器電路組合使用;同時,先前技藝的各種電 路架構之整流器電路,亦可以搭配本發明之換流器電路組 合使用。唯以上所述,僅為本發明之最佳可行實施例,而 不應據此而侷限本發明之專利範圍,同理,舉凡應用本創 作說明書及圖式内容所為之等效結構變化,均皆包含於本 發明之範圍内,核予陳明。 如前說明可知,本發明為提供一種精簡的電路架構, 其藉由巧妙軌置電容ϋ,變壓_合_及半導體開 關,而保有低電越衝及開航件所承受的低錢應力的 201228200 0990033TW 34644twf.doc/n 特性。Cc is composed. Electric Gu C1 and Co2 and a third capacitor w are connected in parallel with the money as in the face-to-face two-in-one round-out capacitors (5) and as. In addition, the series (four) pressure V is sequentially connected. Parallel to each other, and including C〇T1 S1 and second secondary winding s II, group S2 'where the first-secondary winding output voltage is (9) connected with m's respectively connected to the DC winding and the first secondary winding S1 and No. 201228200 0990033TW 34644twf.doc/n - The other-level winding S2 is connected at both ends of the same polarity capacitor. Then, it is composed of a third and second series circuit system and a third diode m and m connected in series with each other. The C phases are connected in parallel, and the two capacitors Cowcw, the mountains, the diodes D 相互 in the series connected to each other, and the first output capacitors are connected to each other. The same capacitance value, the first - dry out; - and the first output capacitor C02 has a cross output voltage of the music output capacitor Col and 笫-recognition b, respectively, a DC output voltage v 〇 one round of the output grid C 〇 2 winding The voltage on P1 is coupled to the first winding S2 of the under-Ti to generate an AC voltage. Therefore, as shown in Fig. = and S1 and the second time, the 'diodes m and D2 are turned on and off, respectively, because: d). In the transfer "" to the bias and the parent: in steady state, there will be four operating steps in one switching cycle. Change: the T' of the device is operated in the second time interval of the equivalent electric transformer η second, fnpl will match the input AC voltage to the secondary winding S1 positive = Chu and via the transformer T1 The first and the output capacitors 11C. 2, the negative terminal circuit of the diode m if mention =, to the first-round capacitor ΐ eight electric current; at the same time, the positive end of the first secondary W S1 via the transformer Τ1, from the Panyu _ person, , and the winding and the -. under-stage output capacitor c. 2, the diode and the negative terminal circuit of 1 to provide the load R two Μ electric f: In addition, the 'transformer butterfly secondary winding S2 positive terminal: the first output capacitor co2, diode D1 and The third capacitor Cc: 201228200 0990033TW 34644twf.doc/n path' causes the third capacitor Ce to operate in the charging mode. In the first time interval, the first-out capacitor (5) and the third capacitor & are operated in the charging mode of operation. Conversely, the second output capacitor (5) operates in the discharge mode of operation. As shown in Fig. 9(b), in order to operate the equivalent circuit in the second time interval. The AC voltage on the secondary side of the transformer T1 is zero potential. Neither the first or second under windings S1 and S2' can turn on the diode D1. At this time, the leakage inductance of the residual f at the secondary side of the transformer τι and the energy of the third capacitor Cc are caused by the first secondary winding S1 of the transformer T1, the output load R, and the second secondary winding S2' of the transformer D. Provide the current required for the load R. Since the polarities of the two sets of secondary windings S1 and S2 of the device T1 are reduced, the voltages across the first and second secondary windings S1 * S2 of Ή will cancel each other, and the voltage of the three capacitor Cc will be equal to the output voltage. | Receive, so that the voltage waveform of the first diode m is not == ^ force is dedicated to the output power Φ Vo. In addition, because the energy of the capacitor C: of the transformer τι will form a second-order effect, the output of the 仟 can be greatly reduced and the required round-out capacitor can be greatly as shown in Fig. 9(c), which operates in the third time zone T1. The primary winding P1 will combine the input AC to the secondary winding of the transformer T1, the groups S1 and S2, the second of the transformer τι, the positive terminal of S2, the diode D2, and the second output capacitor Cq. ·: Negative terminal:: Bu supply the first charging current 'at the same time' via the second secondary winding S2 of the (4) device T1. 201228200 0990033TW 34644twf.doc/n point, one pole D2, first output capacitor c〇i, The load r, and the negative terminal loop of the secondary winding S2, provide the current required by the load. In addition, the positive terminal of the first secondary winding S1 of the transformer T1 is caused by the path of the third capacitor Cc, the diode D2, the first output capacitor c, and the negative terminal of the first secondary winding S1. The third capacitor operates in a charging mode. In the second time interval, the first output capacitor c〇1 and the third capacitor Cc operate in a charging mode of operation. Conversely, the second output capacitor C〇2 operates in the discharge mode of operation. Figure 9 (d) ' is an equivalent circuit operating in the fourth time interval. The cross-section of the secondary side of the presser T1 is the first-戍----jit of the T1 is zero potential. Neither the sub-conductor iTm; the si and the s2 can make the diode still turn on. At this time, the secondary side leakage inductance and the third capacitance thief stored in the anamorphism 〇°T1 will pass through. The voltage test load r and the _ of the transformer T1. The first m group s outputs the required current. Due to the fact that the load R is reversed due to the _ 3 ΤΓ human-level winding S2, the voltages across the poles of the two sets of secondary windings S1 * S2 across the transformer °T1 ^ will cancel each other. Windings S1 and S2 are absorbed due to leakage energy: ^^ The voltage of CC is equal to the output voltage. The voltage surge has a surface area of 1^; the voltage waveform of the diode D2 has no secondary side of the device η. In addition, due to the voltage change, the energy of the current-carrying oil/chopper capacitor Cc can be greatly reduced. / The servo is greatly reduced, the required output capacitor is in the embodiment of Fig. 8, and the MOSFET synchronous rectification shown by the diodes D1 and D2 as the rectifying element M u can also be used, or 201228200 0990033TW 34644twf. Doc/n is a combination of diode and mosfet synchronous rectification to improve conversion efficiency. Figure 11 shows a fourth embodiment of the present invention in which two rectifying elements of the numerals D1 and D3 form a first pair of rectifying elements D1_D3 instead of the diode D1 of Fig. 8, two of the numbers D2 and D4. The rectifying element forms a second pair of rectifying elements D2-D4 instead of the diode D2 of FIG. 8, and two additional clamping diodes DC1 and Dc2 are added in the circuit shown in FIG. 11 to ensure the first pair of rectifications. The elements D1-D3 and the respective rectifying elements of the second pair of rectifying elements D2-D4 have the same voltage stress, 丨/2 output voltage v〇. Therefore, it is possible to use a rectifying element of a low voltage specification to reduce the conduction loss and the southing conversion efficiency. Compared with the third embodiment, only the composition and operation principle of the third series circuit need to be further supplemented, and the following is explained: The third series circuit is connected in parallel with the third capacitor CC, and is connected in series by two. The first pair of rectifying elements D1-D3 and the second pair of rectifying elements D2-D4 are composed. The first clamp diode Dcl is connected to the positive terminal of the DC input voltage source Vin and the center end of the first pair of rectifying elements D1D3, and the second clamp diode Dc2 is connected to the second pair of rectifying elements. The center end of D2_D4 and the negative terminal of the DC input voltage source Vin. The center end points of the first output capacitor Col and the second output capacitor Co2 are connected to the center terminals of the first rectifying element D1 and the second rectifying element D2. During a switching cycle, the first pair of rectifying elements D1_D3 and the second pair of rectifying elements D2_D4 are respectively turned on or off due to forward bias or reverse bias. Since the clamp diodes Del and De2 are alternately turned on, the two pairs of rectifying elements D1_D3 and D2-D4 are respectively produced at the output voltage of 13 201228200 tWy〇U33'r\V 34644twf.doc/n. (l/2V〇). In the embodiment of Fig. 11, diodes D, D2, D3 and D4 are used as elements of the rectifier. To improve efficiency, the rectifying element can also be a MOSFET synchronous rectifying element of Fig. 12 of the fifth embodiment of the invention, or a derivative embodiment of any combination of a diode and a synchronous rectifying element. In all embodiments of the "low current chopper power conversion circuit" of the present invention, a s-switch is used to use a diode or a metal oxide field effect transistor (a built-in diode body diode can be utilized as a clamp II). Polar body) is an example. However, other suitable components, including semiconductor active switching components developed by existing or future developed technologies: such as transistors (BJT), insulated gate-level transistors (IGBT), and even Micro Machined Switch, can be used. Utilization. The technique disclosed in the "low current chopper power conversion circuit" of the present invention can be used in combination with various conventional circuit architectures. Taking the rectifier circuit of the present invention as an example, the converter circuits of various circuit architectures of the prior art can be used in combination with the rectifier circuit of the present invention; meanwhile, the rectifier circuits of various circuit architectures of the prior art can also be combined with the commutation of the present invention. The circuit is used in combination. The above is only the best feasible embodiment of the present invention, and the scope of the patent of the present invention is not limited thereto. Similarly, the equivalent structural changes of the present specification and the drawings are all applicable. It is included in the scope of the present invention and is approved by Chen Ming. As can be seen from the foregoing description, the present invention provides a simplified circuit architecture that utilizes a smart rail-mounted capacitor 变, a transformer _ _ and a semiconductor switch, while maintaining a low-voltage overshoot and low-cost stress on the starting part of the 201228200 0990033TW 34644twf.doc/n Features.

雖然本發明已以實施例揭露如上,然其並非用以阳a 本發明,任何所屬技術領域中具有通常知識者,在不脫^ 本發明的精神和範圍内,當可作些許更動與潤飾,故本發 明的保護範圍當視後附的申請專利範圍所界定者為準。S 【圖式簡單說明】 圖1是先前技藝之半橋式電力換流器電路架構。 圖2是依照本發明之一示意圖,其具有低電流漣波之 半橋式電力換流器電路架構。 圖3和圖4(a)至圖4(d)是依照本發明之—實施例, 其具有低輸入電流漣波之半橋式電力換流器電路架構,以 及操作原理說明之等效電路圖。 圖5 (a)和圖5 (b)分別為先期技藝及本發明之半橋 式電力換流器電路架構主要波形圖,以比較各電路特性。 圖6和圖7是依照本發明之二示意圖及實施例,其具 有低輸入電流漣波之半橋式電力換流器的電路架構。 圖8和圖9 (a)至圖9 (d)是依照本發明之又一實施 例’其具有低輸出電流漣波之倍壓電力整流器電路架構, 以及及操作原理說明之等效電路圖。 圖10至圖12是依照本發明之又三實施例,具低輸出 電流漣波之倍壓電力整流器電路架構。 15 201228200 0990033TW 34644twf.doc/n 【主要元件符號說明】 AC :交流輸出電壓 Cc :第三電容器 Col :第一輸出電容器 Co2 :第二輸出電容器 C1 :第一電容器 C2 :第二電容器 Del :第一箝位二極體Although the present invention has been disclosed in the above embodiments, it is not intended to be a part of the present invention, and any one of ordinary skill in the art can make a few changes and refinements without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims. S [Simple Description of the Drawings] FIG. 1 is a circuit structure of a half bridge type power converter of the prior art. 2 is a schematic diagram of a half bridge power converter circuit architecture with low current chopping in accordance with one aspect of the present invention. 3 and 4(a) to 4(d) are circuit diagrams of a half bridge type power converter having a low input current chopping, and an equivalent circuit diagram illustrating the principle of operation, in accordance with the present invention. Fig. 5 (a) and Fig. 5 (b) are main waveform diagrams of the prior art and the half bridge type power converter circuit architecture of the present invention, respectively, to compare the characteristics of the circuits. 6 and 7 are circuit diagrams of a half bridge type power converter having low input current chopping in accordance with a second schematic diagram and an embodiment of the present invention. Fig. 8 and Fig. 9(a) to Fig. 9(d) are circuit diagrams showing a circuit structure of a voltage doubler power rectifier having a low output current chopping, and an equivalent circuit diagram illustrating the principle of operation, in accordance with still another embodiment of the present invention. 10 to 12 are circuit structures of a voltage doubler power rectifier with low output current chopping in accordance with still another embodiment of the present invention. 15 201228200 0990033TW 34644twf.doc/n [Description of main component symbols] AC : AC output voltage Cc : Third capacitor Col : First output capacitor Co2 : Second output capacitor C1 : First capacitor C2 : Second capacitor Del : First Clamping diode

Dc2:第二箝位二極體 _ D1 :第一二極體 D2 :第二二極體 D3 :第三二極體 D4 :第四二極體Dc2: second clamp diode _ D1 : first diode D2 : second diode D3 : third diode D4 : fourth diode

Iin :輸入電流 P1 ··變壓器的第一初級繞組 P2 :變壓器的第二初級繞組 Q1 :第一開關 Q2:第二開關 鲁 Q3 :第三開關 Q4 :第四開關 R :負載 51 :變壓器的第一次級繞組 52 :變壓器的第二次級繞組 T1 :變壓器Iin: input current P1 · the first primary winding P2 of the transformer: the second primary winding Q1 of the transformer: the first switch Q2: the second switch Lu Q3: the third switch Q4: the fourth switch R: the load 51: the first of the transformer a secondary winding 52: a second secondary winding T1 of the transformer: a transformer

Vin :直流輸入電壓源 Vo :直流輸出電壓 16Vin : DC input voltage source Vo : DC output voltage 16

Claims (1)

201228200 0990033TW 34644twf.doc/n 七、申請專利範圍: 1· 一種低電流漣波的電力轉換電路,其係用 直流電壓轉換為交流電壓輸出,包括 入 以將輪 變壓器’其包括至少—次級繞組和具有同 -第-初級繞組及-第二初級繞組,該第—初級繞给 二初級繞組係以磁轉合方式,而將輸出交流=二第 次級繞組; k彳/、予該 包括聯:路,其係與輸入直流電壓相並聯,且 包括相互串聯的一第一電容器和一第二電容器; 且 勺括:it?聯電路’其係與輸入直流電壓相並聯,且 ο括依序串聯的該第一初級繞組、一第三 二該第一初級繞組與第二初級繞:二 係77別與輸人直流電壓的正端點與負端點連接在— 包括相hi串聯電路,其係細第三電容11相並聯,並 =的一第一開關和—第二開關;以及 共同端點,盥# 电4态和第一電谷器的 起。…亥第開關和第二開關的共同端點連接在_ 該二範圍第1項所逃的電力轉換電路,立中 ㈣A第一開關係為一個金屬吩八甲 半導體開關或機電開關。 @效應電晶體、主動 3·種低電流漣波的電力轉換m 直流電_換為交流電壓輸出,=路’其侧以將輸入 17 201228200 0990033TW 34644twf.doc/n -MM器’其包括至少一次級繞組和具有同樣阻數的 了第一初級繞組及一第二初級繞組,該第一組初級繞組和 第一組初級繞組係以磁轉合方式,而將輸出交流電壓提供 予該次級繞組; 一第一組串聯電路,其係與輸入直流電壓相並聯,且 包括相互串聯的一第一電容器和一第二電容器; 一第二組串聯電路,其係與輸入直流電壓並相聯,且 包括依序串聯之該第-初級繞組、—第三電容器及該第二 初級繞組,其中該第-初級繞組與第二初級繞组的同極性 ^ k點’係分別與輸人直流電壓的正端點與貞端點連接在— 起; 一第二組串聯電路,其係與該第三電容器相並聯,並 包括相互串聯的第一對開關和第二對開關,其中該第—對 開關包括相互串聯的一第一開關及一第三開關,該 開關包括相互串聯的一第二開關及一第四開關; 第--極體’其係連接在輸人直流電壓的正端點與 S亥第一開關及該第三開關的共同端點間; -第二二極體’其係連接在該第二開關及該第四 · 的共同端點與輸入直流電壓的負端點間;以及 一紐路線,其係用以將該第一電容器和第二電容 共同端點,與該第H關和第二開關的共同端輯接在一 起。 4.如申請專利範圍第3項所述的電力轉換電路, 該第一開關、第二開關、第三開關及第四開關,係為:個 18 201228200 0990033TW 34644twf.doc/n 金屬氧化場效應電晶體、主動半導體開關或機電開關。 5. —種低電流漣波的電力轉換電路,其係用以將輸入 交流電壓轉換為直流電壓輸出,包括: 一變壓器,其包括至少一初級繞組和具有同樣匝數的 一第一次級繞組及一第二次級繞組,該初級繞組係以磁耦 合方式,將輸出交流電壓提供予該第一次級繞組和該第二 次級繞組; 0 —第一組串聯電路,其係與輸出直流電壓相並聯,且 包括相互串聯的一第一電容器和一第二電容器; 一第二組串聯電路,其係與輸出直流電壓相並聯,且 包括包括依序串聯的該第一次級繞組、一第三電容器及該 第二次級繞組,其中該第一次級繞組與第二次級繞組的同 極性端點,係分別與輸出直流電壓的正端點與負端點連接 在一起; 一第三組串聯電路,其係與該第三電容器相並聯,且 包括相互串聯的一第一開關和一第二開關;以及 ⑩ 一短路線,其係將該第一電容器和第二電容器的共同 端點,與該第一開關和第二的開關共同端點連接在一起。 6. 如申請專利範圍第5項所述的電力轉換電路,其中 該第一開關或第二開關,係為一個整流二極體、金屬氧化 場效應電晶體或主動的半導體開關。 7 —種低電流漣波的電力轉換電路,其係用以將輸入 交流電壓轉換為直流電壓輸出,包括: 一變壓器,包括至少一初級繞組和同樣匝數的一第一 19 201228200 0990033TW 34644twf.doc/n 次級繞組及一第二次級繞%, 式,將輸出交流電壓提㈣魏繞組係以,合方 組; ⑼1級繞組和第二:欠㈣ 一第一組串聯電路,其 包括相互串聯的-第_電②。'::、4直流電壓相並聯,且 私谷益和一fc ^ ^ ^ 35;. 一第一組串聯電路,其係盘 ° 包括依序串聯之該第—次、Ά直流電壓相並聯,且 次級繞組,其中該第-次級=二第f 2器與該第二 ^,係分別與輸出直流電壓的::;^ 包括對電容器相並聯,且 ;對開關f相互串聯的-第-開 Γ則:目;;:的一第二開關及-第四開關? 與該第-開·該第;:::=流電壓的正端點 的共上 -短路線,其係將該第―電容器和第二電容器的 端點’與該第—開關和第二開_共_點連接在一 ς。 8.如申請專利範圍第7項所述的電力轉換電路,其 該第-開關、第二開關、第三開關或第四開關,係為二個 整SlL—極體金屬氧化場效應電晶體或主動的半導體開關。 20201228200 0990033TW 34644twf.doc/n VII. Patent application scope: 1. A low-current chopping power conversion circuit that converts a DC voltage into an AC voltage output, including a wheel transformer that includes at least a secondary winding. And having the same - the first primary winding and the second primary winding, the first primary winding is in a magnetic coupling manner, and the output AC = two secondary windings; k 彳 /, including the coupling a circuit, which is connected in parallel with the input DC voltage, and includes a first capacitor and a second capacitor connected in series; and the spoon includes: it is connected to the circuit and is connected in parallel with the input DC voltage, and The first primary winding, the third and second primary windings and the second primary winding are connected in series with the positive and negative terminals of the input DC voltage, including a phase hi series circuit, The third capacitors 11 are connected in parallel, and a first switch and a second switch; and a common terminal, the 电# electric 4 state and the first electric grid. The common end point of the Haidi switch and the second switch is connected to the power conversion circuit that escapes from the first item of the second range. The first (4) A first open relationship is a metal octave semiconductor switch or an electromechanical switch. @effect transistor, active 3 · low current chopping power conversion m DC _ for AC voltage output, = road 'its side to input 17 201228200 0990033TW 34644twf.doc / n - MM 'includes at least one level a winding and a first primary winding and a second primary winding having the same resistance, the first set of primary windings and the first set of primary windings being magnetically coupled to provide an output AC voltage to the secondary winding; a first series of series circuits in parallel with the input DC voltage and including a first capacitor and a second capacitor connected in series; a second series of series circuits coupled to the input DC voltage and including The first primary winding, the third capacitor and the second primary winding are serially connected in series, wherein the same polarity of the first primary winding and the second primary winding ^ k point ' are respectively opposite to the positive terminal of the input DC voltage a second series circuit is connected in parallel with the third capacitor, and includes a first pair of switches and a second pair of switches connected in series with each other, wherein the first pair is off The switch includes a first switch and a third switch connected in series, the switch includes a second switch and a fourth switch connected in series; the first pole body is connected to the positive end of the input DC voltage and a second diode between the first switch and the third switch; the second diode is connected between the common terminal of the second switch and the fourth terminal and the negative terminal of the input DC voltage; And a one-way route for stitching the common end of the first capacitor and the second capacitor together with the common end of the H-th switch and the second switch. 4. The power conversion circuit according to claim 3, wherein the first switch, the second switch, the third switch, and the fourth switch are: 18 201228200 0990033TW 34644twf.doc/n metal oxidation field effect electric Crystal, active semiconductor switch or electromechanical switch. 5. A low current chopping power conversion circuit for converting an input AC voltage to a DC voltage output, comprising: a transformer comprising at least one primary winding and a first secondary winding having the same number of turns And a second secondary winding, the primary winding is magnetically coupled to supply the output secondary voltage to the first secondary winding and the second secondary winding; 0 - the first group of series circuits, the system and the output DC The voltages are connected in parallel, and include a first capacitor and a second capacitor connected in series; a second series of series circuits connected in parallel with the output DC voltage, and including the first secondary winding including one in series, one in series a third capacitor and the second secondary winding, wherein the same polarity end of the first secondary winding and the second secondary winding are respectively connected to a positive end and a negative end of the output DC voltage; Three sets of series circuits in parallel with the third capacitor, and including a first switch and a second switch connected in series; and a short circuit, which is the first capacitor and the first The common terminal of a capacitor, a common terminal connected to the first switch and the second switch. 6. The power conversion circuit of claim 5, wherein the first switch or the second switch is a rectifying diode, a metal oxide field effect transistor or an active semiconductor switch. 7 - A low current chopping power conversion circuit for converting an input AC voltage into a DC voltage output, comprising: a transformer comprising at least one primary winding and a first number of first 19 201228200 0990033TW 34644twf.doc /n secondary winding and a second secondary winding %, type, the output AC voltage is raised (four) Wei winding system, the square group; (9) 1st winding and second: owed (four) a first series of series circuits, including mutual In series - the first _ electricity 2. '::, 4 DC voltages are connected in parallel, and private valley benefits and a fc ^ ^ ^ 35;. A first series of series circuits, the tune ° includes the first-order, Ά DC voltages connected in series, in parallel, And a secondary winding, wherein the first-secondary=second f2 and the second, respectively, are connected to the output DC voltage::;^, including the pair of capacitors, and the pair of switches f are connected in series - opening a second switch and a fourth switch? and a common on-short line of the positive end of the first open; the::::= flow voltage, which is The end points of the first capacitor and the second capacitor are connected to the first switch and the second open_common point. 8. The power conversion circuit according to claim 7, wherein the first switch, the second switch, the third switch or the fourth switch is two integral Sl-polar metal oxide field effect transistors or Active semiconductor switch. 20
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CN105024554A (en) * 2014-04-22 2015-11-04 吕锦山 Inverter circuit and rectifier circuit with soft switching and reduced current ripple
TWI891483B (en) * 2024-08-16 2025-07-21 台達電子工業股份有限公司 Voltage conversion circuit and voltage conversion system

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US6239989B1 (en) * 2000-08-25 2001-05-29 Chou Ming-Ching Forward converter with improved reset circuitry
JP4151014B2 (en) * 2003-03-11 2008-09-17 株式会社デンソー Isolated switching DC / DC converter
US7551459B1 (en) * 2006-01-26 2009-06-23 Wittenbreder Jr Ernest Henry Zero voltage switching coupled inductor boost power converters
TWI309916B (en) * 2006-07-26 2009-05-11 Ching Shan Leu Low voltage stress power inversion and rectification circuits

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Publication number Priority date Publication date Assignee Title
CN105024554A (en) * 2014-04-22 2015-11-04 吕锦山 Inverter circuit and rectifier circuit with soft switching and reduced current ripple
CN105024554B (en) * 2014-04-22 2017-07-28 吕锦山 Inverter circuit and rectifier circuit with soft switching and capable of reducing current ripple
TWI891483B (en) * 2024-08-16 2025-07-21 台達電子工業股份有限公司 Voltage conversion circuit and voltage conversion system

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