201212178 、發明說明： 【發明所屬之技術領域】 本發明是有關於一種半導體封裝結構（sem i conduct〇r package structure)，且特別是有關於一種具有電磁屏蔽（electr〇magnetic shielding, EMS)功能的半導體封裝結構。 【先前技術】 一般來說，電子元件（electronic element)在運作時會產生電 磁波（electromagnetic wave) ’而電磁波可能會影響到周邊電子元件 的訊號傳輸及ji雜能，此财即稱為電磁干擾（eleetranagnetic interference， EMI)。 為了改善上制題’部分半導體封裝結構會在基板（substmte) 上設置-電磁屏蔽裝置以包覆半導體元件（―⑽此加 device)， 磁波滲入而造成電磁干擾。 進而減4半導體το件在運作時所產生的電磁波㈣，或是降低外部電 目刖較為f見驗半導體健結構的電磁屏蔽方式，通常是在半 導體封裝結構製作完成後，以— 為電磁屏蔽裝置包覆半導體元件 高。因此，女 的課題之一 〇 —金屬屏蔽殼體（shielding case)作 件。然而，金屬屏蔽殼體的製作成本較 如何製作出成本較低的電磁屏蔽裝置，實為目前極為重要 【發明内容】201212178, invention description: [Technical field] The present invention relates to a semiconductor package structure (sem i conduct〇r package structure), and in particular to an electromagnetic shielding (EMS) function Semiconductor package structure. [Prior Art] Generally, an electronic element generates an electromagnetic wave during operation, and electromagnetic waves may affect the signal transmission and complication of peripheral electronic components. This is called electromagnetic interference. Eleetranagnetic interference, EMI). In order to improve the above-mentioned problem, part of the semiconductor package structure is provided with an electromagnetic shielding device on the substrate to cover the semiconductor element ("(10) this device), and magnetic waves infiltrate to cause electromagnetic interference. Further, the electromagnetic wave generated by the operation of the semiconductor device is reduced by four (4), or the electromagnetic shielding mode of the semiconductor structure is reduced, and the electromagnetic shielding device is usually formed after the semiconductor package structure is completed. The coated semiconductor component is high. Therefore, one of the women's subjects is the shi-shielding case. However, the manufacturing cost of the metal shielded casing is more important than the production of a lower cost electromagnetic shielding device, which is extremely important at present.
本發明提供一 一種具有電磁屏蔽裝置的半導 種半導體封裝結構’其包括__基板、至少一半導體 201212178 元件、至少一封裝膠體（encapsulati〇n gei)、一第—導電材料岸 (conductive material layer)以及一第二導電材料層。基板具有一 表面。半導體元件配置於基板的表面上，並且電性連接於&板了封裝 膠體配置於基板的表面上，以包覆半導體元件，並且具有一頂面以及 連接於封裝膠體頂面與基板表面之間的一側面。第一導電材料層覆蓋 封裝膠體的側面，而第二導電材料層覆蓋封裝膠體的頂面，以與基板 及第一導電材料層共同包覆封裝膠體。 ^ 土 在本發明的-實施例中，上述的基板更具有一接地層（㈣砸呢 layer)。基板的表面暴露出接地層，並且第一導電材料層連接於第二 導電材料層與接地層之間。另外，半導體封裝結構更可包括電性連接 於第一導電材料層與接地層之間的一導線（wire)。 在本發明的-實施例中，上述的半導體元件透過打線接合（_ bonding)技術電性連接於基板。 在本發明的-實施例中，上述的第—導電材料層為一導電膠 (conductive glue/paste)。 在本發明的-實施例中，上述的第二導電材料 (conductive film)» 守电溥膜 在本發明的-實施例中，上述的半導體元件與封裝膠體的數量皆 為多個。這鲜導體元件呈_配置於基板的表面上，而這些封裝膠 體分別包覆這些半導體元件^―導電㈣層覆蓋這些難膠體的側 面，而第二導電材料層覆蓋這些封裝膠體的頂面。 本發明更提供-種半導體封裝結構的製作方法，其包括下列步 驟》首先’在-基板的-表面上配置複數個半導體树，並且使這些 半導體元件電性連接於基板。縣，在基板的表面上配置—封裝⑽ 層（encapsulationmaterial layer)’以包覆這些半導體元件。之後， =割封裝材· ’以臟複數個封轉體，並且這些雜膠體之間暴 露出基板表面下的-接地層。其中，各封裝膠體包覆這些半導體元; 201212178 其中之-，並且具有-頂面以及連接於頂面與基板表面之間的一側 面。然後m導電材料層’以覆蓋這些封裝膠體的側面，並 使第導電材料層電性連接於基板的接地層。接著，形成一第二導 電材料層，以覆蓋這些雌膠_頂面。如此—來 :、 第二導電材料層與基板即會共同包覆這些封裝膠體。之後沿著^些 封裝膠體之間的第-導電材料層切割第—導電材料層、第二導電材料 層與基板，以形成複數個具有電磁屏蔽裝置的半導體封裝結構。 、在本發明的—實施例中，使上述的半導體元件電性連接於基板的 方法包括打線接合技術。 二在本發明的-實施例中，在進行上述配置封裝材料層的步驟之 前，更包括在基板上配置複數條導線，其中各導線的相對兩端分別電 性連接於基板接地層的不同位置。而且，在進行上述切割封裝材料層 的^驟時—併_這些導線，以使之後所職的第-導電材料層會透 過這些導線電性連接於基板的接地層。 在本發明的一實施例中，形成上述第一導電材料層的方法為在這 些封裝膠體之間填充第一導電材料層。 ° 在本發明的一實施例中，形成上述第二導電材料層的方法為在這 些封裝膠體的頂面上疊置第二導電材料層。 〜^ 、士發明以直接形成在封裝賴的頂面及側面上的導電材料層來取 代先前技術中的金屬屏蔽殼體。因此，可有效降低具有電磁 的半導體封裝結構的整體製作成本。 、 為讓本發明的上述特徵和優點能更明顯易懂，下文特舉多個實施 例，並配合所附圖式，作詳細說明如下。 【實施方式】 圖1A至圖1E繪示出本發明一實施例中一種半導體封裝結構的製 201212178 =方法的流程圖。請先參考圖1A所示，首先，在一基板⑽的— 上配置魏辨賴元件，纽使這些半導體元件2⑼電性 接於基板⑽。於此實補巾，·半導航件_物是以打 技術電性触於基板⑽，亦即·半導航件細 ς 墊⑽透過複數條訊號線綱電性連胁基板表面11〇上的^ 個訊號接墊120。另外，在其絲料的實施财，這鲜導體元件亦 可以覆晶接合（flip chip bQnding)技術或其他财技術電性連接於 基板。接著，在基板100的表面110上配置一封袭材料層棚以包覆 這些半導體元件200與這些訊號線310。The invention provides a semi-conductive semiconductor package structure having an electromagnetic shielding device, which comprises a substrate, at least one semiconductor 201212178 component, at least one encapsulant, and a conductive material. And a second layer of conductive material. The substrate has a surface. The semiconductor component is disposed on the surface of the substrate, and is electrically connected to the surface of the substrate, and is disposed on the surface of the substrate to encapsulate the semiconductor component, and has a top surface and is connected between the top surface of the encapsulant and the surface of the substrate One side. The first conductive material layer covers the side of the encapsulant, and the second conductive material layer covers the top surface of the encapsulant to cover the encapsulant together with the substrate and the first conductive material layer. ^ Soil In the embodiment of the invention, the substrate has a ground layer ((4) layer). The surface of the substrate exposes a ground layer, and the first layer of conductive material is connected between the second layer of conductive material and the ground layer. In addition, the semiconductor package structure may further comprise a wire electrically connected between the first conductive material layer and the ground layer. In the embodiment of the invention, the semiconductor element is electrically connected to the substrate by a wire bonding technique. In the embodiment of the invention, the first conductive material layer is a conductive glue/paste. In the embodiment of the present invention, the above-mentioned second conductive film » sputum film is in the embodiment of the invention, and the number of the above-mentioned semiconductor element and encapsulant is plural. The fresh conductor elements are disposed on the surface of the substrate, and the encapsulants respectively coat the semiconductor elements. The conductive (four) layer covers the sides of the hard colloids, and the second conductive material layer covers the top surfaces of the encapsulants. The present invention further provides a method of fabricating a semiconductor package structure comprising the steps of: first arranging a plurality of semiconductor trees on a surface of a substrate and electrically connecting the semiconductor elements to the substrate. In the county, an encapsulation material layer is disposed on the surface of the substrate to coat the semiconductor elements. After that, the package material was cut into a plurality of sealed bodies, and the ground layer under the surface of the substrate was exposed between the particles. Wherein, each encapsulant encapsulates the semiconductor elements; 201212178 wherein - and has a top surface and a side surface connected between the top surface and the substrate surface. The m conductive material layer is then covered to cover the sides of the encapsulants, and the first conductive material layer is electrically connected to the ground layer of the substrate. Next, a second layer of electrically conductive material is formed to cover the top side of the estr. In this way, the second conductive material layer and the substrate together cover the encapsulant. Then, the first conductive material layer, the second conductive material layer and the substrate are cut along the first conductive material layer between the encapsulants to form a plurality of semiconductor package structures having electromagnetic shielding devices. In the embodiment of the present invention, the method of electrically connecting the above-described semiconductor element to the substrate includes a wire bonding technique. In the embodiment of the present invention, before the step of configuring the encapsulating material layer, the method further includes disposing a plurality of wires on the substrate, wherein opposite ends of the wires are electrically connected to different positions of the ground layer of the substrate. Moreover, the above-described steps of cutting the encapsulating material layer are performed - and the wires are electrically connected to the ground layer of the substrate through the wires. In an embodiment of the invention, the first conductive material layer is formed by filling a first conductive material layer between the encapsulants. In an embodiment of the invention, the second conductive material layer is formed by laminating a second conductive material layer on the top surface of the encapsulant. ~^,, invented to replace the metal shielded casing of the prior art with a layer of conductive material formed directly on the top and sides of the package. Therefore, the overall fabrication cost of the semiconductor package structure having electromagnetics can be effectively reduced. The above described features and advantages of the present invention will be more apparent from the following description. [Embodiment] FIG. 1A to FIG. 1E are flowcharts showing a method of manufacturing a semiconductor package structure 201212178=in accordance with an embodiment of the present invention. Referring first to Fig. 1A, first, a Wei discriminating element is disposed on a substrate (10), and these semiconductor elements 2 (9) are electrically connected to the substrate (10). In this case, the semi-navigation member is electrically touched to the substrate (10), that is, the semi-navigation member (10) is transmitted through a plurality of signal lines to the surface of the substrate. Signal pads 120. In addition, in the implementation of the wire material, the fresh conductor element can also be electrically connected to the substrate by flip chip bQnding technology or other financial technology. Next, a layer of material layer is placed on the surface 110 of the substrate 100 to cover the semiconductor elements 200 and the signal lines 310.
之後，切割封裝材料層400，以形成如圖ΐβ所示的複數個封裝膠 體410:而且，在形成這些封裝膠體41〇時，一併在基板1〇〇上切割^ 複數個溝槽130’以在這些封裝膠體410之間暴露出表面11〇下的—接 地層140。此時，每一個封裝膠體410皆會包覆一個半導體元件2〇〇， 並且分別具有一頂面412以及連接於頂面412與表面11〇之間的一側 面 414。 然後，請參考圖1C所示，在這些溝槽13Q内與這些封裝膠體41〇 之間形成一第一導電材料層500，以覆蓋這些側面414，並且使第一導 電材料層500電性連接於接地層14〇。於此實施例中，形成第一導電材 料層500的方式例如是在這些溝槽13〇内與這些封裝膠體41〇之間填 充一導電膠。而且，在填充導電膠時，亦可一併將導電膠塗佈在最外 圍封裝膠體410的外側側面414上，以使第一導電材料層500會覆蓋 所有的側面414。之後，可再進行一額外的研磨步驟，以使頂面412與 第一導電材料層500的頂部呈一平整表面。 接著，請參考圖1D所示，在這些封裝膠體410上形成一第二導電 材料層600，以覆蓋這些頂面412，並連接第一導電材料層500。如此 一來，第一導電材料層500、第二導電材料層600與基板1〇〇即會共同 包覆這些封裝膠體410。於此實施例中，形成第二導電材料層600的方 式例如是在這些頂面412上疊置一層導電薄膜。 201212178 上述至此’大致上即已完成具有複數個半導體元件調的半導體 封裝結構IGa的製作。於此半導體封裝結構版中這些半導體元件 200例如是呈陣列配置於基板謂的表面110上，並且分別包覆在獨立 的封裝膠體410中。而且，第二導電材料層6〇〇會覆蓋在這些頂面仍 上’而第-導電材料層5GG齡覆蓋在這些側面414上並且連接於 第一導電材料層5〇〇與接地層14〇之間。 ' 之後，可再沿著這些封裝膠體41〇之間的第一導電材料層5〇〇切 割第^導電材^層_、第—導電材料層5⑼與基板⑽，以將半導體 、參’、D構10a單化（singUiati〇n)成如圖π戶斤示的複數個半導體 封裝結構12a。於此實施例中，每—個半導體封裝結構他僅具有一個 半導體元件200與包覆半導體元件咖的一個封裝膠體&卜而且 二導電材料層600會覆蓋在每一個封裝膠體彻的頂面412上， —導電材料層_則會覆蓋在每—個封裝膠體的麻414上並 且連接於第-導電材料層5〇〇與接地層14〇之間。換句話說，每—個 封裝膠體4_會被基板⑽、第一導電材料層5〇〇與第二導電材 600共同包覆。 圖2A至圖2E繪示出本發明另一實施例中一種半導體封裝結構的 製作方法麟程B。請先參相2A_，此實補巾的製作方法大致 上與前-實施财的製作方法相似，二者之間的不同之處在於在 配置封裝材料層4GG的步驟之前，更包括在基板⑽上配置複數條導 線 320。 於此實施例中’各導線320的相對兩端分別電性連接於基板⑽ 表面110上的不同接地墊150，並且這些接地塾15〇例如是以内連線 (interconnection)技術電性連接於接地層14〇。而且，在切割封裝 材料層400以形成如圖2B所示的複數個封裝膠體41〇時，一併切割這 些導線320 ’並同時在基板100上切割出複數個溝槽13〇。因此，請參 考圖2C所示’在這些溝槽13〇内與這些封裝膠體41〇之間形成第 電材料層5GG之後，第-導電材料層5⑼即會透過這些導線咖與接 201212178 地塾150電ί生連接於基板1〇〇的接地層l如此一來，即可避免接地 墊150與第導電材料層5〇〇之間因為在填充第一導電材料層_時 產生空隙（void)而接觸不良。 之後^參考目2D所示，再在這些封襄膠體上形成一第二導 電材料層_卩大致上元成具有複數個半導體元件·的半導體封裝 、。構1G^製作。值传注意的是，此實施例中的半導體封裝結構肌 大致上。前-實施例中的半導體封裂結構i〇a相似，二者之間的不同 導體封裝結構i〇a中的第—導電材料層僅直接連接於 遠接二祕=導體封裝結構⑽中的第一導電材料層500不僅直接 接地層⑽，更透過這些導線咖與接地塾15Q電性連接於接地 層 140。 考圖2D與2E所示，可41() t 500與基板1〇〇，斗層Λ〇0切割第二導電材料層600、第一導電材料層 結構。 “將導體封裳結構10b單一化成複數個半導體封裳 好祖二本發明以直接形成在封裝膠體的頂面及側面上的導電 =或=材料與加工成本低於金屬材料的導==導 i =具有電磁屏蔽裝置的半導體封裝結構的整體 於:::溝 ^ 接地層，以避免接地塾:第!與瓣電性連接於 料树產生空_接觸不良。導電材枓層之間因為在填充第-導電材 雖然本發明已以實施例揭露如上， 何所屬技術領域十具有通常知μ ；〜、並非用以限疋本發明，任 内，當可作些許的更動脫離本發明的精神和範圍 請專利範圍所界定者為準肩’因此本發保護範圍當視後附的申 201212178 【圖式簡單說明】 圖1A至圖1E繪示出本發明一實施例中一種半導體封裝結構的製作 方法的流程圖。 圖2A至圖2E繪示出本發明另一實施例中一種半導體封裝結構的製 作方法的流程圖。 【主要元件符號說明】 10a、10b ' 12a、12b :半導體封裝結構 100 :基板 110 :表面 120、210 :訊號接墊 130 :溝槽 140 :接地層 150 :接地墊 200 :半導體元件 310 :訊號線 320 :導線 400 :封裝材料層 410 :封裝膠體 412 :頂面 414 :側面 201212178 500、600 :導電材料層Thereafter, the encapsulating material layer 400 is cut to form a plurality of encapsulants 410 as shown in FIG. 而且: and, when these encapsulants 41 are formed, a plurality of trenches 130' are cut on the substrate 1 A ground layer 140 is formed between the encapsulants 410 to expose the surface 11 . At this time, each of the encapsulants 410 covers a semiconductor element 2'' and has a top surface 412 and a side surface 414 connected between the top surface 412 and the surface 11''. Then, referring to FIG. 1C, a first conductive material layer 500 is formed between the trenches 13Q and the encapsulants 41A to cover the side surfaces 414, and the first conductive material layer 500 is electrically connected to the first conductive material layer 500. Ground layer 14〇. In this embodiment, the first conductive material layer 500 is formed by, for example, filling a conductive paste between the trenches 13 and the encapsulants 41. Moreover, when filling the conductive paste, the conductive paste may also be coated on the outer side surface 414 of the outermost encapsulant 410 such that the first conductive material layer 500 covers all of the side faces 414. Thereafter, an additional grinding step can be performed to cause the top surface 412 to have a flat surface with the top of the first conductive material layer 500. Next, referring to FIG. 1D, a second conductive material layer 600 is formed on the encapsulants 410 to cover the top surfaces 412 and connect the first conductive material layer 500. In this way, the first conductive material layer 500, the second conductive material layer 600 and the substrate 1 共同 together cover the encapsulants 410. In this embodiment, the second conductive material layer 600 is formed by, for example, laminating a conductive film on the top surfaces 412. 201212178 As described above, the fabrication of a semiconductor package structure IGa having a plurality of semiconductor element adjustments has been substantially completed. In this semiconductor package structure, the semiconductor elements 200 are, for example, arranged in an array on the surface 110 of the substrate, and are respectively wrapped in separate encapsulants 410. Moreover, the second conductive material layer 6 覆盖 is covered on the top surfaces and the first conductive material layer 5 GG covers the side surfaces 414 and is connected to the first conductive material layer 5 〇〇 and the ground layer 14 between. After that, the first conductive material layer 5, the first conductive material layer 5 (9) and the substrate (10) may be further cut along the first conductive material layer 5 between the encapsulants 41 , to replace the semiconductor, the reference, and the D The structure 10a is singulated into a plurality of semiconductor package structures 12a as shown in FIG. In this embodiment, each semiconductor package structure has only one semiconductor component 200 and an encapsulating colloid of the semiconductor component, and the two conductive material layers 600 cover the top surface 412 of each encapsulant. Above, the conductive material layer _ is overlaid on each of the encapsulants 414 and is connected between the first conductive material layer 5 and the ground layer 14A. In other words, each of the encapsulants 4_ is coated by the substrate (10), the first conductive material layer 5, and the second conductive material 600. 2A to 2E illustrate a method of fabricating a semiconductor package structure according to another embodiment of the present invention. Please refer to the phase 2A_ first. The manufacturing method of the actual patch is substantially similar to the method of manufacturing the pre-implementation. The difference between the two is that it is included on the substrate (10) before the step of configuring the encapsulating material layer 4GG. A plurality of wires 320 are configured. In this embodiment, the opposite ends of each of the wires 320 are electrically connected to different ground pads 150 on the surface 110 of the substrate (10), and the ground electrodes 15 are electrically connected to the ground layer by, for example, an interconnection technique. 14〇. Moreover, when the encapsulating material layer 400 is cut to form a plurality of encapsulants 41a as shown in Fig. 2B, the wires 320' are cut together and a plurality of trenches 13' are simultaneously cut on the substrate 100. Therefore, referring to FIG. 2C, after the first electrical material layer 5GG is formed between the trenches 13 and the encapsulants 41, the first conductive material layer 5 (9) passes through the wires and the 201212178 cellar 150. The ground layer 1 connected to the substrate 1 can prevent the ground pad 150 and the first conductive material layer 5 from contacting due to voids when filling the first conductive material layer _. bad. Then, as shown in the reference 2D, a second conductive material layer _ is formed on the sealing paste to form a semiconductor package having a plurality of semiconductor elements. Construction 1G^ production. It is noted that the semiconductor package structure muscle in this embodiment is substantially. The semiconductor sealing structure i〇a in the pre-embodiment is similar, and the first conductive material layer in the different conductor encapsulation structure i〇a is directly connected to the second in the remote second secret conductor package structure (10). A layer of conductive material 500 is not only directly connected to the ground layer (10), but also electrically connected to the ground layer 140 through the wires and grounds 15Q. As shown in Figs. 2D and 2E, the second conductive material layer 600 and the first conductive material layer structure can be cut by the surface layer 410 and the substrate 1〇〇. "The singularity of the conductor-seal structure 10b into a plurality of semiconductors is well-formed. The invention is formed directly on the top and side of the encapsulant. The material and processing cost is lower than that of the metal material. = The semiconductor package structure with electromagnetic shielding device is integrated with::: trench ^ grounding layer to avoid grounding 塾: the first and the valve are electrically connected to the material tree to produce empty _ poor contact. The present invention has been disclosed in the above embodiments, and is not limited to the present invention. Please define the scope of the patent as a quasi-shoulder'. Therefore, the scope of protection of the present invention is attached to the attached 201212178. [FIG. 1A to FIG. 1E illustrate a method of fabricating a semiconductor package structure according to an embodiment of the present invention. 2A to 2E are flow charts showing a method of fabricating a semiconductor package structure according to another embodiment of the present invention. [Description of Main Components] 10a, 10b '12a, 12b: Semiconductor Mounting structure 100: substrate 110: surface 120, 210: signal pad 130: trench 140: ground layer 150: ground pad 200: semiconductor component 310: signal line 320: wire 400: encapsulation material layer 410: encapsulant 412: top Face 414: side 201212178 500, 600: layer of conductive material