201216371 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種形成金屬矽化物之方法。特別是關於 一種形成用於接觸插塞之金屬矽化物之方法，以避免金屬矽 化物之管狀鑽出（piping )而造成漏電流的問題。 【先前技術】 半導體裝置係廣泛使用於各種電子產品中，例如電腦或 是行動電話...等物件。簡單來說，一個典型半導體元件是在 矽基材上建立閘極，並在閘極兩邊的矽基材中，經由離子植 入方法建立具有摻質的源極與汲極。閘極、源極與汲極一起 即共同組成了一個典型半導體元件。此時，半導體元件中的 閘極、源極與汲極尚需與外部電路形成電連接。一般說來， 由於金屬具有極低的電阻，通常會被選為閘極、源極與汲極 與外部電路電連接之電性媒介。 由於石夕與金屬間單純的歐姆接觸所產生的接面電阻太 大，而不利於元件的電性操作，所以還會希望在矽與作為外 部電路電性媒介之金屬之間，再額外形成一層可以降低接面 電阻之金屬矽化物。此等金屬矽化物之本身之導電度不但夠 大，有利於降低矽與金屬間單純的歐姆接觸所產生的接面電 阻，並改善元件的電性操作。 另一方面，為了增加矽基材中的載子遷移率，也會想要 201216371 在碎基材中或是硬基材之上建立應力層，藉由調整應力層之 應力值，㈣到改善的載子遷移率。但是，-但將增加應力 的應力·工程納入考量之後，反而會造成金屬石夕化物漏 電流的 問題，特別是因為金屬石夕化物之管狀鑽出減（咖叩 defect)而造成漏電流的問題。 還有在考量到金屬閘極與高介電材料的製程時，也會 影響到金屬碎化物的穩定性’特別是閘極後製 (gate-last) 鲁的製程’因為金屬石夕化物會比金屬閘極早完成。當金屬閘極 比金屬矽化物還要晚完成的時候，會產生熱預算顧慮 (thermal budget concern)、交又汙染（cross_contaminati〇n) 與缺陷議題（defect issue)。 為了要解決金屬石夕化物之管狀鑽出瑕庇（piping defect) 而造成漏電流的問題，以及金屬閘極比金屬矽化物還要晚完 成所產生的熱預算顧慮（thermal budget concern )、交叉汙染 (cross-contamination)與缺陷議題…等種種困難，勢必需要 • 一種新的形成金屬矽化物的方法，特別是形成用於接觸插塞 之金屬矽化物的方法，以解決上述問題，同時獲得製程整合 上的好處。 【發明内容】 本發明於是提出一種新的形成金屬石夕化物的方法’特別 是形成用於接觸插塞之金屬矽化物的方法。使用本發明發法 可以解決金屬矽化物之管狀鑽出瑕疵（piping defect)而造 201216371 成漏電流的問題。另外，對於金屬閘極比金屬石夕化物還要晚 完成的製程中，所遭遇到的熱預算顧慮（thermal budget concern)、交叉汙染（cross-contamination)與缺陷議題…等 種種困難’本發明新的形成金屬矽化物的方法也可以使得上 述問題迎刃而解。另外，本發明形成金屬矽化物的方法同時 還可以獲得製程整合上的好處。 本發明一方面k出一種形成金屬石夕化物的方法，特別適 用於接觸插塞中。首先，提供一基材。其次，在基材上形成 一閘極結構，此閘極結構包含一矽層、一閘極介電層與至少 一間隙壁。然後，形成一組源極與汲極，其位於基材中並鄰 近閘極結構。繼續，形成—層間介電層，其覆蓋閘極結構、 源極與;及極。再來’選擇性移除層間介電層，以暴露問極結 構。之後’在層間介電層中形成複數個接觸洞，以暴露部分 之基材。接下來’將暴露之基材反應以形成所需之金屬石夕化 物。於本發明一較佳實施態樣中，形成金Μ化物的步驟可 乂疋先使用#觸金屬填入複數個接觸洞中，使得接觸金 屬直接接觸源極舰極，接下來進行—退火步驟，使得接觸 金屬與基材反應形成金屬魏物。於本發明另—較佳實施態 w 成位；^觸洞中之源極接觸插塞與汲極接觸 插塞，其直接接觸金屬矽化物。 本發明另一方面接山 、# m 杈出一種形成金屬矽化物的方法，特別 適用於接觸插塞中。首生± ^ M ^ 先’提供一閘極結構。此閘極結構位 於一基材上，並包含— 甲極填充層（dummy gate)。其次， 201216371 形成一組源極與汲極，其位於基材中益鄰近閘極結構。然 後，形成一層間介電層，其覆蓋源極與淡極’並暴露閘極結 構。繼續，選擇性移除閘極填充層。接下來，在層間介電層 中形成複數個接觸洞’以暴露源極與淡極。跟著，使用一接 觸金屬填入複數個接觸洞中，使得接觸金屬直接接觸源極與 汲極。再來，進行一退火步驟，使得接觸金屬與基材反應形 成金屬矽化物。於本發明一較佳實施態樣中，還可以形成位 I 於接觸洞中之源極接觸插塞與汲極接觸插塞，其直接接觸金 屬矽化物。於本發明另一較佳實施態樣中’在形成複數個接 觸洞之前，還可以形成一金屬閘極以取代閘極填充層。或 是，於本發明又一較佳實施態樣中，可以使用接觸金屬取代 閘極填充層以形成一金屬閘極。 使用本發明方法所形成的金屬矽化物，可以將金屬矽化 物侷限在所需要的地方。使用本發明方法可以解決金屬矽化 物之管狀鑽出瑕庇（piping defect)而造成漏電流的問題。 • 另外，對於金屬閘極比金屬矽化物還要晚完成的製程中，所 遭遇到的熱預算顧慮（thermal budget concern )、交叉汙染 (cross-contamination )與缺陷議題…等種種困難，本發明新 的形成金屬矽化物的方法也可以使得上述問題迎刀而解。因 此，本發明形成金屬矽化物的方法同時還可以獲得製程整合 上的好處。 【實施方式】 201216371 本發明一方面提供一種形成金屬矽化物的方法，特別適 用於接觸插塞中，而可以解決金屬矽化物之管狀鑽出瑕疵而 造成漏電流的問題。請參考第丨_6圖，例示本發明形成金屬 矽化物方法的示意圖。首先提供基材1〇1。基材1〇1可以為 -半導體基材，例如碎。其次，在基材⑻上形成一間極結 構110。閘極結構110包含石夕層lu、閘極介電層112與間 隙壁。閘極結構11G之間隙壁可以為單—間隙壁或是複合間 隙壁。閘極結構110之複合間隙壁可以是情況需要在製程中 移除，或是成為永久結構之一部分。 另外，如第1圖所示，在閘極結構n㈣側形成一組源 極120與祕130。如果需要對間極通道施加所需之應力， 源極120舰極13G至少其巾—者可以切與其他材料的蟲 晶結構。雜12G歧極13G分触於基材1G1巾並鄰近間 極、。構11G。源極12()與沒極13G的形成步驟可以和閑極結 構110的形成步驟相關。 'σ :如，在問極結構110的第一間隙壁113完成後，以問 =10自身作為遮罩，進行淺摻雜步驟，而在間極結構 的第組淺推雜區域121 °之後’在閘極結構削 _壁114完成後’再進行—源極㈣與祕 第-門第1圖麻咖轉nG具有複合間隙壁， 第間隙壁113與第二間隙壁114。 201216371 如果需要對閘極通道施加所需之應力，可以先移除第一 間隙壁113與第二間隙壁114之至少一者，再形成視情況所 需覆蓋閘極結構110、源極120與汲極13〇之應力層14〇。 或者是源極220與汲極230至少其中一者可以為凹入式結 構，然後再填入適當之磊晶材料，形成應力層。又或者是上 述兩種方式並行。如果需要形成蝕刻停止層，即可在完成源 極120與汲極130之後形成視情況所需要覆蓋閘極結構 110、源極120與汲極130的蝕刻停止層14〇β在本發明一較 佳實施態樣中，所需之應力層亦可作為蝕刻停止層之用。第 2圖例示應力層140亦作為蝕刻停止層14〇之用。 接著，如第3圖所示，形成層間介電層〗5〇。層間介電 層150會覆蓋已經完成之閘極結構11〇、源極12〇、汲極13〇 與視情況所需要的應力層14〇或是蝕刻停止層14〇。層間介 電層150通常為單一絕緣材料或複數絕緣材料的組合，例如 矽氧化物、氮化物、碳化物、高介電係數材料的任意組合。 可以先使用沉積法，使得層間介電層15〇會完全覆蓋閘極結 構110、源極120、汲極130。然後再移除部份之層間介電層 150，例如使用化學機械研磨法，使得層間介電層Mo中之 矽層111部份暴露出來。 然後，如第4圖所示，選擇性移除部份之層間介電層 150 ’以形成所需之接觸洞15卜如果應力層140或是蝕刻停 ^層140存在時，接觸洞151亦會穿透應力層14〇或是蝕刻 停止層140 ’而暴露出層間介電層150下方部份之基材1〇1， 201216371 通常為源極120與沒極130’而得以形成後續所需之電連接 之用。形成複數個接觸洞151的方沐·^、 了以是使用微影方法配 合钱刻，而付到所需形狀與尺寸之接· i5i。例如，如第 4圖所示’接觸洞151可以為單—夕 , , N 之方形（square)或是連 ^条 外，源極⑸形狀可相 ^或可不同，而源極和祕的接觸洞151尺寸亦可相同或不 同0 而上：2 5圖所示，將基材_與適當之金屬反應 ==需？金屬石夕化物1〇2。形成所需之金屬韓物 以：’：如，先用-適當之接觸金屬152,例如錄、 151中，使得接觸金屬152直接接觸 °再來，就可以進行-退火步驟，使得 接觸金屬152與基材101反應形成所需之金屬石夕化物102。 多餘未反應之接觸金屬152可以再 丹仃移除。在移除未反應之 Π: 選擇性的退火步驟，更進-步地降低金屬 夕化物的阻值。視情況需要，接 間極結構㈣巾之料⑴，使得亦可以直接接觸 令Μ n匕 于钱下來的退火步驟，接觸 Γ戶!外111反應形成所需之金屬料物膨 中分別形成所需之源極接觸插塞1 第ό圖所示。 /、及極接觸插塞135如 位於接觸洞卜接觸插塞125與及極接觸插塞135會分別 脱。形成戶斤I之中並直接接觸先前所形成之金屬石夕化物 而之源極接觸插塞125料極接觸插塞⑶的 201216371 方式可以是，例如，使用一適當之插塞金屬153，例如鎢， 填入接觸洞151中。視情況需要，可以使用至少兩種插塞材 料’例如插塞金屬153與阻障材料154 ’以形成源極接觸插 塞125與汲極接觸插塞135中之至少一者。形成阻障材料154 的參數’例如材料或是厚度，可以略做調整以得到最佳之應 力效果。此處’填入源極與汲極的插塞材料可為相同材料或 不同材料。 本發明在另一方面提供一種形成金屬石夕化物的方法，特 別適用於接觸插塞中，而可以解決金屬矽化物之管狀鑽出瑕 疵而造成漏電流的問題。請參考第7-12圖，例示本發明形 成金屬矽化物方法的示意圖。首先，提供基材2〇1。基材2〇1 可以為一種半導體基材，例如矽。其次，在基材2〇1上形成 一閘極結構210。閘極結構210可以是石夕閘極結構或是金屬 閘極結構。閘極結構210如果是金屬閘極結構，一方面其中 之高介電常數閘極介電層212可在形成閘極填充層（dummy gate) 2U前業已預先完成。另一方面，也可以先不形成高 介電常數閘極介電層212 ’而是等到閘極填充層211移除後 才完成’後續再進行金屬閘極的部分。 因此1極結構210可能會包含視情況需要之閘極介電 層212。例如，可為石夕氧化層單一層，或石夕氧化層與高介電 ㊉數”電層的複合層’或⑦氧化層、高介電常數介電層與其 他絕緣材料的複合層1極結構加還可以包含視情況需要 之選擇性的金屬_阻障層、閘極填充層（dummygate) 201216371 氧切層、魏氧化㈣朗隙壁。金屬關阻障 曰通^於間極填充層211與閘極介電層212之間。問極結 構^如果是金屬閘極結構，此時之閑極填充層川可以為 非晶石夕、多晶⑭、摻有摻f❹㈣切鍺材料。閘極結構 2一 10之間隙壁可以為單一間隙壁或是複合間隙壁。例如，例 示問極結構210具有單一間隙壁213。閘極結構210之複合 可Μ情況需要在製程中移除，或是成為永久結構之 一部分° **氧化石夕層、減氧化石夕層在形成閘極填充層211 時便形成。 另外，如第7圖所示，在閘極結構21〇兩側形成一組源 極220與汲極230。如果需要對閘極通道施加所需之應力， 源極220與汲極230至少其中一者可以為矽與其他材料的磊 晶’以侷限應力。源極220與汲極230分別位於基材201中 並鄰近閘極結構210。源極220與汲極230的形成步驟可以 和閘極結構210的形成步驟相關。例如，在閘極結構21〇的 間隙壁213完成後，以閘極結構210自身作為遮罩，進行淺 鲁 摻雜步驟，而在閘極結構210兩側形成一組淺摻雜區域 221。之後，在閘極結構210的第二間隙壁214完成後，再 進行一源極220與〉及極230摻雜步驟’而在閘極結構21 〇兩 側形成一組源極220與没極230。此時，可以視情況移除第 一間隙壁213與第二間隙壁214之至少一者。 同樣地’除了於凹入式結構填入磊晶材料之外，亦可形 成覆蓋應力層，又或者是上述兩種方式並行。如果需要增加 12 201216371 對閘極通道施加所需之應力，可以先移除第一間隙壁213與 第二間隙壁214之至少一者，再形成視情況所需覆蓋閘極結 構210、源極220與汲極230之應力層。如果需要形成蝕刻 停止層，即可在完成源極22〇與汲極230之後形成視情況所 需要覆蓋閘極結構210、源極220與没極230的#刻停止層。 在本發明一較佳實施態樣中’所需之應力層亦可作為蝕刻停 止層之用。 φ 接著’如第8圖所示’形成層間介電層250。層間介電 層250會覆蓋已經完成之閘極結構21〇、源極22〇、汲極230 與視情況所需要的應力層或是触刻停止層。層間介電層250 通常為單一絕緣材料或複數絕緣材料的組合，例如矽氧化 物、II化物、碳化物、高介電係數材料之任意組合。可以先 使用沉積法’使得層間介電層250會完全覆蓋閘極結構 210、源極220、汲極230。然後再移除部份之層間介電層 250 ’例如使用化學機械研磨法，使得閘極結構21〇中之閘 魯極填充層211部份暴露出來。 然後’移除閘極填充層211 ’而停止在視情況需要的金 屬姓刻阻障層上或停在閘極介電層上212。視所使用材料之 不同’移除閘極填充層211之適當方法亦不同，但當使用矽 材作為閘極填充層211時，會使用氫氧化四曱銨（TMAH) 或氨水。然而，無論何等方法，皆為本技藝人士所熟知，故 不在此多加贅述。接下來，回填適當材料以取代閘極填充層 211 ’而形成閘極材料層215與閘極介電層212。視情況需 13 201216371 要，如果在形成閉極材料層215之前才形成閘極介電層 212，則所形成之·介電層212會是u形的，如第^圖所 不。本實施例中之閘極材料層215特別適合用於—金屬間極 例如包含有P型或N型的功函數金屬材料。移除間極 真充層2U時可以一倂考慮移除塾氧化石夕層/塾氮氧化石夕層。 此外，回填-適當材料以取代閘極填充層2ιι，可以與 形成金屬魏物有關以無關。例如，如第9圖所示，若是 回填-適當材料以取代閘極填充層211且與形成金屬石夕化: 無關時’可以在閘極填充層211部份暴露出來後，移除間極 填充層2U，並回填適當之材料以取代閘極填充層叫，而 形成金屬閘極。金屬閘極包含閘極材料層215與閘極介電層 212。閘極介電層212可以為一高介電常數之絕緣材料。例 如 ’ La2〇3, Ta2〇5、Ti〇2、Hf〇2、Zr〇2、Ai2〇3、^处或是 Pr2(V閘極材料4 215則可以為適當之金屬，例如，欽、氮 化欽m或鈒’或是金屬氮化物，或金屬碳化物。 如果沒有移除墊氧化石夕層/墊氮氧化石夕層，最終的結構中，閘 極介電層212下方即存在有墊氧化♦層/塾氮氧化石夕層。 例如’若是回填一適當材料以取代間極填充層2ιι與形 成金屬石夕化物有關時’可以先移除開極填充層2ιι再選擇性 移除部份之層間介電層25G，以形成所需之接觸洞251，或 先選擇性移除部分之層間介電層25〇再移除閘極填充層 •如帛10圖所不。㈣閘極填充層211時可停在視情況 而要的金屬#刻阻障層上或停在閘極介電層212上。如果應 201216371 力層或是蝕刻停止層存在時，接觸洞251亦會穿透應力層或 是蝕刻停止層，而暴露出層間介電層25〇下方之源極22〇與 汲極230’而得以形成後續所需之電連接。第1〇圖例示應力 層或是触刻停止層料存在之實施態樣。形成複數個接觸洞 251的方法可以是使賴影方法配合_，而得到所需形狀 與尺寸之接觸洞251。例如，接觸洞251可以為單一之方形 結構或是連續的條狀結構。源極與汲極之接觸洞251形狀可 相同或不同，而源極與祕之接觸洞251尺寸也可以相同或 不同。 接下來’如第n圖所示，先使用閘極介電層212取代 部分被移除之閘極填充層2U ’㈣制適當之金屬取代部 分被移除之閘極填充層211，接著將基材2〇1與金屬反應而 形成所需之金屬矽化物202。形成所需之金屬矽化物2〇2的 方式可以是，例如，先用一適當之接觸金屬252，例如鎳、 鈷或是鈦，藉由物理氣相沉積或是無電極電鍍方法，在適當 溫度與適當壓力下來將接觸金屬252填入接觸洞251中，使 得接觸金屬252直接接觸源極220與沒極230。此時，接觸 金屬252亦取代部分被移除之閘極填充層211。再來，就可 以進行一退火步驟，使得接觸金屬252與基材201反應形成 所需之金屬矽化物202。部份之接觸金屬252則形成金屬閘 極。反應後之接觸金屬252可以無需剝除。例如使用化學機 械研磨方法來移除多餘之接觸金屬252，並部份留在接觸洞 251中作為電連接之用。 15 201216371 在太路aa η _201216371 VI. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to a method of forming a metal telluride. In particular, it relates to a method of forming a metal telluride for contacting a plug to avoid the problem of leakage current caused by tubular piercing of the metal telluride. [Prior Art] Semiconductor devices are widely used in various electronic products such as computers or mobile phones. Briefly, a typical semiconductor component establishes a gate on a germanium substrate and establishes a source and drain with dopants in the germanium substrate on either side of the gate via ion implantation. The gate, source and drain together form a typical semiconductor component. At this time, the gate, the source, and the drain of the semiconductor element still need to be electrically connected to an external circuit. In general, due to the extremely low resistance of metals, they are often chosen as the electrical medium for the gate, source and drain to be electrically connected to external circuits. Since the joint resistance caused by the simple ohmic contact between Shixi and the metal is too large, which is not conducive to the electrical operation of the component, it is also desirable to form an additional layer between the crucible and the metal as the electrical medium of the external circuit. The metal halide can be reduced in junction resistance. The conductivity of these metal halides is not only large enough to reduce the junction resistance generated by the simple ohmic contact between the metal and the metal, and to improve the electrical operation of the components. On the other hand, in order to increase the mobility of the carrier in the ruthenium substrate, it is also desirable to establish a stress layer on the fractured substrate or on the hard substrate by adjusting the stress value of the stress layer, (iv) to the improved Carrier mobility. However, - after considering the stress and engineering to increase the stress, it will cause the leakage current of the metal lithology, especially the leakage current caused by the tubular diamond reduction of the metallurgical compound. . Also, when considering the process of metal gates and high dielectric materials, it will also affect the stability of the metal fragments 'especially the gate-last process' because the metal lithology will be better than The metal gate was completed very early. When the metal gate is completed later than the metal telluride, there are thermal budget concerns, cross-contaminati〇n and defect issues. In order to solve the problem of leakage current caused by the tubular piercing defect of the metal lithium compound, and the thermal budget concern and cross-contamination caused by the metal gate being completed later than the metal sulphide (cross-contamination) and defect issues... and so on, it is necessary to • A new method of forming metal halides, especially the formation of metal tellurides for contact plugs, to solve the above problems, and at the same time obtain process integration The benefits. SUMMARY OF THE INVENTION The present invention therefore proposes a novel method of forming a metalloid compound, particularly a method of forming a metal halide for contacting a plug. The problem of leakage current of 201216371 can be solved by using the method of the present invention to solve the tubular piercing defect of the metal telluride. In addition, in the process in which the metal gate is completed later than the metal ruthenium, the thermal budget concern, the cross-contamination and the defect problem are encountered. The method of forming a metal halide can also solve the above problems. In addition, the method of forming a metal halide of the present invention also provides the benefits of process integration. In one aspect, the invention provides a method of forming a metalloid compound, particularly for use in contact plugs. First, a substrate is provided. Next, a gate structure is formed on the substrate, the gate structure comprising a germanium layer, a gate dielectric layer and at least one spacer. A set of source and drain electrodes are then formed which are located in the substrate and adjacent to the gate structure. Continuing, an interlayer dielectric layer is formed which covers the gate structure, the source and the gate. Then, the interlayer dielectric layer is selectively removed to expose the interrogation structure. Thereafter, a plurality of contact holes are formed in the interlayer dielectric layer to expose a portion of the substrate. The exposed substrate is then reacted to form the desired metallite. In a preferred embodiment of the present invention, the step of forming a gold telluride may be first filled into a plurality of contact holes by using a metal, so that the contact metal directly contacts the source ship, and then the annealing step is performed. The contact metal reacts with the substrate to form a metal material. In the present invention, the preferred embodiment w is in position; the source contact plug in the contact hole and the drain contact plug are directly in contact with the metal telluride. In another aspect of the invention, the method of forming a metal telluride is particularly suitable for use in a contact plug. The first student ± ^ M ^ first provides a gate structure. The gate structure is located on a substrate and includes a - dummy gate. Secondly, 201216371 forms a set of source and drain electrodes that are located in the substrate adjacent to the gate structure. An interlevel dielectric layer is then formed which covers the source and the drain and exposes the gate structure. Continue to selectively remove the gate fill layer. Next, a plurality of contact holes ' are formed in the interlayer dielectric layer to expose the source and the pale. Subsequently, a contact metal is used to fill a plurality of contact holes such that the contact metal directly contacts the source and the drain. Further, an annealing step is performed to cause the contact metal to react with the substrate to form a metal halide. In a preferred embodiment of the invention, a source contact plug and a drain contact plug in the contact hole are formed, which are in direct contact with the metal telluride. In another preferred embodiment of the invention, a metal gate may be formed in place of the gate fill layer prior to forming the plurality of contact holes. Alternatively, in another preferred embodiment of the present invention, the gate pad may be replaced with a contact metal to form a metal gate. By using the metal halide formed by the method of the present invention, the metal halide can be confined to where it is needed. The use of the method of the present invention solves the problem of leakage current caused by tubular piercing defects of metal bismuth. • In addition, in the process of completing the metal gate later than the metal halide, the thermal budget concern, cross-contamination and defect issues, etc., the new invention The method of forming metal halides can also solve the above problems. Thus, the method of forming a metal halide of the present invention also provides the benefits of process integration. [Embodiment] 201216371 One aspect of the present invention provides a method of forming a metal telluride, which is particularly suitable for use in a contact plug, and can solve the problem of leakage current caused by tubular boring of a metal telluride. Referring to Figure -6, a schematic view of a method of forming a metal telluride of the present invention is illustrated. The substrate 1〇1 is first provided. The substrate 1〇1 may be a semiconductor substrate such as a chip. Next, a pole structure 110 is formed on the substrate (8). The gate structure 110 includes a layer of lithi, a gate dielectric layer 112, and a spacer. The spacers of the gate structure 11G may be single-gap walls or composite gap walls. The composite spacers of the gate structure 110 can be either removed from the process or become part of a permanent structure. Further, as shown in Fig. 1, a set of source 120 and secret 130 are formed on the side of the gate structure n (four). If it is desired to apply the required stress to the interpole channel, the source 120 of the ship 13G at least its towel can be cut into the insect crystal structure of other materials. The hetero 12G dissimilar 13G is in contact with the substrate 1G1 and adjacent to the interpole. Structure 11G. The forming step of the source 12 () and the gate 13G may be related to the forming step of the idler structure 110. 'σ : For example, after the first spacer 113 of the interrogation structure 110 is completed, the shallow doping step is performed with the question of 10 as the mask, and after the first group of shallow interfering regions of the interpolar structure 121 ° After the gate structure is cut off, the wall 114 is completed. The source (4) and the secret-gate 1 have a composite spacer, a first spacer 113 and a second spacer 114. 201216371 If it is necessary to apply the required stress to the gate channel, at least one of the first spacer 113 and the second spacer 114 may be removed first, and then the gate structure 110, the source 120 and the gate are formed as needed. The stress layer of the pole 13〇 is 14〇. Alternatively, at least one of the source 220 and the drain 230 may be a recessed structure and then filled with a suitable epitaxial material to form a stress layer. Or it is the above two ways in parallel. If it is necessary to form an etch stop layer, the etch stop layer 14 〇β covering the gate structure 110, the source 120 and the drain 130 as needed may be formed after the source 120 and the drain 130 are completed. In an embodiment, the desired stress layer can also be used as an etch stop layer. Figure 2 illustrates that the stressor layer 140 is also used as an etch stop layer. Next, as shown in FIG. 3, an interlayer dielectric layer is formed. The interlayer dielectric layer 150 covers the completed gate structure 11 源, the source 12 〇, the drain 13 〇 and the stress layer 14 〇 or the etch stop layer 14 视 as required. The interlayer dielectric layer 150 is typically a single insulating material or a combination of a plurality of insulating materials, such as any combination of tantalum oxide, nitride, carbide, high dielectric constant materials. The deposition method can be used first so that the interlayer dielectric layer 15 完全 completely covers the gate structure 110, the source 120, and the drain 130. A portion of the interlayer dielectric layer 150 is then removed, for example, using a chemical mechanical polishing method to expose portions of the germanium layer 111 in the interlayer dielectric layer Mo. Then, as shown in FIG. 4, a portion of the interlayer dielectric layer 150' is selectively removed to form a desired contact hole. If the stress layer 140 or the etch stop layer 140 is present, the contact hole 151 is also formed. Penetrating the stressor layer 14 or etching the stop layer 140' to expose the substrate 1〇1 of the lower portion of the interlayer dielectric layer 150, 201216371 is usually the source 120 and the gate 130' to form a subsequent required power For connection purposes. The formation of a plurality of contact holes 151 is made by using the lithography method to match the money and engraving, and the required shape and size are connected to the i5i. For example, as shown in FIG. 4, the contact hole 151 may be a single-night, a square or a square, and the source (5) may have a different shape or a different source, and the source and the secret contact. The size of the hole 151 can also be the same or different. 0. Above: Figure 5, the substrate _ reacts with the appropriate metal == need? Metallic stone Xixiang 1〇2. Forming the desired metal Korean to: ': For example, first contact-using metal 152, such as recording, 151, so that the contact metal 152 is directly contacted, and then the annealing step can be performed to make the contact metal 152 and Substrate 101 reacts to form the desired metal lithium 102. Excess unreacted contact metal 152 can be removed again. After removing the unreacted enthalpy: a selective annealing step, the resistance of the metal cation is further reduced. Depending on the situation, the material of the pole structure (4) is (1), so that it can also directly contact the annealing step of the Μn匕, and contact the tenant! The outer 111 reaction forms the required metal material to form the required expansion. The source contact plug 1 is shown in the figure below. The /, and the pole contact plugs 135 are respectively removed when the contact hole contact plug 125 and the pole contact plug 135 are respectively removed. The way of forming the source contact plug 125 of the previously formed metal lithium I and the source contact plug 125 of the material contact plug (3) may be, for example, using a suitable plug metal 153, such as tungsten. , fill in the contact hole 151. At least two plug materials, such as plug metal 153 and barrier material 154', may be used to form at least one of source contact plug 125 and drain contact plug 135, as desired. The parameters of the barrier material 154, such as material or thickness, can be adjusted slightly to achieve the best stress. Here, the plug material filled in the source and the drain may be the same material or different materials. In another aspect, the present invention provides a method of forming a metalloid compound, which is particularly suitable for use in a contact plug, and which solves the problem of leakage current caused by tubular enthalpy of metal telluride. Referring to Figures 7-12, a schematic diagram of a method of forming a metal halide of the present invention is illustrated. First, a substrate 2〇1 is provided. Substrate 2〇1 can be a semiconductor substrate such as tantalum. Next, a gate structure 210 is formed on the substrate 2〇1. The gate structure 210 may be a stone gate gate structure or a metal gate structure. If the gate structure 210 is a metal gate structure, on the one hand, the high dielectric constant gate dielectric layer 212 can be pre-finished before forming a dummy gate 2U. On the other hand, it is also possible to first form the high dielectric constant gate dielectric layer 212' and wait until the gate filling layer 211 is removed to complete the portion of the subsequent metal gate. Thus, the 1-pole structure 210 may include a gate dielectric layer 212 as needed. For example, it may be a single layer of the shixi oxide layer, or a composite layer of the shixi oxide layer and the high dielectric tens "electric layer" or a composite layer of the 7 oxide layer, the high dielectric constant dielectric layer and other insulating materials. The structure may further include a selective metal _ barrier layer, a gate filling layer (dummygate) 201216371, an oxygen oxidized layer, a Wei oxidized (four) slab wall, and a metal barrier layer 211. Between the gate dielectric layer 212 and the gate electrode structure, if it is a metal gate structure, the idle-filled layer can be amorphous, polycrystalline 14, and doped with a f-type (four) tantalum material. The spacers of the structures 2 to 10 may be a single spacer or a composite spacer. For example, the exemplary structure 210 has a single spacer 213. The composite structure of the gate structure 210 needs to be removed during the process or become One part of the permanent structure ** The oxidized stone layer and the oxidized oxidized layer are formed when the gate filling layer 211 is formed. Further, as shown in Fig. 7, a set of sources are formed on both sides of the gate structure 21? 220 and bungee 230. If you need to apply the gate channel For stress, at least one of the source 220 and the drain 230 may be a localized stress of germanium and other materials. The source 220 and the drain 230 are respectively located in the substrate 201 and adjacent to the gate structure 210. The source 220 The step of forming the gate 230 may be related to the step of forming the gate structure 210. For example, after the spacer 213 of the gate structure 21 is completed, the gate structure 210 itself is used as a mask to perform a shallow-dipping step. A plurality of shallow doped regions 221 are formed on both sides of the gate structure 210. Thereafter, after the second spacers 214 of the gate structures 210 are completed, a source 220 and a > 230 doping step are performed. A plurality of source 220 and no pole 230 are formed on both sides of the gate structure 21. At this time, at least one of the first spacer 213 and the second spacer 214 may be removed as appropriate. Similarly, 'except for the recessed type The structure is filled with the epitaxial material, and the covering stress layer may be formed, or the above two modes may be paralleled. If it is necessary to add 12 201216371 to apply the required stress to the gate channel, the first spacer 213 may be removed first. At least one of the second spacers 214, Forming a stress layer covering the gate structure 210, the source 220, and the drain 230 as needed. If it is necessary to form an etch stop layer, the gate may be formed as needed after the source 22 and the drain 230 are completed. In the preferred embodiment of the present invention, the desired stress layer can also be used as an etch stop layer. φ then 'as shown in FIG. 'The interlayer dielectric layer 250 is formed. The interlayer dielectric layer 250 covers the already completed gate structure 21, the source 22, the drain 230 and the stress layer or the etch stop layer as required. Interlayer dielectric Layer 250 is typically a single insulating material or a combination of a plurality of insulating materials, such as any combination of tantalum oxide, II, carbide, high dielectric constant materials. The deposition method can be used first such that the interlayer dielectric layer 250 completely covers the gate structure 210, the source 220, and the drain 230. Then, a portion of the interlayer dielectric layer 250' is removed, for example, by chemical mechanical polishing, so that the gate pad layer 211 of the gate structure 21 is partially exposed. The gate pad layer 211' is then removed and stopped on the metal-like barrier layer as needed or stopped on the gate dielectric layer 212. The appropriate method of removing the gate filling layer 211 differs depending on the material used, but when a cerium is used as the gate filling layer 211, tetraammonium hydroxide (TMAH) or ammonia water is used. However, no matter what method is known to the skilled person, it will not be repeated here. Next, a suitable material is backfilled to replace the gate fill layer 211' to form the gate material layer 215 and the gate dielectric layer 212. Depending on the situation 13 201216371 To be, if the gate dielectric layer 212 is formed before the formation of the gate material layer 215, the dielectric layer 212 formed will be u-shaped, as shown in FIG. The gate material layer 215 in this embodiment is particularly suitable for use in an intermetallic electrode such as a work function metal material containing a P-type or an N-type. When removing the interpolar layer 2U, you can consider removing the strontium oxide layer/塾 氧化 氧化 。 layer. In addition, backfilling - a suitable material to replace the gate filling layer 2, can be independent of the formation of metal objects. For example, as shown in FIG. 9, if the backfill-appropriate material is substituted for the gate filling layer 211 and is not related to the formation of the metallization: "can be removed after the gate filling layer 211 is partially exposed, the inter-pole filling is removed. Layer 2U, and backfill the appropriate material to replace the gate fill layer to form a metal gate. The metal gate includes a gate material layer 215 and a gate dielectric layer 212. The gate dielectric layer 212 can be a high dielectric constant insulating material. For example, 'La2〇3, Ta2〇5, Ti〇2, Hf〇2, Zr〇2, Ai2〇3, ^ or Pr2 (V gate material 4 215 can be a suitable metal, for example, Qin, Nitrogen Huaqin m or 鈒' or metal nitride, or metal carbide. If the pad oxide layer/pad oxynitride layer is not removed, in the final structure, there is a pad under the gate dielectric layer 212. Oxidation ♦ layer / 塾 塾 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The interlayer dielectric layer 25G is formed to form the desired contact hole 251, or the portion of the interlayer dielectric layer 25 is selectively removed, and then the gate filling layer is removed. (FIG. 10) (4) Gate pad layer At 211 hours, it can be stopped on the metal barrier layer or on the gate dielectric layer 212. If the 201216371 force layer or the etch stop layer is present, the contact hole 251 will also penetrate the stress layer. Or etching the stop layer to expose the source 22 〇 and the drain 230 ′ under the interlayer dielectric layer 25 而The subsequent electrical connections are required. Figure 1 illustrates the implementation of the stress layer or the etch stop layer. The method of forming the plurality of contact holes 251 may be to match the ray method to obtain the desired shape and The contact hole 251 of the size. For example, the contact hole 251 may be a single square structure or a continuous strip structure. The contact hole 251 of the source and the drain may have the same or different shape, and the source and the contact hole 251 are sized. It can also be the same or different. Next, as shown in the figure n, the gate dielectric layer 212 is used first to replace the partially removed gate filling layer 2U '(4). The appropriate metal replacement portion is removed and the gate pad is filled. Layer 211, which in turn reacts substrate 2〇1 with a metal to form the desired metal halide 202. The desired metal halide 2〇2 can be formed by, for example, using a suitable contact metal 252, for example Nickel, cobalt or titanium, by physical vapor deposition or electroless plating, the contact metal 252 is filled into the contact hole 251 at an appropriate temperature and appropriate pressure, so that the contact metal 252 directly contacts the source 220 and the electrodeless 230. At this time Contact metal 252 also replaces partially removed gate fill layer 211. Again, an annealing step can be performed to cause contact metal 252 to react with substrate 201 to form the desired metal halide 202. Part of contact metal 252 A metal gate is formed. The contact metal 252 after the reaction may be removed without stripping. For example, a chemical mechanical polishing method is used to remove excess contact metal 252 and partially remain in the contact hole 251 for electrical connection. 15 201216371 Tailu aa η _
’俟所需之金屬石夕化物202完 的接觸金屬252移除，並在接 235會分別位於接觸源極接觸插塞225與汲極接觸插塞 化物202。心w Λ之巾並直接接觸先前_成之金屬石夕The contact metal 252 of the metal lithium 202 required to be removed is removed, and the contact source contact plug 225 and the drain contact plug 202 are respectively located at the connection 235. Heart w Λ 巾 towel and directly contact the previous _ into the metal stone eve
塞235如第12圖 、之源極接觸插塞225與汲極接觸插 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍 所做之均等變化絲飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1-8圖例示本發明形成金屬矽化物方法的示意圖。 第9-12圖例示本發明形成金屬矽化物方法的示意圖。 【主要元件符號說明】 101基材 102金屬矽化物 201216371 110閘極結構 111石夕層 112閘極介電層 113第一間隙壁 114第二間隙壁 120源極 125源極接觸插塞 130汲極 ® 135汲極接觸插塞 140應力層 140餘刻停止層 150層間介電層 151接觸洞 152接觸金屬 153插塞金屬 # 154阻障材料 201基材 210閘極結構 211閘極填充層 212閘極介電層 213第一間隙壁 214第二間隙壁 215閘極材料層 201216371 220源極 225源極接觸插塞 230汲極 235汲極接觸插塞 250層間介電層 251接觸洞 252接觸金屬 253插塞金屬 254阻障材料The plug 235, as shown in Fig. 12, the source contact plug 225 and the drain contact plug are only the preferred embodiments of the present invention, and the equal variations of the silk fabric according to the scope of the present invention are all The scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1-8 are schematic views showing a method of forming a metal halide according to the present invention. Figures 9-12 illustrate schematic views of a method of forming a metal telluride of the present invention. [Main component symbol description] 101 substrate 102 metal germanide 201216371 110 gate structure 111 auspicious layer 112 gate dielectric layer 113 first spacer wall 114 second spacer 120 source 125 source contact plug 130 bungee ® 135 汲 contact plug 140 stress layer 140 residual layer 150 interlayer dielectric layer 151 contact hole 152 contact metal 153 plug metal # 154 barrier material 201 substrate 210 gate structure 211 gate filling layer 212 gate Dielectric layer 213 first spacer 214 second spacer 215 gate material layer 201216371 220 source 225 source contact plug 230 drain 235 drain contact plug 250 interlayer dielectric layer 251 contact hole 252 contact metal 253 plug Plug metal 254 barrier material