TW201203857A - Spike voltage reducing circuit for power transistor and power semiconductor chip with the same - Google Patents

Abstract

A spike voltage reducing circuit formed in a gate contact structure of a power transistor chip is provided. The spike voltage reducing circuit has a first current route and a second current route located between an input end and a gate electrode of the transistor structure. A first resistor is located on the first current route, a second resistor is located on the second current route, and a zener diode is located on the first current route with a forward direction from the input end to the gate electrode. When the potential difference between the input end and the gate electrode reaches the breakdown voltage of the zener diode, the falling slope of the gate voltage signal is decided by the current on the first current route. When the potential difference between the input end and the gate electrode is smaller than the breakdown voltage of the zener diode, the falling slope of the gate voltage signal is decided by the current on the second current route.

Description

201203857 VI. Description of the Invention: [Technical Field] The present invention relates to a surge voltage canceling circuit, and more particularly to a surge voltage canceling circuit of a transistor. , n [Prior Art] Power transistors (P 〇 old MOSFET) are often used in AC and DC (AC_ source converter +. Over-__ rate wire will encounter electromagnetic interference (EMI) caused by excessive spike Problem. To reduce the surge voltage, as shown in Figure i, the usual way is to add a resistor R0 between the gate terminal G of the power transistor QG and the driver circuit 1〇〇 to slow the switching of the transistor Q〇. Speed, but the price to pay is the power of the QG dicing of the transistor. Especially for high-voltage power transistors, the switching loss (switehing bss) has a very serious effect on the efficiency of the energy fairy. But the 'too high spur It will damage the components. Therefore, how to reduce the surge voltage, but maintain a certain energy conversion efficiency, is very important for high-voltage power transistors. Secondly, there are many snubber circuit designs available on the market today, which can be reduced. The surge voltage generated by the transient switching. However, these slow-vibration circuits require additional power, = inductance and resistance components, so that the manufacturing cost also increases. The present invention provides a surge voltage cancellation circuit. The utility model relates to a power electric Ba body to reduce the adverse effect of the surge voltage on the power transistor. SUMMARY OF THE INVENTION The main object of the present invention is to provide a surge voltage eliminating circuit, which can effectively reduce the surge voltage while avoiding power. The switching loss of the transistor is excessively increased. Another object of the present invention is to provide a surge voltage eliminating circuit which can be integrated into a power transistor wafer to reduce the overall manufacturing cost. 201203857 De-detection surge voltage eliminating circuit The surge voltage is deflated, a t-terminal, a first current path pinch, a second current path, a second, a second resistor, and a first Zener diode. The second circuit is located at the input end and the power transistor structure. One of the gate paths is located at the input end and the IS, the first: the current path. The second resistance is located at the second electric two, one second, second The resistance value of the resistor is greater than the resistance value of the first resistor. The first-terminal G body is in the t current path, and the voltage difference between the input terminal and the gate is positively greater than the first Zener diode. Upper two The voltage drop rate is substantially equal to the voltage difference between the human terminal and the gate terminal of the first current path 疋'. The voltage drop rate of the fixed-close terminal is substantially the second current path. The wave voltage eliminating circuit has a voltage difference between the second end and the closed end that is smaller than the voltage of the first Zener diode and the voltage of the voltage rise and the voltage of the gate terminal is called "I am a secret." The electric current mosquito on the current path, when the input terminal is connected to the conduction voltage of the first Zener diode and the second Zener has the electric current of the surge voltage elimination circuit: pole!=,: the first current path - In the second, the second resistor of the flute L is electrically connected to a first Zener diode. The gate of the flute is located at the input end and the gate of the power transistor structure is located at the input end and the power is charged. The gate of the gate is located on the first current path. The second resistance is located at the second value. The resistance of the second resistor is greater than the resistance of the first resistor. The first Zener diode system is located on the first current path, and the forward electrical connection is 201203857 == rate = closed of the Zhao structure. Between extremes. When the input terminal and the closed terminal are fixed, when the input terminal and the current on the m-voltage path are determined, the power transistor is gentleman, the singer, the current, and the current in the breakdown voltage flow path of the inner and the inner body. Decide. ^ The electric castle drop rate is roughly determined by the second electric is? multiconductor = structure = the first resistance, the gate metal contacts "^ & 曰曰 第 - polycrystalline 夕 结构 structure as the second resistance.曰石夕,,. Interstructure 2 ====== Constructed with -°°# lose character _ _ _ _ _ _ _ H caught the voltage and time, the extreme end and the end of the enemy: : When the input is caused by the first electric === fixed pole (four) end gate 塾, - the first polymorphic contact of the first conductivity type; = structure: the second current path is connected by the interpolar metal contact y The mouth structure is 'straight to the gate polycrystalline rock eve structure. Among them, the first Zener diode is formed between the first day and the first-day multi-day polycrystalline structure, the third most: 曰: ":7

As shown in the figure, the first Zener diode ZD1 is connected in the forward direction between the input terminal and the gate terminal G, and the second Zener diode ZD2 is connected in the reverse direction between the input terminal 2 and the gate terminal G. . In the process of rising the square wave drive signal VIN, please also refer to FIG. 4, when the square wave drive signal VIN fine voltage signal VGS voltage difference (VIN-VGS) is smaller than the first Zener diode Zm turn-on voltage , the voltage of the breakdown voltage of the two Zener diode ZD2 and vi, the first current path has not been turned on. At this time, the rate of rise of the gate voltage signal VGS is mainly determined by the magnitude of the current on the second current path, that is, determined by the second resistor R2. Since the resistance value of the second resistor R2 is large, the spirit of the gate voltage signal VG^201203857^: electric_combined with the semiconductor drawing can be as follows through the following detailed description of the invention and the method ®3 itt invention of the invention - the circuit - the electric terminal IN of the preferred embodiment - a first figure of electricity = ', the sudden voltage / voltage cancellation circuit 2 〇〇 has an input resistor JU, a second resistance, A first Zener diode is connected to a second Zener diode ZD2. The input terminal m is connected to the wave. _ ^ ΪΓ 0, for example, a pulse modulation control circuit to receive - square 2 motion 3. At the input terminal m and the gate terminal G of the power transistor structure Q1, there is a first current path and a second current path. The first resistor R1, the second anti-nano diode ZDi and the second Zener diode ZE>2 are located on the first current path. The second resistor R2 is located on the second current path, and the resistance of the second resistor is greater than the resistance of the first resistor R1. 201203857 will show a slowly rising state. As the voltage of the square wave drive signal VIN rises, the voltage difference (VIN_VGS) between the square wave drive and the gate voltage signal VGS also gradually increases. g ti, when the square wave drive signal _ and the drain voltage signal VGs 懕 ' ° TiTGS) is greater than the turn-on voltage of the first Zener diode ZD1 and the voltage of the second Zener voltage and the V-first current The path begins to conduct. Since the resistance value of the first resistor R1 is significantly smaller than the second resistor magic value, at this time, the rising rate of the gate voltage signal VGS is mainly determined by the magnitude of the current miscellaneous, and the trapping voltage is due to the gate voltage of the resistor R1. The rate of rise of the signal VGS will increase. And the lower the resistance value, the faster the rising rate of the gate voltage signal VGS. At time t2, the capacitance CGS between the gate and the source of the power transistor structure Q is fully charged. At this time, the current starts to the Miller capacitance (which is charged. In this charging process, the gate voltage signal VGS Will be maintained at a certain level. Completion of the recording capacitors, _f pressure VGS will continue to rise until the gate voltage signal VGS is equal to the input voltage VIN. Please refer to Figure 2 because of the square wave drive signal Na Switching from a low potential to a high potential at a relatively fast speed, in this process, an induced current is inevitably generated, resulting in a switching loss. In contrast, please refer to FIG. 4 to reduce the gate voltage of this embodiment. The initial rate of the signal VGS rises. Since the magnitude of the induced current is proportional to the rising speed of the gate voltage signal VGS, the present invention can reduce the induced current generated and help reduce the switching loss (the energy consumption is equal to the voltage and current). Product). Next, in the falling section of the square wave drive signal VIN, at first, the square wave drive 彳5 VIN and the gate voltage signal VGS have a voltage difference (vgS-VIN) smaller than the first The on-voltage of the one-pole ZD1 and the collapse of the second Zener diode, the voltage of the voltage and the voltage of v2, the first current path has not been turned on. As the potential of the square wave drive signal VIN drops, the square wave drive signal vjjsj and the gate The voltage difference (VGS-VIN) of the voltage signal vgs gradually increases. When the square wave drive signal ν χΝ and the gate voltage 4 LV VGS voltage difference (VGS-VIN) is greater than the first Zener diode ZD1 conduction 201203857 voltage The first flow path starts to conduct with the voltage of the breakdown voltage of the second Zener diode ZD2 and v2. At this time, the falling rate of the gate voltage signal VGS mainly depends on the current on the first current path, that is, by the first A resistor ri determines, so the 'gate voltage signal VGS will drop rapidly. Then, at time t3, when the square wave drive signal VIN and the gate voltage VGS voltage difference (VGS-VIN) is smaller than the first Zener diode ZD1 When the voltage of the breakdown voltage of the second Zener diode ZD2 and the voltage of v2 are turned on, the current path stops conducting. At this time, the rise of the gate voltage signal VGS is determined by the second resistor R2 on the second current path. Therefore, the speed of the declination of the VGS will be Slow down. 参照Please refer to Figure 2, during the fast switching process of the transistor component, the surge (SJ) ike is encountered when the transistor component is turned off. The speed can alleviate the surge voltage, 'but the part will cause an increase in switching losses. Under her, please refer to the real thin towel, the transistor component is generally healthy: maintain its opening speed Μ ’ ‘ can not avoid the surge voltage Vsp too high, to prevent excessive switching losses. The explosion of the square wave indicates that the square wave drive signal VIN is the voltage signal VGS ίΐί in the inter-electrode voltage sigmoid rise (segment gap)

Vl is the demarcation point' 纽 can be distinguished as the collision rate is slower VGS: the rate of decline f = part. Similarly, in the gate voltage signal to the second falling section, the transition voltage v2 is divided into a faster part of the voltage drop rate and the voltage drop rate is 1^ = the same as Vl and V2 can be seen as actual needs, by changing ΐΙΐΛϊ1 and second The parameters of the nanodiode ZD2 are adjusted. The circuit wave 1 takes the circuit and the example of the preferred embodiment is better than the surge voltage eliminating circuit of FIG. 3, and the first current path of the circuit is only the first-resistor ! u and - first Zener diode ZD3. This first 201203857 is also a process of rising to the gate terminal = wave (four) signal connected to the input terminal IN and the power transistor structure, _ please refer to Fig. 6, by: the resistance value of the first resistor R1 is significantly smaller than the first The second resistance Μ, the increase rate of the vGS vGS is mainly determined by =; = the first resistance R1 is determined. Therefore, in the falling section of the square wave drive signal VIN, i VGS ^^(VGS-VIN)^^ = the breakdown voltage of the nano-polar body ZD3 v3 'the current path 彳t with the wave drive signal VIN The electric nail drop, the square wave drive number and the extreme voltage signal VGS avoidance (VGS_VIN) gradually increase. In the square wave drive ^: Na's pressure difference (Na, greater than the first "one pole body ZD3's plunging voltage v3, the first - state. At this time, the gate voltage signal VGS drop rate main current path, The size, that is, by the first resistor R1 == 7, the gate electric turtle VGS will drop rapidly. Then, at the point t4, when the voltage difference between the square signal VIN and the gate voltage signal VGS (VIN_VGs) drops to nano=body When the breakdown voltage of the ZD3 is v3, the first current path is known to be turned on. At this time, the rising rate of the gate voltage signal VGS is determined by the second electrical second resistor μ, and therefore, the falling speed of the inter-electrode voltage signal will be 7a and 7b are diagrams of the surge voltage cancellation circuit of Fig. 5 integrated in a power half, a top view and a cross-sectional view of a preferred embodiment of the body wafer. wherein the sectional view of Fig. 7b corresponds to AA in Fig. 7a, the cross section shows a power contact half gate contact structure of the bulk wafer. This gate contact structure is connected to the gate terminal of the power transistor structure. Above the gate contact structure in the figure There are many gates on the left and right sides that can be connected to the power transistor structure. The spar structure, the gate voltage signal is input to the gate voltage. The gate contact structure has a first conductivity type first polysilicon structure 423 and a second conductivity type second polysilicon structure 425. On a substrate. 201203857 ^ In this embodiment, the first conductivity type is a type, the second type is 425 2 f ί, i;sn; , ϊ, -/ 435 ^ is also a very polycrystalline between the second conductivity type The stone structure 42l. In addition, the ^^ Φ 矽 矽 structure 421 is covered with a gate metal layer 440 to reduce the gate 440, which is shown in Fig. 5, the aforementioned closed-cell metal contact pad 445 is corresponding to the figure. m, the interpolar polylithic structure 421 corresponds to the fifth: structure: ίί two structure 4S electric Γ diameter system by the closed metal contact 445, the core 曰 々 II 二 二 425 直 直Very polycrystalline stone structure 42. Among them, the first-multi-multi-day 杂 461 423 second polycrystalline heterostructure 425 is used as the second ^ conductor =:: the first case = transistor, Ϊ 之 & = The pole contact structure is connected to the power 201203857. It is connected to the 7 shed 'this solid is connected to the gate gold 523 and the second polycrystalline 525

The 矽 structure 527 is of the second conductivity type: the second J plug 535 is connected to the second multi-turn ΪΪ, and the poly-polar 之间 Ϊ Ϊ Ϊ 521 521 521 is covered with a gate metal layer.

As shown in FIG. 3, the gate metal contact pad 545 corresponds to the inter-electrode 521, which corresponds to the second 3 rf structure, the third polycrystalline structure 527, and the second polycrystalline structure 525 ' Directly to the gate polycrystalline germanium structure 521^=45'; from the second_52th = ^ Shixi structure 523 and the third polycrystalline stone structure 527

^第日日ZD1 axis is connected to the input end to take the extreme G 1 and the second (four) to find the first between the formation 525 = _ ZD2 is connected in reverse between the input end m and the gate end G

With the gate polycrystalline eve structure 521, the second polycrystalline stone 结构 structure ^, the secret metal touch pad 545 and _ polycrystalline stone, ". 3 of the first polycrystalline stone structure 525 system as the second resistance R2 The surge voltage elimination circuit provided by Green Γ 不仅 not only helps to increase the efficiency voltage, but also is easy to integrate into the gate contact of God Semiconductor wafer +, to simplify the external drive circuit and reduce the external drive circuit. However, the above is only a preferred embodiment of the present invention, and this is limited to the shape of the hair, which is the simple equivalent change made by the New Zealand. And the modifications are still within the scope of this issue. In addition, any embodiment or patent application scope of the present invention does not need to be 12 201203857 [Simple description of the figure] =1 Figure shows the typical power electric day and day body drive circuit. ΐΝ ΐΝ, 1 之 突 轻 轻 轻 轻 轻 轻 突 轻 轻 轻 突 轻 突 突 突 突 突 突 突 突 突 突 突 突 突 突 突 突 突 突

Figure 3. Figure hiding (four) thief Lai Wen circuit - recording _ circuit shown in Figure 4 shows the surge voltage of Figure 3 = gate _ number VGS, hybrid 彻 彻 彻 and recording Hi Hi 5th is the surge of the present invention Voltage cancellation / + ^ ^ Schematic. Electrical Material - Circuit of the Preferred Embodiment = and the surge voltage canceling circuit of Figure 7 is integrated into a top view and a cross-sectional view of a preferred embodiment of the cymbal. The hand-wave conductor and the surge voltage canceling circuit of Fig. 3 of Fig. 8 are integrated into a top view and a cross-sectional view of a preferred embodiment of the die. Conductor [Key component symbol description] Drive circuit 100 Power transistor Q0 Resistance R0

Surge voltage cancellation circuit 200 input terminal IN 13 201203857 first resistor R1 second resistor R2

First Zener diode ZD 1, ZD3 Second Zener diode ZD2 Gate terminal G Square wave drive signal VIN Gate voltage signal VGS Power transistor structure Q1 Substrate 410, 510 Gate polysilicon structure 421, 521 First polysilicon Structure 423, 523 second polysilicon structure 425, 525 third polysilicon structure 527 interlayer dielectric layer 430, 530 first plug 433, 533 second plug 435, 535 gate metal contact pad 445, 545 gate metal layer 440, 540

Claims (1)

201203857 VII. Patent Application Range··1· A power semiconductor wafer having a surge voltage cancellation circuit, comprising: a power transistor structure having a gate terminal; and a gate contact structure, comprising: An input terminal; a first current path between the input terminal and the gate terminal; a second current path between the input terminal and the gate terminal; a first resistor located on the first current path And a second resistor located on the second current path, the resistance of the second resistor being greater than the resistance of the first resistor; a first Zener diode is located on the first current path and is connected in the forward direction between the input terminal and the gate terminal; in f, when the voltage difference between the input terminal and the gate terminal is greater than the first When the voltage of the Zener diode collapses, the voltage drop rate of the gate terminal is substantially determined by the current of the first current path, and the voltage difference between the input terminal and the gate terminal is less than the back-off diode When the body collapses voltage, the voltage drop rate of the gate terminal is determined by the current on the second current path. 1 item - a kind of _ surge voltage elimination circuit ^ sheep + ^ · body wafer 'more includes _ second Zener diode, located ====== electric Ϊ: wheel = = two pole Zhao Zhi When the voltage of the breakdown voltage is at the same time, the threshold of the voltage of the gate is increased by the voltage of the voltage terminal. The force rate is estimated to be approximately the same as the voltage of the voltage. The _ terminal system having a surge voltage cancellation circuit is located at a ^:=: </ RTI> at 15 201203857 adjacent to one of the first conductivity type polycrystalline ridge structures, between the first eve structure and the second of the second conductivity type and the second polymorphic structure, the system is located at the first The polycrystalline stone structure is extremely polycrystalline, and the _ pole ^ crystal Wei lion extends to connect the electrically connected connection to the first - the crane passes at least - the first - plug _g) the second polymorphic structure, the first ° ^ The second polysilicon h-resist between the second polycrystalline heterostructure and the gate via the at least-second plug electrically connected to the polysilicon structure 4. If the scope of the patent application is the second resistance. The first polycrystalline crystal 矽 layer, and the second power half _ wafer, which f has a glitch power eliminating circuit structure and the idle pole poly 2 structure, power semiconductor wafer, wherein two There is a metal layer of the surge voltage eliminating circuit, and the inter-metal layer is covered with an interlayer layer. The polar metal contact pad is located in the same metal 6 · as one of the patents in the second section of the patent application, the recording of the power semiconductor chip, wherein, ^, has a surge electric_divide circuit, the extreme system is located at the gate More === is located in the inter-polar metal contact 塾, the polycrystalline stone 结构 structure and a first redundancy type: day,,: a second conductivity type third, the second Zener diode t third Between the crystals, between the structures, the second polycrystalline 夕 系 ^ 二 二 二 二 二 : : : : : : : : : : : : : : : : : : : : : : : : : : : 构 构 构 构 构 构 构 构 构 构7. According to the sixth aspect of the patent application, in the sixth aspect of the invention, there is a surge voltage eliminating circuit in which a polar metal connection is transmitted through at least a crystal structure, and the poly crystal is transmitted through at least a second plug. A 201203857 power semiconductor wafer, wherein the first structure, the third polycrystalline stone structure and the closed-pole more than the second polycrystalline stone layer, and the third polycrystalline frequency structure surrounds the same - a polycrystalline second polycrystalline germanium structure surrounds the third ^2 multi-B structure, as in the sixth application of the patent: _=^匕Of the semiconductor wafer, wherein the inter-engaging Xuan; ^ dogs wave voltage canceling circuits: a metal layer, the gate metal layer and the gate Ginzburg : Force rate such as 4r two circumferences 1〇 · As in the scope of patent application, the first item f has a structure. A power semiconductor wafer in which the power ray (10) f is a circuit (MOSFET) structure of an electric circuit. BS,,, ° ° difficult - gold oxygen half-field power 11. A surge voltage elimination circuit, comprising: an input; a current path, located at the input end and - power transistor structure open one second current path Control, located between the input terminal and the gate terminal; a first resistor located on the first current path; the first resistor 'is located on the current path of the material, the resistance of the second resistor is greater than the first resistor a resistance value; a first Zener diode located on the first current path and connected in the forward direction between the input terminal and the gate terminal; and wherein the voltage difference between the input terminal and the gate terminal When the voltage is collapsed, the voltage drop rate of the gate terminal is substantially determined by the current on the first current path, and when the voltage difference between the input terminal and the gate terminal is less than the first When the breakdown voltage of a Zener diode is reached, the voltage drop rate of the gate terminal is substantially determined by the current on the second current path. 12. The surge voltage canceling circuit of claim n, further comprising a second Zener diode 'located on the first current path and connected in reverse to the input 17 201203857 terminal and the gate terminal When the ratio of the input terminal to the gate terminal is less than the voltage of the first Zener diode and the breakdown voltage of the second Zener diode, the voltage rise rate of the gate terminal is Generally, the current difference between the input terminal and the gate terminal is greater than the voltage of the first Zener diode and the second Zener diode. The voltage rise rate of the g-extreme is substantially caused by the current on the first current path. The surge voltage cancellation circuit of claim 11 is applied to the power semiconductor chip. One of the gates ^ touch ^