201031296 六、發明說明： 【發明所屬之技術領域】 且有==種電路板結構及其製法，尤指-種 奸連料（電性接觸旬之電路板結構及其 【先前技術】 Ο 鲁 ik者電子產業的蓬勃發展，電 能、高性能的方向你 、、 產0〇亦逐漸邁入多功 (Integration)以及1 $滿足半導體封裝件高積集度 動元件及線路_二 封^求，提供多數主、被 板，俾於有限的空d!:!由單層板演 變成多層 可利用的電路面積 +㈢門連接技術擴大電路板上 七 因應高電子密声少 求。 度之積體電路之使用需 請參閱第1八1 法示意圖；如帛U1E圖所不’係為一種習知電路板之製 成複數第-開槽圖所—不，以雷射繞灼該承载板1〇而形 板10係為-介電層;=第二開槽⑻’其中’該承載 及其側壁、各該窣、 圖所不’於各該第一開槽100 之表面上形成導⑻及其側壁、與該承载板10 上形成金屬層13，，如第1C圖所示，於該導電層12 131 ’並_第，^第—⑽巾形錢性連接塾 示’移除該承载极G1中形成線路132;如第⑴圖所 路132之該金屬表面上未形成該電性連接*131 可於該承載板lG與導電層12;如第1E圖所示 電性連接塾⑶、及線路132上= 201031296 成增層結構3，且該增；蛀 層％，該一具有 增層結構3作為電性接觸塾15,此夕，160,以露出部分 結構3之承載板10表面 ，復可於未具 ❹ 連接，陶面，俾供接置導露出軸 然而，該習知電路板之第一開样、#(如焊踢凸塊）。 二：度係相同’即該電性連接墊! 〇與第二開槽ι〇ι =度相同’於高密度之電 厚度與線路13 =連接’由於該電性連接塾 邊小，致使該電性連接塾131於 ^電層接觸面積 脹係數（CTE)差異造成的應力不均/f程中容易因熱蹲 離，或是電路板最外側接置導電易與介電層發生分 電性接觸墊15)佈設越密集，其血八+電性連接墊131 (或 造成接置導電結構後，再：置於=層接觸面積變小， ❹ 作動過程中產生的熱量，會因 ^件或主機板時’ 電性連接墊⑶（或電性接觸墊ΐ5；2^(叫差異造成 發生電路板可靠度降低的_。 $層發生分離，而 因此’鑒於上述之問題，如何 連接塾（或電性接觸塾） 免白知技術中之電性 題，進而改善電性連接塾易損壞等問 成為目前亟欲解決之課題。随接觸塾）之可靠度，實已 【發明内容】 蓉於上述習知技術之缺失，本發 可罪度電性連接墊（或電性 τ板種具有高 王^之电路板結構及其裳 111061 4 201031296 法。 m ^ 在本發明的一態樣中，本發明揭露一種電路板結構， 包2 ’承載板，至少-表面具有第-介電層，該第-介 :層°又有複數第—開槽與複數第二開槽，該些第-開槽之 公邊些第二開槽之深度，該承載板係可為絕緣板或 二·=，，數第—電性連接墊，係對應設於各該第一開槽 該些數第—線路，係對應設於各該第二開槽中，且 ”性連接墊之厚度大於該第一線路之厚度。 〜介板結構，復包括增層結構，^於該第 .. 弟~毛性連接墊、與第一線路上，兮秘a 係包括至少—篦_八+ 5亥增層結構 一 一；|電層、設於該第二介電声 〜電性連接墊鱼褶倉电曰中之複數第 電性連接至線路、及設於該第二介電層中並 外層復具有複數電墊之導電盲孔，該増層結構最 魯 :焊層，且該防焊層具有複數對應外層上設有 <防焊層開孔。 出各该電性接觸墊 本發明復揭露—種電路 表面具有第一介雷层一 去係包括· 單層’該遮罩層上邢 弟；丨電層上形忐兔 露出部分之第=成有複數第-開口與第二開：成遮 刀之弟介電層表面， 開口，以外 :開口；以反應式離子麵刻=開口大於各該第 :開口中之第—介電層分別 、該弟〜開口與第 夕于心罩層以露出該 開槽與第二開 以雷射燒灼各該第— 龟層、第—及 乐開槽之底面，令 卑〜開槽； 5 二弟—開槽之深度 111061 201031296 大於5亥些第二開槽之深度；以及於各該第〜 ——電性連接塾，並於各該第二開槽 ：開槽中形成第 些第-電性連接塾之厚度大於該些第一線跟〜線路’且該 ，述之電路板結構之製法，該承載二厚度。 或金屬板，該遮罩層係可為金屬或高分= 反係可為絕緣板 又依上述之電路板結構之製法，才料。 m 、^製法係包括:於各該第性連接塾與 =上形成金屬層，並於各該第-開：ΐ導電層;於該 各該第二開槽中形成第41形成第一電性 電層。線路之金屬層 接執 '述之製法，復包括於該第—介命思 „、—笛/、第—線路上形成增層結構，該二；、第—電性連 ❹ 第-介電層、形成於 層:構係包括至 連接墊與複數 乐，丨電層中之複數 連接至該第二、％成於該第二介電展中二 成電=觸塾，復包括於該增層外層 板，以外露出H之有電之製法’復包括移除承載 除外露出之部分第;:、了=第一介電層表面，並移 p分表面或全部表面。 路出°亥弟一電性連接墊 JJ106] 6 201031296 本發明揭露另-種電路板結構之^ 表面具有第—介電層之承载板；:括.提供 罩層，該遮罩層形成有複數第一開口 上形成遮 % 鬌 —介電層表面；以反應式離子餘刻（咖）=分之第 口中之第-介電層形成複數第_開槽.移b各該第一開 =該第-介電層及第一開槽；以m層以露 表面而形成複數第二開槽，且該：勺5亥弟-介電層之 些第二開槽之深度；以及於各—開槽之深度大於該 =接墊，並於各該第二開槽中形成第開::形成第-電性 性連接塾之厚度大於該第—線路之厚产。’且該些第-依上述之電路板結構之製法，二 或金屬板’該遮罩層係可為金屬或:载板係可為絕緣板 ★又依上述之電路板結構之製二子材料。 疒線路之製法係包括:於各該第性連接塾與 j:開槽及其侧壁、與該第側壁、 :電層上形成金屬層，且於各該第：=導電層； 建接墊，而於各π m“ 開槽中形成第一 形成兮第―，各5亥弟-開槽中形成第一線路·Μ W弟電性連接墊及第一線路之 ，^及移 電層。 金屬層及其覆蓋 接藝、與第復包括於該第—介電層、第一带 —弟二介電層、形成於令第5玄增層結構係包： 連接至該第弋—線路、及形成於該第二介電 弟、電性連接墊之導電盲：層中並， 曰層結構最： 11106] 201031296 復具有複數電性接觸墊，> 成有防焊層，且該防焊^包括於該增層結構最外層上形 觸墊之防焊層開孔。胃具有複數對應外露出各該電性接 有該^括移除承餘，以外露出未具 一介電層，=面，並移除外露出之部分第 表面。 弟一電性連接墊之部分表面或全部 φ 本發明又揭露一種電 表面具有第—介” $ i U冓H係包括：提供 形成複數第田射於料—介電層上 第二開槽之深度;以及於各該;深 电性連接塾，並於各該第 θ形成 該些第一雷•^曰τ形成弟一線路，且 依上=連接墊之厚度大於該第—線路之厚度。且 或金屬板。料板結構之製法’該承餘射為絕緣板 楚一Γ依上述之電路板結構之製法，該第一雷m勒 弟線路之·、、泰你 包性連接塾輿 m - 包括：於各該第—開槽及^ 弟-開槽及其側壁、與該第一介雷M 』壁、各讀 導電層上形成金屬曰上形成導電層；於讀 連接墊，而於夂= 開槽中形成第一電性 而於各該第二開槽中形成第_ 电逄 形成該第一電性連接塾及第一線路-，以及移除表 電層。 、之金屬層及其覆蓋之導 又依上述之電路板結構之製法 層、第—電性违,.. 设包括於該第一介電 連接塾、與第一線路上形成增層結構，該； 8 1]]〇6ι 201031296 層結構係包括至少一第二介 -之複數第二電性連接塾虚種為f、形成於該第二介電層中 .介電層中龙電性連接至;第數弟二線路、及形成於該第二 增層結構最外声教古ΓΓ〜電性連接塾之導電盲孔，該 結構最外層上^^電性接觸塾，復包括於該增層 鲁 該增層結構復包括移除承載板，料露出未具有 介電層，以)1包層表面’並移除外露出之部分第一 面。 卜露出該第一電性連接墊之部分表面或全部表 離子钱刻*·本*明之電路板結構之製法係使用反應式 電層中形^射!或僅直接使用雷射）以於該承載板之介 接觸墊）息衣度車乂’木之第—開槽，令該電性連接墊（或電性 接藝（或^較線路大之厚度’以避免習知技術中之電性連 ❿ 進而改二接觸塾）之厚度不足而導致容易損壞等問題， 香电路板之可靠度。 【貫施方式】 式，藉由特定的具體實施例說明本發明之實施方 瞭解本私B日技农之人士可由本說明書所揭示之内容輕易地 [第之其他優點及功效。 實施例] 法示意__ 2Α至21圖’係為本發明之電路板結構之製 如第Μ圖所示，首先，提供表面具有第一介電層η 111061 9 201031296 之承載板20,該承載板20係可為絕緣板或金屬板；接著， -於該第-介電層21上形成遮罩層22，該遮罩層^係可為 •金屬或高分子材料，且該遮罩層22形成有複數第一開口 -221與第二開口 222,以外露出部分之第—介電層21表面， • 且各該第一開口 221大於各該第二開口 222。 ， 如第2B圖所示，以反應式離子钱刻（Reactive I〇n邮201031296 VI. Description of the invention: [Technical field to which the invention belongs] There is == kind of circuit board structure and its manufacturing method, especially the kind of traitor (electric circuit board structure and its [prior art] Ο 鲁 ik The booming development of the electronics industry, the direction of electric energy and high performance, and the production of 〇 〇 〇 〇 逐渐 逐渐 逐渐 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 以及 满足 满足 满足 满足 满足 满足Most of the main, the board, the limited space d!:! From the single-layer board evolved into a multi-layer available circuit area + (three) door connection technology to expand the board on the seven due to high electronic secret sound less demand. For the use of the device, please refer to the schematic diagram of the 1st 8th method; if the U1E diagram is not a conventional circuit board made of a plurality of first-slotted maps, no, the laser is used to circumvent the carrier board. The plate 10 is a dielectric layer; = a second slot (8) 'where the carrier and its side walls, each of the sides, and the other side of the first slot 100 are formed with a guide (8) and a side wall thereof Forming a metal layer 13 on the carrier board 10, as shown in FIG. 1C, in the conductive The layer 12 131 'and the first, the first - (10) towel-shaped connection means 'removing the line 132 formed in the carrier G1; the electrical connection is not formed on the metal surface of the path 132 of the (1) figure* 131 may be on the carrier plate 1G and the conductive layer 12; as shown in FIG. 1E, the electrical connection 塾 (3), and the line 132 = 201031296 is a build-up structure 3, and the increase; the 蛀 layer%, the one has a build-up structure 3 as the electrical contact 塾 15, this eve, 160, to expose the surface of the carrier plate 10 of the partial structure 3, can be re-attached to the unconnected, ceramic surface, for the connection to expose the shaft. However, the conventional circuit board The first sample, # (such as welding kick bumps). Two: the same degree 'that is the electrical connection pad! 〇 and the second slot ι 〇 = = the same degree 'in the high density of the thickness and line 13 = The connection 'because the electrical connection is small, so that the electrical connection 于131 is easily separated by heat or the circuit board due to the difference in the contact area expansion coefficient (CTE) of the electrical layer. The outer connection is electrically conductive and the dielectric layer is electrically connected to the contact pad. 15) The denser the layout, the blood eight + electrical connection pad 131 (or cause the connection of the conductive junction) After that, the contact area of the layer is reduced, and the heat generated during the operation will be caused by the electrical connection pad (3) or the electrical contact pad (3) (2) Circuit board reliability is reduced _. The layer is separated, and therefore 'in view of the above problems, how to connect the 塾 (or electrical contact 塾) to avoid the electrical problems in the white technology, thereby improving the electrical connection, damage, etc. Asked to become the subject that is currently being solved. With the reliability of contact 塾), it has been [invented] Rong is the lack of the above-mentioned conventional technology, the sinister electrical connection pad (or electric τ plate type has a high Wang ^'s circuit board structure and its skirt 111061 4 201031296 method. m ^ In one aspect of the present invention, the present invention discloses a circuit board structure, comprising a carrier layer having at least a surface having a first dielectric layer, the first dielectric layer having a plurality of first-grooves and a plurality of second slots, the depths of the second slots of the first and the slots, and the carrier board may be an insulating board or a second electrical connection pad, corresponding to each The first slotted plurality of first lines are correspondingly disposed in each of the second slots, and the thickness of the "synthesis connection pad is greater than the thickness of the first line. - The interface structure includes a build-up structure, ^ On the first.. brother-hair connection pad, and the first line, the secret a system includes at least - 篦 _ 八 + 5 增 增 layer structure one; | electrical layer, set in the second dielectric sound The plurality of electrically connected pad fish plenums are electrically connected to the circuit, and the conductive blind holes provided in the second dielectric layer and having a plurality of electric pads on the outer layer, the ruthenium structure is the most ruthless: welding a layer, and the solder resist layer has a plurality of corresponding outer layers provided with a solder mask opening. Each of the electrical contact pads has a circuit surface of the present invention The first layer of the first layer of the layer includes a single layer of 'Xingdi' on the mask layer; the first part of the exposed layer of the 忐 丨 = = = = 有 开口 第二 第二 第二 : : : : : : : : : : : : : : : : Electrical layer surface, opening, outside: opening; reactive ion surface etching = opening is larger than each of the first: openings in the first dielectric layer, the younger ~ opening and the eve of the enamel layer to expose the slotted The second opening is to burn the bottom of each of the first tortoise, the first and the first slot, and to make the bottom of the groove, and to make the groove; 5 second brother - the depth of the groove 111061 201031296 is greater than the depth of the second slot of the 5th; And in each of the first - electrical connections, and in each of the second slots: the thickness of the first electrical connection ports formed in the slots is greater than the first line and the line 'and The method of manufacturing the circuit board structure, the carrying thickness of the metal plate, or the metal plate, the mask layer can be metal or high-score = the anti-system can be an insulating plate and according to the above-mentioned circuit board structure, the material is obtained. m, ^ The system comprises: forming a metal layer on each of the first connection ports and = and respectively forming the first-on: germanium conductive layer; Forming a 41st portion to form a first electrical layer in the second slot. The metal layer of the line is connected to the method of describing the method, and the method includes forming a build-up structure on the first-distribution, the flute, and the first line. The second dielectric layer is formed in the layer: the structure includes a connection pad and a plurality of layers, and the plurality of layers in the layer are connected to the second portion, and the second layer is formed in the second layer. In the electric exhibition, the second generation electricity = touch 塾, the complex is included in the outer layer of the build-up layer, and the method of exposing the electricity to the outside of H is repeated, including the part of the exposed carrier except the exposed carrier;:, = the surface of the first dielectric layer, And shift the surface or the entire surface. The invention discloses a carrier board having a first dielectric layer on the surface of the circuit board structure; Forming a surface of the first opening on the surface of the dielectric layer; forming a plurality of first dielectric layers in the first dielectric layer in the first step of the reactive ion remnant (coffee) = shifting each of the first openings = a first dielectric layer and a first trench; forming a plurality of second trenches with the m layer to expose the surface, and: the depth of the second trenches of the scoop 5 hai-dielectric layer; The depth of the groove is greater than the = pad, and the first opening is formed in each of the second slots: the thickness of the first electrical connection is greater than the thickness of the first line. And the above-mentioned method of manufacturing the circuit board structure, the second or the metal plate, the mask layer may be metal or the carrier plate may be an insulating plate, and the two sub-materials according to the above-mentioned circuit board structure. The manufacturing method of the 疒 line includes: forming a metal layer on each of the first connection 塾 and j: grooving and its sidewall, and the first sidewall, the electrical layer, and each of the:= conductive layer; And each of the π m "slots form a first formation 兮 first", each of the 5 haidi-grooves form a first line Μ 弟 电 electrical connection pads and the first line, and the power transfer layer. a metal layer and a cover thereof, and a second layer included in the first dielectric layer, the first tape-di-dielectric layer, and the fifth sub-layer structure tether: connected to the third-line, And formed in the conductive interlayer of the second dielectric brother and the electrical connection pad: and the 曰 layer structure is the most: 11106] 201031296 has a plurality of electrical contact pads, > has a solder resist layer, and the solder resist Included in the outermost layer of the layered structure, the contact layer of the solder mask is formed on the outermost layer of the layered structure. The stomach has a plurality of corresponding external exposures, and the electrical connection is provided with the removal of the residual, and the exposed layer has no dielectric layer, Surface, and remove part of the exposed surface. A portion of the surface of the electrical connection pad or all of the φ. The invention further discloses that the electrical surface has the first $ i U冓H includes: providing a depth of the second field of the dielectric layer - the depth of the second groove on the dielectric layer; and each of the; the deep electrical connection 塾, and forming the first θ A Ray•^曰τ forms a line of the brother, and the thickness of the connection pad is greater than the thickness of the first line. And or metal plate. The method of making the material structure of the material plate is the method of manufacturing the circuit board structure according to the above-mentioned circuit board structure. The first mine is the line of the first line, and the Thai connection is 包m - including: Forming a conductive layer on the first slat and the squash and the side wall thereof, forming a metal raft on the first barrier M ′ wall and each read conductive layer; reading the connection pad, and 夂=grooving Forming a first electrical property to form a first electrical connection in each of the second slots to form the first electrical connection port and the first line-, and removing the surface layer. The metal layer and the cover thereof are further formed according to the method layer of the above-mentioned circuit board structure, and the first electrical connection, comprising: forming a build-up structure on the first dielectric port and the first line, 8 1]] 〇 6ι 201031296 The layer structure includes at least one second dielectric layer, a plurality of second electrical connections, a dummy species f, formed in the second dielectric layer. The dielectric layer is electrically connected to the dielectric layer a first dipole second line, and a conductive blind hole formed in the outermost layer of the second build-up structure, the outermost layer of the structure, the electrical contact hole on the outermost layer of the structure, the complex layer included in the layer The build-up structure includes removing the carrier plate to expose a portion of the first surface that does not have a dielectric layer, and removing the exposed portion. Exposing part of the surface of the first electrical connection pad or all of the surface ionization method of the circuit board structure using a reactive electric layer or directly using a laser for the bearing介介介接触垫) 衣衣度车乂 '木之第—Slotting, so that the electrical connection pad (or electrical connection (or ^ thicker than the line) to avoid the electrical connection in the prior art ❿ Furthermore, the thickness of the second contact 塾) is insufficient to cause damage, etc., and the reliability of the fragrant circuit board. [Comprehensive mode] The embodiment of the present invention is described by a specific embodiment to understand the private B-day technique. The agricultural person can easily [the other advantages and effects of the present invention by the contents disclosed in the present specification. Embodiments] The method indicates that the circuit board structure of the present invention is as shown in the figure, first Providing a carrier board 20 having a first dielectric layer η 111061 9 201031296, the carrier board 20 being an insulating board or a metal board; then, forming a mask layer 22 on the first dielectric layer 21, The mask layer can be a metal or a polymer material, and the mask layer 22, a plurality of first openings -221 and second openings 222 are formed, and a portion of the first dielectric layer 21 is exposed, and each of the first openings 221 is larger than each of the second openings 222. As shown in FIG. 2B Reactive I〇n by reactive ion
KiE)於各該第一開口 221與第— ， -屛21八^ ^ ”乐—開口 222中之第一介電 Φ ^刀別形成複數開孔深度相同之第一PI# Hi # 響槽212。 〜乐開槽211與第二開 如第2C圖所示，移除該遮罩 層L第一及第二開槽211,212/ 2从露出該第一介電 如第2D圖所示，以雷射燒 面，令該4L第—η揭川 凡。谷°亥弟-開槽211之底 深度。 札2U之深度大於該些第二開槽212 = •該第如弟2Ε圖所示，於各該第-開槽211 4二開槽212及其側壁、與該第一介電二及其侧壁、各 23。 电層21上形成導t 導^第奸圖所示’藉由該導電層23作^ 1槽該導電層23上形成金屬層ίτ電流傳 措〜中二中形成第-電性連接塾2化：你 中形成第一線路242。 而於各該第二開 ★D苐2G圖所示 萆〜線路？ '、夕除未形成該第〜命祕KiE) in the first opening 221 and the first dielectric Φ ^ in the first - 屛 21 ^ 八 开口 开口 opening 222 to form a first PI# Hi # 槽 212 of the same plurality of opening depths ~ Le slot 211 and second opening as shown in FIG. 2C, removing the mask layer L first and second slots 211, 212 / 2 from exposing the first dielectric as shown in Figure 2D, to Ray The firing surface, so that the 4L _ η Jie Chuan Fan. Valley ° Haidi - the depth of the bottom of the slot 211. The depth of the 2U is greater than the second slot 212 = • The second as shown in Figure 2 Each of the first-grooves 211 4 is formed by two slots 212 and sidewalls thereof, and the first dielectric member 2 and its sidewalls and each of the 23 layers. The electrical layer 21 is formed with a conductive trace as shown in FIG. Layer 23 is formed as a metal layer on the conductive layer 23, and a current layer is formed in the middle of the second layer to form a first-electrode connection: a first line 242 is formed in each of the second lines. 2G picture shown 萆 ~ line? ', eve, not formed the first ~ secret
藝絮、電性_之金屬層24及其覆蓋之二 A 線路242之厚 m〇6i 連接塾241切度大於該些/Μ 23，且讀 )0 201031296 度。 - 如第2H圖所示，之後，於該第一介電層21、第一電 , 性連接墊241、與第一線路242上形成增層結構25，該增 層結構25係包括至少一第二介電層251、形成於該第二介 電層251中之複數第二電性連接墊252與複數第二線路 253、及形成於該第二介電層251中並電性連接至該第二電 ‘性連接墊252之導電盲孔254,該增層結構25最外層復具 -有複數電性接觸墊255，並於該增層結構25最外層上形成 ® 有防焊層26，且該防焊層26具有複數對應外露出各該電 性接觸墊255之防焊層開孔260。 如第21圖所示，移除該承載板20，於未具有該增層 結構25之第一介電層21表面移除部分第一介電層21(使 用雷射開孔或研磨），以外露出該第一電性連接墊241之部 分表面或全部表面（未圖示），以供接置導電結構（未圖示）， 如焊錫凸塊。 ⑩[第二實施例] 請參閱第3A至3D圖，係為本發明之電路板結構之 又一實施例製法示意圖。 如第3A圖所示，首先，提供一係如第2A圖所示之 表面具有第一介電層21之承載板20;接著，於該第一介 電層21上形成遮罩層22,該遮罩層22形成複數第一開口 221，以外露出部分之第一介電層21表面。 如第3B圖所示，以反應式離子蝕刻（RIE)於各該第 一開口 221中之第一介電層21形成複數第一開槽211。 ]] 111061 201031296 如第3C圖所示，移除該遮罩層 •層21及第—開槽211。 乂路出5亥弟—介電 • 如第3D圖所示，以雷射燒灼該第-介電厚 -而形成複數第二開槽212，且該第 ^層21之表面 該第二開槽212之深度。 θ 11之深度大於 本實施例與前個實 β 1圖之衣法以形成電性連接塾、線 = 圖不），於此不再為文贅述。 4、，。構等（未 [第三實施例] 例製係林發明之料板結狀另一實施 之承載板 ^ _ 者直接以雷射燒灼該第一介電声21 # 形成複數第一開槽211與複數第二 S又 ⑩ 第—開槽2U之深度大於該 ;二=且該些 同的開样弟—開槽212之深度，而不 成。4度T糟由控制雷射的發數、功率、或時間來達 2U虚本^例與前個實施例之差別主要在於該第一開槽 21圖槽212之製法，之後接續上述之第2E至 製法以形成電性連接墊、線路、及增層結構等（未 圆不），於此不再為文贅述。The technical layer, the electrical layer _ the metal layer 24 and its coverage, the thickness of the A line 242, the m 〇 6i connection 塾 241 is greater than the / Μ 23, and read ) 0 201031296 degrees. - as shown in FIG. 2H, after that, a build-up structure 25 is formed on the first dielectric layer 21, the first electrical connection pad 241, and the first line 242, and the build-up structure 25 includes at least one a second dielectric layer 251, a plurality of second electrical connection pads 252 and a plurality of second lines 253 formed in the second dielectric layer 251, and formed in the second dielectric layer 251 and electrically connected to the second dielectric layer 251 a conductive baffle 254 of the second electrical connection pad 252, the outermost layer of the build-up structure 25 is multiplexed with a plurality of electrical contact pads 255, and a solder resist layer 26 is formed on the outermost layer of the build-up structure 25, and The solder resist layer 26 has a plurality of solder mask opening 260 corresponding to each of the electrical contact pads 255. As shown in FIG. 21, the carrier 20 is removed, and a portion of the first dielectric layer 21 (using a laser opening or grinding) is removed from the surface of the first dielectric layer 21 not having the build-up structure 25. A portion or all of the surface (not shown) of the first electrical connection pad 241 is exposed for attaching a conductive structure (not shown), such as a solder bump. 10 [Second Embodiment] Please refer to Figs. 3A to 3D, which are schematic views showing a manufacturing method of another embodiment of the circuit board structure of the present invention. As shown in FIG. 3A, first, a carrier 20 having a first dielectric layer 21 on the surface as shown in FIG. 2A is provided; then, a mask layer 22 is formed on the first dielectric layer 21, The mask layer 22 forms a plurality of first openings 221, and a portion of the surface of the first dielectric layer 21 is exposed. As shown in Fig. 3B, a plurality of first trenches 211 are formed by reactive ion etching (RIE) in the first dielectric layer 21 in each of the first openings 221. ]] 111061 201031296 As shown in FIG. 3C, the mask layer • layer 21 and the first slot 211 are removed.乂路出五海弟—Dielectric • As shown in Fig. 3D, the first dielectric slot 212 is formed by laser burning the first dielectric thickness, and the second slot is formed on the surface of the second layer 21 The depth of 212. The depth of θ 11 is greater than that of the previous embodiment and the previous actual β 1 pattern to form an electrical connection 塾, line = Fig. 2), which is not described herein. 4,,. Structure [etc. [No. 3] The carrier plate of another embodiment of the system of the invention is not the same as the carrier plate of another embodiment. The first dielectric sound 21 # is directly burned by laser to form a plurality of first slots 211 and The depth of the second second S and 10 first-slot 2U is greater than the depth; the second and the same open sample--the depth of the slot 212 is not formed. The 4 degree T is controlled by the number of lasers, power, Or the time to reach 2U virtual example is different from the previous embodiment mainly in the method of manufacturing the first slot 21 groove 212, and then continuing the above 2E to the manufacturing method to form an electrical connection pad, a line, and a buildup layer. Structure, etc. (not rounded), this is no longer a text.
、《月復揭路-種電路板結構，係包括·承載板π， 第二表面具有第—介電層2卜該第-介電層21設有複數 開奴211與複數第二開槽212，且該些第一開槽2H III061 12 201031296 之淥度大於該些第二開槽 絕緣板或金屬^ μ第載=係:為 各該第一開槽2丨〗由.、> 4】，係對應设於 方入各兮筮_ ，以及複數第—線路242，係對; 方；各,亥第一開槽 于对應。又 度大於該第—線路242之=電性連接塾Μ之厚 第-構’復包括增層結構〜係設於該 該增層結構25係包括至少 入第一線路加上， 介電層251中之複& w电層251、設於該第二 攻、及設於該第= _接心52與複數第二線路 連接塾252之導電亡^ 51中並電性連接至該第二電性 複數電性接觸塾且該增層結構25最外層具有 層26,且該防烊層26、具亥有^=25 ,外層上設有防焊 墊255之防焊層開孔26〇。 怎夕路出各該電性接觸 右八上所述，本發明電路板結構及1制, "Recovering the road - a circuit board structure, comprising: a carrier plate π, the second surface has a first dielectric layer 2, the first dielectric layer 21 is provided with a plurality of slaves 211 and a plurality of second slots 212 And the first slots 2H III061 12 201031296 have a greater degree of twist than the second slotted insulation plates or metal ^ μ loading = system: for each of the first slots 2丨 by,, > 4] , correspondingly set in the square _ _, and the plural number - line 242, the pair; square; each, the first slot in the corresponding. Further, the thickness of the first connection 242 is equal to the thickness of the electrical connection 第, and the additional structure is included in the enhancement structure 25, including at least the first line plus, the dielectric layer 251 The intermediate layer & w electrical layer 251 is disposed in the second attack and is disposed in the conductive connection 51 of the first _ junction 52 and the plurality of second line connections 252 and is electrically connected to the second power The plurality of layers are electrically contacted, and the outermost layer of the layered structure 25 has a layer 26, and the anti-corrosion layer 26 has a solder mask opening 26 of the solder pad 255. How to make each electrical contact in the same way, as described in the right eight, the circuit board structure and system 1 of the present invention
Li，之承載板，使用反應式離子忒表面具 複數深度較淺之第二^升 度較深之第-開槽及 成電性連接塾（或電9 ’接者於4較深之第-開槽中形 形成線路，令該些電性H =該較淺之第二開槽中 之厚度’如此則可避免習之厚度大於 厚度不—等問 上述實施例係用以例示性說明本發明之原理及其功 Π1061 13 201031296 效，而非用於限制本發明。任何熟習此項技藝之人士均可 在不違背本發明之精神及範疇下，對上述實施例進行修 改。因此本發明之權利保護範圍，應如後述之申請專利範 圍所列。 【圖式簡單說明】 第1A至1E圖係為習知之電路板之製法示意圖； 第2A至21圖係為本發明之電路板結構之第一實施例 之製法示意圖； 第3A至3D圖係為本發明之電路板結構之第二實施 例之製法示意圖；以及 第4圖係為本發明之電路板結構之第三實施例之製法 示意圖。 【主要元件符號說明】 10、20 承載板 100 ' 211 第一開槽 _ 101 、 212 第二開槽 12、23 導電層 13、24 金屬層 131 電性連接墊 132 線路 15 > 255 電性接觸墊 16、26 防焊層 160 、 260 防焊層開孔 17 開孔 111061 201031296 21 第一介電層 22 遮罩層 221 第一開口 222 第二開口 241 第一電性連接墊 242 第一線路 25 > 3 增層結構 251 第二介電層 # 252 第二電性連接墊 253 第二線路 254 導電盲孔 15 111061Li, the carrier plate, using the reactive ion 忒 surface with a plurality of deeper depths of the second ^ deeper first - slotted and electrically connected 塾 (or electric 9 ' 接 in the deeper of 4 - Forming a line in the slot, so that the electrical H = the thickness of the shallower second slot 'so that the thickness is less than the thickness is not allowed - the above embodiment is used to exemplarily illustrate the present invention The present invention may be modified by those skilled in the art without departing from the spirit and scope of the invention. The scope of protection shall be as listed in the scope of application of the patents described later. [Simple description of the drawings] Figures 1A to 1E are diagrams showing the manufacturing method of the conventional circuit board; Figures 2A to 21 are the first circuit board structure of the present invention. 3A to 3D are schematic views of a second embodiment of the circuit board structure of the present invention; and FIG. 4 is a schematic view of a third embodiment of the circuit board structure of the present invention. Main component symbol Description 10, 20 carrier plate 100 ' 211 first slot _ 101, 212 second slot 12, 23 conductive layer 13, 24 metal layer 131 electrical connection pad 132 line 15 > 255 electrical contact pads 16, 26 Solder mask layer 160, 260 solder mask opening 17 hole 111061 201031296 21 first dielectric layer 22 mask layer 221 first opening 222 second opening 241 first electrical connection pad 242 first line 25 > 3 increase Layer structure 251 second dielectric layer # 252 second electrical connection pad 253 second line 254 conductive blind hole 15 111061