201019429 螫 九、發明說明： 【發明所屬之技術領域】 、 本發明係關於—種具散熱件之半導體封裝件，尤梅 於一種藉散熱件以逸散半導體晶片戶斤產生之執量至^ 中的半導體封裝件。 乱 【先前技術】 隨著電子產品在功能及處理速度之需求的提升，作為 電子產品之核心組件的半導體晶片即須設有更高密度: _电子 7G 件（Electronic Components)及電子電路 (Electronic Circuits)。但半導體晶片之積體化密度 (Integrated Density)越高，其在運作時所產生之熱量= 越大，若不能有效逸散所產生之熱量，則會對半導體晶月 造成損害。故遂有於半導體封裝件中加設散熱片 Sink或Heat Spreader)之設計發展出，以藉散熱片逸散 出半導體晶片所產生之熱量。 籲 具有散熱片之半導體封裝件已揭露於第 5’883, 430、5, 604’978、6, 008, 536、6, 376, 907、 6’ 403, 882、6’ 472, 762 及 6, 504, 723 號等美國專利中。 該等美國專利揭露出不同型態之散熱片之使用，但以散熱 片之頂面外露出封裝膠體或直接外露於大氣中為佳，俾取 得較佳之散熱效果。然而，若散熱片僅以頂面外露出封裝 膠體而未直接黏接至半導體晶片，而使半導體晶片與散熱 片間為封裝膠體所充填，則會因形成封裝膠體之如環氧樹 月曰（Epoxy Res in)之封裝化合物（Mold Compound)的熱傳導 111047 201019429 性甚差’使半導體晶片產生之熱量仍無法有效傳遞至散熱 片而逸散至大氣_;故遂亦有先前技藝提出將散熱片藉散 、熱膠黏置於半導體晶片上，以使半導體晶片所產生之熱量 能藉熱傳導性較佳之散熱膠傳遞至散熱片以逸散至大氣 中，如第8圖所示。 ” 第8圖所示之半導體封裝件8之散熱片⑽雖係以散 :膠81黏結至半導體晶片82 ’然而，散熱膠81為一昂 貴之材料，雖能提升散熱效率，但會導致封裝成本之大幅 ❿提高；且’散熱片80、散熱膠81及半導體晶片82之熱 膨脹係數（Coefficient of Thermal Expansi〇n，㈣均 不同，故在封裝製程之溫度循環（Temperature bde) 中，往往會因熱膨脹係數差異（CTE Mismatch)所產生之熱 應力（Thermal Stress)導致散熱件8〇與散熱膠81間之介 面及/或散熱膠81與半導體晶片82間之介面發現脫層 (Delamnation)現象，一旦脫層現象發生，半導體晶片 斤產生熱篁即無法有效逸散，並亦會隨之影塑製成品 •，信賴性。此外，將散熱片80藉散熱膠81黏置 晶片^2上時，由於散熱膠81尚未固化（Cured)，故不易 控制該散熱片80相對於半導體晶片82或承载該半導體晶 片82之基板83的水平度（pianity)，當散熱片產生傾 斜時，會影響至製成品之外觀，且形成用以包 及半導體晶片82之封|膠體84的封裝化合物會溢膠 ^該散熱片80之頂面80a上，而影響至該散熱片8〇之散 111047 6 201019429 ，外第5’166, 772號美國專利提出一種具有網狀金 、屬罩盍之半導體封裝件。如第9圖所示，該第5，⑽，爪 號美國專利所揭示之半導體封裝件9係在基板Μ上接置 Y網狀金>1罩蓋（Meshed MetaIlie Usip)92，將半導體 晶片91、收納其中，再以封裝膠體93將該網狀金屬罩體 92及半導體晶片91完全包覆。該半導體封裝件9係藉由 該網狀金罩體92之提供’以遮蔽半導體晶片91所產生 之電磁干擾（EMI)或由外部裝置所產生之電磁干擾，因該 ❿網狀金屬罩體92係包覆於封裝膠體⑽中，故無習知技術 2封裝件外加設金屬罩而造成體積過大及成本增加的 問題。 然而’第9圖所示之半導體封裝们雖能解決電磁干 題’但由於該網狀金屬罩體92係完全為封裝膠體 =包覆，且未能與半導體晶月9i.連接，故半導體晶片 斤產生之熱量的傳遞途徑須經過導熱性甚差的封裝膠 參气出將去使高積體化之半導體晶片所產生之熱量無法有效逸 ，出去’致會損及該半導體晶片91 ;且網狀金屬罩體⑽ 凡王包覆於封裝膠體93中而無任何外露於大氣 :::法Ϊ效地產生散熱效果。更何況第二:美 勒胜，已提出將半導體晶片完全包覆於金屬罩體中’毋須 執j體自之^用當除能解決電磁干擾之問題，復可提升散 …放率，自較該第5, 166, 772號美國專利所揭示之 第6, 5〇4, 723號美國專利所揭示之装置仍存钱述 ，、使用昂貴之散熱膠及金屬罩體之水平度不易控制等 111047 7 201019429 問題。 因而，如何使散熱片與半導體晶片夕έ士人 '述之問題，乃成封裝業界-逐待解決之課題'不致產生前 【發明内容】 導體：前，題’本發明乃提供-種具散熱結構之半 昂貴散熱膠之使用而降低封裝成本， 二導提升散熱效率’並能解決散熱片黏置 於+導體曰曰片上時，散熱片之平面度不易控制之問題。 發明所提供之具散熱結構之半導體封裝件，係包括 I基板、至少-設置於該基板上並與基板紐連接之半導 體晶片；以及黏設於該半導體晶片上之散熱結構該散熱 結構係由黏著劑、與該黏著劑結合且具有頂面與底 =熱件（First Heat Dissipating Member)、以及黏結 於該黏著劑上且具有頂面與底面之第二散熱件（sec_ = DlsslpatingMember)所構成，且該散熱結構係藉黏 ❹者W黏置於該半導體晶片上’使該黏著劑位於該第二散教 件及半導體晶片間，並使該第一散熱件分別觸接至該第^ 散熱件之底面及半導體晶片，且該第一散熱件具有複數貫 通第一散熱件之頂面及底面之通道，以供該黏著劑充填其 中，而使該黏著劑之厚度相當於該第一散熱件自其頂面至 f面之高度，俾令該黏著劑能分別與第二散熱件及半導體 晶片黏結，並使該第一散熱件之頂面及底面同時觸接至第 二散熱件及半導體晶片。 3亥第一散熱件係以導熱性良好之金屬材料製成，其形 111047 8 201019429 網狀金屬片體、形成有多數開孔之金屬片體、由波 、：金屬線材組成之片狀結構或以多數成彎曲狀之 -·屬線材組接而成之片妝社媸a 金 m“ ㈣均須具有多數通道 第气j之特徵，以使黏著劑能充填於各該通道中而盘 件形成良好之結合關係’同時能使該黏著劑之二 -第一鸯鉦放^ 十及使該黏者劑之下表面與 執件”二俾令該黏著劑能分別與該第二散 …仟/、牛導體晶片有效黏結。因此， 籲與該黏著劑社入，故W心 該第一散熱件係 ^ σ "b有謂除在後續之溫度循環中所吝 2效應’而避免黏著劑與半導體晶片及 觸接至該第二散赦件及半導…於该第一散熱件係分別 狀…、仟及牛導體晶片，故該 之熱量能藉由該第-散熱件傳遞至第二散心:而由第 ^熱件之頂面逸散至大氣中，所以本發明之半 = ❹夾設於第二散熱件與半導體晶片間，故該；第係 黏著劑黏置於半導體晶片上時，第二散;^第件= ::所支律，遂無發生傾斜之顧慮，且;致會為= 熱膠的使用，而能降低封佳’故能免除習知之散 該苐一散執件夕1¾蚀/曰 之面積。當第：散哉株 當於或大於黏著劑所敷設 #上1 件之面積大於黏著劑之敷設面積時， 係使該"熱件之至少-側或-部分能延伸至:板 111047 9 201019429 ， 上，而與基板上之被動元件或接地墊（Gr〇und pa _ =環⑻刪dRlng)電性㈣’以進―步提升本發明$ --導體封裝件的電性；此外，該第—散熱件亦得向外延展至 m半導體晶片包覆住之程度，俾對該半導體晶片提供 柷電磁干擾（EMI Resistance)的功效。 【實施方式】 以下係藉由特定的具體實施例說明本發明之實施方 气所屬技術領域中具有通常知識者可由本說明書所揭示 參之内容輕易瞭解本發明之功效及特點。 並須說明的疋，本說明書中所敘述之“頂面，，與“底面” 及上表面，，與“下表面，，並非絕對之空間概念，而係隨構成 要件之空間關係而變化，亦即，倒置本案圖式中所示之半 導體封裝件時，“頂面，，即成“底面，，而“底面，，即成“頂面”， 其它亦同。故該等“頂面，，、“底面，，、‘‘上表面”與“下表面，， 名阔之使用，係用以說明本發明所揭示之半導體封裝件中 罄構成要件間之連結關係，使本發明所揭示之半導體封裝件 在等效之範圍内具有合理之變化與替換，而非用以限定本 發明之可實施範圍於一特定之態樣（Emb〇diment)。 J 一實施例 如第1A圖所示者，為本發明第一實施例之半導體封 裝件之剖視圖。該第一實施例之半導體封裝件丨係由基板 10，黏设於該基板10上之半導體晶片11、黏設於該半導 體BB片11上之散熱結構12、以及形成於該基板上、 以包覆該半導體晶片11與部分之散熱結構12之封裝膠體 111047 10 201019429 13所構成者。 該基板10在本實施例中為習用之覆晶基板，以供該 半導體晶片11以覆晶方式（Flip Chip)藉複數銲錫凸塊 (Solder BumPS)14電性連接至該基板1〇之上表面1〇〇之 預設位置上；同時’相對於該上表面1〇〇之下表面m 上，則植设有複數顆成陣列（Array)方式排列的銲球 (Solder Balls)15，以使該半導體晶片u能藉由該銲球 15而與外界裝置（如印刷電路板）電性連接。由於該基板 ⑩10為習知者，且以覆晶方式將半導體晶片n設於基板⑺ 與知球之植接亦為習用技術，故在此不予贅述。 該散熱結構12係由黏著劑120、結合於該黏著劑12〇 中之第一散熱件121、及黏結於該黏著劑12〇上之第二散 熱件122所構成。該黏著劑12〇得使用如銀膠 Paste)或環氧樹脂黏膠“卯” Resin Adhesive)之習用 者。該第一散熱件121在本實施例係為一由金屬線材所編 組而成之網狀片體，具有頂面121a及相對之底面i2ib， 如第1B圖所示；該第一散熱件121由於係為金屬線材所 構成，故具有多數個網目（Meshes)，而形成供該黏著劑 120通過並充填於其中的通道121。’使黏著劑12〇能藉由 該等通道121e之提供而與第_散熱件121充分結合。同 時，該f 一散熱件121具有高度與該黏著劑12〇之厚度H 相同的高度，使該黏著劑12〇與第一散熱件121結合後， 該黏著劑120之上表面12Qa與第—散熱件121之頂面 121a旎齊平，且該黏著劑12〇之下表面12仳與第一散熱 111047 11 201019429 件12i之底面121b能齊平，以令該第一散熱件ΐ2ι能以 -其頂面121a及底面121b分別抵接至該第二散埶件122 '之底面122b及半導體晶片1卜俾使該半導體晶片U所 產生之熱量能經由該第一散熱件121有效地傳遞至該第 二散熱件122,再由該第二散熱件122將熱量逸散至大氣 中。此外，由於該黏著劑120之上表面12〇a係與第一散 熱件m之頂面121a齊平，而由第一散熱件ΐ2ι之通道 (一網目）121c中外露出’故能有效地以該黏著齊"2〇將第 ©二散熱件122黏結於該散熱結構12中；且，該黏著劑12〇 之下表® 120b係與第一散熱件121之底面mb齊平而 由第-散熱们21之通道121c中外露出，故能有效地藉 由該黏著劑120將該散熱結構12黏固於該半導體晶片” 上。 、該第-散熱件122則得由如銅或其合金之金屬材 製成之金屬片體所構成，其厚度不限，係依設計上之選擇 鲁而疋。遠第—散熱彳122之頂面122a在該封裝膠體υ 形成後係外露出該封裝膠體13而直接與大氣接觸，且其 底面122b係與該第一散熱件121相接，故該半導體晶片 ^所產生之熱量遂能如上述之由第—散熱件121傳遞至 第二散熱件122，進而由第二散熱件122外露於大氣之頂 面122a逸散出。 、 此外，由圖可知，該散熱結構12藉由黏著劑12〇黏 固於半導體晶片11上後，該黏著劑120與第一散熱件121 係夹置（interp0sed)於第二散熱件122及半導體晶片u 111047 12 201019429 之間。該第一散敎株1 9 1 …、牛21之面積得小於黏著劑120或半導 •Γ:中:第使]!第一 圖所不，該第一散熱件121之面積亦得 120或半導體晶片η之面積相當，使該第一散 ^牛1之周邊得外露出黏著劑12G，但為簡化說明起 接二此不予圖示；當然，亦能令該第-散熱件121之面 積大於黏著劑12〇或半導體W n之面積，此時，第一 ι21能與封裝膠體13結合，而能藉 =Γ:Γ膠體13中之部分強化散熱卿 ^ 間的結合性，但為求簡化起見，在此亦不予圖 二_知，第-散熱件121亦能延展至基板10上，以 /、板10形成接地關係，此一結構將以另一實施述 之。 由上述之說明可知，本發明第一實施例之半導體封裝 L丄：的f熱結構12 ’係在用以黏結該第二散熱件122 參〃、*體曰曰片11之黏著劑120中結合有第一散熱件 ，由第一散熱件121具有與黏著劑12〇之厚度Η相 t局度設計’使第一散熱件121能同時抵接至頂面122a US封裝膠體13的第二散熱件122及半導體晶片u， 黛'體曰曰片11所產生之熱量能經由第一散熱件121及 /月熱件122構成之散熱途徑有效地逸散至大氣中，故 、吏用叩貝的散熱膠作為黏著劑來達成所欲之散熱效 =而以—般習用之黏著劑來黏結第二散熱件122與半導 體晶片11即可，遂能降低封裝成本。再者，纟於第一散 111047 13 201019429 熱件121形成有多數之通道^(^供黏著劑12〇充填並通 過其中，所以能藉由第一散熱件121之金屬特性降低在後 續之溫度循環中熱應力之產生對黏著劑12〇的影響，而 避免熱應力之影響造成黏著劑120與半導體晶片1J間之 結合介面以及黏著劑120與第二散熱件122間之結合介面 發生脫層現象’遂使脫層之產生所造成之散熱效率變差與 佗賴性問題（ReliabiHty c〇ncern)不致發生。此外，因 有第散熱件121夾置於第二散熱件122與半導體晶片 間，且第一散熱件121係與黏著劑12〇結合，故使第 二散熱件122藉黏著劑120黏結至半導體晶片n上時， 得有第散熱件12丨之支撐不致產生偏斜（Tilt)之現 ^ ’而有效解決習知技術在散熱片與半導體晶片間僅有黏 者層而不易控制散熱片之水平度的問題。 如第2A圖所示者，為本發明第二實施例之半導體封 農件之剖視圖。如圖所示，該第二實施例之半導體封裝件 2之結構與前述第一實施例所揭示者大致相同，其不同處 在於第-散熱件221係成一波浪狀之片體構造。由第2β 圖之第I熱件221的立體圖可知，該第一散埶件221 开 =多數之開孔221d’以與任兩相鄰之波浪間形成的 =槽咖共同構成供黏著劑⑽通過並充填其中的通 Γ該具波浪狀之第一散熱件221與前述第一實施例中所 於I之第一散熱件121相同，均具有可彈性形變而延展之 勺波/良狀構造’故使第—散熱件221能有彈性地夾置 111047 14 201019429 片21間，而有效地避免將 固至半導體晶片21上時不 於第二散熱件222與半導體晶 » 散熱結構22經由黏著劑220黏 -，慎壓損半導體晶片21的發生。 I三實施你丨 #第3A圖所示者，為本發明第三實施例之半導體 裂件之剖視圖。如圖所示，該第三實施例之半導體封裝件 在構^述第—實施例所揭示者大致相同，其不同處 ;弟-散熱件321係成平板狀之金屬片體所構成。如第 • B圖之該第一散熱件321的立體圖可知，該第一散埶件 321形成有多數之通道321c，以供黏著劑32〇通過並充填 其中’該通道321c在圖示中係呈矩形，惟如圓形、摘圓 形、多邊形等任何幾何形狀亦均適用。 星·與實施你丨 如第4A圖所示者，為本發明第四實施例之半導體封 裝件之剖視圖。如圖所示，該第四實施例之半導體封裝件 ❹4之結構與前述第—實施例所揭示者大致相同，不同之處 係在於其第一散熱件421係由複數根呈不規則形狀或規 則形狀之短金屬線材所構成。由第4B圖所示之第四實施 ^之第-散熱件421的立體圖可知’該由多數不規則形狀 或具弧形之規則形狀之短金屬線材經壓合成的第一散熱 :421，會具有複數亦呈不規則大小的通道421c，以供黏 者劑420通過並充填其中。構成該第一散熱件421之短金 屬線材能使用任何金屬材料於加工後產生之廢材或廢 料故忐降低材料成本；且由於係由短金屬線材交錯結合 111047 15 201019429 而成第一散熱件42卜故第-散熱件421亦能具有良好之 彈性變形的特性’在將由黏著劑42〇、第一散献件421盎 、f j熱件422構成之散熱結構42經黏著劑42〇黏固至 牛導體晶片41上時，即不致壓損半導體晶片4卜 1_五實施例 如第5A圖所示者’為本發明第五實施例之半導體封 .裝件之剖_，如圖所示，五實施狀半導體封裝件 :結構與前述第一實施例所揭示者大致相同，不同之處 辦其第—散熱件521係'由具多數通道521c之金屬片 體構成’具有平面部521f及自平面部521f向外延伸之延 伸邛521g ’如第5B圖所示。該延伸部5叫乃延伸至基 =50上’以與該基板5G上之接地墊或接地環電性連接， 2藉該延伸部521g使第-散熱件521與基板5〇接地，而 ^該+導體封裝件5之電性（EleGtriealPerfQrmance)。 同％’該由延伸部521g及平面部521f構成之第一散熱件 21、係形成一將半導體晶片51罩覆住之罩體，能夠遮蔽 電磁干擾（EleCtromagnetic……㈣職，謝），故能 進一步提升該半導體封裝件5之電性。當然’該延伸部 叫亦能電地於設置在基板5()上之被動元件（未圖示）， :樣能達到接地效果；且該延伸部521g亦能僅形成於該 、:面邛521f之一側’或相對之兩側(未圖示），而毋須形 成於平面部521f之四侧上。 名六實施例 如第6圖所示者’為本發明第六實施例之半導體封裝 111047 16 201019429 牛之β]視@如圖所示，該弟六實施例之半導體封裝件6 、之結構與前述第-實施例所稱示者大致相同，不同之處在 '於其半導體晶片61係藉多數之銲線64電性連接至基板 6〇為避免由黏著劑62〇、第一散熱件621與第二散熱件 622構成之散熱結構62碰觸或干擾到銲線而造成短路 問題，係在該半導體晶片61上先黏結一假晶月(Dummy Chlp)66’再將該散熱結構62藉黏著劑62〇黏置於該假晶 片66上，如此，散熱結構62即不致碰觸或干擾到銲線 ❹64。且’假晶片66係以廢晶圓或廢晶片為材料與半導 體晶片61同為矽材料，故半導體晶片。所產生之熱量仍 能有效地藉該假晶片66傳遞至散熱結構62，而無影響散 熱效率之虞。須知圖中所示之第一散熱件621係以具通道 ，金屬片體態樣呈現，其僅係用以例示，其它本發明所揭 示之態樣或其等效之變化或改變亦均能適用。 复土實施例 髻 如第7圖所示者’為本發明第七實施例之半導體封」 件之剖視圖。如圖所示’該第七實施例之半導體封裝件 之結構與前述第—實施例所揭示者大致相同，不同之處^ 於其第一散熱件722係成一金屬罩蓋（Met Casing)’在藉黏著劑72〇黏固於半導體晶片7i上後，丨 罩覆住該半導體晶片71，且該第二散熱件之腳部把 :糸藉黏著材料77黏固於基板7〇上，而使該半導體晶 !為該第二散熱件722氣密地封罩住（Herm^] ealed) ’故毋須形成封裝膠體來包覆該半導體晶片η 111047 17 201019429 在本實施例中所顯示之第—散熱件721亦❹ -這之金屬片體之態樣呈現，其僅係用以例示，其它本 .所揭不之態樣或其等效之變化或改變亦均適用。 上述實施例僅例示性說明本發明之原理及其功效， 非用於限制本發明。任何熟習此項技藝之人士均可在 背本發明之精神及範疇下，對 堤 徽π 耵上迹貫轭例進行修飾與改 3C。因此，本發明之權利保護範圍，應如後述之 範圍所列。 丁呀寻利 ❻【圖式簡單說明】 之剖視 第1Α圖係本發明第一實施例之半導體封裝件 圖； 圖； 第1Β圖係第1Α圖所繪示之第一散熱件 之立體示意 圖； •第2Α圖係本發明第二實施例之半導體封裳件之剖視 之立體示意 ❹ 第2Β圖係第2Α圖所繪示之第一散熱件 圖； 圖 圖， :第3A圖係本發明第三實施例之半導體封裝件之剖視 .第3B圖係第3A圖所繪示之第一散熱件之立 體示意 圖； 第4A圖係本發明第四實施例之半導體封裝件 之剖視 之立體示意 第4B圖係第4A圖所繪示之第一散熱件 111047 18 201019429 圖； ,_ 第5A圖係本發明第五實施例之半導體封裝件之剖視 ..圖； 第5B圖係第5A圖所繪示之第一散熱件之立體示意 圖； * 第6圖係本發明第六實施例之半導體封裝件之剖視 - 圖； 第7圖係本發明第七實施例之半導體封裝件之剖視 ❿圖； 第8圖係習知半導體封裝件之剖視圖；以及 第9圖係另一習知半導體封裝件之剖視圖。 【主要元件符號說明】 1、2、3、4、5、6、7、8、9半導體封裝件 10、50、60、70、83、90 基板 100、 120a 上表面 101、 120b 下表面 、2卜4卜61、71、82、91半導體晶片 12、62 散熱結構 120、 220、320、420、620、720 黏著劑 121、 22卜32卜421、52卜62卜721第一散熱件 121a ' 122a 頂面 121b、122b 底面 121c、321c、421c、521c 通道 122、 222、422、622、722 第二散熱件 19 111047 201019429 13、84、93 封裝膠體 —14 銲錫凸塊 15 鲜球 22、42 散熱結構 221d 開孔 221e 溝槽 521f 平面部 521g 延伸部 φ 64 銲線 66 假晶片 722e 腳部 77 黏著材料 80 散熱片 80a 頂面 81 散熱膠 92 金屬罩體 20 111047201019429 螫 、, invention description: [Technical field of the invention], the present invention relates to a semiconductor package with a heat sink, Yumei is a kind of heat sink to dissipate the semiconductor wafer to generate Semiconductor package. Chaos [Prior Art] As the demand for electronic products in terms of function and processing speed increases, semiconductor wafers, which are the core components of electronic products, must have higher densities: _Electronic Components and Electronic Circuits (Electronic Circuits) ). However, the higher the integrated density of the semiconductor wafer, the greater the amount of heat generated during operation = the greater the heat generated by the semiconductor wafer, and the damage to the semiconductor crystal moon. Therefore, the design of the heat sink Sink or Heat Spreader has been developed in the semiconductor package to dissipate the heat generated by the semiconductor wafer by the heat sink. A semiconductor package having a heat sink has been disclosed in 5'883, 430, 5, 604'978, 6, 008, 536, 6, 376, 907, 6' 403, 882, 6' 472, 762 and 6, US Patent Nos. 504, 723 et al. These U.S. patents disclose the use of different types of heat sinks, but it is preferred to expose the encapsulant on the top surface of the heat sink or directly exposed to the atmosphere to obtain a better heat dissipation effect. However, if the heat sink only exposes the encapsulant on the top surface and does not directly adhere to the semiconductor wafer, and the semiconductor wafer and the heat sink are filled with the encapsulant, the epoxy resin such as the epoxy resin may be formed. Epoxy Res in) Thermal Conduction of Mold Compound 111047 201019429 Very poor 'The heat generated by the semiconductor wafer is still not effectively transmitted to the heat sink and escape to the atmosphere _; therefore, there are also previous techniques to borrow the heat sink The scattered and hot glue is adhered to the semiconductor wafer, so that the heat generated by the semiconductor wafer can be transferred to the heat sink by the heat transfer adhesive with better thermal conductivity to escape to the atmosphere, as shown in FIG. The heat sink (10) of the semiconductor package 8 shown in FIG. 8 is bonded to the semiconductor wafer 82 by the dispersion: the adhesive 81 is an expensive material, which can improve the heat dissipation efficiency, but causes the package cost. The thermal expansion coefficient (Coefficient of Thermal Expansi〇n, (4) is different, so in the temperature cycle of the packaging process, it is often due to thermal expansion. The thermal stress generated by the coefficient difference (CTE Mismatch) causes the interface between the heat sink 8〇 and the heat dissipating gel 81 and/or the interface between the heat dissipating adhesive 81 and the semiconductor wafer 82 to be delaminated. When the layer phenomenon occurs, the semiconductor chip can not effectively dissipate when it generates heat, and it will also be molded and reliable. In addition, when the heat sink 80 is adhered to the wafer 2 by the heat-dissipating glue 81, heat is dissipated. The glue 81 is not cured (Cured), so it is difficult to control the level of the heat sink 80 relative to the semiconductor wafer 82 or the substrate 83 carrying the semiconductor wafer 82, when the heat sink is produced. When tilted, the appearance of the finished product is affected, and the encapsulating compound for forming the encapsulant 66 of the semiconductor wafer 82 is overlaid on the top surface 80a of the heat sink 80, and the heat sink 8 is affected. U.S. Patent No. 5,047, issued to U.S. Patent No. 5,166, issued to U.S. Patent No. 5,166, issued to U.S. Patent No. 5,166, issued to U.S. Pat. The semiconductor package 9 is provided with a Y mesh gold > 1 cover (Meshed MetaIlie Usip) 92 on the substrate, the semiconductor wafer 91 is housed therein, and the mesh metal cover 92 is encapsulated by the encapsulant 93 and The semiconductor package 91 is completely covered. The semiconductor package 9 is provided by the mesh gold cover 92 to shield electromagnetic interference (EMI) generated by the semiconductor wafer 91 or electromagnetic interference generated by an external device. The mesh-shaped metal cover 92 is covered in the encapsulant (10), so that there is no problem that the metal cover is added to the package of the prior art 2, resulting in an excessive volume and an increase in cost. However, the semiconductor packages shown in FIG. 9 are Can solve the electromagnetic problem 'but by The mesh metal cover 92 is completely encapsulated and coated, and cannot be connected to the semiconductor crystal 9i. Therefore, the heat generated by the semiconductor chip is transferred through the thermal conductivity of the package rubber. The heat generated by the highly integrated semiconductor wafer cannot be effectively escaped, and the semiconductor wafer 91 is damaged; and the mesh metal cover (10) is covered in the encapsulant 93 without any exposure to the atmosphere. ::: The law effectively produces a heat dissipation effect. What's more, the second: Mei Lesheng, has proposed to completely cover the semiconductor wafer in the metal cover. 'There is no need to solve the problem of electromagnetic interference when it can solve the problem of electromagnetic interference. The device disclosed in U.S. Patent No. 6,5,4,723, issued to the U.S. Patent No. 5,166,772, the disclosure of which is incorporated herein by reference in its entirety, the disclosure of the utility of 7 201019429 Question. Therefore, how to make the heat sink and the semiconductor wafer "the problem of the singer" is a packaging industry - the problem to be solved - not to be produced before [invention] conductor: before, the title 'the present invention is provided - heat dissipation The use of the semi-expensive heat-dissipating glue of the structure reduces the packaging cost, and the second guide improves the heat-dissipating efficiency' and can solve the problem that the flatness of the heat sink is difficult to control when the heat sink is stuck on the +-conductor cymbal. The semiconductor package with a heat dissipation structure provided by the invention includes an I substrate, at least a semiconductor wafer disposed on the substrate and connected to the substrate; and a heat dissipation structure adhered to the semiconductor wafer, the heat dissipation structure is adhered a combination of the first heat dissipating member and a second heat sink (sec_ = DlsslpatingMember) bonded to the adhesive and having a top surface and a bottom surface, and The heat dissipating structure is adhered to the semiconductor wafer by the adhesive holder W, so that the adhesive is located between the second teaching member and the semiconductor wafer, and the first heat dissipating member is respectively connected to the second heat dissipating member. a bottom surface and a semiconductor wafer, and the first heat dissipating member has a plurality of passages penetrating through the top surface and the bottom surface of the first heat dissipating member for filling the adhesive, and the thickness of the adhesive is equivalent to the first heat dissipating member The height of the top surface to the f surface is such that the adhesive can be bonded to the second heat dissipating member and the semiconductor wafer, respectively, and the top surface and the bottom surface of the first heat dissipating member are simultaneously connected to the second heat dissipating And a semiconductor wafer. The first heat sink of 3H is made of a metal material with good thermal conductivity, and its shape is 111047 8 201019429. The mesh metal sheet body, the metal sheet body formed with a plurality of openings, the sheet structure composed of waves, metal wires or A piece of makeup made up of a plurality of curved wire-shaped wires is a feature of the majority of the passages, so that the adhesive can be filled in each of the channels and the disk is formed. A good bonding relationship 'can simultaneously make the second of the adhesive - the first 鸯钲 ^ 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及The bovine conductor wafer is effectively bonded. Therefore, it is appealed to the adhesive agent, so the first heat sink member σ "b has the effect of removing the adhesive in the subsequent temperature cycle and avoiding the adhesive and the semiconductor wafer and touching the The second heat dissipating member and the semi-conducting member are respectively formed by the first heat dissipating member, the crucible and the bobbin conductive chip, so that the heat can be transmitted to the second distracting body by the first heat dissipating member: The top surface of the present invention is dissipated into the atmosphere, so that the half of the invention is sandwiched between the second heat sink and the semiconductor wafer, so that when the first adhesive is adhered to the semiconductor wafer, the second is scattered; = :: The law of the law, there is no concern about the tilt, and; the meeting is = the use of hot glue, and can reduce the seal of the good, so it can be exempted from the knowledge of the scattered 苐 散 散 夕 ⁄ 13⁄4 eclipse / 曰 area . When the area of the first: the bulking plant is greater than or equal to the area where the adhesive is applied, the area of the upper part is greater than the laying area of the adhesive, so that at least the side or the part of the hot part can be extended to: plate 111047 9 201019429 , on, and with the passive component or ground pad on the substrate (Gr〇und pa _ = ring (8) delete dRlng) electrical (four) 'to further enhance the invention of the invention $ - conductor package; in addition, the first The heat sink is also extended to the extent that the semiconductor wafer is overlaid to provide EMI resistance to the semiconductor wafer. [Embodiment] The following describes the functions and features of the present invention by the specific knowledge of the present invention. It should be noted that the "top surface," and "bottom surface" and upper surface, and "lower surface" described in this specification are not absolute spatial concepts, but vary with the spatial relationship of the constituent elements. That is, when inverting the semiconductor package shown in the drawings, "the top surface, that is, the "bottom surface," and the "bottom surface," is the "top surface", and the others are the same. Therefore, the "top surface, The "bottom surface", "the upper surface" and the "lower surface" are used to describe the connection relationship between the constituent elements of the semiconductor package disclosed in the present invention, so that the semiconductor disclosed in the present invention The package has reasonable variations and substitutions within the scope of the equivalents, and is not intended to limit the scope of the invention to a particular aspect (Emb〇diment). J. The implementation, as shown in Figure 1A, is A cross-sectional view of the semiconductor package of the first embodiment of the present invention. The semiconductor package of the first embodiment is composed of a substrate 10, a semiconductor wafer 11 adhered to the substrate 10, and a semiconductor die 11 bonded thereto. Heat dissipation structure 12, and Formed on the substrate to encapsulate the semiconductor wafer 11 and a portion of the heat dissipation structure 12 of the encapsulant 111047 10 201019429 13. The substrate 10 is a conventional flip chip substrate for use in the present embodiment. 11 is flip-chip (Flip Chip) by a plurality of solder bumps (Solder BumPS) 14 electrically connected to a predetermined position on the upper surface of the substrate 1 ;; at the same time 'relative to the upper surface 1 On the lower surface m, a plurality of Arrays of Solder Balls 15 are implanted so that the semiconductor wafer u can be connected to an external device (such as a printed circuit board) by the solder balls 15. Electrical connection. Since the substrate 1010 is a conventional one, and the semiconductor wafer n is placed on the substrate (7) in a flip-chip manner, it is also a conventional technique. Therefore, the heat dissipation structure 12 is not described here. The adhesive 120 is composed of a first heat dissipating member 121 bonded to the adhesive 12, and a second heat dissipating member 122 bonded to the adhesive 12. The adhesive 12 is used, for example, as a paste. Epoxy adhesive "卯" Resin Adhesive) In the embodiment, the first heat dissipating member 121 is a mesh sheet body formed by metal wires, and has a top surface 121a and an opposite bottom surface i2ib, as shown in FIG. 1B; the first heat dissipating member 121 is composed of a metal wire, so it has a plurality of meshes, and forms a channel 121 through which the adhesive 120 passes and is filled. 'The adhesive 12 can be provided by the channels 121e. The heat sink member 121 is fully combined with the heat sink member 121. At the same time, the heat sink member 121 has a height equal to the thickness H of the adhesive 12, so that the adhesive 12 is combined with the first heat sink 121. The upper surface 12Qa of the 120 is flush with the top surface 121a of the first heat sink 121, and the surface 12仳 of the adhesive 12〇 is flush with the bottom surface 121b of the first heat dissipation 111047 11 201019429 12i to make the first A heat dissipating member ι2ι can abut the bottom surface 122b of the second heat dissipating member 122' and the semiconductor wafer 1 by the top surface 121a and the bottom surface 121b, respectively, so that the heat generated by the semiconductor wafer U can pass through the first heat dissipation. The member 121 is effectively transmitted to the second heat sink 122, and then The second heat sink 122 dissipates heat to the atmosphere. In addition, since the upper surface 12〇a of the adhesive 120 is flush with the top surface 121a of the first heat dissipating member m, and is exposed from the first heat dissipating member ΐ2ι (a mesh) 121c, the effective surface can be effectively Adhesively bonding the second heat dissipating member 122 to the heat dissipating structure 12; and, under the adhesive 12, the surface of the surface 120b is flush with the bottom surface mb of the first heat dissipating member 121 by the first heat dissipation The channel 121c of the 21 is exposed to the outside, so that the heat dissipating structure 12 can be effectively adhered to the semiconductor wafer by the adhesive 120. The first heat dissipating member 122 is made of a metal such as copper or its alloy. The metal sheet body is formed, and the thickness thereof is not limited, and is selected according to the design. The top surface 122a of the far-heating crucible 122 exposes the encapsulant 13 directly after the encapsulation colloid is formed. In contact with the atmosphere, and the bottom surface 122b is in contact with the first heat sink 121, the heat generated by the semiconductor wafer can be transferred from the first heat sink 121 to the second heat sink 122 as described above, and further The two heat dissipating members 122 are exposed to the top surface 122a of the atmosphere, and, in addition, It can be seen that after the heat dissipating structure 12 is adhered to the semiconductor wafer 11 by the adhesive 12 , the adhesive 120 is interposed with the first heat dissipating member 121 on the second heat dissipating member 122 and the semiconductor wafer u 111047 12 . Between 201019429. The area of the first divergent strain 1 9 1 ..., the cattle 21 is smaller than the adhesive 120 or semi-conducting • Γ: medium: the first] no, the area of the first heat sink 121 Also, 120 or the area of the semiconductor wafer η is equivalent, so that the periphery of the first scatter 1 is exposed to the adhesive 12G, but the simplification of the description is not illustrated; of course, the first heat dissipation can also be achieved. The area of the member 121 is larger than the area of the adhesive 12 or the semiconductor W n . At this time, the first ι 21 can be combined with the encapsulant 13 , and the portion of the colloid 13 can be strengthened to bond the heat dissipation. However, for the sake of simplicity, the first heat sink 121 can also be extended to the substrate 10, and the board 10 is grounded. This structure will be described in another embodiment. It can be seen from the above description that the semiconductor thermal package 12' of the first embodiment of the present invention is attached to the thermal structure 12' The first heat dissipating member is combined with the adhesive 120 for bonding the second heat dissipating member 122 to the 曰曰 〃 * * * , , , , , , , , , , , 设计 设计 设计 设计 设计 121 设计 121 121 121 121 The first heat dissipating member 121 can simultaneously abut the second heat dissipating member 122 of the top surface 122a of the US encapsulant 13 and the semiconductor wafer u, and the heat generated by the body sheet 11 can pass through the first heat dissipating member 121 and/or The heat dissipation path formed by the monthly heat element 122 is effectively dissipated into the atmosphere, so the heat-dissipating glue of the mussel is used as an adhesive to achieve the desired heat dissipation effect. The adhesive is used to bond the second heat-dissipating member. 122 and the semiconductor wafer 11 can be used to reduce the packaging cost. Furthermore, in the first dispersion 111047 13 201019429, the heat member 121 is formed with a plurality of channels ^ (^ for the adhesive 12 〇 to be filled and passed therethrough, so that the metal characteristic of the first heat sink 121 can be reduced at a subsequent temperature cycle The influence of the occurrence of the intermediate thermal stress on the adhesive 12 ,, while avoiding the influence of the thermal stress causes the bonding interface between the adhesive 120 and the semiconductor wafer 1J and the delamination of the bonding interface between the adhesive 120 and the second heat sink 122遂 散热 之 之 之 之 之 之 散热 散热 散热 散热 散热 散热 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 A heat dissipating member 121 is bonded to the adhesive 12, so that when the second heat dissipating member 122 is bonded to the semiconductor wafer n by the adhesive 120, the support of the first heat dissipating member 12 is not caused to be skewed (Tilt). 'Effectively solve the problem that the prior art has only a sticky layer between the heat sink and the semiconductor wafer and is not easy to control the level of the heat sink. As shown in FIG. 2A, the semiconductor sealing material according to the second embodiment of the present invention A cross-sectional view of the semiconductor package 2 of the second embodiment is substantially the same as that disclosed in the first embodiment, except that the first heat dissipating member 221 is formed into a wavy sheet structure. It can be seen from the perspective view of the first heat element 221 of the second β figure that the first heat dissipation member 221 is open = the plurality of openings 221d' are formed together with the groove formed by any two adjacent waves to form the adhesive (10). And filling the wavy first heat dissipating member 221 in the same manner as the first heat dissipating member 121 of the first embodiment in the first embodiment, each having an elastically deformable and extended chopping wave/good structure. The first heat dissipating member 221 can elastically sandwich between the 111047 14 201019429 sheets 21, and effectively avoids sticking to the semiconductor wafer 21 when the second heat dissipating member 222 and the semiconductor crystal heat dissipating structure 22 are adhered via the adhesive 220. - The occurrence of the semiconductor wafer 21 is carefully damaged. I. 3, which is shown in Fig. 3A, is a cross-sectional view of a semiconductor split member according to a third embodiment of the present invention. As shown, the semiconductor of the third embodiment is shown. The package is described in the first embodiment The display is substantially the same, and the difference is the same; the heat sink 321 is formed by a flat metal piece. As shown in the perspective view of the first heat sink 321, the first heat dissipation member 321 is formed. Most of the channels 321c are for the adhesive 32 〇 to pass through and fill in the 'the channel 321c is rectangular in the figure, but any geometric shape such as a circle, a circle, a polygon, etc. are also applicable. As shown in Fig. 4A, a cross-sectional view of a semiconductor package according to a fourth embodiment of the present invention. As shown, the structure of the semiconductor package ❹4 of the fourth embodiment is substantially the same as that disclosed in the foregoing first embodiment. The same is true, in that the first heat dissipating member 421 is composed of a plurality of short metal wires having an irregular shape or a regular shape. It can be seen from the perspective view of the fourth heat dissipating member 421 of the fourth embodiment shown in FIG. 4B that the first heat dissipating: 421, which is composed of a plurality of irregularly shaped or curved regular shaped short metal wires, has The plurality of channels 421c are also irregularly sized for the adhesive agent 420 to pass through and fill therein. The short metal wire constituting the first heat dissipating member 421 can reduce the material cost by using any metal material in the waste material or scrap produced after processing; and the first heat dissipating member 42 is formed by the short metal wire interlacing 111047 15 201019429. Therefore, the first heat dissipating member 421 can also have a good elastic deformation property. The heat dissipating structure 42 composed of the adhesive 42 〇, the first diffusing member 421 Å, and the fj hot member 422 is adhered to the oxen via the adhesive 42 〇. When the conductor wafer 41 is on, that is, the semiconductor wafer 4 is not pressure-damped, for example, as shown in FIG. 5A, the section of the semiconductor package of the fifth embodiment of the present invention is as shown in the figure. The semiconductor package has the same structure as that disclosed in the first embodiment, and the difference is that the heat sink 521 is formed of a metal sheet having a plurality of channels 521c having a flat portion 521f and a self-planar portion 521f. The outwardly extending extension 邛 521g ' is as shown in Fig. 5B. The extension portion 5 is extended to the base=50' to be electrically connected to the ground pad or the ground ring on the substrate 5G, and the extension portion 521g is used to ground the first heat sink 521 and the substrate 5, and + Electrical properties of the conductor package 5 (EleGtriealPerfQrmance). The first heat dissipating member 21 composed of the extending portion 521g and the flat portion 521f forms a cover covering the semiconductor wafer 51, and can shield electromagnetic interference (EleCtromagnetic (4), thank you) The electrical properties of the semiconductor package 5 are further improved. Of course, the extension portion can also be electrically connected to the passive component (not shown) disposed on the substrate 5 (), and the grounding effect can be achieved; and the extension portion 521g can also be formed only on the surface: 521f One side 'or opposite sides (not shown) are not required to be formed on the four sides of the flat portion 521f. The sixth embodiment is as shown in FIG. 6, which is a semiconductor package of the sixth embodiment of the present invention. The semiconductor package of the sixth embodiment is as shown in the figure, and the structure of the semiconductor package 6 of the sixth embodiment is the same as that described above. The first embodiment is substantially the same, except that the semiconductor wafer 61 is electrically connected to the substrate 6 by a plurality of bonding wires 64 to avoid adhesion by the adhesive 62, the first heat sink 621 and the first The heat dissipating structure 62 formed by the two heat dissipating members 622 touches or interferes with the bonding wire to cause a short circuit problem. A Dummy Chlp 66' is bonded to the semiconductor wafer 61, and the heat dissipating structure 62 is adhered to the adhesive 62. The crucible is adhered to the dummy wafer 66 such that the heat dissipation structure 62 does not touch or interfere with the bonding wire 64. Further, the dummy wafer 66 is made of a waste wafer or a waste wafer as a material of the semiconductor wafer 61, so that it is a semiconductor wafer. The heat generated can still be efficiently transferred to the heat dissipation structure 62 by the dummy wafer 66 without affecting the heat dissipation efficiency. It should be noted that the first heat dissipating member 621 shown in the drawings is provided with a channel and a metal sheet body, which are merely for exemplification, and other aspects or equivalent changes or modifications of the present invention are applicable. The present invention is a cross-sectional view of the semiconductor package of the seventh embodiment of the present invention as shown in Fig. 7. As shown in the figure, the structure of the semiconductor package of the seventh embodiment is substantially the same as that disclosed in the foregoing first embodiment, except that the first heat sink 722 is formed as a metal cover (Met Casing). After being adhered to the semiconductor wafer 7i by the adhesive 72, the cover is covered by the semiconductor wafer 71, and the leg of the second heat sink is adhered to the substrate 7 by the adhesive material 77. The semiconductor crystal is airtightly sealed for the second heat dissipating member 722. Therefore, it is not necessary to form an encapsulant to cover the semiconductor wafer. η 111047 17 201019429 The first heat dissipating member shown in this embodiment 721 ❹ ❹ - The appearance of the metal sheet is used for illustration purposes only, and other variations or changes that are not disclosed herein may apply. The above-described embodiments are merely illustrative of the principles of the invention and its effects, and are not intended to limit the invention. Anyone who is familiar with the art can modify and modify the yoke of the embankment π 耵 in the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth below. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view of a semiconductor package of a first embodiment of the present invention; FIG. 1 is a perspective view of a first heat sink illustrated in FIG. 2 is a perspective view of a cross-sectional view of a semiconductor package of a second embodiment of the present invention. FIG. 2 is a first heat sink diagram of the second drawing; FIG. FIG. 3B is a perspective view of the first heat sink illustrated in FIG. 3A; FIG. 4A is a cross-sectional view of the semiconductor package of the fourth embodiment of the present invention; 3B is a first heat sink 111047 18 201019429 shown in FIG. 4A; FIG. 5A is a cross-sectional view of a semiconductor package according to a fifth embodiment of the present invention. FIG. 5B is a FIG. 6 is a cross-sectional view of the semiconductor package of the sixth embodiment of the present invention; FIG. 7 is a cross-sectional view of the semiconductor package of the seventh embodiment of the present invention; Figure 8 is a cross-sectional view of a conventional semiconductor package; Figure 9 is a cross-sectional view of another conventional semiconductor package. [Major component symbol description] 1, 2, 3, 4, 5, 6, 7, 8, 9 semiconductor package 10, 50, 60, 70, 83, 90 substrate 100, 120a upper surface 101, 120b lower surface, 2 4, 61, 71, 82, 91 semiconductor wafer 12, 62 heat dissipation structure 120, 220, 320, 420, 620, 720 adhesive 121, 22, 32, 421, 52, 62, 721, first heat sink 121a '122a Top surface 121b, 122b bottom surface 121c, 321c, 421c, 521c channel 122, 222, 422, 622, 722 second heat sink 19 111047 201019429 13, 84, 93 encapsulant - 14 solder bump 15 fresh ball 22, 42 heat dissipation structure 221d opening 221e groove 521f plane portion 521g extension portion φ 64 bonding wire 66 dummy wafer 722e foot portion 77 adhesive material 80 heat sink 80a top surface 81 heat sink rubber metal cover 20 111047