201019069 九、發明說明： 【發明所屬之技術領域】 本發明關於電源控制技術，尤其關於一種應用於功率因數控制的控 制電路。 【先前技術】 按’ s午多電源轉換器應用功率因數修正（p〇wer Fact〇r c〇rrecti〇n， PFC)電路，以校正電源端的輸入電流，請參閱第一圖，其為習知技術 〇 之功率因數修正器。功率因數修正器是以一升壓拓撲結構以連續或非連 續的電感電流模式運作，並且以固定或可變的切換頻率運作，用以將交 流輸入電壓VAC透過橋式整流器10整流後轉換成一整流電壓Vrec，整 "IL電壓VREC經由一輸入電感Lw、一功率開關Q丨、以及一整流器整 流產生一輸出電壓V〇。輸出電壓V〇是為一較高的直流電壓，而功率開 關Q!的切換則藉由一控制電路所輸出的一切換訊號¥〇所控制。 控制電路包含一分壓濾波電路、一增益調變電路20、一電壓誤差放 大器30與一切換電路。分壓濾波電路係由電阻Ri、&、Rrms與電容^、 C2所組成。整流電壓vREC經過分壓濾波電路的降壓與濾波後，輸出一有 〇 效值電壓訊號V_。增益電路2G透過-偵測電阻Rag將整流電壓 vREC轉換成一輸入電流訊號Iaci並傳送至增益調變電路2〇。透過分壓電 阻R〇i 〃 R〇2，电壓誤差放大态30根據輸出端之輸出電壓v〇而產生之 -電壓回授職vFB ’電壓回授訊號Vfb與—預設電壓ν·透過誤差放 大後而輸出-誤差訊號VEA ’並傳送至增益調變電路2〇。增益調變電路 20接收輸入電流訊號lAC1、有效值電壓訊號與誤差訊號v以，經由 内部運算後輸出—控制喊VeQN。_電路包含—電流制電阻知、 放大器40與一比較器50。電流感測電f：且Rsi輕接於該功率開關α ,用 於感測-輸人電感電流ILIN而產生—切換電流訊號％。放大器仰之一端 透過電阻Rref形成虛接地，放大器4〇之另一端根據控制訊號％⑽與切換 201019069 電流訊號Vs加總後，透過誤差放大後輸出一放大訊號VERR。比較器50麵 接於該放大器40，根據放大訊號vERR與一鋸齒波訊號VSAw比較後輸出該 切換訊號Vg ’用以控制該功率開關Q丨之切換與該工作週期之調整。 一併參閱第二圖，第二圖係顯示輸入電流訊號IAC1、整流電壓VREC 以及輸入電感電流Iun的波形。輸入電流訊號iac丨係表示整流電壓Vrec 透過偵測電阻Rac轉換所得到的訊號，輸入電感電流Iun係表示流經輸 入電感lin之高頻切換電流。習知技術所使用的輸入電流訊號Iaci係透 過整流電壓vREC轉換而來’因此，每隔半個電源週期，輸入電流訊號Uci 的弦波電流零點即為整流電壓VREC的電壓波谷。如此的設計方式將造成 輸入電感電流iUN每隔半個電源週期，對應於整流電壓Vrec的電壓波谷 處，其切換訊號VG的工作週期太小無法進行切換，進而使得輸入電感 LIN無法充放電。這段期間無法輸出該輸入電感電，造成輸入電流 波形失真、功率因數降低與總諧波失真提高的問題。 【發明内容】 本發明之主要目的’在於提供—種控制電路，可在—輸人電感電洁 ❹ t點處纟加切換磁之作週期，藉此提高功率因數與降低總細 失真。 終正係?，於馳^路’用於—辨隨修正器，該功率因麥 輸入電壓經整流後轉換成-整峨，該控制娜 率開關:其包含一分壓據波電路，根據該整流_ 訊“二值電壓訊號與—輸人電流訊號’其中該輸入電请 械的波开雇亥整流電壓的波形相同 電路’根據該輸人電流訊號、該㈣° —增显趟 訊號，其巾該^紐峨與—縣_產生一控帝 切換電路，_==率因數修正器之-輸出端所產生，以及- 出該切換訊號。复中，\有’根據該控制訊號與，齒波訊號，輕 ，、有該錢位準之該m峨㈣在-輸入！ 201019069 =點處增加該切換訊號之-工作週期，藉此提高功率因數與降低 本發明提供另-種控制電路，驗—功率隨修正$ 正器將-錢輸人Μ經整流後轉換成—整流電壓，制電ς輪出 1控制-功率開關’其包含—位準提昇電路，其根據該整流電壓盘、 電^訊號喊生-輸人電流訊號，其中該輸人電流峨 = 壓的波形相同’並且提昇-直流位準，—增益調變電路，其根據 流訊號、-姐值賴峨與—縣訊號產生—控制峨，其中該有效= 電壓訊號係由該整流經分壓麵波後產生，賴差 數修正器之-輸出端所產生，-切換電路，其_於該增益調變 據该控制訊號與-鑛齒波訊號’輸出該切換訊號。其中，具有該直流 之該輸入電流訊制以在-輸人電感電流的零點處增加該切換職:一工 作週期，藉此提高功率因數與降低總諧波失真。 ^ 【實施方式】 茲為使t審查委員對本發明之技術特徵及所達成之功效更有進一 步之瞭解與認識，謹佐以較佳之實施例圖及配合詳細之說明，說明如後： _ 够閱第三®，其為本發簡祕鱗因數修以之—較佳實施例 的電路圖。如圖所示，-交流輸入電壓Vac輸入而透過橋式整流器ι〇 整流後轉換成整流電壓Vrec，該整流電壓v服經由輪人電感[旧、功率 開關^、以及整流器DJ流產生-輸出電壓％。該輸出電壓％是為 —較高的直流電壓，而該功率開關Q,的切換則藉由—控制電路所輸出的 切換訊號VG所控制。控制電路透過電阻R〇i和& _到功率因數修正 器的輸出端以接收一電壓回授訊號Vfb。當切換訊號％啟用，功率開關 A因而被驅動導通’輸入電⑥lin於是因功率開關Qi的導通而進行充電 儲能。而當切換訊號VG停用，功率開關Ql截止，輸入電感&中儲存 的能量便透過整流器^釋放出來。一旦輸入電感的放電電流降到 201019069 零，緊接著進行下一切換週期的循環動作。 ❹ 控制電路係包括一分壓渡波電路、-增益調變電路20以及一切換 電路。分壓濾波電路包含電阻Ri、&、Rrms與電容Q、&。整流電屢 VREC經過分壓錢電賴輔與紐後，在電容C|上輸丨—有效值電壓 汛唬VRMS。並且，整流電壓Vrec經過分壓濾波電路的降壓與濾波後， 在:分壓節點上透過—侧電阻RAe產生—輸人電流職^並傳送至 增^調變電路2G。藉此不但可以得到與整流電壓Vreg；n同波形的輸入 電流訊號IAe2，同時可墊高—直流位準，而直流位準的大小可由分壓電 阻R、I、rRMs的電阻值所決定。增益調變電路2〇接收輸入電流訊號 有效值電壓訊號Vrms與誤差訊號I，經由内部運算後輸出^ 制减vC0N’其中該誤差訊號Vea係由功率因數修正器之輸出端所產生。 切換電路耗接於增益調變電路2〇，包含一電流感測餘^、一放大 器40與-比較器50。一電流感測電阻知麵接於該功率開關&，用於感 測輸入電感lin之輸入電感電流Iun而產生一切換電流訊號％。放大器 4〇之-輸入端透過電阻Rr£F形成虛接地，放大器4〇之另一輸入端根據控 制訊號vC0N與切換電流訊號Vs加總後，透過誤差放大後輸出—放大訊號 VERR。放大H 4〇之輸人端與增益調變電路2()之輸出端__電阻& i 電阻RS2並耗接於電流感測電阻知。比較器5〇耗接於放大器4〇，錄據 放大« n織波峨VsAwit觀較錄㈣嫌则^ 控制功率開關Ql之切換與工作週期之調整。放大器4〇之輸出端與比較器 50之輸人端耦接-阻抗元件Z2，用以對放大器4q進行補償。 =電路更包括-電壓鮮放大器3Q，其輸於功率峨修 輸出知與增益調變電路20之間。透過分壓電阻汉⑴與R〇2,電壓誤 大益30根據功率因數修正器之該輸出端之輸出電壓（。而產生電壓 訊，vFB，輕回授訊號Vfb與—預設電壓％透過縣放大後而輸出又 誤差喊vEA，麟縣增益機魏2()。其巾縣峨I與回 #JFB相關。電壓誤差放大器30之輪出端與增益調變電路_妾卜 201019069 阻抗元件ζι ’用以對電壓誤差放大器3〇進行補償。 請參閱第四圖所示的輸入電流訊號、整流電壓與輸入電感電流之波 形，並配合參考第三圖。由圖中可知，輸入電流訊號Iac2與整流電壓Vrec 的波形相同，且具有一直流位準。由於輸入電流訊號Iac2提昇一個直流 位準，使得控制sfl號VC0N亦相對升高，透過放大器4〇的誤差放大使得 放大訊號vERR下降，較低的放大訊號Verr與鋸齒波訊號比較之 後，切換5fl號VG的導通時間增加，並且加大工作週期。因此，輸入電 感電流ILIN在整流電壓乂扯(：的電壓波谷處仍可進行切換。 瘳 請參閱第五圖，其為本發明另-較佳實施例之功率因數修正器的電 路圖。其大部分電路與前-實施例相同，在此不再贅述。本實施例與前 -實施例主要不同處是輪人電流訊號IAe3的取得是透過—位準提昇電路 100輸入至增益調變電路20,並未透過偵測電阻Rac (參閱第三圖）耦 接至分壓濾波電路的分壓節點。位準提昇電路·經由分壓電阻、與^ 墟至橋式整流n 1G並雛增益機電路2G，整流籠由分屋 電路之分壓電阻RA與RB分壓後，產生一降壓訊號ν_，位準提昇電路 100根據降壓峨VREe2產生輸人電流峨—，其中輪人電流訊號 的波形與整流電壓VREC丨的波形相同，並且提昇一直流位準。 G 睛參’六圖’其為本發明—較佳實施例之位準提昇電路的電路 圖。該位準提昇電路100包含一電壓/電流轉換電路、—電流鏡與—電流 源115。該電壓/電流轉換電路係包含放大g 11〇、電晶體⑴以及電阻 RD ’用以將該整流電壓VREC1轉換成對應的一第一電流訊號，其將相 關^整流電壓VREC1之降壓訊號VREC2轉換成對應的第—電流訊號。放 大益110之正輸入端接收降壓訊號VreC2,而輸出端輛接電晶體⑴之門 極’放大器no之負輸入端麵接電晶體m之源極，電阻Rd轉接於: 體m之源極與接地端之間，電晶體m之汲極產生該第—電流訊號^ 该電流鏡耗接於電壓/電流轉換電路並包含電晶體ιΐ2與⑴，用以 將該第-電流訊號I,轉換成對應的—第二電流訊號12。其中、，該第二電 201019069 流訊號I2比例或相等於該第一電流訊號〗丨。電晶體112與n3耦接於一 供應電壓vcc。該電流源U5係為一定電流源並耦接供應電壓Vcc，而 提供一定電流訊號I3 ’以與該第二電流訊號l2加總後產生該輸入電流訊 號Ιαο ’其中該直流位準的大小係由該定電流訊號l3所決定。該位準提昇 電路100所產生的輸入電流訊號Iac3的波形亦與第四圖的輸入電流訊號201019069 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to power supply control techniques, and more particularly to a control circuit for power factor control. [Prior Art] According to the 's afternoon power converter application power factor correction (p〇wer Fact〇rc〇rrecti〇n, PFC) circuit to correct the input current of the power supply terminal, please refer to the first figure, which is a conventional technology功率 Power factor corrector. The power factor corrector operates in a continuous or non-continuous inductor current mode in a boost topology and operates at a fixed or variable switching frequency to rectify the AC input voltage VAC through the bridge rectifier 10 into a rectification The voltage Vrec, the whole "IL voltage VREC generates an output voltage V〇 via an input inductor Lw, a power switch Q丨, and a rectifier rectification. The output voltage V〇 is a higher DC voltage, and the switching of the power switch Q! is controlled by a switching signal ¥〇 outputted by a control circuit. The control circuit includes a voltage dividing filter circuit, a gain modulation circuit 20, a voltage error amplifier 30 and a switching circuit. The voltage dividing filter circuit is composed of resistors Ri, & Rrms and capacitors ^, C2. After the rectified voltage vREC is stepped down and filtered by the voltage dividing filter circuit, the output has a valid voltage signal V_. The gain circuit 2G converts the rectified voltage vREC into an input current signal Iaci through the -detection resistor Rag and transmits it to the gain modulation circuit 2A. Through the voltage dividing resistor R〇i 〃 R〇2, the voltage error amplification state 30 is generated according to the output voltage v〇 of the output terminal. The voltage is returned to the vFB 'voltage feedback signal Vfb and the preset voltage ν· the error is amplified. The output-error signal VEA' is then passed to the gain modulation circuit 2〇. The gain modulation circuit 20 receives the input current signal lAC1, the rms voltage signal and the error signal v, and outputs the control via the internal operation to control the call to VeQN. The _circuit includes a current resistor, an amplifier 40 and a comparator 50. The current sensing power f: and Rsi is lightly connected to the power switch α for generating the sensing current ILIN to switch the current signal %. One end of the amplifier is formed with a virtual ground through the resistor Rref, and the other end of the amplifier 4 is summed according to the control signal %(10) and the switching current signal Vs 201019069, and then amplified by the error to output an amplified signal VERR. The comparator 50 is connected to the amplifier 40, and compares the amplified signal vERR with a sawtooth wave signal VSAw to output the switching signal Vg' to control the switching of the power switch Q丨 and the adjustment of the duty cycle. Referring to the second figure, the second figure shows the waveforms of the input current signal IAC1, the rectified voltage VREC, and the input inductor current Iun. The input current signal iacon is a signal obtained by converting the rectified voltage Vrec through the detecting resistor Rac, and the input inductor current Iun is a high-frequency switching current flowing through the input inductor lin. The input current signal Iaci used in the prior art is converted by the rectified voltage vREC. Therefore, every half of the power supply cycle, the sinusoidal current zero of the input current signal Uci is the voltage valley of the rectified voltage VREC. Such a design method will cause the input inductor current iUN to correspond to the voltage valley of the rectified voltage Vrec every half power supply cycle, and the duty cycle of the switching signal VG is too small to switch, so that the input inductor LIN cannot be charged and discharged. This input inductor cannot be output during this period, causing distortion of the input current waveform, reduction of power factor, and improvement of total harmonic distortion. SUMMARY OF THE INVENTION The main object of the present invention is to provide a control circuit that can increase the power factor and reduce the total fine distortion by adding a switching magnetic cycle at the point where the input inductor is cleaned. The final system?, Yu Chi ^ road 'is used to identify the corrector, the power is converted into a whole 因 by the rectification of the wheat input voltage, the control rate switch: it contains a partial pressure data circuit, according to Rectification _ "Binary voltage signal and - input current signal", wherein the input circuit of the device is the same as the waveform of the waveform of the rectified voltage of the device, according to the input current signal, the (four) ° - increase the signal, The towel and the county _ generate a control switch circuit, _== rate factor corrector - output generated, and - the switch signal. In the middle, \ have 'according to the control signal and teeth Wave signal, light, and the money is the same as the m峨 (four) in-input! 201019069 = increase the switching signal - duty cycle at the point, thereby improving the power factor and reducing the present invention to provide another type of control circuit, test - The power is corrected with the correction - the positive input will be converted into a - rectified voltage, and the power switch will be turned out to 1 control - the power switch 'includes - the level rise circuit, according to the rectified voltage plate, the electric ^ Signal shouting - input current signal, where the input current 峨 = pressure The waveforms are the same 'and the boost-DC level, the gain modulation circuit, which is generated according to the flow signal, the value of the sister value, and the signal generated by the county signal, wherein the effective = voltage signal is derived from the voltage dividing surface of the rectifier After the wave is generated, the output of the differential correction device is generated, and the switching circuit outputs the switching signal according to the control signal and the -tooth tooth signal. The DC signal is generated. The input current signal is used to increase the switching duty at the zero point of the input inductor current: a duty cycle, thereby increasing the power factor and reducing the total harmonic distortion. [Embodiment] For the purpose of making the technology of the present invention A better understanding and understanding of the features and the efficacies achieved, please refer to the preferred embodiment diagram and the detailed description to illustrate the following: _ Read the third®, which is based on the simplified scale factor - a circuit diagram of the preferred embodiment. As shown, the AC input voltage Vac is input and rectified by a bridge rectifier to be converted into a rectified voltage Vrec, which is applied via a wheel inductor [old, power switch ^, as well as The current collector DJ generates - output voltage %. The output voltage % is - a higher DC voltage, and the switching of the power switch Q is controlled by the switching signal VG outputted by the control circuit. R〇i and & _ to the output of the power factor corrector to receive a voltage feedback signal Vfb. When the switching signal % is enabled, the power switch A is thus driven to turn on the input power 6lin and then is turned on by the power switch Qi. Charging energy storage. When the switching signal VG is deactivated, the power switch Ql is turned off, and the energy stored in the input inductor & is released through the rectifier ^. Once the discharge current of the input inductor drops to 201019069 zero, the next switching cycle is performed. The cyclic control circuit includes a voltage division wave circuit, a gain modulation circuit 20, and a switching circuit. The voltage dividing filter circuit includes resistors Ri, & Rrms and capacitors Q, & The rectification power is repeated. After the VREC is divided into the power supply, the VREC is connected to the capacitor C|-the rms voltage 汛唬VRMS. Then, the rectified voltage Vrec is stepped down and filtered by the voltage dividing filter circuit, and is generated at the voltage dividing node by the through-side resistor RAe, and is transmitted to the boosting and converting circuit 2G. Thereby, not only the input current signal IAe2 of the same waveform as the rectified voltage Vreg;n but also the DC level can be obtained, and the magnitude of the DC level can be determined by the resistance values of the divided piezoelectric resistors R, I and rRMs. The gain modulation circuit 2 receives the input current signal rms voltage signal Vrms and the error signal I, and outputs the error vC0N' through internal calculation, wherein the error signal Vea is generated by the output of the power factor corrector. The switching circuit is consuming the gain modulation circuit 2A, and includes a current sensing residual, an amplifier 40 and a comparator 50. A current sensing resistor is connected to the power switch & for sensing the input inductor current Iun of the input inductor lin to generate a switching current signal %. The amplifier is connected to the input terminal through the resistor Rr£F to form a virtual ground. The other input terminal of the amplifier 4 is summed according to the control signal vC0N and the switching current signal Vs, and then amplified and outputted by the error-amplified signal VERR. Amplify the output terminal of H 4〇 and the output terminal of the gain modulation circuit 2 () __resistance & i resistor RS2 and consume the current sense resistor. The comparator 5 〇 is connected to the amplifier 4〇, and the recording data is amplified. The n-weave 峨VsAwit view is recorded (4). The control power switch Q1 is switched and the duty cycle is adjusted. The output of the amplifier 4 is coupled to the input terminal of the comparator 50 - an impedance element Z2 for compensating the amplifier 4q. The circuit further includes a voltage fresh amplifier 3Q which is input between the power trimming output and the gain modulation circuit 20. Through the voltage divider resistors (1) and R〇2, the voltage error is greater than 30 according to the output voltage of the output of the power factor corrector (the voltage signal is generated, vFB, light feedback signal Vfb and - preset voltage % through the county) After amplification, the output error is called vEA, Linxian gain machine Wei 2 (). Its towel county 峨I is related to back #JFB. The voltage error amplifier 30's wheel end and gain modulation circuit _ 妾 2010 201019069 impedance component ζι 'Use to compensate the voltage error amplifier 3〇. Please refer to the waveforms of the input current signal, rectified voltage and input inductor current shown in the fourth figure, and refer to the third figure. It can be seen from the figure that the input current signal Iac2 and The waveform of the rectified voltage Vrec is the same and has a constant current level. Since the input current signal Iac2 is raised by a DC level, the control sfl number VC0N is also relatively increased, and the error amplification by the amplifier 4〇 causes the amplification signal vERR to decrease, lower. After the comparison signal Verr is compared with the sawtooth wave signal, the on-time of switching the 5fl VG is increased, and the duty cycle is increased. Therefore, the input inductor current ILIN is rectified at the rectified voltage (: The voltage trough can still be switched. 第五Please refer to the fifth figure, which is a circuit diagram of a power factor corrector according to another preferred embodiment of the present invention. Most of the circuits are the same as those of the previous embodiment, and are not described herein again. The main difference between this embodiment and the previous embodiment is that the wheel current signal IAe3 is obtained through the level-up circuit 100 and is input to the gain modulation circuit 20, and is not coupled through the detection resistor Rac (see FIG. 3). Connected to the voltage divider node of the voltage divider filter circuit. The level boost circuit · via the voltage divider resistor, and the Hui to bridge rectifier n 1G and the gainer circuit 2G, the rectifier cage is divided by the divider resistors RA and RB After the voltage division, a step-down signal ν_ is generated, and the level rising circuit 100 generates an input current 根据 according to the step-down 峨VREe2, wherein the waveform of the wheel current signal is the same as the waveform of the rectified voltage VREC丨, and the constant current level is raised. G eye ' 'six diagram' is a circuit diagram of a level-up circuit of the preferred embodiment of the invention. The level-up circuit 100 includes a voltage/current conversion circuit, a current mirror and a current source 115. /current conversion The system includes an amplification g 11 〇, a transistor (1), and a resistor RD′ for converting the rectified voltage VREC1 into a corresponding first current signal, which converts the step-down signal VREC2 of the associated rectified voltage VREC1 into a corresponding first current. The positive input of the amplifier 110 receives the step-down signal VreC2, and the output terminal is connected to the gate of the transistor (1). The negative input end of the amplifier no is connected to the source of the transistor m, and the resistor Rd is switched to: body m Between the source and the ground, the drain of the transistor m generates the first current signal. The current mirror is connected to the voltage/current conversion circuit and includes transistors ιΐ2 and (1) for the first current signal I. , converted into a corresponding - second current signal 12. Wherein, the second power 201019069 flow signal I2 ratio is equal to or equal to the first current signal. The transistors 112 and n3 are coupled to a supply voltage vcc. The current source U5 is a constant current source and coupled to the supply voltage Vcc, and provides a certain current signal I3' to be combined with the second current signal l2 to generate the input current signal Ιαο ', wherein the DC level is determined by The constant current signal is determined by the signal l3. The waveform of the input current signal Iac3 generated by the level rising circuit 100 is also the input current signal of the fourth figure.
Uc2相同’具有直流位準’其中該直流位準的大小係由該定電流訊號“的 大小所決定。 由於輸入電流訊號Iac3提昇一個直流位準，使得控制訊號Vc〇N亦 0 相對升南’透過放大器40(參閱第五圖）的誤差放大使得放大訊號VERR 下降’較低的放大訊號VERR與鋸齒波訊號Vsaw比較之後，切換訊號vG 的導通時間增加，並且加大工作週期。因此，輸入電感電流—在整流 電壓VREC1的電壓波谷處仍可進行切換。 綜上所述，每隔半個電源週期，對應於整流電壓¥1^^與的電 壓波谷處，本發明可以避免切換訊號vG的工作週期太小無法進行切換， 。而同時無讀出該輸人電感電流IUN的問題。具有直流位準之輸入電流訊 號Iac2與IAC3可以達成在輸入電感電流Ilin的零點處增加該切換訊號％之 ，作週期’進而使得輸人電$ Lw可以進行充放電。冑此避免輸入電流波 φ 形失真、提高功率因數與降低總諧波失真。 准以上所述者’僅為本發明一較佳實施例而已，並非用來限定本發 明實施之範圍’故舉凡依本發明申請專利範圍所述之形狀、構造、特徵 及精神所為之均等變化與修飾，均應包括於本發明之申請專利範圍内。 【圖式簡單說明】 第一圖係習用技術之功率因數修正器的電路圖； =圖係顯示第-圖中之輸人電流訊號、整流電壓與輸人電感電流的波 第二圖係顯示本發明-較佳實施例之功率因數修正器的電路圖； 10 201019069 第四圖係顯示第三圖中之輸入電流訊號、整流電壓與輸入電感電流的波 形；以及 第五圖係顯示本發明另一較佳實施例之功率因數修正器的電路圖；以及 第六圖係顯示本發明一較佳實施例之位準提昇電路的電路圖。Uc2 has the same 'with DC level', and the size of the DC level is determined by the size of the constant current signal. Since the input current signal Iac3 raises a DC level, the control signal Vc〇N is also 0 relative to the south. Through the error amplification of the amplifier 40 (refer to the fifth figure), the amplification signal VERR is decreased. After the lower amplification signal VERR is compared with the sawtooth signal Vsaw, the on-time of the switching signal vG is increased, and the duty cycle is increased. Therefore, the input inductance Current—The voltage can still be switched at the voltage valley of the rectified voltage VREC1. In summary, the present invention can avoid the operation of the switching signal vG every half of the power supply cycle corresponding to the voltage valley of the rectified voltage ¥1^^. The cycle is too small to switch, and the problem of the input inductor current IUN is not read at the same time. The input current signals Iac2 and IAC3 with DC level can increase the switching signal % at the zero point of the input inductor current Ilin, The cycle 'and thus the input power $ Lw can be charged and discharged. This avoids input current wave φ distortion, improves power factor and Low Total Harmonic Distortion. The above description is only a preferred embodiment of the present invention and is not intended to limit the scope of the practice of the present invention. Equivalent changes and modifications of the spirit should be included in the scope of the patent application of the present invention. [Simplified description of the drawings] The first figure is a circuit diagram of a power factor corrector of a conventional technique; = the system shows the loss in the first figure The second diagram of the human current signal, the rectified voltage and the input inductor current shows a circuit diagram of the power factor corrector of the preferred embodiment of the present invention; 10 201019069 The fourth diagram shows the input current signal and rectification in the third diagram. The waveform of the voltage and the input inductor current; and the fifth diagram showing the circuit diagram of the power factor corrector of another preferred embodiment of the present invention; and the sixth diagram showing the circuit diagram of the level boosting circuit of a preferred embodiment of the present invention. .
【主要元件符號說明】 10 橋式整流器 20 增益調變電路 30 電壓誤差放大器 40 放大器 50 比較器 100 位準提昇電路 110 放大器 111 電晶體 112 電晶體 113 電晶體 115 電流源 Cl 電容 c2 電容 Db 整流器 I. 第一電流訊號 I2 第二電流訊號 I3 定電流訊號 Iaci 輸入電流訊號 IaC2 輸入電流訊號 IaC3 輸入電流訊號 Ilin 輸入電感電流 Lin 輸入電感 Qi 功率開關 201019069[Main component symbol description] 10 Bridge rectifier 20 Gain modulation circuit 30 Voltage error amplifier 40 Amplifier 50 Comparator 100 Level rise circuit 110 Amplifier 111 Transistor 112 Transistor 113 Transistor 115 Current source Cl Capacitor c2 Capacitor Db Rectifier I. First current signal I2 Second current signal I3 Constant current signal Iaci Input current signal IaC2 Input current signal IaC3 Input current signal Ilin Input inductor current Lin Input inductor Qi Power switch 201019069
Ri 電阻 r2 電阻 Ra 分壓電阻 Rac 偵測電阻 Rb 分壓電阻 Rd 電阻 R〇i 分壓電阻 R〇2 分壓電阻 Rref 電阻 Rrms 電阻 Rsi 電流感測電阻 RS2 電阻 Vac 交流輸入電壓 Vcc 供應電壓 Vc〇N 控制訊號 Vea 誤差訊號 Verr 放大訊號 Vfb 電壓回授訊號 Vg 切換訊號 Vo 輸出電壓 VreC 整流電壓 VrecI 整流電壓 VreC2 降壓訊號 Vref 預設電壓 VrmS 有效值電壓訊號 Vs 切換電流訊號 VsAW 鋸齒波訊號 Z1 阻抗元件 Z2 阻抗元件 12Ri resistor r2 resistor Ra divider resistor Rac detection resistor Rb divider resistor Rd resistor R〇i divider resistor R〇2 divider resistor Rref resistor Rrms resistor Rsi current sense resistor RS2 resistor Vac AC input voltage Vcc supply voltage Vc〇 N control signal Vea error signal Verr amplification signal Vfb voltage feedback signal Vg switching signal Vo output voltage VreC rectification voltage VrecI rectification voltage VreC2 step-down signal Vref preset voltage VrmS rms voltage signal Vs switching current signal VsAW sawtooth signal Z1 impedance component Z2 impedance element 12