200924086 九、發明說明： 【發明所屬之技術領域】 本發明係有關一種重配置焊墊之粗糙化結構及其製 造方法，目的在加強積體電路元件與其他元件構裝時之接 合強度並降低電阻值，可避免重配置焊墊從第二介電層剝 離，或構裝接合所使用的導電膠從重配置焊墊表面剝離的 情況發生。 【先前技術】 在半導體產業中，積體電路的生產，主要分為三個階 段：矽晶片的製造、積體電路的製作、以及積體電路的封 裝（package)等。積體電路的封裝就是完成積體電路成 品的表後步驟。封裝的目的在於提供晶片與印刷電路板 (printed circuit board, PCB)或是與其他元件之間的電 性連接的媒介，以及提供保護晶片的功用。 在完成半導體製程以後，經由晶圓切割形成晶片，一 般在晶片上會有焊墊（bonding pad)，用以作為提供晶片 檢測的測試點，並作為晶片與其他元件間連接的端點。 而如第一圖所示即為一般積體電路元件焊墊之結構 示意圖，該積體電路元件11上設有焊墊12以及一第一介 電層13,該第一介電層13係覆蓋於積體電路元件11表 面並暴露該焊墊12，而有時為了構裝製程需要，會在積 體電路元件11上形成與該焊墊12連接之重配置焊墊 14，如第二圖（A)、（B)、（C)所示，以改變焊墊位置。 該重配置焊墊14之成型方式依序如下：先於積體電 200924086 路元件11表面形成第二介質層15，並藉 光、顯影製程，使該第二介 _ 進仃曝 將焊墊12露出，如第二（、曰 >成弟二窗口 151以 U上賤W著;'㈣）所不’再於該積體電路元件 上康鍍黏者及電鍍金屬核種層形 ，erB_Metallurgy;_)16 离層 =金屬層16係將焊塾丨2以及第一、第(二)二;， 13、15全面覆芸，蛀芏4，丨m、入"貝禮 伋·-接者利用塗佈光阻、光罩曝光、、 電鑛製程於該凸塊下金屬_丨β ^ ''，?ν/ 以i屬層16上形成重配置金屬線及焊 "重配置谭# 14係相對由焊墊12上方延伸至 =:側之第二介質層15上方，如第三圖⑹所示， 1置焊墊14與部份凸塊下金屬層16重疊。 阻塗佈 '曝光、顯二银刻將 復盍有重配置桿墊14之凸塊下金屬層16去除，再將光 阻去除’則完成整體重配置焊墊之結構，如第二圖⑷、 ⑻所不；而當積體電路元件u與其他電子元件3構裝接 合時，如第四圖⑷所示’該重配置焊塾14上藉由導電膠 31 (可以為銀膠）與電子元件3黏著固定；惟，該重配置焊 藝14、凸塊下金屬層16以及第二介質们5間之接合面 平广使各層之接合強度較差，容易造成重配置焊墊η 從苐一"貝層15剝離，如第四圖（β)所示中，因凸塊下金 屬層16較細小而強度不足，容易使重配置烊墊14連同部 分凸塊下金屬層16，從第二介質層15剝離，或構裝接合 所使用的導電朦31從重配置煤塾14表面剝離的情況^ 生，如第四圖（C)所示，進而造成積體電路元件u與電子 200924086 元件3無法確實接合 ，、不良率提尚而可靠性下降。 【發明内容】 本發明之主要目的即在提供— 化結構及其製造方法 種重配置知墊之粗糙 罢]-劫制i 目的在加強積體電路元件僅用舌啦 後與其他元件構料之接合強度 為達上揭目的，本發明之積體 及-第-、第二介電層，談第一八：：几件上权有焊墊以 元件表面，而第電曰係覆蓋於積體電路 -、第-介;則覆盘於第—介電層表面，且第 谭墊藉由凸塊下金屬層及電錢全弟一/ ^層上並設有與 墊；其中，#第-八屬層連接之重配置焊 μ弟—介电層表面係 一 配置谭塾表面相對於㈣一相拉主弟㈣泛表面’而重 糙表面，夂相批本、μ第一粗糙表面處並形成有第二粗 。粗铋表面有助於該重配置 他元件黏著，構成藉# η翌猎由W膠與其 可加強二= 争與其他元件構褒接合時， 墊從第Ιίί導電膠之接合強度’可避免重配置焊 置桿剝離’或構裝接合所使用的導電谬從重配 表面的Ϊ:==生:㈣電膠鑲嵌在具有粗糙 可降低，可進-步改善構裝電性。墊接。面的阻抗 【實施方式】 而雜之特點’可參閱本案圖式及實施例之詳細說明 而獲仔清楚地瞭解。 200924086 本發明「重配置焊墊之粗糙化結構及其製造方法， 該積體電路元件21之結構如第五圖所示，該積體電路元 件21上設有焊墊22以及一第一、第二介電層…… 該第一介電層23係覆蓋於積體電路元件21表面，而第二 介電層24則覆蓋於第-介電層23表面，該第一介電^ 23設有第-窗口 231以將焊墊22露出，該第二介電層& 亦設有第二窗口 241以將焊墊22露出，該第一、第 口 23卜241係上下重疊，該窗口尺寸大小可相同或不相 同，如圖所示之實施例中’該第二窗口 241之開口率係大 於第一窗口 231’而第二介電層24上並設有與焊墊以藉 由凸塊下金屬層25連接之重配置焊墊26，該凸塊下金^ 層26係設於焊墊22與重配置焊墊26間。 至於’本發明之重點在於：在該第二介電層％於重 配置桿墊位置上方表面形成第—粗链表面⑽，該凸塊下 金屬層25表面相對於該第一粗糙表面242處並形成有第 三粗糙表面251，而重配置焊墊26表面相對於該第一、 第三粗糙表面242、251處並形成有第二粗糙表面261， 請同時參«六圖所示’該第―、第二、第三粗糙表面 242、261、251係包含複數週期性排列且凹入表面之不連 續之凹洞或凹槽A。 當然亦可如第七圖所示，該第一粗糙表面242亦可全 面設置於該第二介電層24表面，而該第三_表面251 則同樣全面性設置於該第一粗糙表面242，而該重配置焊 墊26係與部份凸塊下金屬層25重疊，使該重配置焊塾 200924086 26表面相對於該第一、第三粗糙表面242、251處並形成 有弟一粗繞表面261。 人士而當整體積體電路元件21與其他電子元件3構裝接 合時，如第八圖所示，該重配置焊墊26上藉由導電膠 31 (可以為銀膠）與電子元件3黏著固定，該黏著劑μ可 =置於該重配置焊墊之第二粗糙表面261上，因該第二粗 =，261具有複數不連續之凹洞或凹槽Α’可增加與黏 者W 之接觸面積，進而加強重配置焊墊26與導電膠 之接5強度，可避免構裝接合所使用的導電膠舌 =置谭墊26表面剝離，且重配置焊墊沈與凸塊下金^ 25以及凸塊下金屬層25與第二介電層24間，同樣可^ 由各粗較表面增加各層疊合間之接觸面積，亦可增^ =接合強度，亦可避免重配置焊墊26從第二介曰電層‘ 層之接合強度（如第六圖所示）。200924086 IX. Description of the Invention: [Technical Field] The present invention relates to a roughened structure of a reconfigurable bonding pad and a manufacturing method thereof, and aims to enhance the bonding strength and reduce the resistance of an integrated circuit component and other components. The value can be avoided by the fact that the relocation pad is peeled off from the second dielectric layer, or the conductive paste used for the bonding is peeled off from the surface of the relocation pad. [Prior Art] In the semiconductor industry, the production of integrated circuits is mainly divided into three stages: fabrication of germanium wafers, fabrication of integrated circuits, and packaging of integrated circuits. The package of the integrated circuit is the post-table step of completing the integrated circuit. The purpose of the package is to provide a medium for the electrical connection between the wafer and the printed circuit board (PCB) or other components, as well as to provide protection for the wafer. After the semiconductor process is completed, the wafer is formed by wafer dicing, and there is typically a bonding pad on the wafer for use as a test point for wafer inspection and as an end point for the connection between the wafer and other components. As shown in the first figure, it is a schematic structural view of a general integrated circuit component pad. The integrated circuit component 11 is provided with a pad 12 and a first dielectric layer 13, and the first dielectric layer 13 is covered. The pad 12 is exposed on the surface of the integrated circuit component 11 and sometimes a reconfigurable pad 14 connected to the pad 12 is formed on the integrated circuit component 11 as required for the fabrication process, as shown in the second figure ( A), (B), (C), to change the position of the pad. The reconfigurable soldering pad 14 is formed in the following manner: a second dielectric layer 15 is formed on the surface of the component 12 of the integrated body 200924086, and the second dielectric layer 15 is exposed by the light and development process. Exposed, such as the second (, 曰 成 成 成 二 窗口 窗口 151 151 151 151 151 151 151 151 151 ; ; ; ; ; ; ; ; ; ; ' ' ' ' ' ' ' 151 151 窗口 er er er er er er er er er er er er er er er er er er er er 16 separate layer = metal layer 16 series will be welded 2 and the first, second (two) two;, 13, 15 comprehensive coverage, 蛀芏 4, 丨 m, into " Berri 汲 - 接 接Coating photoresist, reticle exposure, and electro-minening process under the bump metal _丨β ^ '', ?ν/ to form a re-arranged metal line on the i-type layer 16 and solder "reconfigurate Tan #14 The solder pad 14 overlaps with the partial under bump metal layer 16 as shown in the third figure (6) with respect to the second dielectric layer 15 extending from above the solder pad 12 to the =: side. Resisting coating 'exposure, revealing two silver engravings to remove the under bump metal layer 16 of the reconfigured rod pad 14 and then removing the photoresist' completes the structure of the overall reconfigurable solder pad, as shown in the second figure (4), (8) No; when the integrated circuit component u is assembled with other electronic components 3, as shown in the fourth figure (4), the conductive adhesive 31 is coated with conductive adhesive 31 (which may be silver paste) and electronic components. 3 Adhesive fixation; only, the re-arrangement welding 14, the under-bump metal layer 16 and the second medium 5 joint faces are flat, so that the bonding strength of each layer is poor, and it is easy to cause the re-arranged pad η from 苐一" The shell layer 15 is peeled off. As shown in the fourth figure (β), since the under bump metal layer 16 is fine and insufficient in strength, it is easy to reconfigure the mat 14 together with the partial under bump metal layer 16 from the second dielectric layer. 15 peeling, or the case where the conductive crucible 31 used for the bonding is peeled off from the surface of the rearranging coal shovel 14, as shown in the fourth figure (C), thereby causing the integrated circuit component u and the electronic component 200924086 component 3 to be reliably bonded. , the rate of non-performing is improved and the reliability is degraded. SUMMARY OF THE INVENTION The main object of the present invention is to provide a structure and a manufacturing method thereof, and to reconfigure the roughness of the structure. The purpose of the invention is to strengthen the integrated circuit components and only use the tongue and other component materials. The bonding strength is the purpose of the above, and the integrated body of the present invention and the first and second dielectric layers are discussed in the first eight: a few pieces have a pad on the surface of the component, and the first electrical system covers the integrated body. The circuit-, the first-dielectric layer is overlaid on the surface of the first dielectric layer, and the first tamping pad is provided on the layer of the underlying metal layer of the bump and the electric brother, and is provided with a pad; wherein, #第- The eight-layer layer is connected to the re-arranged solder-dielectric layer surface. The surface of the dielectric layer is arranged with respect to the (four) one phase pull the younger brother (four) the surface of the surface and the surface is re-roughened, and the first phase of the first phase is Formed with a second thick. The rough surface helps the reconfigure of the component to be adhered, and the re-configuration can be avoided by the # η 翌 由 由 由 与其 与其 与其 与其 与其 与其 = = = = = = = = = = = = = 垫 垫 垫 垫 垫 垫 垫 垫 垫 垫 垫 垫 垫 垫 垫The soldering rod is stripped' or the conductive crucible used for the bonding is from the surface of the re-matching surface: == raw: (4) The electro-glue is inlaid with roughness to reduce the electrical properties of the package. Padded. The impedance of the surface [Embodiment] The characteristics of the surface can be clearly understood by referring to the detailed description of the drawings and the examples. 200924086 The invention discloses a roughening structure of a relocation pad and a manufacturing method thereof. The structure of the integrated circuit component 21 is as shown in FIG. 5, and the integrated circuit component 21 is provided with a bonding pad 22 and a first and a The first dielectric layer 23 covers the surface of the integrated circuit component 21, and the second dielectric layer 24 covers the surface of the first dielectric layer 23. The first dielectric layer 23 is provided. The first window 231 exposes the pad 22, and the second dielectric layer amp is also provided with a second window 241 for exposing the pad 22, the first and the second ports 241 are vertically overlapped, the window size The same or different, as shown in the embodiment shown, the second window 241 has an aperture ratio greater than the first window 231' and the second dielectric layer 24 is provided with a pad to be under the bump. The metal layer 25 is connected to the relocation pad 26, and the bump underlayer 26 is disposed between the pad 22 and the reposition pad 26. The focus of the present invention is: in the second dielectric layer The upper surface of the reposition pad pad surface forms a first-thick chain surface (10), and the surface of the under bump metal layer 25 is opposite to the first rough surface 24 The second rough surface 251 is formed at two places, and the second rough surface 261 is formed on the surface of the relocation pad 26 with respect to the first and third rough surfaces 242, 251. The first, second, and third rough surfaces 242, 261, and 251 comprise a plurality of recesses or grooves A that are periodically arranged and recessed into the surface. Of course, as shown in the seventh figure, the first The rough surface 242 can also be disposed on the surface of the second dielectric layer 24, and the third surface 251 is also uniformly disposed on the first rough surface 242, and the re-positioning pad 26 is partially bumped. The lower metal layer 25 is overlapped such that the surface of the reconfigurable solder fillet 200924086 26 is formed with respect to the first and third rough surfaces 242, 251 and has a rough winding surface 261. The human body and the whole bulk circuit component 21 and others When the electronic component 3 is assembled and bonded, as shown in FIG. 8 , the re-position solder pad 26 is adhered to the electronic component 3 by a conductive adhesive 31 (which may be silver paste), and the adhesive μ can be placed on the weight. Configuring the second rough surface 261 of the pad, because the second coarse =, 261 has a plurality The discontinuous cavity or groove Α' can increase the contact area with the adhesive W, thereby enhancing the strength of the re-arrangement pad 26 and the conductive adhesive 5, and avoiding the conductive adhesive tongue used for the structural bonding = placing the pad 26 surface peeling, and re-arrangement pad sinking and bump under gold 25 and between the under bump metal layer 25 and the second dielectric layer 24, can also increase the contact area of each laminated layer from each rough surface, The bond strength can be increased, and the bond strength of the reposition pad 26 from the second dielectric layer can also be avoided (as shown in Figure 6).
其中’該重配置焊墊之萝iiL 含下列步驟： 之心方法如斜_示，係包 步驟a :提供一具有焊墊带 圖（A)所千，兮择躺+ * 之積體电路几件21，如第九The 're-arranged solder pad's radish iiL contains the following steps: The heart method is as shown in the oblique _, the package step a: provides a set of pads with a pad (A), a choice of lying + * Item 21, such as the ninth
23 I f 件21上並設有—第—介W 23 5亥弟一介電層23設有一第一涔口 '丨冤增 22。 弟匈口 231可暴露該焊墊 步驟b:於積體電路元件2 _ 如第九圖⑻所示，本實施例中可以涂1了電層24， 加以熟化或硬化該第二介電層。土 衣程完成，並 200924086 步驟c :提供一光罩4，該光罩4設有複數與焊墊22 相對之開口 41，而該光罩4並設有複數灰階區段42，該 灰階區段42係包含有複數透光區421及不透光區422， 由灰階區段42的圖案尺寸大小、形狀、佈置及圖案密度 來定義粗糙表面圖案之深淺及形狀。 步驟d :以該光罩4進行曝光、顯影製程，使第二介 電層24相對於光罩4之開口 41處形成有第二窗口 241， 而相對於灰階區段4 2形成有第一粗糖表面2 4 2，如第九 圖（C)所示，如圖所示之實施中，該第一粗糙表面242係 包含複數週期性排列且凹入表面之不連續凹洞或凹槽A。 步驟f:利用物理氣相沉積技術於該第二介電層24 上形成凸塊下金屬層25，其中可非限定使用濺鍍技術或 採用蒸鍍技術，使該凸塊下金屬層25係將焊墊22以及第 一、第二介質層23、24全面覆蓋，如第九圖（D)所示，且 該凸塊下金屬層25表面相對於該第二介電層之第一粗糙 表面242處並形成有第三粗链表面251。 步驟e :以光阻塗佈、曝光、顯影、.電鍍及去光阻之 製程於凸塊下金屬層25上形成重配置焊墊26,如第九圖 (E)所示，使該第二介電層24上形成與焊墊22連接之重 配置焊墊26，該重配置焊墊26並由該焊墊22上方延伸 至第一、第三粗糙表面242、251處，使該重配置焊墊26 表面相對於該第一、第三粗糙表面242、251處並形成有 第二粗糙表面261，且該重配置焊墊26係與部份凸塊下 金屬層25重疊。 10 200924086 步驟g.利用光阻塗佈、曝光、顯影及姓刻之 =重：置燁墊26重疊之部份凸塊下金屬層去除，再 &以光阻去除製程’則完成重配置谭塾之結構，如第五 所不；當然若步驟c中之灰階區段42若為全面 θ 如第十-圖⑷所示，則該第二介電層24 成：面 :之第-粗越表面⑽，如第十-圖⑻所示，而;;： fit後績製程後’則完成如第七圖所示之重配置焊墊 〃 1層24與凸塊下金屬層25接觸面皆為 粗糙表面，亦可增加接合強度。 本發明相較於習有技術係具有下列優點： 卜本發明於第二介電層成型時，藉由單一光罩一^ :=，則可同時成型第二介電層以及第二介電層上： 粗糙表面，不僅節省製造工時亦可節省成本。 2、 各粗糙表面可增加各層（第二介電層、凸塊下金 層以及電鍍金屬層）疊合間之接合強度。 3、 於構裝接合時，㈣置焊墊上之粗輪表面可增加 '者之接觸面積，進而.加強魏置焊墊與導電膠之接 重配綱從第二介電層剝離，或構裝接：所 使用的h膠從重配置焊墊表面剝離 保可靠度有效降低不良率。 ^以及確 i、:構料合時，重配置焊墊上的粗録面可增加 電膠的接觸面積，降低導電膠與重配置焊墊之 抗’改善構裝電性。 本發明之技術内容及技術特點巳揭示如上，然而熟悉 200924086 本項技術之人士仍可能基於本發明之揭示而作各種不背 離本案發明精神之替換及修飾。因此，本發明之保護範圍 應不限於實施例所揭示者，而應包括各種不背離本發明之 替換及修飾，並為以下之申請專利範圍所涵蓋。 【圖式簡單說明】 第一圖為一般焊墊於積體電路元件上之結構示意圖。 第二圖（A)〜（C)係為習有重配置焊墊於積體電路元件上 之結構示意圖。 第三圖（A)〜（C)係為習有重配置焊墊成型於積體電路元 件上之流程結構示意圖。 第四圖（A)〜（C)係為習有積體電路元件與電子元件接合 之使用狀態示意圖。 第五圖係為本發明中重配置焊墊於積體電路元件上之結 構示意圖。 第六圖係為本發明中重配置焊墊於積體電路元件上之另 一結構示意圖。 第七圖係為本發明中各粗糙表面之結構放大示意圖。 第八圖係為本發明中積體電路元件與電子元件接合之使 用狀態示意圖。 第九圖（A)〜（E)係為本發明中重配置焊墊成型於積體電 路元件上之流程結構示意圖。 第十圖係為本發明中重配置焊墊成型於積體電路元件上 之步驟示意圖。 12 200924086 第十一圖（A)〜（B)係為本發明中第二介質層成型於積體 電路元件上之步驟不意圖。 【主要元件代表符號說明】 凹槽A 第二窗口 241 積體電路元件11 第一粗链表面242 焊墊12 凸塊下金屬層25 第一介電層13 第三粗糙表面251 重配置焊墊14 重配置焊墊26 第二介質層15 第二粗链表面261 第二窗口 151 電子元件3 凸塊下金屬層16 導電膠31 積體電路元件21 光罩4 焊墊22 開口 41 第一介電層23 灰階區段42 第一窗口 231 透光區421 第二介電層24 不透光區422 1323 I f 21 is provided with a first dielectric layer 23 having a first opening '丨冤增22'. The thief mouth 231 may expose the pad. Step b: In the integrated circuit component 2 _ As shown in the ninth figure (8), in this embodiment, an electric layer 24 may be applied to cure or harden the second dielectric layer. The soil finish is completed, and 200924086, step c: providing a reticle 4 having a plurality of openings 41 opposite the pads 22, and the reticle 4 is provided with a plurality of grayscale segments 42, the gray scale Section 42 includes a plurality of light transmissive regions 421 and opaque regions 422 defining the depth and shape of the rough surface pattern by the pattern size, shape, arrangement, and pattern density of the gray scale segments 42. Step d: performing exposure and development processes on the mask 4 such that the second dielectric layer 24 is formed with a second window 241 with respect to the opening 41 of the mask 4, and is formed first with respect to the gray-scale section 42. The rough sugar surface 242, as shown in the ninth (C), is implemented as shown, the first rough surface 242 comprising a plurality of discrete cavities or grooves A that are periodically arranged and recessed into the surface. Step f: forming a sub-bump metal layer 25 on the second dielectric layer 24 by using a physical vapor deposition technique, wherein the under bump metal layer 25 may be undefined by using a sputtering technique or an evaporation technique. The pad 22 and the first and second dielectric layers 23, 24 are completely covered, as shown in FIG. 9D, and the surface of the under bump metal layer 25 is opposite to the first rough surface 242 of the second dielectric layer. A third thick chain surface 251 is formed and formed. Step e: forming a relocation pad 26 on the under bump metal layer 25 by a photoresist coating, exposure, development, plating, and photoresist removal process, as shown in FIG. 9(E), making the second A reconfigurable bonding pad 26 is formed on the dielectric layer 24, and the reconfigurable bonding pad 26 extends from the upper surface of the bonding pad 22 to the first and third rough surfaces 242, 251 to make the relocation soldering A second rough surface 261 is formed on the surface of the pad 26 opposite to the first and third rough surfaces 242, 251, and the reposition pad 26 is overlapped with the partial under bump metal layer 25. 10 200924086 Step g. Using photoresist coating, exposure, development and surname = weight: the metal layer under the bumps overlapped by the pad 26 is removed, and the process is removed by the photoresist removal process. The structure of the crucible, as in the fifth, is not; of course, if the gray-scale section 42 in step c is full θ as shown in the tenth-figure (4), the second dielectric layer 24 is: surface: the first-thick The more surface (10), as shown in the tenth-figure (8), and;;: after the post-production process, the re-arranged pad 如 as shown in the seventh figure is completed, and the contact surface between the 1 layer 24 and the under bump metal layer 25 is For rough surfaces, joint strength can also be increased. Compared with the prior art, the present invention has the following advantages: When the second dielectric layer is formed, the second dielectric layer and the second dielectric layer can be simultaneously formed by a single mask. Top: Rough surface not only saves manufacturing man-hours but also saves costs. 2. Each rough surface can increase the joint strength between the layers (the second dielectric layer, the under bump metal layer and the plated metal layer). 3. When the structure is joined, (4) the surface of the thick wheel on the soldering pad can increase the contact area of the person, and further strengthen the bonding of the soldering pad and the conductive adhesive from the second dielectric layer, or the structure Connection: The h glue used is peeled off from the surface of the relocation pad to ensure reliability and effectively reduce the defect rate. ^ And indeed i,: When the materials are combined, re-arranging the coarse recording surface on the soldering pad can increase the contact area of the electro-glue and reduce the resistance of the conductive adhesive and the re-configured soldering pad to improve the electrical properties of the package. The technical content and technical features of the present invention are disclosed above, but those skilled in the art will be able to make various substitutions and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should be construed as being limited by the scope of the appended claims. [Simple description of the drawing] The first figure shows the structure of a general pad on an integrated circuit component. The second figures (A) to (C) are schematic views of the conventional reconfigurable pads on the integrated circuit components. The third figure (A) to (C) are schematic diagrams showing the flow structure of the conventional reconfigurable pad formed on the integrated circuit component. The fourth diagrams (A) to (C) are schematic diagrams showing the state of use of the integrated circuit component and the electronic component. The fifth figure is a schematic view showing the structure of the relocation pad on the integrated circuit component in the present invention. Fig. 6 is a schematic view showing another structure of the reconfigurable pad on the integrated circuit component in the present invention. The seventh figure is an enlarged schematic view of the structure of each rough surface in the present invention. The eighth diagram is a schematic view showing the state in which the integrated circuit component and the electronic component are joined in the present invention. The ninth drawings (A) to (E) are schematic diagrams showing the flow structure of the relocation pad formed on the integrated circuit component in the present invention. The tenth figure is a schematic view showing the steps of forming the relocation pad on the integrated circuit component in the present invention. 12 200924086 The eleventh drawings (A) to (B) are not intended to be a step of molding the second dielectric layer on the integrated circuit component in the present invention. [Description of main component representative symbols] Groove A second window 241 integrated circuit component 11 first thick chain surface 242 pad 12 under bump metal layer 25 first dielectric layer 13 third rough surface 251 reposition pad 14 Reconfiguration pad 26 second dielectric layer 15 second thick chain surface 261 second window 151 electronic component 3 under bump metal layer 16 conductive paste 31 integrated circuit component 21 photomask 4 pad 22 opening 41 first dielectric layer 23 gray scale section 42 first window 231 light transmissive area 421 second dielectric layer 24 opaque area 422 13