TW200917256A - Using various flash memory cells to build USB data flash cards with multiple partitions and autorun function - Google Patents

Abstract

An electronic data flash card includes a processor and at least one flash memory device. The flash memory is partitioned such that it includes a first partition that is formatted using a file system that supports an Autorun function (e.g., CD-ROM file system (CDFS) format, fixed-disk format or Universal Disk Format (UDF)), and a disk partition that is formatted using a typical controller-based flash device file system (e.g., 16-bit File Allocation Table (FAT16) file system, 32-bit FAT (FAT32) file system, or New Technology File System (NTFS)). The electronic data flash card is produced such that Autorun-enabled application automatically executes a predetermined application or action when the electronic data flash card is installed in a host system.In one embodiment, the Autorun application includes an advertisement displayed on the host system prior to allowing access to data stored in the disk partition.

Description

200917256 IX. INSTRUCTIONS: This application is a continuation of the U.S. patent "Only a multi-partition and auto-execute function of a universal serial bus electronic data flash memory card" for the February 5th application of the Li Nian. (CIP) 'This is the cover of the United States Patent No. 11/466,759, which is filed on August 23, 2006. The continuation of the controller" and the US patent No. 759, which is the system and method for the production of memory on February 26, Application No. 10/789,333, has been abandoned. The application of the present invention is also related to the "Integrated Circuit Card with Fingerprint Verification Function" and the Year of the Lions, 6th, 547, (10) of the Patent No. 9/366,976 of the August 4th of the Qing Dynasty. Towels, Application No. _6,976, and Patent Certificate No. 7,257,714 are related to "electronic data storage media with fingerprint verification function". All of the above patent combinations are hereby incorporated below. [Technical Field] The present invention relates to an electronic data flash memory card, and a special type of flash memory system in an electronic data flash memory card. [Prior Art] Confidential data files are often stored on a floppy disk or entered via a network password, or encrypted and encoded to ensure security. Secure documents are attached with a security stamp and a stamp is left during transmission. Encryption codes, security stamps and imprints may be cracked, making confidential data files and files exposed to dangers. Therefore, it is necessary to solve the problem of unauthorized access to confidential information. With the evolution of flash memory technology, traditional magnetic disks used as storage media in portable mobile systems have been replaced by flash memory. 'Flash memory and soft disk compared with magnetic disk 200917256 2 has the advantages of hybrid resistance, low discrimination, and the small size entity of Langjipu is more beneficial to the side of the mobile system. As a result, the trend of flash-based recording has grown with its threatening (4) mobile system and low power consumption. Universal Serial Bus Electronic Data Flash Memory Card is a portable, low-power device that uses the universal serial "Cong (Cong) technology as a host computer and - flash memory card between flash memory devices) Interface, universal serial bus electronic data flash memory card has a variety of application forms, such as brush cans, MP3 position, in each form, the general application of the bus electronic data flash memory card contains - flash memory Device, processor, and interface circuit of a universal serial bus. Universal serial bus flash memory devices are popular in storing data. Traditional universal serial bus flash memory devices can only store data, but their popularity is that they are portable, easy to delete and easy to format. However, the traditional communication "column flash memory device has a potential problem" because it is easy to delete and format, it may not be shouted - delete or formatted - therefore, the bus bar flash memory device - For transferring data, rather than for permanent storage, the data stored in the universal serial bus flash memory device is generally backed up elsewhere, such as a hard disk. In view of this, the present invention is directed to the above-mentioned technology. In comparison, it is proposed that the system will be multi-layered and self-contained. It has multiple pivots and self-purity. The ship's data is flashing. The card is 'elastic, safe, simple, cost-effective and can exist. The technology is effective to overcome the above problems. [Description of the Invention] An embodiment of the present invention indicates an electronic data flash memory card, including a flash memory device 200917256, an optical finger field , -Continuous interface circuit and processing unit 'This electronic data fast memory card is suitable for accessing the terminal host computer, such as personal computer, notebook computer or other electronic main fiber set' (4) electronic secrets Carrying and coffee, (4) can encrypt the personal information into a _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ : Miscellaneous_memory card, a format similar to the formatted hard disk format technology divides the flash memory unit of the flash memory into at least one sub-division, including - since the pure line Wei ((4) - Aut_.inf峨 - Placing an application to a job file, _ should be _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ , automatic implementation of the sub-system - continuous or promote the function system from the pure line function (4) such as the 磾 磾 read memory (CD side postal, coffee S) or universal file

)) to format, and the disk partition is formatted using a typical data storage (for example, 16-bit rights) and a 32-bit book (Ff technical file (News)). . In the implementation of the financial, the end user profit method access from the domain Mei m, _ _ _ run (four) Ke to access. A further invention of the invention - implementation of the financial, #电子杂_memory card and the host computer to establish a communication link, the electronic (four) pin is pure, and the age of the bank to save money (for example, he is a soft application The program, the second Wei Wei line of the software care); in the initialization is completed (completed in the split example) 彳 软 soft coffee material, tender fiber touch - "standard" 200917256, including one of the following three modes : A programming mode, flash memory controller start input / output interface shirt wire from the domain failure - fine money _ stored in the disk knife should be, - shell material recovery mode, flash memory body control (four) from the disk The sub-long read data file 'starts the input/output interface circuit to transmit the building data to the host computer; and a data reset mode' to eliminate the data file from the disk. In an embodiment of the present invention, the flash memory device is divided into two or more partitions including automatic execution of partitions and disk partitions, and the present invention provides an enhanced electronic data flash memory card. It can help the operation of flash memory cards with only a single partition. The details of the present invention, the technical valley, the characteristics and the effects achieved by the present invention are explained in detail below by way of specific examples. [Embodiment] The embodiment of the present invention is for improving the method for manufacturing the flash drive needle, although the actual compensation of the present invention is described below, the invention is supplemented by the electronic flash needle. The new way allows Xiao to manufacture a variety of non-electronic, _ memory cards, including but not limited to peripheral components interconnect bus (PCI-Express, PCIE), Secure Digital (SD), memory stick (memory Stick, MS), compact flash (CF), integrated drive electronics (integratecj Drive Electronics, IDE) and a series of high-tech configuration (SATA) flash memory cards. These applications can be applied to a variety of Vertical-Helical-Scan (VHS) and Digital-Versatile-Disk (DVD) formats to automatically play media content on them, regardless of whether the autoplay device is plugged into the host. In addition, it can meet the same functions as today's mainstream media carrier. In the following description, several details are set forth to provide a more detailed description of embodiments of the present invention, however, for those skilled in the art, the specific implementation of the present invention requires that these details I7 be consistent. Other well-known structures and devices will be presented in a block diagram to avoid obscuring embodiments of the present invention. References in this specification to "a" ("g" embodiment" or "an" embodiment mean one of the specific examples in which the particular Wei, structure, or characteristic of the _ link is present in the present invention. The word 'in an embodiment' appears in the specification of the document - the word does not necessarily refer to the same embodiment. Referring to FIG. 1(A), according to the embodiment of the present invention, an electronic data flash memory card 1 can be transmitted by an external (host) computer 9 through an interface bus 13 or a memory card reader (Fig. (not shown) or other interface mechanism (not shown) for reading, and includes a card body 丨, processing unit 2, one or more flash memory devices 3, a non-essential fingerprint sensor (security device 4, an output/input interface circuit 5, a non-essential display unit 6, a non-essential power source (such as a battery) 7 and a non-essential function button group 8. The flash memory device 3 is disposed on the card body 1 and stores a reference fingerprint data recorded by a fingerprint including a data file, a reference method, a code, and a transmission permitting access to a remote data right holder in a specific manner. . For example, the data standard may be a photo standard or a text file as shown later, and the flash memory device 3 also includes an activation code and a control code. The fingerprint sensor 4 is disposed on the card body 1 to scan the fingerprint of the user of the electronic data flash memory card to generate fingerprint scanning data. One embodiment of the fingerprint sensor 4 used in the present invention has been related to the prior patent. No. 6,547,130 "Integrated power with fingerprint verification function 200917256 road card" _, Butterfly (10) er er. The incremental fingerprint sensor includes a scan wafer _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ One line will use horizontal scanning and will also be scanned vertically. The first logical signal generated by each scanning chip is based on the ridge of the gamma main body, and the second logical signal is held according to the card body. The depression of the human fingerprint. The input/output interface circuit 5 is disposed on the card, and can be used to establish communication with the host computer 9 in an appropriate manner by using a pin or a memory card reader through the interface bus 13, in the embodiment 'input /Output interface circuit 5 includes the circuit and control logic of the universal contention bus (Qing), PC Memory Card International Association (Pe job al computer Mem〇ry (5), such as with PCMCIA) and RS232 interface structure, which can be connected or plugged in The lion corresponding to the host computer. In the other, the input/output interface circuit 5 can include a secure digital (SD) interface circuit, a multimedia card (mmc) interface circuit, a small flash memory (cf) interface circuit, and a memory stick (MS) interface. a circuit, a peripheral component interconnect bus (pci_Express) interface circuit, an integrated driver electronics (IDE) interface circuit, and a series of high-tech configuration (sata) interface circuits that interface with the host computer 9 through an interface bus 13 or The memory card reader is interfaced. The processing unit 2 is disposed on the card body and is connected to the memory device 3, the fingerprint sensor 4, and the output/input interface circuit 5 through a relatively small number of conductors or lines exposed on the card body 1. In one embodiment, 'Intel's available as an example, processing unit 2 is a microprocessor of 8051, 8052, and 80286, and in another embodiment, processing unit 2 200917256 includes - Side, circle or other digital signal processor, in view of the aspect of the present invention, the processing unit 2 is controlled by a program stored in the flash memory device 3, such that the processing unit 2 is a secret program: (1) complement, At this time, the processing unit a activates the output/input interface circuit 5 to receive data files, start code data, control code data, and non-finger objects from the host computer 9, and to make them magnetically resistant. The tangible format can be used to increase the storage capacity of the sewing device. (2) Reset mode, in which the indignant handle and the control code are read from the (4) recording device and used to set and control the processing. Unit 2; (1) data receiving mode, in which the processing unit reads the fingerprint scanning data from the fingerprint sensor 4, and performs at least one segment fingerprint reference flash with the flash memory device 3 to verify the electricity payment. Dust flashing needle Authorization access _ _ (4) « 3 (four) 鹋, blood - once verified that the user can authorize access to the data store stored in the flash memory device 3, the output / input interface circuit 5 will be activated to transmit the surface (4) __ mode, where the memory device 3 _ boot code data and control code data will be upgraded; (5) data reset mode in this mode data file and fingerprint reference data will be from the memory device 3 in the erasing, during the operation process, the host computer 9 through the memory card reader or interface with the U in the fiber / input interface circuit ^ button out the field Wei request Wei Zi __ memory card π on the processing unit 2, It then uses a flash memory controller (not shown) to read and/or write to the corresponding one or more flash memory devices 3, to implement the money, but to detect the memory. In the body device 3, the X-stored data file and the fingerprint reference data are all secreted, and the processing unit 2 automatically initializes the data reset mode operation. 200917256 〇52 and 8〇286 processors are developed by Intel Corporation. Microprocessors that use complex instruction sets The 8051 and 8052 microprocessors have an eight-bit data bus, while the 80286 has a 16-bit data bus. RISC 'ARM and MIPS are microprocessors that use a reduced instruction set architecture. Widely used for the low cost application of Lin, the device can be used for the application of the South speed / still performance, (10) 匸, and the processor is the cost _ micro processing H, Shi Lin more complex _ Gu is the advanced error correction code (E(6) and data encryption. The non-essential power source 7 is placed on the card body , and connected to the processing unit 2 and other related units on the card body 1 to provide the required power. Non-essential function key group 8 setting On the card body ,, connected to the processing unit 2 and can initialize the operation of the wire, data receiving, code upgrade and data reset mode selected by the processing unit 2, and the Weichi 8 can provide the processing unit 2 password. In the operation of the input, the processing of the single 7L 2 will transfer the person's password and the password of the side note device 3 will be mutually collocated. Once the input password is matched with the reference password, the authorized electronic data flash memory card will be initialized. 10 Operation. The non-essential display unit 6 is disposed on the card body i and is connected to the processing unit 2, and the processing unit 2 controls the exchange of the printer program with the domain computer 9 and displays the operation state of the electronic data flash memory card 10. Next, the part of (4) is m, the electronic surface, the _ card has a small volume and large storage capacity 'so it can make the data transmission more convenient; second, because everyone has a unique fingerprint, the electronic data flash memory The card only allows the _ person to access the 12 200917256 data file stored in it, thus also increasing security. Additional features and advantages of the present invention will be described later. Figure 1(B) is a block diagram of an electronic data flash memory card 10A according to another embodiment of the present invention, wherein the fingerprint sensor is replaced by a _ induction sheet with A, and the available sensor The unit contains a visual (mesh) sweep (four) or a rhythm device that authorizes the transfer of wealth. These operations are similar to the behavior described in the Energy Range of the Reference 0. Figure 1(c) Shown from the more detailed part of the processing unit in Figure 1 (8), the electronic data flash memory card contains a power conditioner 22 for providing one or more power supplies. The power supply is different according to the different power requirements of each unit. The voltage is given to the processing unit μ and other electronic data flash 8 recall card 10A related units. Capacitors (not shown) may be required to increase the power supply. The electronic data flash memory card check includes - reset circuit 23 to provide a reset signal to the processing - the power module is turned on - the reset circuit 23 is inserted - the reset signal For all units, after the internal voltage reaches a stable level, the reset signal will be released. The resistors and capacitors (not shown) are used to provide sufficient reset timing adjustment. The electronic (4) flash memory card also A quartz crystal oscillator (not shown) is included to provide a standard frequency to the pLL of a processing unit 2a. According to an embodiment of the present month, the output/input interface circuit is integrated from the reset circuit u and the power regulator 22 and/or partially integrated in the processing unit, and a highly integrated overall reduction in the requirements of the Weikong coffee , _ degrees and / or manufacturing costs. _ and cost reduction are the key elements of the removal of the electronic data (4) memory card as described here. The modern integrated circuit package can integrate a plurality of integrated circuit components of different technologies and materials into an integrated circuit package. 13 200917256 Inside, for example, the output/input interface circuit is an analog and digital mixing circuit that can be t σ to a multichip package, reset circuit and power supply adjustment. Interview with the new shirt to the township (Multi-Chip kage) &> fs integrated circuit technology (si_ ic) the nature of the hybrid integration _ with digital, shame - crane degree integration (10) - ground input / Output) One-sided circuit, flash memory body control (four), reset circuit and electrical measurement processing unit are integrated into one chip. FIG. KD) is a block diagram of an electronic data flash memory card side according to another embodiment of the present invention. 'Electronic data (4) Memory card 1GB removal minus induction ^ and its related system authentication program, electronic asset withdrawal flash Ail card It also includes the processing unit 2B, which integrates the input and output flash memory control (4), thereby reducing the cost, the output/input interface circuit and the information including a transmission pure block, a sequence interface engine block, a data buffer, and a register. And the interrupt logic 'output/input interface circuit 5B is connected to an internal bus bar to allow the components of the plurality of output/input channels 5B to communicate with the _book control chip 21, the flash memory controller ^ ^ a microprocessor Unit, read-only memory, random access memory, flash memory control logic, error correction code logic, and general input-input (Gpi) logic. In the embodiment, the general-purpose output/input is connected to a plurality of Light-emitting diodes are used to indicate power status, read/write flash memory activity, and other output/input devices. The memory control unit 21 is connected to one or more flash memory devices 3B. - Manufacturing/testing system or user system of group function key group 8B' When the electronic flash memory card 1GB is operated, the function key group is connected to the processing unit 2B through the interface bus 200917256 I5; when the host computer 9B is one When manufacturing/testing the system, the function key group 8B is used to select and set the electronic data flash memory card 1〇B to the format/test mode and the program upgrade mode, while the field host computer 9B is the manufacturing/test system, and the function key group 8B is used. In order to select the setting of electronic data, quick release, manual writing (subtraction) mode, access mode and data reset mode, Wei key group can also provide input password when giving the domain computer pocket as authorization to enter format. /test or code update mode (such as entering the manufacturer definition key %, or authorizing access to security data (such as entering a user-defined password). The processing unit makes a comparison of the input password and the reference stored in (4) the note device 3B The password, and #Verify the input _ to match the reference password, initialize the operation of the authorized electronic data flash memory card 1 〇 B. When operating through the interface bus or memory card reader, the host The computer pocket includes a display unit guilty connected to be connected to the processing unit 2B, and the display unit arbitrarily displays the data slot and exchanges with the host computer 9B 'Lai _ _ _ _ _ memory card operation state, in addition to 'below Hui Lin will show the unit 6 at the time, _ the helper _ rotten memory card · control and then automatically display - then advertising or when the electronic data flash memory card is manually connected to the host computer 9B when displaying additional information and other additional details In the embodiment of the present invention, the processing unit 2B includes a flash memory type algorithm to automatically test whether the flash memory is supported by the flash memory logic, and has a flash memory with this smart algorithm. The above-mentioned related traits of the body control are disclosed in the full text of the "Six-side memory card flash memory controller" in the United States, such as the Shen Weizhong in the Shenjing. 15 200917256 mouth-like flash memory The system architecture of the system includes a fast memory control with a processor, read-only memory and random access memory, where the startup code and control code are stored in the read-only memory as read-only Memory code, but the power supply is simple, the job will get the startup code record line, start the program to her secret components and control the gamma code to random access to the German body, - control the code thief system random Access memory will improve the control system' control code contains one or more drivers to run the benchmark work, for example, control and configuration of the dragon, light age, first control, control and input Etc., the control code also contains - recording flash memory type side algorithm and fast memory parameter data i read the ship is a kind of only can read the clock, after the quick training (four) design is completed Entering production, the hard-to-play aging code is written and can't be changed to support the new flash memory that was released in the market. In this case, it must be continuously developed - a new type of flash memory The controller supports new flash memory, which will be very costly and time consuming. According to the embodiment of the present invention, the flash memory device 3B includes a reserved space such as a pre-mosquito memory block, a boot code _starter code 3u, and a control code 31B 'when activated, the flash memory is activated. The controller 21 uses the boot code stored in the read-only memory of the controller to read the dynamic boot code 31A and the control program code to the main memory 'after the flash memory controller 21 is used for the dynamic boot program. The code and control code 31B start and control operations, by storing in the reserved space 31 - part of the flash memory controller 21 will make the handle and the control handle, _ sister in the _ slimming controller Read the face towel 'start-up code and control code can be (4) upgrade immediately, # to replace the 200917256 flash memory controller, and control (four) of the track-only memory size can be minimized. The technique for the "Floating Alt" in the Quick Hidden Card, including the storage start code and the control code, has been disclosed in the U.S. Patent Application No. 11/611,811, filed on Dec. 13, 2006. "Flash Memory Controller for Electronic Data Flash Memory Card". In addition, according to the present invention, the flash memory unit of the flash memory device 3B can divide two or more partitions by using a formatting technique similar to that used on a hard disk drive, wherein at least three automatic executions are performed. For the % of the cut area, it is formatted as a standard system for use as an Autorun function, such as a CD-ROM file system (CD R〇MFiieS sound (10), cd(8) or general file system (11*)嶋1 version of _, which), and at least - a partition of the disk partition formatted with a typical data storage file system, such as: W bit table configuration table (test

Allocation Table, FAT16) file system, 32-bit file configuration table (32 bit File Μ〇_〇η Τ -, FAT32) difficult system or New Technology File System (NTFS) 'Automatic execution partition %% included An Aut〇njn file 32a, when the electronic data flash memory card 10B is connected to the host computer 9B through the interface bus bar 5, it is executed by the flash memory controller 21, and one includes one or more The application script for the soft program will be executed in response to a call from the Aut〇mn inf file 32. About automatic execution The more detailed side operations will be explained later. The disk cage 33 contains data, which can be a public service badge that can be accessed without requiring a user to define a password, or a security material 33B that requires a password to access. 2 is a flow chart showing the operation of the simplified electronic data flash memory card 10B in the embodiment of the present invention, when the communication link between the electronic data flash memory card 1B and the host computer 9B is established 17 200917256 ( For example, when the electronic data flash memory card is inserted into the _ serial bus (USB) slot on the computer mainframe; the block 50 is the branch) 'electronic data flash memory card ι〇β power supply start And initialize the system operation, and establish a connection with the host computer 9 (block 52); next, the flash memory control 21 will be stored in the AUt〇run.inf view according to the age provided by the startup code 31Α3 From the instruction (such as executing the software application can or let the host computer Yang to execute the software application 32), the software should be executed after the initialization (in some cases, the whole end) 'fast 0 memory controller 21 enters a "normal" mode of operation in which the user can access the data stored on the disk partition 33 and/or write new data to the disk segment "33 (as in programming mode) Operation, flash memory in this mode The controller 21 starts the input/output interface circuit 5β from the host computer 9β to receive the data structure, and stores the capital to the disk Na 33; the object receiving mode, in this mode, the flash memory controller 21 __ 33 Wenglong _, fine _Continued_Circuit 5Β to transfer the data file to the host computer 9Β; and – a material reset mode in which the flash memory controller erases the _ case from the disk partition 33. By flash memory device, the partition is divided into 峨姆(4) containing self-meta η 娜娜娜33, and an embodiment of the present invention provides a kind of addition _ electronic data flash memory card can only have a single ^ area of the memory The card can't be _ 嶋, 举 来说 来说 , 举 举 举 举 举 举 举 电子 电子 电子 电子 电子 电子 电子 电子 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( The flash memory of the electronic ageing Shunqi turned to the screen. The Flash Memory Card manufactured by the Gene County Institute of Inventories can be used for more purposes, and more details will be described below. 200917256 FIG. 3 is a block diagram of an electronic data flash memory card according to a specific embodiment of the present invention, which will be referred to as a woven memory 2 (8), and the _memory line 2 (10) includes a transceiver 202, The fast memory controller 2〇4, the central processing unit (cpu), the read only memory 208, the flash memory 21〇, and a main memory 212. In this particular embodiment, the transceiver 202 is a general purpose Serial bus transceiver, note that the word flash memory represents one or more flash memory devices, and the flash memory control lion 4 is an embedded control and controls most of the read-only memory. 2〇8 of the central processor instructions provided by Wei Li, and / or stored in a predefined flash memory 21〇 section. In the present invention, the flash memory 21 is set during the initial formatting/testing operation to include the singular knives 214, 216, 218 'the specific number of partitions is not fixed and according to the particular application. The flash memory system uses multiple 214s to provide the rural function, and relies on the index 22〇 in the main memory 212 to access multiple partitions. These functions can include, for example, automatic execution of the bunker b. The storage of the concealed materials and the storage of the confidential data, the implementation of these multi-partitions 214 218, index 22 〇 and the extension of these embodiments will be described in detail later. During normal operation, the flash memory system 200 can be coupled to a user host 230, which can be a personal computer or a Macintosh personal computer, the user host 230 package s-user application 232 and A driver 234 executes a bulk only-transport (B〇T) protocol 236. In this particular embodiment, the driver 236 is a universal serial bus driver and can be accessed through an operating system such as a Windows operating system. 200917256 During the format/test mode operation, the flash memory system 2 can be connected to The manufacturer host 240, the manufacturer host 24 can be a personal computer with special wire hardware and software. In this particular embodiment, the towel manufacturer's domain 24G includes - the manufacturer's program (10) and the driver 244. Transport Protocol Move In this particular embodiment, the driver is moved to a universal serial bus driver. Before it is shipped to the user's hand, a parking/formatted flash memory system 200 is created. This format allows us to make (4) memory lines 2 (8) and divide the partitions 2M, 216, and 218 and To perform various functions, such as data storage and auto-execution functions, the driver 246 is a special driver (such as USBmfgsys), which can be used as a programming program. Batch limit pass 246 instructions _ in the flash memory 2_ programming reserved area. 4 is a detailed block diagram of a flash memory system 4 of the present invention, which can execute the flash memory system 2 of FIG. In general, the flash memory system includes a transceiver 402, a flash memory controller, a central processing (four) 6, a read only memory 408, a flash memory 410, and a main memory 412. The flash memory is configured to include multiple partitions 414, 416, and 418. The main memory 412 stores an index or address translation table 42. The address translation table 420 stores some flash memory related setting information. How many partitions are there and how they are formatted (e.g., CD-ROM or other), the address translation table 420 also allows the central processing unit 4 to access the multi-partition 4i4_4i8. Cutting area (MULTIPLEPARTTTTrw. In the embodiment of the invention, the partitioning function) has the function of different marking systems (such as structure or format) as an automatic execution of the manufacturer-defined automatic execution operation and a "general" 20 200917256 (user control) data access operation, multiple examples of non-structures such as CD file structure (c delete 'here (FATs), Saki Bay, touch element configuration (10) simple structure (Qing S), flap TM ❹ ❹ 分割 414 414 414 414 414 414 414 414 414 414 414 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Type sub-section 'The fourth (4) is the CD-ROM system (4) structure, the disc format allows the flash memory system to support the automatic execution function, the bottom will be described in detail - automatic processing function. It can also be referred to as a partitioning area, which can be divided into a disk partitioning area. The disk cutter D'm can use different file structures (for example, a 16-bit building configuration table, a % bit label = a configuration table or a new technical file). Recording system, etc.) and can be used as a general ___ way (such as Data storage). As a disk partition, this point can be set as a public partition and can be accessed without any conditions (if no password is required). Can also be referred to as partition 2) can also be divided into _ disk partitions, in this fortune '- a jujube pet can be set to open points or as an An Wang knife cut area right. For the sake of security, it allows the tool to be accessed via a password. The security lookup will be described in the W. The specific application is used to use different partition types and specific partitions. The number of zones. The flashback system, the system 4 also contains a logical unit number (1〇gic touch number, LUN) counter 430, a miscellaneous unit number type register 2 and - logical unit number reference address The scratchpad 434, the flash memory controller 4〇4 includes a manufacturer special instruction decoder 44〇, a disc-specific instruction small computer systems interface (SCSI) 21 200917256 decoder 442, a small computer System interface fixed magnetic The disc type instruction numerator and a small split computer system interface general instruction decoder 446. The logical unit number (LOGIC UNIT NUMBER, LUNIS, address sigma contains the f signal according to the qing yi yi body ^ central processor advises The address translation table 420 can be used to create and access a plurality of partitions 4M-418 in the flash memory. In more detail, in this case, the implementation of the financial, bit-transit logic unit number (four) should be divided The zone fear is related, and the logical material number is a unique-unidentified identification number, which is used in the small computer system interface bus to identify two different devices sharing the same bus. And when a logical unit number is in operation, 'there is a unit of remuneration county--a partition, which can be used for the diligence or multiple points', for example, a logical unit number can correspond to the first disc only read, and Can be used as a pure line of Wei, and the correction - mining unit number I to contact _ complement face cage, shoot private open and good cage. According to the special implementation, the type of the division and the division of each logical unit number __ will be different. The logical unit is compiled by the user's job title, each of which has different types of miscellaneous money storage, Wei's storage capacity and capacity identity class I-D or disk number (driveIetter), logical unit number reference address The register is like storing the address of each knife cutting area and the highest significant bit of the total capacity (fine _ ga, _: the value of the avatar ' logical unit number reference address register seems to be a non- The volatilization temporary storage of each feature "cutting area" corresponds to a logical unit number, which can be determined by the manufacturer program 22 200917256. The pre-programmed control information of the 512-bit flash memory is stored in the reserved area, The control information includes a logical unit number, a logical unit number type, a storage capacity, an identity, a non-volatile register storage capacity, a minute_information, etc., in a specific embodiment, a non-volatile register is stored. The capacity and per-partition information are stored in the reserved lion's first available space. Basically, the information of the reserved area of 45〇 needs to be programmed at the manufacturing location for initial setting. Or touch programming as a reply or _upgrade in a special embodiment, a backup of four control information in the reserved area (for copying, backup, etc.) for flash memory write before wiping In addition to (the coffee-(6) operation retains the two ratios" is determined by the manufacturer to reserve the ratio of the flash memory space to the total capacity of the flash memory. After the flash memory reserved area, there is a disc-only read The memory-based area, the memory space _ as a unique Wei block can be called a region (certificate s), the reserved area can have a region number (such as: _), and the CD-ROM only reads the memory-related address You can have another area number (for example, if the reserved space only occupies one area). When the disk storage area needs to be frequently read and written, the area number of the side link to the final entity bar (4) can be 帛At the beginning, it is set to mean read and write (weaHeveHng). However, the average read and write block can be reconfigured anywhere except (4)_ and the disc only read area. Hard-coded register 452 series In response to the user host, especially when the flash memory has not been programmed (completely empty), so a preset value in the enumeration descriptor (enumeration 23 200917256 descriptor) will be sent back to the user. Host. If the flash memory system has been programmed, a stylized value in the enumeration descriptor will be sent back instead of being sent back to the default value. The architecture of the flash memory system 400 uses bulk limit transfer communication. Protocol and control with 31-bit, Wei control information > command block wrap (c〇mmand bi〇ck wrapper, CIBW), manufacturing command 〇Fl, F2 material 'The special coding age is not listed in the small electric In the age interface instruction manual) or a common command block wrap block (c〇mmand w〇ck tapper command block) (such as small computer system interface query command) and a dedicated request logic number number-number command (such as the 43h instruction code) is decoded and transmitted to the flash memory controller for relative operation of the flash memory system. An end point 0 (endpoimo, EP0) 454 is dedicated to enumeration procedures (enumerati〇n pocess) and is programmed in the device descriptive payment field (device descript〇r heart (4) programming_packet size (such as 64 bytes), For the purpose of information transmission. End point 1 (EP1) 456 is a large number of input pipelines (bulk in as the host to read data from the flash memory system, end point 2 (Ep2) 458 is a large number of output pipelines (bulk- Out pipe) is used as a host to transfer data to the flash memory system. The size of the end point 1攸 and the end point 2 458 will change according to different specific applications (such as universal serial bus version 1.1 using 64 bit input' The general-purpose serial-synchronized version 2 G uses 512-bit tuples. 鳇 表 - - First Embodiment FIG. 5 is an example of a rotating wire 500 having four divided regions, which can be used to implement the third in the present invention. The index 22 of the graph or the address translation table 42 of the fourth graph, the logical table number 24 200917256 500, 502, 504, and 506 are included in the conversion table. The logical unit numbers 500, 502, 504, and 506 are also referred to as logic, respectively. Unit number 〇, logical unit number 1, logic list Meta number 2, logical unit number 3. In a particular embodiment, the disc-only memory partition is assigned to the logical unit number 〇5〇〇, and the window operating system gives the logical unit number 〇5(8) the highest priority' and displays Low disk label, logical unit numbers 502 through 506 are each assigned to a different partition 'The partition associated with logical unit number 5〇2 is password protected, and the partitions associated with logical unit numbers 5〇4 and 5〇6 The area is a public partition, and general access is also possible. In this example, two public partitions are very useful for data sorting. In operation, the address translation table 420 can have a logical unit number of 500-506. From the logical block address of the host to the block address, the logical unit numbers 5〇〇, 5〇2, 5〇4, and 5〇6 are respectively associated with the corresponding SRAM basic address. 51〇' 512, 5M, and 516, and respectively associated with the corresponding LBAblk 520, 522, 524, and 526. In general, the logical unit number··5〇6 and the LBAblk 520-526 are flashed by the flash memory device. Body used to calculate the physical area The address, lba toe 52〇-526 is placed in the base address of the logical element meta-address, and the LBAblk 520-526 is added to the basic address 516 to obtain the address. The only-value of the address translation, the only-value is the real pet block, which provides - the recording of the physical address of the flash to the control of the stomach access. The calculation of the green of the LBAblk will be discussed in the chapter on the -p. A)® and 6(B) are examples of the address conversion table 5〇〇 according to FIG. 5 in an embodiment of the present invention. Here, the total capacity of the flash memory is tens of millions of bits. There are 2K bytes per page. 'Each of the erasable blocks has 64 pages. The 6th (A) figure is applied to a bottle that is formatted as a CD-ROM. (In other words, each The handle is only 2K bytes, and the 6th (B) is applied to a formatted partition (in other words, there are 512 bits per disk segment). Tuple). In general, the logical unit number and logical block address are used by the flash memory device firmware to calculate the physical block address for accessing the physical block address. Referring to Figure 6(A), the value of the logical block address line 602 (LBAtbl) is formed by summing the logical block address basic address 604 and the LBAblk address 606, and the logical block address basic bit The address 604 is the same as the logical unit number base address. The LBAb|k address 606 is derived from the logical block address (CBWCB) 610 of an instruction block wrapper instruction block via LBLsb 608 (ie, the right bit is shifted by a specific number of bits). 'A cancelable block has 64 pages, which are shifted to the right by six bits. The physical block address paging address 612 has 2K bytes per page and is composed of two elements: PBAtbl 614 (corresponding result of the conversion table) and six bit offsets 616, and the PBAtbl table address 614 is a conversion. The corresponding result of the index from LBAtbl 602 of Table 420 (Fig. 4), offset 616 is provided by the lower six bits of the logical block address in the instruction block wrapper instruction block (CBWCB) 610. In this example, the least significant bit of the six-bit physical block address (ρβα^β) = six-bit LBA!^sb608. Please refer to Figure 6(B). The calculation of the value is similar to the calculation in Figure 6(A) except that the offset of LBAlsb is octet (since 512 bytes per segment exceeds the flash memory) 2K bytes per page), the six MSB most significant bits of LBLALS are connected with PBAtbl to form the physical block address of the flash memory, and the two LSB least significant bits of LBLsb are used to access more than each A 512-bit flash memory of 2K bytes. In this example, the six-bit pBALSB is equivalent to the most significant bit of the six bits in the octet LB ALSB. 26 200917256 In an embodiment of the present invention, the flash memory may have different size formats, such as a small format having a block size of 512 bytes per page and a 16K byte for each elimination block, large The format has a block size of 2 位 bytes per page and 128 κ bytes of each elimination block, the exact size will be determined according to different implementations. Next is an example of a large format flash memory to convert static random access memory. Fig. 7 is a flow chart showing an embodiment of a method for providing the conversion table 500 of Fig. 5 in the present invention. First, the flash memory system is initialized in step 7〇〇, and the flash memory controller determines the surface of the flash memory system flash, regardless of (4), · is a large format or a small format, and Decide how many bytes per page, how many pages per block, and how many bytes per block. The flash memory controller also reconstructs the conversion table 42 in the flash memory, and the device controller uses the physical address from the first block to the last block to perform the first page of each of the eliminated blocks. Read the 'Every reading' device controller will read the block-related information (such as LBA) stored in the alternate area of the next two bytes (or 512 bytes) next to the data area, device controller A valid LBatbl is then used as an index to the address translation table 420 and the corresponding physical address is stored. Next, 'receive a new instruction block wrap command block (CBWCB), and use the device controller to extract the message in step 702. For example, the message may include the required total transmission byte length, The instruction is a read or write instruction, a logical unit number, a starting logical block address, and the like. Next, in step 706, the basic address value LBAbase and the basic address size LBAsize are determined by the logical unit number. The total page size (page total, Page T〇tal) is calculated by dividing the total size by 27 200917256 how many bytes per page. Next, in step 7〇8, the RSbits value is based on the number of bytes per block and the page A of the logic block. The Rsb^ is counted as a small value (by shifting the logical block to the right by Rsbits). The bits are also used to calculate (3) the number of bits of the lower logical block address (RSbits). Next, the index of the conversion table LBattab| is calculated in step 710, and then the physical block address is calculated from the contents of the conversion table in step 712. Thereafter, in step 714, the flash memory is determined to be in a large or small format. If the flash memory is in a small format (5 丨 2 bytes per page), then in step 724, the device controller requires a five-bit device. The least significant bit of the physical block address is used as the page offset address. The five-bit 8-8 will be equal to the five-bit lbAlsb, or the LBAlsb equivalent to the two-bit 根据Balsb will be connected to the two "〇" on the right according to the page size of the logical block address. In this example, if the format of the flash memory is a large format (2K bytes per page), then it is determined that the logical block address page size is greater than 512 bytes or equal to 512 bytes, such as Step 716; if it is greater than 512 bytes in step 718, the six-bit PBAlsb value will be equal to the six-bit LBalsb value. In step 720, if less than 512 bytes, the page offset will be equal to the two least significant bits of LBAlsb and in step 722 the six bits PBAlsb will be equivalent to the six most significant bits of LBLSB. According to the logical format block address file format segment size 'flash memory controller requires six bits of pbalsb as the page offset address, six-bit PBAlsb will be equivalent to six bits of LBLsb or eight bits The six high-order elements of the LBAlsb. Next, as shown in step 726, the two lower bits in the octet LBAlsb are offset. 28 200917256 Next, in step 730, it is determined that the flash memory access operation is a read operation or a write operation. If the operation is a read operation, the data is read from the physical block address page in the dumping area. For the write operation, the 964 remuneration address or age is already used. If it has already been used, it will be in the address conversion table of the correct value. So - a new real cage block paging will be calculated based on the new pBA (5). If the pagination is not on the basis of the "steps", the Lai Langshi block is in the sub-page. Thereafter, the value of the total amount of paging defined in step 7〇6 is subtracted by one in step, and then step 742 determines whether this is the last page of the total amount of pages, and if it is the last page, in step 744, the instruction The block wrap instruction block (CBWCB) processing ends. If not, then in step 7, the mail towel will touch whether it is the last __page of the parent block. If ^, the physical block address page will be incremented in step 748, and the program will repeat from step 73. get on. If it is determined in step 746 that it is the last page of the block, LBAStb| will add - in step 75, and return to step 712 to repeat the entire process. The indexing is implemented in a conversion table with an absolute address system, which is only a preferred embodiment of the present invention and is not intended to limit the scope of the present invention. Therefore, any relevant index for the use of other systems in accordance with the features and spirit of the present invention is still within the scope of the present invention. SECOND EMBODIMENT Fig. 8 is a diagram showing a conversion table applied in another embodiment of the present invention. Each logical unit number (LUN) has an associated logical unit number code (LUNc〇de), which is a logical unit number calculated value concatenated with the standard structure and attributes, for example, a first logical unit The numbered reference address register 802 stores the value of the logical unit number 〇 (associated with a disc-only memory partition 29 200917256), having a logical unit number calculation value 〇, a CD-ROM memory file System (CD-ROM File System, CDFS) file structure, type 0 file system type, a public attribute and result in 〇〇 / 〇〇 / 〇 encoding; a second logical unit number reference address register 8 〇 4 The value of the storage logic unit number 1 (associated with a security partition), has a logical unit number calculation value 1, a 16-bit file configuration table (FAT16) file structure, _ 〇1 type file system type State, a security attribute and result in 01/01/1 encoding; a third logical unit number reference address register 806 that stores the value of another logical unit number i (associated with a secure partition) Also related to the public partition, so the logical unit number of the logical unit number is calculated as 1 'having a 16-bit file configuration table (FAT16) structure, a type 1 file system type, a security attribute, and Lead to the 01/01/1 code. In general, the 'logical unit number code is used to connect complex logical block addresses (LBAs) and generate corresponding complex physical address blocks (PBAs). The operating system faces the different logical unit numbers to generate the same logical block. The address is used to access the data. A single static up random access memory (SRAM) look up table can be used for all logical unit numbers. However, when the logical unit number is changed, a static program is used to reconstruct the static random access memory. The address conversion table in the middle is used as an access to the operating system. The index 810 of the address translation table is composed of logical unit number codes connecting logical block addresses, and the physical address block PBAtbl value is provided in the relation table. In this embodiment, the maximum value of the index number is 2048 (assuming that the flash memory is 256 Mbits); the copy of each physical block status page 812 contains the logical unit number code of the valid state, and the copy is stored in The flash memory reserved area 814 is used for firmware statistics. The paging of each block 816 in the physical flash memory is composed of data and 200917256 spare area. The spare area includes the logical unit number code of the host and Logical block address data. Figure 9 is a flow chart showing an embodiment of the method for establishing the conversion table 800 in Figure 8 of the present invention. Please refer to Figures 8 and 9 at the same time. In general, if the logical unit number changes, the contents of the conversion table overflow during each access, and then the conversion table is reconstructed. More specifically, first in step 904, the valid flag of all entries becomes invalid in the logical unit number change procedure, and invalidating the valid flag will cause the conversion table to overflow; then at step 904 The contents of the physical block status page 812 (Fig. 8) are read from the reserved area 814 of the flash memory, and the contents of the physical block status page 812 are then stored in the conversion table. For example, a logical unit number status section of a flash memory having a size of 256 million bytes (64 pages per block) has a total of 2K bytes, wherein each byte presents a corresponding one. The state of the physical block (logical unit number code, valid flag, and failure flag), when a logical unit number changes, a segment read action is generated. Connect the first byte to a physical block address, only a valid flag (equal to 丨) setting and match the logical unit number code will indicate a valid block status, and the failure flag represents the block data has been Expired, recycling is required to declare validity again. Next, in step 906, one of the entity blocks in the physical block status section is sequentially read.

'The physical block status section contains all the required

Whether the flag matches, step 912 determines whether the invalid flag meets the non-old state, and listens to the required physical area; then, in step 908, step 910 0 determines whether the valid step 914 determines 31 200917256 whether the logical unit number code matches If the determination is yes in steps 910 to 914, the physical address block (PBA) in the flash memory is used to define the logical block address (lba), and the physical address block and the logical block. Both addresses are used to reconstruct the conversion table, as described in step 916, and then, add the entity byte number 'if any of the valid flag, non-failed flag, and logical unit number code does not match' entity bit The group number will be incremented without updating the conversion table, as described in step 918; when the physical block ends as described in step 920, a new conversion table is completed in step 922 if the physical block status page has not been reached. At the end of 812, the process returns to step 908. This method supports the structure of multiple logical unit numbers and shares a single conversion table. Therefore, this method can support more types of operating systems than the Windows operating system. Manufacturer Utilitv Profyammir^, Figure 10 Flow chart of the method for programming the flash memory system of Figure 4 in the present invention, the flash memory button is sent to the end of the last _ Formatting, the manufacturer's tool programming side of the soft will be charmed, _ remember the system of silk, when the flash memory system is persuaded to program, the end user can not change the wire structure, or even use the window system The scale operation is purely formatted by flashing the Newton 4 (8). First, the manufacturer host is initialized in step 1〇〇2, and then the step is to load a general string to be pre-emptively driven by the universal serial bus. Program, this pre-test universal string 3 row of lion (four) domain special manufacturer instructions; return, transfer flash memory system to -_ host, 嶋 __ towel to carry out - _ order (__ process), 32 200917256 Descriptor field value), which is customized for each flash memory. For example, the serial number required for each flash memory device and each mass storage surface device must be different. In addition, the product identification code and version number are provided each time the firmware is updated. Then, in step 1012, it is confirmed that the dedicated integrated circuit is hard in the flash memory system, and the ASIC hard-coded ID is not met if the hard-coded identity of the dedicated integrated circuit does not match, as in step 1014. The software software will remove the flash memory system; if the dedicated integrated circuit is hard-coded, the identity is as described in the step secret, flashing, age-receiving, and reading the memory. Face and capacity, and send this information to the manufacturer's mainframe; this information can also be entered into the manufacturer's mainframe with bare hands. Next, in step 1018, the data in the flash memory is removed and the form to be written into the flash memory is pre-allocated. In the special implementation, only the block with the good flag is removed, and is not moved. Blocks that are or cannot be correctly written are marked as bad blocks, and these blocks are recorded in one of the bad block tables of the reserved area of the flash memory. Then, in step 1022, a percentage of the bad block is checked. The percentage is compared with a preset value of one of the preset programming or the user input; if the percentage is higher than the preset value, as in step 丨〇24 The flash memory system is removed; otherwise, if the percentage example is lower than the preset value or equal to the preset value, then as described in step 1026, the total physical capacity of the flash memory and a response ratio are determined. Then, as described in step 1028, an error correction code (ECC) is written in the flash memory by using a special manufacturing instruction, such as a check code of a reserved sector code (3), to indicate the entity. Address; whenever the reply segment code is updated to another empty reserved space, the firmware in the flash memory controller checks the error correction code and removes an expired copy. 33 200917256 Next, in step 1030, flash memory related information is written into the reserved area. The start-up program includes an operational time code' to place any code that does not directly relate to the initial activation of the control device in the flash memory device to reduce the size of the read-only memory in the control device. The enumeration field programmed value, such as the serial number and the product version number, and some partitions (such as capacity) are loaded at the same time, and the flash memory controller can recognize some special loading instructions. The value that the user cannot modify or remove is loaded in the reserved area of the flash memory. When accessing the reserved area, the control device embedding the dedicated integrated circuit body identification (ASIC ID) and writing the special password is checked; the operating time code is loaded into the reserved area, and when any errors or updated versions are found, This operational time code can be updated. In addition, a precaution is given to the operator of the manufacturer to indicate whether it is appropriate to use the LEDs in the test set. Further, as described in step 1032, determining the partition, capacity, media type, and complex logical unit number of the flash memory device, and in particular, determining the number of partitions according to the capacity, the media type, and the logical unit number associated with each partition. Each logical unit number. When the manufacturer's tool program determines the number of partitions, a user can no longer change or modify the number of partitions. Then, step 1034 defines the format of each partition in the formatted file system, including the CD-ROM File System (CDFS), the 16-bit file configuration table (FAT16), and the 32-bit building. Case configuration table (FAT32) and new technology file system (NewTechn(4) file system, NTFS). In the step hall, the partitions are formatted according to the format defined by the step position; the step wipes 'manufacturing station _, loading in each branch - partition table, classification _ listening capacity, this record is done For those who rely on the case of 34, 200917256. This device is formatted according to the manufacturer's operator's desire to define the structure of the case. For example, the 'π-bit building configuration table m-bit case configuration table/new technology file system is not for the computer user's - Select the volume of the secret device. If it exceeds the ig byte, the 32-bit configuration table is more suitable for the rider than the 6-bit file. In step 1〇38, the partition block record (partition blockrec〇rd, pBR), the duplicate of the two file configuration tables, and the root directory are preloaded to the end user. Then, step_execution-final read/write test (fmalna base (8), during the test period, the part allowed to be stored in the minute will be written and read to take care of its function. Any errors, the mine finance (four), the failure It will be marked as described in step 1040. Next, in step 1〇42, the portion of the partition that is allowed to be stored is cleared to a blank state, and step _ further determines whether the overall process is successful. If successful, the step uses a light-emitting diode. The f indicator will be successfully pointed out with a special flashing position. This light-emitting two "display is connected to - the unified material. # inserts the production of the aircraft, any unrecognized '_memory system; will not show another - Flash empire (or not _), such as whether the flash memory system has been programmed or tested. The implementation of a CD-ROM read-only memory segmentation _ which can support the self-machine, can make the associated file ^ said System characteristics 'When a piece of optical disc is inserted into the computer, the light media player is in the light/open-butter private-she style, she said, when the machine is inserted 1峨, the self-domain fine_ paste automatically starts 35 200917256 an installer or a Screen menu. Auto-execution function often appears in After inserting the magnetic disk or the optical disk of the window operating system into a computer. In the embodiment of the present invention, the automatic execution function utilizes an additional space configured by the flash memory handle body and combined with the hardware support emulation view (4). The CD-ROM only reads the characteristics of the memory. The f \ window operating system can support the disc-only memory type partition or fixed disk partition in the partition (-used for fixed disk or ZIPD) The automatic execution function of the present invention - the actual age wipes 'from the upper syllabus read only _ points Wei green line automatic execution function, the list is modified and informs the operating system that the flash memory device is no longer a movable shock but It can replace the CD-ROM only and the flash memory, the number of the M-control (four) towel read-only (4) is also modified so that the number of the read-only memory can support the automatic execution function. The fixed disk partition is like a fixed magnetic In another embodiment of the present invention, the auto-execution function can be performed by using - thus, and the auto-execution function _ is caged to be formatted by the disc partitioning area. The software's self-purity function does not need to apply any hardware changes to the flash memory system during execution. _, if the automatic execution file is stored in the - fixed disk partition, the automatic execution of Wei's job can be Deleted 'If the automatic execution machine has a handle, it can't be deleted. The automatic execution function is used to automatically execute a software program. In a special embodiment, the software program can provide advertising functions. For example, when the flash memory system is inserted into a user host 36 200917256, the 'self-pure function can be automatically reported to be in the limbs of the pepper-m (she spindle-advertising. This versatile program is more _ _' this ad The special _ lack (four) fixed response. ^ Features can also be configured as the end system can not remove the wide test software body arrogant body (four) work 2 is very intimate for the user, because electricity _ soft _ μ _ Line; object side version of Wei Jie image protection. The software program provides the privilege of accessing the host system, so the input software can be used to automatically perform the subscription. For example, if the flash memory device is inserted into the universal serial bus connection, the feature will be from the domain name. - Wheel people (4) Access information or resources in the host computer system 'If the user pulls the flash memory from the universal serial port ~ row of scales, the domain Wei will be locked. When the maker pastes the soft ship fine I cut (four) _ Huan Wei (secret set, the automatic execution feature can automatically execute the user profile software. For example, the user profile information can include the use of the network viewer option. Customization (such as bookmarks, default homepage), email settings, font settings, etc. Figure 11: Linfa County Manufacturer Money End Setup - Flowchart for Automating Function Steps Step 1102 in the Manufacturer Tools Tool ( Before programming is started, the mass storage drive is moved 37 200917256. In addition to 'the next step as shown in step 1104', a device descriptor is set to the single-configuration configuration, and a configuration configuration descriptor is then set as in step 1106. On a single interface, the interface descriptors are set as described in steps 11 and 8. These descriptors include an interface type (eg, a large number of storage categories), interface subclasses (eg, a small computer system interface transparent instruction set), and interface protocols (eg, batches). Limit transfer, bulk-only transport (BOT). Next, step 111 〇 set - first end point _ descriptor (such as batch entry, ―), then set the steps Definite-second end point descriptor (such as batch output, bulk-out), these two end points are required when performing batch input and output operations; then define the partition and logical unit number as described in step 11M; , send a large amount of storage and solicitation (such as obtaining the largest single-domain command, spider max_L嶋 delete the fine logic unit number in the flash memory system - default value, or - name for #员用_ manual test tool Enter the information by hand. Then perform the - elimination test and a write-read test in step ill6, define the ratio of the bad block and the reserved area, and download the retained information to the flash memory in step 1118, retaining the information. Including - serial number, - supplier, - product identification number, - city version, etc., in the standard operating mode enumeration program _ operating system driver can effectively access this information, and: storage type batch limit transmission and small computer interface Information such as system subclasses is returned to the manufacturer's host. Next, 'in step 1120, the partition capacity, multimedia type, file system type, and '亍 class are defined. w Each logical unit number partitioning area records the file structure information in the flash memory. - -OL program issued - special instructions (for example, to count the value; partition information stored in (4) remember the reservation for future (4) For reference, for example, the main block block 38 200917256 m C-terW〇clcrec〇rd, MBR). (parti,〇nb]〇ck ^ pfiR) and the file configuration table for each partition must be again Programming and storing in an operating system accessible area _. All executable files must be stored in - CD-ROM only to read the billion (4) system (cd_r〇m

System, CDFS) 峨 峨 辆 辆 敎 之 之 , , , , , , , , , , , , , , , , , , , , , , , , , , , , In the step of fat, the logical division of each logical partition is formatted, and the CD-ROM read-only memory file system (4) (8) image catalog is downloaded to the fast-moving, and the self-sufficiency of the ship's memory partition is as 'step 1124' Said. Figure 12 is a flow chart of the method for executing the self-domain method in the formula. In step 12〇2, when the user inserts the flash memory system into a user host, the operating system executes the string. A large number of storage locations are placed downstream; then steps are set in a single configuration configuration - device descriptors - configuration descriptors are set to a single interface, as in the step, and a plurality of interface descriptors are set in step 1208. These descriptors include an interface (such as a large number of storage surfaces), interface subclasses (such as a small computational sample interface transparent instruction set), and interface protocols (such as batch limit transmission, bulk_〇dy transp〇rt, Β〇τ ). Next, step (2) sets a first-end point descriptor (such as bulk entry, bulk-in), and then sets a second end point descriptor (such as batch output, bqin ut) in step 1212. The two end points are required for outputting the job. 'As well as the step 1214', a control end point (Ep〇) is defined, and in the step coffee, the maximum logical unit is returned. The following steps have a disc-only memory. After completing step 1210, if 39 200917256 and a disc-only memory partition are involved, then as described in step 1218, the user host issues a request to obtain the logical unit number type of the disc-only memory partition, and In step 122, the logical unit is programmed to be sent to the celestial domain towel; when the acknowledgment element number is positive 4, step 1222 reads the capacity of the optical disk read-only memory, and in step 1224 uses a small computer system interface. The CD-ROM read-only memory read command reads the data. The following steps are related to the complex disk partition except for the disc-only memory partition. After completing step Π16, if a disk cutting area other than the disc-only memory partition is involved, then as described in step 1226, the user host issues a request to obtain the logical single S number of the disk partition. Type 'and send the logical unit label type to the user host in step 1228; after confirming that the logical unit number is correct, step 123 reads the storage capacity of the disk partition, and in step 1232 the towel_(four) domain (4) Margin allocation—capacity identification (ν〇1_ID). The enumeration reads a string of values from the flash memory reserved space. Since the auto-execution function needs to be provided by the CD-ROM, the auto-execution feature will be executed at the same time. The user makes the standard disk type storage function available. Figure 13 is a flow chart of a method for starting a read-only memory (R〇M) in the present invention. First, in step 13〇2, a power-on reset operation is started. Then a flash memory is executed in the step test. The body ID (flash ID handshake __), such as the flash memory chip address 90h read command; then the step algae defines the characteristics of each flash memory chip, this information includes the page or segment size m amount 'Address structure, etc., the execution code image file of a flash memory device is available from the reserved area. 200917256 In step 1308, using the TLRa " in the reserved area to turn--"the address-physical position followed by her 3 2 call and ring, practice, poetry 1 such as the device domain to perform an enumeration procedure, in the implementation of the guide The program lies, the owner of the singer asks for the installation of "« and its _ saki special material pro; then cast 13 reserved area _ first programming _ re-display user in ΛΑ ΒΙ, Θ / 1, right - flash memory chip for The empty Wei 1 value, called the object, will allocate a new address to the (four) record billion ' and _ will record the new address of the ongoing program. In the case of step (10), the request for the flap request is re-supplied to a large number of stocks. The batch limit transmission is transmitted. (10) "ly t__OT". For example, the first value is the maximum logical unit number that is succeeded, and the correct value stored in the reserved space is Is replied to the user host, if the flash memory is empty, then return a preset value, such as 00h or at least one logical unit number 眛. Then in step (10), the command block wrap (command bbck wrapper , CBW) The query command has responded, because the number of points is known in advance, so after each of the points back to its eigenvalues, the logical unit will increase in value. The most batch of instructions will be a current logic. The unit is replaced by 'to store the main block record (MBR) or the partiti〇n block record (pBR) system file structure in the flash memory. The firmware provides a plurality of instruction blocks. Subprograms of the instructions are executed to execute different instructions, including reclaiming used blocks, etc., and as described in step 132, accepting instructions wrapped by the instruction block. Secure partition-safe partition and a public The partition shares the same logical unit number as a special implementation. 41 200917256 In the present invention, a security tool programming allows the security partition and a public partition to share the same flash-scratch token--the logical unit. According to this, accessing the data in this (4) domain does not need to distinguish between these points. In the "special implementation", each capacity volume (capacity vGlume) will change with the fixed total size capacity *, this part It can be achieved by using a programming program, which has the advantage that it makes the data storage more flexible. The first FIG. 4 is a flow chart of the method for setting a safety partition for manufacturing a test according to the present invention, first in step 1402. Apparently - initial capacity, then in the step 1 marriage to write a logical single τ, job code, - preset capacity, - default password and complex logic reference address register 'and then as described in step 1406' write security System headers such as a primary block record (MBR), a partitioned block record (PBR), or a file configuration table (FAT) of the partition. Figure 14A is an embodiment of a data block in a flash memory device of the present invention. Block diagram Please refer to the 14th item, the structure of the physical block, which shows how a secure partition and a public share share the same-dependent unit, but can be pasted and resolved and set in different real blocks. For the multi-layer unit (mu cell eve丨_,) flash memory, a block has a stomach of 128, and each page contains a data area of one byte and a 64-bit group. The dragon domain, in the -real patch, the page can be divided into thin sections, each section contains - 512 bytes of data area 1445 and a 16-byte spare area ΐ 446, 备用 the spare area of the byte 1446 is mainly used for error correction code protection i45i and wear-leveling. In Fig. 14A, the spare area of the 16-bit tuple has a byte as the error correction code n 3 bits_ as an average read and write, and this 3-bit group can record the logical block resource reduction error in order to To reduce the block for the security of the turtle or the public 42 200917256 partition 'requires the 3 bits of the scarf at least - the bit 1452 is defined as a branching specific flag, and the remaining 23 bits are used to define the logical area The sector address of the block address is 1453. In the figure, the four-bit parity check code 1454 is used as the protection 1452 and 1453, so even when the W logical unit number is used in the two partitions, the control relay can still correctly access the data according to the real block. Figure 15 is a flow chart of a method for operating a secure partition in a user mode. First, as described in step 1502, a password for one of the secure partitions is requested, and then a pre-stored logical unit number password is provided in step 15〇4. In order to comply with the request, and set the capacity of the secure partition in step 15〇6; in step 1508, write a logical unit number code, a capacity, a new update password, and a complex logical reference temporary storage area, when the power supply After the startup, the preset mode is the public mode, so in step 1510, a logical unit number code is set to the security mode; then in step 15i2, when the security partition and the public partition use different logical unit numbers, the user host The logical unit number of the secure partition is required, and in step 1514 the user partition reads the valley of the secure partition. Then, 'Step 1516 provides pre-stored logical unit number information, step 丨518 provides one of the secure partitions, the physical reference address, and step 152 〇 reads out the main block previously stored in the flash memory (MBR) ), partition block record (pbr) and audit configuration table (fat) negative sfl. When the secure partition and the public partition use the same logical unit number, the password protecting the secure partition can be shared with the public partition. When the flash memory system is booted up, a default public area will appear, requesting a security tool code and giving the correct password to activate the security function. There is a secure partition in one of the flash memory storage areas, which is loaded with a preset capacity by the manufacturer's utility program, and the manufacturer's host uses a special drive to format the boot, allowing the user to receive the flash memory. You can set your own personal format after the device. If the tool software 43 200917256 asks for a correct password, then an attribute register is set to allow the user to select the open partition or the secure partition. The player stores the new main block record ((4) phantom, partition block record (PBR) and file configuration table (FAT) values in the flash memory, and then the user can access the password-protected security material' - The system is based on the value of the miscellaneous test, so the previous public partition will be displayed. Therefore, the logical unit number code of the public partition will be stored again in the logical block address (LBA). At the time, the main secret will be removed from the pre-stored case. The formatting will be executed regardless of the capacity or difficult structure change, so the old data will be deleted and the new system will be loaded. Because of the iS chart There is no security mechanism when transferring passwords between the host and the device. The hacker can capture the password through logical analysis or bus analysis, so security protection is needed. The figure is the domain and flash memory device of the present invention. The flow link of the secure link material, as shown in the figure, 'when the power is turned on, the host and the device are both broken in the public partition mode, and the host sends out a security command containing the security byte group (ritybyte) to the In the device For example, step (10); security bit secret - pre-recorded public car, Na F = f (auth, dirty), where RGS is randomly generated seed. In step, the device receives this security byte 'And in step 1554, if the device successfully verifies the security byte, the device in step (5) 6 responds with another security byte, which is generated by another preset formula, such as G=G (AUTH). , RGS), when the host is restricted, the host and the device recognize each other. This program can be regarded as "authorization". When the payment is completed, the domain and device transmit the password that can be decoded to the security dragon. The password transmission (4) f is sent to the security byte generated by the G, F and the seed RGS with the 200917256 machine, so the byte on the bus bar between the host and the device is in random mode 'can avoid any hacker The test device can replace the step dirty in the figure b to improve the password. When the password is successfully transmitted and the password is randomly generated, the control device can continue as described in Figure 15. Go on. (4) And the secrets and methods, this one can provide many benefits, - for example, 'increasing its functionality can make the flash memory system more flexible, and the invention can make any-embedded control _ memory The card includes (4) body card (Muki_Media (5),), Secure Digital (SD), compact flash (c), flash memory (MS), memory stick (MS), peripheral component interconnect bus (PCI_Express , pcffi), integrated drive electronics (IDE) and - tandem high-tech configuration (SATA). The above disclosed system for executing a flash memory system includes a flash memory having multiple cut regions, the flash memory system package can provide multiple functions by using multiple partitions, including, for example, automatic execution functions. , non-secure data storage and secure data storage. While the invention has been described with respect to the specific embodiments, the embodiments of the invention may be applied to other embodiments. For example, when the above method and system are particularly general-purpose serial busbar devices, the spirit and scope of the present invention also includes busbar types of different interfaces, such as one or more peripheral component interconnecting busbars (PCI- Express, PCIE), Secure Digital (SD), memory stick (MS), compact flash memory (C), integrated drive electronics (IDE), and integrated drive electronics (IDE) Serial high-tech configuration (SATA) and so on. First 45 200917256 Some of the techniques described above are represented by algorithms and operating symbols of data bits in computer memory. The technology of data programs uses the description and representation of these algorithms to transmit their work in the most efficient manner. Substantially to other technical parts. The algorithm is generally used here as a self-consistent sequence for the job to produce the expected result. This job is the physical operation part of the number of required entities. Although it is usually not a necessary job, the quantity can be formed to be storable. Electrical or magnetic signals for transmission, merging, comparison, and other operations. In many ways, it can be proved that these signals are referred to as 'bits, values, elements, symbols, characters, _, numbers or other such signals. All of this and her and the number of appropriate entities generate coffee, and not only the convenience of the quantity mark, but this will cause a load of attention, it is quite obvious from the above discussion, unless the special state is excluded, Discuss the relationship, such as "program (solution) ("four") or "calculation (C〇_ting)" or "calculation (face-to-face or "displaying"", etc., refer to the actions and processes of computer systems or similar electronic computing devices 'The operation and conversion domain of the number of entities (electricity) in the scratchpad of the computer system and the memory. The real amount of the dragon is stored in the computer secret memory or the scratchpad or other information storage, transmission or The device of the present invention is embodied in a device of the present invention, and the scale can be specially configured according to requirements or can be selectively activated or reassembled by a computer program stored in a computer. This electric female presence exists in a storage medium that can be read, such as any type of magnetic disk, magnetic, outline, magnetic-optica, disk. ^ 46 200917256 Read Recalling, electronic programming, read-only memory, magnetic or optical cards, or any type of media suitable for storing electronic instructions, and can be connected to the -> system bus. The algorithms and displays described in the present invention are not It is not relevant to any other computer device, and the various programs can use the program described in this transmission, or prove that the invention can establish a more professional device to achieve the desired operation method. The demand structure of the diversified system will be In addition, 'the embodiment of the present invention does not specifically mention any programming language, as a plurality of programming languages can be used in the embodiments of the present invention. The machine readable medium (machine_readaWe medium) can be used. Including any mechanism that can store or transfer readable information using a machine (such as a computer), for example, - readable media including only memory; random access memory; magnetic disk storage media Optical storage media; flash memory; electronic, optical, acoustic or any other form of propagation signal (eg carrier waveform, infrared signal, The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Equivalent changes or modifications of the spirit are included in the scope of the patent application of the present invention. [Simplified Schematic] FIG. 1(A) is a block diagram of an embodiment of an electronic data flash memory card and a host system of the present invention. Figure 1(B) is a block diagram showing another embodiment of the electronic data flash memory card and the host system of the present invention. Figure 1(c) is a diagram showing the first (Β) of the present invention. A block diagram of an electronic data flash memory card. Fig. 1(D) is a block diagram showing another embodiment of a program unit used in an electronic data flash memory card in the present invention. A simple flow chart of the method of operation of the flash memory system in 1(D)S1. Figure 3 is a block diagram of another embodiment of a flash memory system in accordance with the present invention. Fig. 4 is a detailed block diagram of an embodiment of a flashing field of the present invention, which can execute the flash memory system of Fig. 3. Fig. 5 is a conversion table in the present invention, which can perform the index of Fig. 3 or the address conversion table of Fig. 4. The f 6 (A) diagram and the ‘the diagram are schematic diagrams of the exemplary succinct $ map address conversion table of the present invention. 7 to 7 and 7 to 2 are flowcharts showing a method of providing a conversion table in Fig. 5 of the present invention. Figures 8-1 and 8-2 show a spinning wire according to another embodiment of the present invention. Figure 9 is a flow chart of a special embodiment of the method for establishing the eighth towel conversion table of the present invention. Figure 10 is a flow chart showing the method of programming the flash memory system of Figure 4 in the present invention. Figure 11 is a flow chart of the method for automatically executing Wei on the host side of the manufacturer. $Figure is a flow chart of a method for performing an automatic execution function in a user mode in the present invention. f 13 ® is a flow chart of the method of the B-type start-up _ (R◦(4). V帛14® is a flow chart of the method for determining the safety of the manufacturing job. Figure 14A is the present invention A block diagram of an embodiment of a data block in a flash memory device. Figure I5 is a flow chart of a method for operating in a user mode - safe splitting. Figure 16 is a flash code of the present invention. The towel provides a flow chart of protection. [Main component symbol description] 10, 10A electronic data flash memory card 1 card body 2, 2A processing unit 48 200917256 3 memory device 3A flash memory device 4 fingerprint sensor 4A Induction unit 5, 5A input / output interface circuit 6 display unit 7 power supply 8 function button group 9 external computer / host computer 12 card reader 13 interface bus 10B electronic data flash memory card 1 card body 2B processing unit 3B flash memory Body device 31 reserved space 31A dynamic boot code 31B control code 32 automatic execution of partition 32A Autorun.inf rights 32B application file 49 200917256 33 disk partition 33A public data 33B security data 5B input / output Circuit 6B display unit 8B function button group 9B host computer 15 interface bus bar 20 electronic data flash memory card 202 universal serial bus transceiver 204 flash memory controller 206 central processing unit (CPU) 208 read only memory 210 Flash memory 212 main memory 214, 216, 218 partition 220 index 21 flash memory controller 22 power regulator 23 reset circuit 230 user host 200917256 232 user application: partition / password / automatic execution 234 driver 236 bulk-only-transport (BOT) 240 manufacturer host 242 manufacturer application 244 driver 246 batch limit transfer 400 flash memory system 402 transceiver 404 flash memory controller 440 manufacturing Special Instruction Decoder 442 Small Computer System Interface CD Dedicated Instruction Decoder 444 Small Computer System Interface Fixed Disk Type Command Decoder 446 Small Computer System Interface General Instruction Decoder 456 End Point 1 (EP1) 458 End Point 2 (EP2) 406 central processing unit 408 read only memory 410 flash memory 414, 416, 418 partition area 450 reserved area 51 200917256 412 Memory 420 Index/Address Translation Table 430 Logical Unit Number (LUN) Counter 432 Logical Unit Number Type Register 434 Logical Unit Number Reference Address Register 452 Hard-coded Register 454 End Point 0 (endpoint0, EP0) 500 conversion table 500, 502, 504 '506 logical unit number 510, 512, 514, 516 static random access memory basic address 520, 522 '524, 526 logical block address LBAblk 530 logical unit Numbered Reference Address Register 602 Logical Block Address Line (LBAtbl) 604 Logical Block Address Base Address 606 Logical Block Address 608 LBAlsb 610 Logical Block Address 612 Physical Block Address Page Address 614 Physical address block PBAtbl (corresponding result of conversion table) 616 bit offset 800 conversion table 802 first logical unit number reference address register 52 200917256 804 second logical unit number reference address register 806 third Logical unit number reference address register 810 index 812 physical block status page 814 flash memory reserved area • 816 block 1440 physical block 1445 data area 1446 spare area 1451 error correction code protection 1452 LBA address section 1453 of core 1454 of the parity check code 53

Claims (1)

200917256 X. The scope of application for patents·· It is connected to a host computer through a communication link, the brain-mediated flow, the electronic data flash memory 1. An electronic data flash memory card, the communication link is established The host card includes: (8) a "Μ body; (8) 4 flash memory device is disposed on the Carlin body, the flash memory device includes a plurality of flash memory units, the complex number-memory unit includes at least one An automatic execution partition (a_un partiti〇n) of the first file system format and at least one disk partition having a second difficult system format, wherein the at least-disk partition includes - public data splitting and - security (4) In the cage, the public data partition and the security data segmentation ^ share the same logical unit number 〇. Reading number·, LUN) money is placed in a different plural block, each physical block includes at least one bit to indicate that one of the data partitions associated with each physical block is a security material a partitioning area or a public data partitioning area; (C) an input/output interface circuit that is disposed on the card body, the input/output interface when the electronic data flash memory card is operatively connected to the host computer The circuit can be established between the host computer and the electronic data flash memory card; and (D) a flash memory controller, which is disposed on the card body, and the flash memory device And the remote input/output interface circuit is electrically connected. The flash memory controller includes: a means for automatically executing a preset application, when the communication is connected to the host 54 200917256 computer and the electronic data flash memory card When the setting is established, the preset application is stored in the at least one automatic execution partition; and the means of the operation is performed after the initialization is performed, and the following three types are used. One operation: a programming mode, the flash memory controller starts the input/output interface circuit to receive the data age from the domain computer and store the ## standard_in the disk partition; In the material recovery mode, the flash memory controller reads the > material file from the disk partition, activates the input/output interface circuit to transmit the file data to the host computer; and the load reset mode , the data file is eliminated from the disk partition. 2. The electronic data flash memory card of claim i, wherein the automatic execution partition uses a CD-ROM memory system (CD_R〇MFileSystem, CDFs) and a universal file system (Universal file system, Which one of them is formatted, and the disk cutter area is one of the file configuration file (file all〇cati〇n taWe, fat) and a new technical file system (NewTechnol〇gyfiiesystem, NTFS). To format. 3. If the electronic tilt (four) pin is described in the first item of Shen Qing's paste, the cap preset application includes generating a display surface of the host computer to operate the programming mode, the data recovery mode and the data. In the reset mode, the "preset ad" is displayed before. 4. The electronic data flash memory card of claim 3, wherein the preset advertisement is stored in the at least-automatic execution partition, avoiding the programming mode and the data reset module 55 200917256 The preset advertisement is eliminated in the formula. 5. The electronic data flash memory card according to item i of the patent application, wherein the preset application method comprises means for the host computer to execute a preset debugging program. 6. The electronic data flash memory card according to item i of the patent application, wherein the preset application method comprises means for facilitating the access of the computer of the age machine to the limited edition of the lion. 7. The electronic data flash memory card of claim i, wherein the preset application comprises means for causing the host computer to perform a preset user customization system setting. 8. The electronic data flash memory card of claim i, wherein the at least one disk partition comprises at least a public partition and at least one secure partition. 9. If the scope of the patent is declared! The electronic data flash memory card of the item, wherein the plurality of flash memory sheets 7L further includes a reserved space 'which includes a dynamic boot code and a control code. 10. The electronic data flash memory card of claim 1, further comprising an index paired with the flash memory controller, wherein the index includes a configuration regarding the at least one flash memory device The configured information 'the index provides the access channel of the at least one automatic execution partition and the at least one disk partition. 11. The electronic data flash memory card of claim 10, wherein the index is associated with each of the auto-executing partitions and the logical unit number of each of the disk partitions. 12. The electronic data flash memory card of claim U, wherein the logical unit number is based on the automatic execution of the branch and the disk tap. 13. The electronic data flash memory card of claim 5, wherein the index maps the logical unit number to a complex logical block address 56 200917256 (logical block addresses associated with the complex flash memory unit) , LBAs) and physical address blocks (PBAs). M. The electronic data flash memory card of claim 2, wherein the electronic data flash memory card comprises a universal serial bus (universal serial bus) compatible device. 15. The electronic data flash memory card of claim 2, wherein the flash memory controller comprises a 8032 processor, an 80286 processor, a RISC processor, an ARM processor, and a MIPS. One of a processor and a digital signal processor. 16. The electronic data flash memory card of claim i, wherein the input/output interface circuit comprises a universal serial bus (universal serial bus), a secure digital (Secure Dlglta1), multimedia Multi-Media Card (MMC), Compact Flash (CF), Memory Stick (MS), Peripheral Component Interconnect Bus (PCI-Express, pCIE), Integrated Drive Electronics ( Integrated Plus is one of the high-tech configurations (SATA).如 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 And the spare area includes an attribute pointing to determine whether one of the billet partitions associated with each of the physical blocks is a secure data partition. 18·If the electronic data flash memory card mentioned in Item 17 of the application for transfer, the towel per page - the page package 3 four districts #又 'each - the section contains -512 bytes of data area and a 16 The spare parts of the byte group, the middle and the spare area include an error correction code (ECC) block, the partition representing the relevant data partition is a partition of the security partition, and a logical block 57 200917256 The address (LBA) sector address field and the same bit check code, the parity check code is used to protect the data stored in the segment property field and the logical block address segment address field . 19. The electronic data flash memory card of claim 18, wherein the error correction code block comprises 12.5 bytes, and the partition property block comprises 1 bit, the logical block address area The segment address field contains 23 bits, and the parity check code contains 4 bits. 20. A system comprising: a host computer comprising: an interface bus; and an electronic data flash memory card coupled to the host computer via a communication link, the communication link being established in an interface of the host computer And the electronic data flash memory card comprises: a CA), a chip body, and a (9)-<_memory device disposed on the card body, the flash memory device comprising a plurality of flash memory units, The plurality of flash memory units include at least one disk segment having an autorun partition of a first floor system format and at least an H second file system format; - an input/output interface circuit Department _ card body, # The electronic data flash memory card lion is still connected to the ship domain _, the staff / touch interface circuit can be established in the host electric service Wei Zi information _ pin _ Wei gift knot; and (9)- a flash memory controller, which is disposed on the Kallin body, and is electrically connected to the flash memory device and the input/output interface circuit, wherein the main mechanism sends a “first command” to the sub-set card, the first One instruction 58 200917256 having one or more security bytes, one of which is based on a randomly generated seed value - a predetermined function is generated, wherein the first instruction is successfully verified, The flash memory controller sends a second command to the host computer 'the second age has one or more security bytes, which are based on a randomly generated seed value - a predetermined function Generated, wherein after the second age is successfully verified, the domain sends a "third instruction to the electronic data card to request a password, and the third instruction is to encrypt the randomly generated seed value to encrypt, and, -, - Xuan Electronic Dragon! (4) Qianka calls the third instruction* to send the requested password to the '忒 method code to encrypt with the randomly generated seed value, and then the host computer and the electronic data flash memory card use the password Protection to exchange information. 59