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TW200818096A - Light emitting device, method of driving pixel circuit, and driving circuit - Google Patents

Light emitting device, method of driving pixel circuit, and driving circuit Download PDF

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Publication number
TW200818096A
TW200818096A TW096122922A TW96122922A TW200818096A TW 200818096 A TW200818096 A TW 200818096A TW 096122922 A TW096122922 A TW 096122922A TW 96122922 A TW96122922 A TW 96122922A TW 200818096 A TW200818096 A TW 200818096A
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TW
Taiwan
Prior art keywords
light
transistor
emitting
driving
potential
Prior art date
Application number
TW096122922A
Other languages
Chinese (zh)
Inventor
Toshiyuki Nozawa
Original Assignee
Seiko Epson Corp
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Publication of TW200818096A publication Critical patent/TW200818096A/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00—Electroluminescent light sources
    • H05B33/12—Light sources with substantially two-dimensional radiating surfaces
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)
  • Shift Register Type Memory (AREA)

Abstract

A method of driving a pixel circuit is provided. The pixel circuit includes a light emitting element that emits light by receiving a driving current, a driving transistor that generates the driving current, and a light-emission control transistor of the same conductivity type as that of the driving transistor, the light-emission control transistor being arranged on a path through which the driving current flows from the driving transistor to the light emitting element. The method includes setting the gate potential of the light-emission control transistor so that the light-emission control transistor is turned on in the saturation region for a light emitting period during which the light emitting element is allowed to emit light.

Description

200818096 九、發明說明 【發明所屬之技術領域】 本發明係關於控制有機發光二極體元件等， 技術。 【先前技術】 爲了控制對發光元件供給的電流（以下稱ί 流」），從前即已提案利用薄膜電晶體等主動； 裝置。例如於專利文獻1或專利文獻2，如圖1 示了在驅動電流IDR的路徑上配置驅動電晶體 控制電晶體TEL的構成。驅動電晶體TDR產生丨 的電位之驅動電流IDR。發光控制電晶體TEL，[ 電晶體TDR與發光元件E之間，於特定的期間 「發光期間」）遷移至打開（ON )狀態而許Ϊ 件E之驅動電流ID R之供給。 〔專利文獻1〕美國專利第6229506號說明 〔專利文獻2〕日本專利特開2003 — 22049 【發明內容】 〔發明所欲解決之課題〕 驅動電晶體TDR的動作點之大部分被設定 內，但是驅動電流IDR隨著通道長調變效果而 電晶體TDR的汲極一源極間的電壓而變動。另 各發光元件E的電氣特性有著誤差（來自設計 光元件之 I ^驅動電 土件之發光 ?所示，揭 「dr與發光 3應於閘極 =介於驅動 〔以下稱爲 「對發光元 書 號公報 飽和區域 應於驅動 方面，於 的誤差或 -4 - 200818096 各元件間的個別差異）。例如，驅動電流Idr的電流量與 發光元件E的兩端間的電壓之關係隨著發光元件E的不同 而有異。兩端間的電壓隨著發光元件E而不同的話，各驅 動電晶體TDR的汲極一源極間的電壓會改變。亦即，各驅 動電晶體TDR的閘極設定於同電位的場合，也會有著對各 發光元件E供給的驅動電流IDR (進而各發光元件E的光 量）會因應於發光元件E的電氣特性而有所不同的問題。 有鑑於以上情形，本發明之目的在於解決減低發光元件的 電氣特性對驅動電流造成的影響之課題。 〔供解決課題之手段〕 爲了解決以上的課題，本發明包含藉由驅動電流的供 給而發光的發光元件與產生驅動電流的驅動電晶體，在由 驅動電晶體對發光元件供給的驅動電流的路徑上被配置與 驅動電晶體相同的導電型之發光控制電晶體的畫素電路之 驅動方法，其特徵爲：於使發光元件發光的發光期間以使 發光控制電晶體在飽和區域成爲打開（ON )狀態的方式 設定該發光控制電晶體的閘極電位。 根據本發明，於發光期間發光控制電晶體在飽和區域 動作’所以發光控制電晶體與發光元件之間的電位即使因 應於發光元件的電氣特性而改變，發光控制電晶體與驅動 電晶體之間的電位（驅動電晶體的汲極電位）的變動也會 被抑制。亦即，可以減低發光元件的電氣特性對驅動電流 造成的影響。 -5- 200818096 於本發明之第1樣態（例如後述之第1實施型態），驅 動電晶體與發光控制電晶體係P通道型，驅動電晶體中介 於第1給電線（例如圖3之給電線L i)與發光控制電晶體之 間，發光元件中介於發光控制電晶體與第2給電線（例如 圖3之給電線L2)之間，以第1給電線之電位爲基準時之 第2給電線的電位爲-VE]L(-VEL<0)，以發光控制電晶體側 的電極的電壓爲基準發光元件之電壓降下爲最大時之該發 光兀件的兩端間的電壓爲VEL^MAxi^VEI^MAX^^O)，發光控制 電晶體之閾値電壓爲時VT2(VT2<0)，發光期間之發光控制 電晶體的閘極電位 VG 0N ，以滿足 VG_0N>-VEL-VEL_MAX + VT2的方式設定。根據以上之樣態，可以確實使 發光控制電晶體在飽和區域動作。 進而於較佳的樣態，驅動電流的電流量最大時之驅動 電晶體的閘極-源極間的電壓爲200818096 IX. Description of the Invention [Technical Field] The present invention relates to techniques for controlling an organic light-emitting diode element and the like. [Prior Art] In order to control the current supplied to the light-emitting element (hereinafter referred to as "flow"), it has been proposed to use an active device such as a thin film transistor. For example, in Patent Document 1 or Patent Document 2, as shown in Fig. 1, a configuration in which a drive transistor control transistor TEL is disposed on a path of a drive current IDR is shown. The drive transistor TDR generates a drive current IDR of the potential of 丨. The light-emitting control transistor TEL, [the "light-emitting period" between the transistor TDR and the light-emitting element E during a specific period) is shifted to the ON state to supply the drive current ID R of the device E. [Patent Document 1] U.S. Patent No. 6,229,506 [Patent Document 2] Japanese Patent Laid-Open No. 2003-22049 SUMMARY OF INVENTION [Problems to be Solved by the Invention] Most of the operating points of the driving transistor TDR are set, but The drive current IDR varies with the voltage between the drain and the source of the transistor TDR in accordance with the effect of the channel length modulation. In addition, the electrical characteristics of each of the light-emitting elements E have an error (from the illumination of the I ^ driving earth-moving element of the design optical element), and the "dr and the light-emitting 3 should be at the gate = between driving (hereinafter referred to as "the pair of light-emitting elements" The saturated region of the book number shall be in terms of driving, the error or the individual difference between the components of -4 - 200818096. For example, the relationship between the amount of current of the driving current Idr and the voltage between the two ends of the light-emitting element E follows the light-emitting element E The voltage between the terminals varies with the light-emitting element E, and the voltage between the drain and the source of each of the driving transistors TDR changes. That is, the gate of each driving transistor TDR is set to In the case of the same potential, there is also a problem that the driving current IDR (and the amount of light of each of the light-emitting elements E) supplied to each of the light-emitting elements E differs depending on the electrical characteristics of the light-emitting element E. In view of the above, the present invention The object of the present invention is to solve the problem of reducing the influence of the electrical characteristics of the light-emitting element on the drive current. [Means for Solving the Problem] In order to solve the above problems, the present invention includes The light-emitting element that emits light by the supply of current and the drive transistor that generates the drive current are arranged on the path of the drive current supplied from the drive transistor to the light-emitting element, and the pixel of the light-emission control transistor of the same conductivity type as that of the drive transistor is disposed. In the driving method of the circuit, the gate potential of the light-emission control transistor is set such that the light-emitting control transistor is turned on in the saturation region during the light-emitting period in which the light-emitting element emits light. During the light-emitting period, the light-emission control transistor operates in the saturation region. Therefore, the potential between the light-emitting control transistor and the light-emitting element changes even in response to the electrical characteristics of the light-emitting element, and the potential between the light-emitting control transistor and the drive transistor (drive transistor) The variation of the electric potential of the light-emitting element can also be suppressed. That is, the influence of the electrical characteristics of the light-emitting element on the drive current can be reduced. -5- 200818096 The first aspect of the present invention (for example, the first embodiment described later) ), the driving transistor and the illuminating control electro-crystal system P channel type, the driving transistor is between the first Between the line (for example, the electric line L i of FIG. 3) and the light-emitting control transistor, the light-emitting element is interposed between the light-emitting control transistor and the second power supply line (for example, the power supply line L2 of FIG. 3), and the first power supply line When the potential is the reference, the potential of the second power supply line is -VE]L (-VEL<0), and the voltage of the electrode on the side of the light-emitting control transistor is the maximum when the voltage drop of the light-emitting element is maximum. The voltage between the terminals is VEL^MAxi^VEI^MAX^^O), the threshold voltage of the light-emitting control transistor is VT2 (VT2 < 0), and the gate potential VG 0N of the light-emitting control transistor during the light-emitting period is satisfied to satisfy VG_0N&gt ;-VEL-VEL_MAX + VT2 mode setting. According to the above, it is possible to surely operate the light-emission control transistor in the saturation region. Further, in a preferred mode, when the amount of current of the driving current is maximum, the voltage between the gate and the source of the driving transistor is

Vdata + maxCVdata + maxW) ’驅動電晶體的閾値電壓爲 VT1(VT1<0)時，把發光期間之發光控制電晶體的閘極電位 VG_ON 以滿足 VG_ON<VDATA_MAX-VT1+VT2 的方式設定。根 據此樣態，驅動電晶體在飽和區域動作，所以可以將驅動 電晶體作爲安定的定電流源來利用。 於本發明之第2樣態（例如後述之第2實施型態），驅 動電晶體與發光控制電晶體係N通道型，發光元件中介於 第1給電線（例如圖8之給電線L !)與發光控制電晶體之間 ，驅動電晶體中介於發光控制電晶體與第2給電線（例如 圖8之給電線L2)之間，以第2給電線之電位爲基準時之 200818096 第2給電線的電位爲VEL(VEL>0)，以發光控制電晶體側的 電極的電壓爲基準發光元件之電壓降下爲最大時之該發光 元件的兩端間的電壓爲VEL_MAX(VEL_MAX>0)，發光控制電 晶體之閾値電壓爲時VT2(VT2>0)，發光期間之發光控制電 晶體的閘極電位Vg_on，以滿足Vg_on>-Vel-Vel_max + Vt2 的方式設定。根據以上之樣態，可以確實使發光控制電晶 體在飽和區域動作。 進而於較佳的樣態，驅動電流的電流量最大時之驅動 電晶體的閘極-源極間的電壓爲 vDATA_MAX(vDATA_MAX>0) ，驅動電晶體的閾値電壓爲vT1(vT1>0)時，把發光期間之 發 光控制電晶體的 閘 極電 位 V g_on 以滿 足 Vg. _ON>VdaTA_MAX-Vti+Vt2 的 方式設 疋c >根據此 樣態， 驅 動電晶體在飽和區域動作，所以可以將驅動電晶體作爲安 定的定電流源來利用。 於相關於本發明的驅動方法之其他樣態（例如後述之 第4實施型態），畫素電路包含由驅動電晶體與發光控制 電晶體之間的節點（例如圖1 2之節點Ν!)所分歧的路徑 上配置的寫入控制電晶體（例如圖1 2之電晶體SWi )， 發光控制電晶體與寫入控制電晶體其導電型以及尺寸皆共 通，在先於發光期間的寫入期間，藉由把在發光期間使發 光控制電晶體爲打開（ON )狀態的電位相等的電位供給 至寫入控制電晶體的閘極而使該寫入控制電晶體爲打開（ ON )狀態，此時藉由通過驅動電晶體與節點與寫入控制 電晶體的電流（例如圖12之電流Id A T A )設定驅動電晶體 200818096 的閘極電位。根據以上之樣態，在寫入期間被供給至寫入 控制電晶體的閘極的電位與在發光期間被供給至發光控制 電晶體的閘極之電位被設爲同電位，所以驅動電晶體與發 光控制電晶體之間的節點的電位在寫入期間與發光期間是 約略一致的。亦即，在寫入期間流經驅動電晶體的電流量 與在發光期間流經驅動電晶體的電流量可以高精度地使其 一致。 相關於本發明之驅動電路，包含藉由驅動電流的供給 而發光的發光元件與產生驅動電流的驅動電晶體，在由驅 動電晶體對發光元件供給的驅動電流的路徑上被配置與驅 動電晶體相同的導電型之發光控制電晶體的畫素電路之驅 動電路，具備於使發光元件發光的發光期間以使發光控制 電晶體在飽和區域成爲打開（ON )狀態的方式設定該發 光控制電晶體的閘極電位的發光控制電路。根據以上的構 成，於發光期間發光控制電晶體在飽和區域動作，所以減 低發光元件的電氣特性對驅動電流造成的影響。 相關於本發明之發光裝置，具備包含藉由驅動電流的 供給而發光的發光元件與產生驅動電流的驅動電晶體，在 由驅動電晶體對發光元件供給的驅動電流的路徑上被配置 與驅動電晶體相同的導電型之發光控制電晶體的畫素電路 ，以及於使發光元件發光的發光期間以使發光控制電晶體 在飽和區域成爲打開（ON )狀態的方式設定該發光控制 電晶體的閘極電位的發光控制電路。根據以上的構成，於 發光期間發光控制電晶體在飽和區域動作，所以減低發光 -8- 200818096 元件的電氣特性對驅動電流造成的影響。 畫素電路，具備：包含驅動電晶體與發光控制電晶體 之間的節點與資料線之間所中介的寫入控制電晶體，在先 於發光期間的寫入期間使寫入控制電晶體爲打開（ON ) 狀態的寫入控制電路，及於寫入期間藉由使電流流過資料 線而設定驅動電晶體的閘極電位的資料供給電路；發光控 制電晶體與寫入控制電晶體其導電型與尺寸共通，在寫入 期間寫入控制電路寫入控制電路對寫入控制電晶體的閘極 供給的電位，與在發光期間發光控制電路對發光控制電晶 體的閘極供給的電位相等。根據以上之樣態，寫入期間之 寫入控制電晶體之閘極與發光期間之發光控制電晶體的閘 極電位爲相同電位，所以在寫入期間流經驅動電晶體的電 流量與在發光期間流經驅動電晶體的電流量可以高精度地 使其一致。 相關於本發明之發光裝置被利用於各種電子機器。相 關於本發明之電子機器之典型例，係將發光裝置作爲顯示 裝置利用之機器（例如個人電腦或行動電話）。原本，相 關於本發明之發光裝置的用途就不限於影像的顯示。例如 ’可以在藉由光線的照射而在感光鼓等影像擔持體上形成 潛影之用的曝光裝置（曝光頭）、被配置於液晶裝置的背 面側而照明此之裝置（背光）、或者被搭載於掃描器等影 像讀取裝置而照明原稿之裝置等照明裝置等等，在種種用 途適用本發明之發光裝置。 -9- 200818096 【實施方式】 〔供實施發明之最佳型態〕 < A :第1實施形態> 圖1係顯示作爲顯示影像的手段，各種電子機器採用 的發光裝置之具體型態之方塊圖。如該圖所示，發光裝置 D具備：配列多數畫素電路P的元件陣列部1 0，及供控制 各畫素電路P的周邊電路（電源電路2 0、寫入控制電路 22、發光控制電路24、資料供給電路26 )。各畫素電路 P，包含藉由電流的供給而發光的發光元件E。 於元件陣列部1 0，被形成延伸於X方向的m條選擇 線1 2，及與各選擇限1 2成對而延伸於X方向之m條發光 控制線1 4、及延伸在直交於X方向的Y方向的n條資料 線1 4 ( m與η分別爲2以上之自然數）。各畫素電路Ρ， 對應於選擇線1 2及發光控制線1 4之對與資料線1 6之各 交叉而被配置。亦即，這些畫素電路Ρ跨X方向及Υ方 向排列爲縱m行X橫η列的矩陣狀。 電源電路20，係產生在發光裝置D使用的電壓之手 段。電源電路2 0產生高位側的電源電位VH與低位側的電 源電位VL。電源電位VH係成爲各部的電壓的基準的電位 (〇 V )，透過給電線L !被供給至元件陣列部1 〇。電源電 位VL係比電源電位VH更低上電壓VEL的低電位，透過給 電線L2被供給至元件陣列部1 0。此外，電源電路2 0，產 生在發光控制電路24使用的打開電位VG_0N以及關閉電 位 V〇_〇FF。本實施型態之打開電位 V〇_〇N比關閉電位 -10- 200818096Vdata + maxCVdata + maxW) When the threshold voltage of the driving transistor is VT1 (VT1 < 0), the gate potential VG_ON of the light-emission control transistor during the light-emitting period is set to satisfy VG_ON < VDATA_MAX - VT1 + VT2. According to this aspect, the driving transistor operates in the saturation region, so the driving transistor can be utilized as a stable constant current source. In the second aspect of the present invention (for example, the second embodiment described later), the driving transistor and the light-emitting control transistor system are of the N-channel type, and the light-emitting element is interposed between the first power supply lines (for example, the power supply line L of FIG. 8). Between the light-emitting control transistor and the second light-feeding control transistor and the second power supply line (for example, the power supply line L2 of FIG. 8) in the driving transistor, the second power supply line is based on the potential of the second power supply line. The potential is VEL (VEL > 0), and the voltage between the two ends of the light-emitting element is VEL_MAX (VEL_MAX > 0) when the voltage of the light-emitting element on the light-emitting control transistor is the maximum, and the light-emission control is performed. The threshold voltage of the transistor is VT2 (VT2 > 0), and the gate potential Vg_on of the light-emission control transistor during the light-emitting period is set so as to satisfy Vg_on > -Vel-Vel_max + Vt2. According to the above, it is possible to surely operate the light-emission control transistor in the saturation region. Further, in a preferred mode, when the amount of current of the driving current is maximum, the voltage between the gate and the source of the driving transistor is vDATA_MAX (vDATA_MAX>0), and when the threshold voltage of the driving transistor is vT1 (vT1>0) The gate potential V g_on of the light-emitting control transistor during the illumination period is set to Vc >_ON>VdaTA_MAX-Vti+Vt2; according to this state, the driving transistor operates in the saturation region, so the driver can be driven The transistor is utilized as a steady current source. In other aspects related to the driving method of the present invention (for example, the fourth embodiment described later), the pixel circuit includes a node between the driving transistor and the light-emitting control transistor (for example, the node of FIG. 12!) The write control transistor (for example, the transistor SWi of FIG. 12) disposed on the different paths, the light-emitting control transistor and the write control transistor have common conductivity types and sizes, and are written before the light-emitting period. The write control transistor is turned on (ON) by supplying a potential equal to the potential of the light-emitting control transistor in the ON state during the light-emitting period to the gate of the write control transistor. The gate potential of the drive transistor 200818096 is set by driving the transistor and the current of the node and the write control transistor (eg, the current Id ATA of FIG. 12). According to the above aspect, the potential supplied to the gate of the write control transistor during the writing period and the potential of the gate supplied to the light-emission control transistor during the light-emitting period are set to the same potential, so that the transistor is driven and The potential of the node between the light-emitting control transistors is approximately coincident during the writing period and during the light-emitting period. That is, the amount of current flowing through the driving transistor during writing and the amount of current flowing through the driving transistor during light emission can be made to coincide with each other with high precision. A driving circuit according to the present invention includes a light-emitting element that emits light by supply of a driving current and a driving transistor that generates a driving current, and is disposed and driven in a path of a driving current supplied from the driving transistor to the light-emitting element. The driving circuit of the pixel circuit of the light-emission control transistor of the same conductivity type is provided to set the light-emitting control transistor so that the light-emitting control transistor is turned on in the saturation region during the light-emitting period in which the light-emitting element emits light. Light-emitting control circuit for gate potential. According to the above configuration, the light-emission control transistor operates in the saturation region during the light-emitting period, so that the influence of the electrical characteristics of the light-emitting element on the drive current is reduced. A light-emitting device according to the present invention includes a light-emitting element that emits light by supply of a drive current and a drive transistor that generates a drive current, and is disposed and driven in a path of a drive current supplied from the drive transistor to the light-emitting element. a pixel circuit of a light-emission control transistor having the same conductivity type of a crystal, and a gate electrode of the light-emitting control transistor in a state in which the light-emitting control transistor is turned on in a saturation region during a light-emitting period in which the light-emitting element emits light Potential illumination control circuit. According to the above configuration, the light-emission control transistor operates in the saturation region during the light-emitting period, so that the influence of the electrical characteristics of the light-emitting device on the drive current is reduced. The pixel circuit includes: a write control transistor interposed between a node and a data line between the driving transistor and the light-emitting control transistor, and the write control transistor is turned on during a writing period before the light-emitting period a write control circuit of the (ON) state, and a data supply circuit for setting a gate potential of the drive transistor by flowing a current through the data line during the writing period; a light-emitting control transistor and a write control transistor having a conductivity type Common to the size, the write control circuit write control circuit supplies the potential applied to the gate of the control transistor during the write period to be equal to the potential supplied by the light-emitting control circuit to the gate of the light-emitting control transistor during the light-emitting period. According to the above aspect, the gate of the write control transistor during the writing period and the gate potential of the light-emission control transistor during the light-emitting period are at the same potential, so the amount of current flowing through the driving transistor during the writing period is in the light emission. The amount of current flowing through the driving transistor during the period can be made to be uniform with high precision. A light-emitting device related to the present invention is utilized in various electronic machines. As a typical example of the electronic apparatus of the present invention, a light-emitting device is used as a display device (e.g., a personal computer or a mobile phone). Originally, the use of the light-emitting device of the present invention is not limited to the display of images. For example, an exposure device (exposure head) for forming a latent image on an image bearing member such as a photosensitive drum by irradiation of light, a device disposed on the back side of the liquid crystal device to illuminate the device (backlight), or A lighting device such as a device that is mounted on an image reading device such as a scanner to illuminate a document, and the like, and the light-emitting device of the present invention is applied to various uses. -9-200818096 [Embodiment] [Best Mode for Carrying Out the Invention] < A: First Embodiment> FIG. 1 shows a specific form of a light-emitting device used in various electronic devices as means for displaying an image. Block diagram. As shown in the figure, the light-emitting device D includes an element array unit 10 in which a plurality of pixel circuits P are arranged, and a peripheral circuit (power supply circuit 20, write control circuit 22, and light-emitting control circuit) for controlling each pixel circuit P. 24. Data supply circuit 26). Each of the pixel circuits P includes a light-emitting element E that emits light by supply of a current. The element array portion 10 is formed with m selection lines 1 2 extending in the X direction, and m light emission control lines 14 extending in the X direction in pairs with the respective selection limits 12, and extending in an orthogonal X n data lines 1 4 in the Y direction of the direction (m and η are each a natural number of 2 or more). Each of the pixel circuits 配置 is arranged corresponding to the intersection of the selection line 1 2 and the light-emission control line 14 and the data line 16 . That is, these pixel circuits are arranged in a matrix of a vertical m row X a horizontal n column across the X direction and the Υ direction. The power supply circuit 20 is a means for generating a voltage used by the light-emitting device D. The power supply circuit 20 generates the power supply potential VH on the high side and the power supply potential VL on the low side. The power supply potential VH is a potential (〇 V ) which is a reference for the voltage of each unit, and is supplied to the element array unit 1 透过 through the power supply line L ! . The power supply potential VL is lower than the power supply potential VH by a low voltage VEL, and is supplied to the element array portion 10 through the power supply line L2. Further, the power supply circuit 20 generates an open potential VG_0N used by the light emission control circuit 24 and a turn-off potential V〇_〇FF. The open potential of the present embodiment V〇_〇N is lower than the turn-off potential -10- 200818096

Vg_off的電位還低。又，打開電位Vg-on以及關閉電位 VG_0FF的詳細內容稍後敘述。 寫入控制電路2 2 ’係產生供依序選擇m條選擇線1 2 之各個之用的選擇訊號G w τ [ 1 ]〜G w τ [ m ]而對各選擇線1 2輸 出之手段（例如m位元之移位暫存器）。如圖2所示，被 供給至第i行（i爲滿足1 S i $ m之自然數）之選擇線1 2 的選擇訊號GwT[i]，於一個圖框期間（1 V )之中第i個寫 入期間（水平掃描期間）PWT成爲低位準（選擇），而在 其他的期間維持高位準（非選擇）。 圖1之發光控制電路24，係產生供規定發光元件E 實際發光的期間（以下稱爲「發光期間」）之用的發光控 制訊號GEL[1]〜GEL[m]而對各發光控制線14輸出之手段（ 例如m位元之移位暫存器）。如圖2所示，被供給至第i 行的發光控制線14之發光控制訊號GEL[1]，由選成訊號 G w T [ i ]成爲低位準的寫入期間P W T之經過後（終點）起在 跨特定時間長的發光期間Pel成爲打開電位VG_0N，而在 其他的期間維持關閉電位VG_0FF。 圖1之資料供給電路2 6，產生指定各發光元件E的 色階（光量）的資料訊號Sn]〜S[n]而輸出至各資料線16 的手段（例如η個電壓輸出型D/A變換器）。選擇訊號 GWT⑴成爲低位準的寫入期間Pwt被供給至第i列的資料 線1 6之資料訊號S □]，被控制爲屬於第i行的第j列之畫 素電路P指定的色階之電位VDATA。 其次，參照圖3說明各畫素電路P之具體構成。又， 11 - 200818096 於該圖，屬於第i行的第j列之僅1個畫素電路P被圖示 ，構成畫素陣列部1 〇的各畫素電路p都是相同的構成。 如圖所示，各畫素電路P的發光元件E，被配置於連結給 電線L i與給電線L2的路徑上。本實施型態之發光元件E ，係於相互對向的陽極與陰極之間中介著有機E L (電激 發光，Electro-Luminescent )材料之發光層之有機發光 二極體元件。發光元件E，以因應於流經陽極與陰極之間 的驅動電流Idr的電流量之光量（壳度）發光。發光元件 E的陰極被被連接於給電線L2。 驅動電流Idr的路徑上（給電線L!與發光元件E之間 )被配置P通道型驅動電晶體TDR。驅動電晶體TDR係產 生因應於閘極的電位的電流量之驅動電流IDR的手段。驅 動電晶體TDR的源極被連接於給電線L i。於驅動電晶體 TDR之閘極與源極（給電線)之間中介著電容元件Cl。 此外，驅動電晶體TDR之閘極與資料線1 6之間，中介著 控制二者之電氣接續（導通/非導通）之P通道型之電晶 體S W i。屬於第i行之各電晶體S W i之閘極對於第i行之 選擇線1 2被共通接續。 驅動電晶體TDR之汲極與發光元件E之陽極之間（亦 即從驅動電晶體TDR對發光元件供給的驅動電流IDR的路 徑上），被配置有控制二者的電氣接續之發光控制電晶體 TEL。發光控制電晶體TE]L之導電型與驅動電晶體TDR同 樣爲P通道型。屬於第i行之各發光控制電晶體TEL之閘 極對於第i行之發光控制線1 4被共通接續。電源電路20 -12- 200818096 產生的打開電位vG_0N，被設定爲在被供給至發光控制電 晶體TEL的閘極時使發光控制電晶體TEL成爲打開狀態的 位準，關閉電位VG_0FF，被設定爲使發光控制電晶體TEL 爲關閉狀態之位準。 在寫入期間Pwt選擇訊號GWT⑴遷移至低位準時，屬 於第i行之各電晶體SWi同時變化爲打開狀態。於屬第i 行第j列的畫素電路P，對驅動電晶體TDR的閘極供給資 料訊號Sn]的電位VDATA，同時因應於電位VDATA的電荷 被蓄積於電容元件C!。電位VDATA，係因應於發光元件E 被指定的所要的光量而被設定的電位，以發光元件E的光 量爲最大時驅動電晶體TDR會在飽和區域動作的方式被選 定。另一方面，於寫入期間Pwt，發光控制訊號GEL⑴成 爲關閉電位VG_OFF，所以發光控制電晶體TEL維持於關閉 狀態，所以驅動電流Idr的路徑被遮斷，而發光元件E熄 滅。 寫入期間Pwt經過之後選擇訊號GWT[1：|遷移至高位準 ，所以各電晶體SWi變化爲關閉狀態。驅動電晶體TDR的 閘極，於寫入期間Pwt之經過後的發光期間Pel也藉由電 容元件G而被維持於電位VDATA。另一方面，於發光期間 Pel發光控制訊號GEUl]被設定於打開電位VG_0N，所以發 光控制電晶體TEL成爲打開狀態，而驅動電流IDR的路徑 被確立。亦即，因應於驅動電晶體TDR之閘極電位VDATA 之電流量的驅動電流Idr，由給電線L i經過驅動電晶體 TDR與發光控制電晶體TEL而被供給至發光元件E。亦即 -13- 200818096 ，發光元件以因應於電位VDATA的光量發光。 然而，在飽和區域動作的電晶體之流動於汲 間的電流Id係以下式（1 )表現的。 ID = (P/2)(VGS_VT)2 · (l+λ· VDS) .........(1) 式（1 )之「β」係電晶體的增益係數，「νΊ 體的閾値電壓。此外「VGS」係電晶體之閘極一 電壓，「VDS」爲電晶體的汲極一源極間的電壓 通道長調變係數，表示在飽和區域電壓vDS僅改 時之電流Id的變化量（斜率）。由式（1 )可知 驅動電晶體TDR在發光期間PEL在飽和區域動作 流Idr (相當於式（1 )之電流ID )依存於驅動電 的汲極一源極間的電壓 VDS (更具體而言是驅 TDR與發光控制電晶體TEL之間的節點小的電位 另一方面，發光元件E的電氣特性，隨著發 被使用的環境的溫度或發光元件E的從形成時起 間等種種因素而改變。此外，於一個發光裝置D 件E的電氣特性也有個體差異。如以上所述如果 E的特性有個體差異的話，發光元件與發光控 tel之間的節點N2 (發光元件E的陽極）之電位 該發光元件E的特性而變動。現在，發光控制電 於發光期間PEL在非飽和區域（線形區域）動作 點Ni之電位（驅動電晶體TDR的電壓VDS )會因 極一源極 「」係電晶 源極間的 。「λ」爲 變單位量 ，即使說 ，驅動電 〔晶體Tdr 動電晶體 )° 光裝置D 經過的時 各發光元 發光元件 制電晶體 會因應於 t晶體T E L 的話，節 應於節點 -14- 200818096 n2的電位而改變，所以如式（1 )所可理解的’驅動電流 Idr的電流量因應於發光元件E的特性而改變’結果會有 各發光元件E的光量（色階）產生個體差異的問題。 爲了解決以上之問題，於本實施型態’以於發光期間 Pel發光控制電晶體TEL在飽和區域內成爲打開狀態的方 式，電源電路20產生打開電位VG_0N。現在，於式（1 ) 當通道長調變係數λ充分小時，流動於電晶體的電流I D 近似於下式（2 )。The potential of Vg_off is also low. Further, the details of the turn-on potential Vg-on and the turn-off potential VG_0FF will be described later. The write control circuit 2 2 'generates a means for outputting the selection signals G w τ [ 1 ] to G w τ [ m ] for each of the m selection lines 1 2 and for outputting the selection lines 1 2 ( For example, the m-bit shift register). As shown in FIG. 2, the selection signal GwT[i] of the selection line 1 2 supplied to the i-th row (i is a natural number satisfying 1 S i $ m) is in a frame period (1 V ) During one write period (horizontal scan period), PWT becomes a low level (selection), while in other periods, a high level (non-selection) is maintained. The light emission control circuit 24 of Fig. 1 generates light emission control signals GEL[1] to GEL[m] for a period during which the predetermined light-emitting element E actually emits light (hereinafter referred to as "light-emitting period"), and for each light emission control line 14 The means of output (such as the m-bit shift register). As shown in FIG. 2, the illuminating control signal GEL[1] supplied to the illuminating control line 14 of the i-th row is after the elapse of the writing period PWT (the end point) in which the selected signal G w T [ i ] becomes the low level. The Pel becomes the turn-on potential VG_0N during the light-emitting period that spans a certain length of time, while the turn-off potential VG_0FF is maintained during other periods. The data supply circuit 2 6 of FIG. 1 generates means for outputting the data signals Sn] to S[n] of the gradation (light amount) of each of the light-emitting elements E and outputting them to the respective data lines 16 (for example, n voltage output type D/A) Converter). The data signal S □] of the data line 16 supplied to the i-th column of the write signal PWT (1) which becomes the low level is controlled to be the color gradation specified by the pixel circuit P of the j-th column of the i-th row. Potential VDATA. Next, a specific configuration of each pixel circuit P will be described with reference to FIG. Further, in the figure, only one pixel circuit P belonging to the jth column of the i-th row is illustrated, and each pixel circuit p constituting the pixel array unit 1 is the same configuration. As shown in the figure, the light-emitting elements E of the respective pixel circuits P are arranged on the path connecting the electric wires L i and the electric wires L2. The light-emitting element E of the present embodiment is an organic light-emitting diode element in which a light-emitting layer of an organic EL (electro-luminescence) material is interposed between an anode and a cathode opposed to each other. The light-emitting element E emits light in accordance with the amount of light (shell size) of the amount of current flowing through the drive current Idr between the anode and the cathode. The cathode of the light-emitting element E is connected to the power supply line L2. The P-channel type driving transistor TDR is disposed on the path of the driving current Idr (between the power supply line L! and the light-emitting element E). The driving transistor TDR is a means for generating a driving current IDR in accordance with the amount of current of the potential of the gate. The source of the driving transistor TDR is connected to the supply line Li. A capacitive element Cl is interposed between the gate of the driving transistor TDR and the source (the supply line). Further, between the gate of the driving transistor TDR and the data line 16, a P-channel type electric crystal S W i for controlling the electrical connection (conduction/non-conduction) of the two is interposed. The gates of the respective transistors S W i belonging to the i-th row are commonly connected to the selection line 12 of the i-th row. Between the drain of the driving transistor TDR and the anode of the light-emitting element E (that is, in the path of the driving current IDR supplied from the driving transistor TDR to the light-emitting element), an illuminating control transistor that controls electrical connection between the two is disposed. TEL. The conductivity type of the light-emission control transistor TE]L is the same as the drive transistor TDR. The gates of the respective light-emission control transistors TEL belonging to the i-th row are commonly connected to the light-emission control lines 14 of the i-th row. The power-on circuit 20 -12-200818096 generates an open potential vG_0N which is set to a level at which the light-emission control transistor TEL is turned on when it is supplied to the gate of the light-emitting control transistor TEL, and the potential VG_0FF is turned off, and is set to The illumination control transistor TEL is in the off state. When the Pwt selection signal GWT(1) migrates to the low level during the writing period, the respective transistors SWi belonging to the i-th row are simultaneously changed to the on state. The pixel circuit P belonging to the i-th row and the j-th column supplies the potential VDATA of the information signal Sn] to the gate of the driving transistor TDR, and the electric charge corresponding to the potential VDATA is accumulated in the capacitive element C!. The potential VDATA is set in accordance with the potential of the light amount to be specified by the light-emitting element E, and is selected such that the driving transistor TDR operates in the saturation region when the light amount of the light-emitting element E is maximized. On the other hand, in the writing period Pwt, the light emission control signal GEL(1) becomes the off potential VG_OFF, so that the light emission control transistor TEL is maintained in the off state, so that the path of the drive current Idr is blocked, and the light emitting element E is turned off. After the Pwt elapses, the selection signal GWT[1:| migrates to the high level, so each transistor SWi changes to the off state. The gate of the driving transistor TDR is maintained at the potential VDATA by the capacitance element G during the light-emitting period Pel after the lapse of the writing period Pwt. On the other hand, during the light-emitting period, the Pel light-emission control signal GEU1] is set to the turn-on potential VG_0N, so that the light-emission control transistor TEL is turned on, and the path of the drive current IDR is established. In other words, the drive current Idr in response to the amount of current driving the gate potential VDATA of the transistor TDR is supplied to the light-emitting element E via the drive transistor TDR and the light-emission control transistor TEL. That is, -13-200818096, the light-emitting element emits light in response to the amount of light at the potential VDATA. However, the current Id flowing between the transistors operating in the saturation region is expressed by the following formula (1). ID = (P/2)(VGS_VT)2 · (l+λ· VDS) (1) The gain coefficient of the "β" system transistor of equation (1), "νΊ Threshold voltage. In addition, "VGS" is the gate voltage of the transistor, and "VDS" is the voltage channel long modulation coefficient between the drain and the source of the transistor, indicating the change of the current Id when the voltage vDS in the saturation region is only changed. Quantity (slope). It can be seen from the equation (1) that the driving transistor TDR operates in the saturation region during the light-emitting period PDR (corresponding to the current ID of the equation (1)) depending on the voltage VDS between the drain and the source of the driving power (more specifically, It is a small potential between the TDR and the light-emitting control transistor TEL. On the other hand, the electrical characteristics of the light-emitting element E vary depending on various factors such as the temperature of the environment in which the light is emitted or the time from the formation of the light-emitting element E. In addition, there is also an individual difference in the electrical characteristics of a light-emitting device D. As described above, if there is an individual difference in the characteristics of E, the node N2 (the anode of the light-emitting element E) between the light-emitting element and the light-emitting control tel The potential varies depending on the characteristics of the light-emitting element E. Now, the light-emission control is electrically generated during the light-emitting period PEL at the operating point Ni of the unsaturated region (linear region) (the voltage VDS of the driving transistor TDR) is due to the pole-source "" system. "λ" is a variable unit quantity. Even if the driving power [crystal Tdr electro-optical crystal) is passed, the light-emitting device of each illuminating element will respond to the t-crystal TE. In the case of L, the section should be changed at the potential of the node-14-200818096 n2, so that the amount of the current of the driving current Idr can be changed as the equation (1) changes depending on the characteristics of the light-emitting element E. The amount of light (level) of E produces a problem of individual differences. In order to solve the above problem, in the present embodiment, the power supply circuit 20 generates the turn-on potential VG_0N in such a manner that the Pel light-emission control transistor TEL is turned on in the saturation region during the light-emitting period. Now, in the equation (1), when the channel long modulation coefficient λ is sufficiently small, the current I D flowing to the transistor is approximated by the following formula (2).

Id = (P/2)(Vgs-Vt)2 .........(2) 如可由式（2 )所把握到的，流至在飽和區域動作的 電晶體的電流Id係由閘極一源極間的電壓VGS與閾値電 壓VT而決定的。換句話說，電流Id被固定的話，閘極一 源極間的電壓VGS也被固定於特定値。針對發光控制電晶 體TEL在飽和區域動作的場合進行檢討的話，發光控制電 晶體T e l的聞極一源極間的電壓V G S，因應於驅動電晶體 TDR產生的驅動電流IDR而決定。亦即，節點Ni的電位， 因應於被供給至發光控制電晶體TEL的閘極的打開電位 VG_ON而被決定，不會受到起因於發光元件E特性的個體 差異導致節點N 2電位的變動的影響。又，於式（2 )忽視 了發光控制電晶體TEL的通道長調變效果的影響，但因通 道長調變係數λ充分地小，所以即使如式（1 )考慮通道 長調變效果的場合，與發光控制電晶體TEL在非飽和區域 -15- 200818096 動作的場合相比，起因於發光元件E的特性的個體差異之 節點Ni的電位變動被充分抑制。如以上所述，根據本實 施型態的話，藉由使發光控制電晶體TEL的動作點設定於 飽和區域內而抑制節點Ni的電位的變動，所以即使發光 元件E的電氣特性即使有個體差異，也可以高精度地產生 因應於資料訊號Su]的電位VDATA之驅動電流IDR。 又，驅動電流Idr的電流量接近零的場合，發光控制 電晶體Tel的鬧極一源極間的電壓Vgs，充分接近發光控 制電晶體TEL的閾値電壓VT2。亦即，被供給至發光控制 電晶體TEL的閘極的打開電位VG_0N與節點Νι (發光控制 電晶體TEL的源極）的電位VN1之差分値（發光控制電晶 體TEL之閘極一源極間的電壓VGS)近似於閾値電壓VT2 (Vg + on-Vni^Vt?)。亦即’節點Νι的電位Vni被維持 於打開電位VG_0N與閾値電壓VT2之差分値的附近（VN1 与VG_on-VT2 )。總之，發光元件Ε的特性幾乎不對節點 K的電位VN1造成影響。 其次，檢討使發光控制電晶體TEL在飽和區域動作所 必要的打開電位VG_0N的條件。發光控制電晶體TEL爲了 要在飽和區域動作，發光控制電晶體TEL的汲極一源極間 的電壓VDS，應該要比閘極一源極間的電壓VGS與閾値電 壓 Vt2 ( Vt2<〇 )之差分値還要低（VDS<VGS-V T2 )。節點 N2之電位爲VN2的話，以上之條件以下式（al )表現。Id = (P/2)(Vgs-Vt)2 (2) As can be grasped by equation (2), the current Id flowing to the transistor operating in the saturation region is The voltage VGS between the gate and the source is determined by the threshold voltage VT. In other words, if the current Id is fixed, the voltage VGS between the gate and the source is also fixed to a specific chirp. When the light-emitting control transistor TEL is operated in the saturation region, the voltage V G S between the source and the source of the light-emitting control transistor T e1 is determined in accordance with the drive current IDR generated by the drive transistor TDR. In other words, the potential of the node Ni is determined in accordance with the opening potential VG_ON of the gate supplied to the light-emitting control transistor TEL, and is not affected by the fluctuation of the potential of the node N 2 due to the individual difference in the characteristics of the light-emitting element E. . Further, in the equation (2), the influence of the channel length modulation effect of the light-emitting control transistor TEL is neglected, but since the channel length modulation coefficient λ is sufficiently small, even when the channel length modulation effect is considered as in the equation (1), the light is emitted. When the control transistor TEL operates in the unsaturated region -15-200818096, the potential variation of the node Ni due to the individual difference in the characteristics of the light-emitting element E is sufficiently suppressed. As described above, according to the present embodiment, the fluctuation of the potential of the node Ni is suppressed by setting the operating point of the light-emission control transistor TEL in the saturation region. Therefore, even if there is an individual difference in the electrical characteristics of the light-emitting element E, It is also possible to generate the drive current IDR corresponding to the potential VDATA of the data signal Su] with high precision. Further, when the amount of current of the drive current Idr is close to zero, the voltage Vgs between the source and the source of the light-emitting control transistor Tel is sufficiently close to the threshold voltage VT2 of the light-emitting control transistor TEL. That is, the difference between the opening potential VG_0N of the gate supplied to the light-emitting control transistor TEL and the potential VN1 of the node 源 (the source of the light-emission control transistor TEL) (between the gate and the source of the light-emitting control transistor TEL) The voltage VGS) approximates the threshold voltage VT2 (Vg + on-Vni^Vt?). That is, the potential Vni of the 'node Νι' is maintained in the vicinity of the difference 値 between the open potential VG_0N and the threshold 値 voltage VT2 (VN1 and VG_on-VT2). In short, the characteristics of the light-emitting element 几乎 hardly affect the potential VN1 of the node K. Next, the condition for turning on the potential VG_0N necessary for the light-emitting control transistor TEL to operate in the saturation region is reviewed. In order to operate in the saturation region, the voltage VDS between the drain and the source of the light-emitting control transistor TEL should be higher than the voltage VGS between the gate and the source and the threshold voltage Vt2 (Vt2 < The differential chirp is also lower (VDS < VGS-V T2 ). When the potential of the node N2 is VN2, the above condition is expressed by the following formula (al).

Vn2<Vg_on-Vt2 ......(al) -16- 200818096 發光元件E之電壓降下成爲最大時之發光元件E的兩 端間的電壓爲VEL_MAX。電壓VEL_MAX，考慮發光元件E 的特性的個體差異的範圍與驅動電流Idr的電流量把陽極 的電壓決定爲基準（Vei^maxI)。亦即’電壓Vel_max， 係構成元件陣列部1 〇的多數發光元件E之中起因於電氣 特性的誤差而對於兩端間的電壓成爲最大的發光元件供給 最大的電流値之驅動電流Idr的場合（指定最高色階的場 合）之該發光元件E的兩端間的電壓。式（a 1)之電位VN2 的最大値爲「-Vel-Vel_max」’所以爲了使發光控制電晶 體TEL在飽和區域動作之打開電位VG_0N的範圍以下式（ a2 )表現。Vn2<Vg_on-Vt2 (al) -16- 200818096 The voltage between the both ends of the light-emitting element E when the voltage drop of the light-emitting element E is maximum is VEL_MAX. The voltage VEL_MAX determines the voltage of the anode as a reference (Vei^maxI) in consideration of the range of the individual difference of the characteristics of the light-emitting element E and the current amount of the drive current Idr. In other words, the voltage Vel_max is a case where a plurality of light-emitting elements E constituting the element array unit 1 are supplied with a maximum current 値 drive current Idr due to an error in electrical characteristics and a maximum voltage between the both ends ( The voltage between the both ends of the light-emitting element E when the highest color gradation is specified. The maximum 値 of the potential VN2 of the equation (a1) is "-Vel-Vel_max". Therefore, the range of the opening potential VG_0N in which the light-emission control transistor TEL operates in the saturation region is expressed by the following equation (a2).

Vg_on>-Vel-Vel_max + Vt2 ......(a2) 然而，本實施型態之驅動電晶體TDR其發光元件E的 光量（色階）改變的範圍的大部分在飽和區域動作。驅動 電晶體TDR爲了要在飽和區域動作，汲極一源極間的電壓 VDS，應該要比閘極一源極間的電壓VGS與閾値電壓VT1 ( Vt/O)之差分値還要低。使資料訊號 之電位Vdata的最大値爲Vdata_max的話，以上之條 件以下式（a3 )表現。又，電位VDATA_MAX，係驅動電流 Idr的電流量成爲最大的場合（亦即最高色階的場合）之 驅動電晶體TDR的閘極電位（VDATA_MAX<0 )。 -17- 200818096 V n 1 < V d a τ a_m a x _ V τ 1 .........(a3) 進而，於發光期間Pel爲了使發光控制 化爲打開狀態，發光控制電晶體ΤΕί之閘極 壓必須要低於閾値電壓 VT2。亦即，以下之 晶體TEL變 源極間的電 (a4 )成立 V g 一 〇 n，V τ 1 < V τ 2 ......... (a 4 ) 由式（a3 )與式（a4 )導出以下之式（a5 )°Vg_on>-Vel-Vel_max + Vt2 (a2) However, in the driving transistor TDR of the present embodiment, most of the range in which the amount of light (gradation) of the light-emitting element E changes is in the saturation region. In order to operate in the saturation region, the driving transistor TDR should have a voltage VDS between the drain and the source that is lower than the difference between the voltage VGS of the gate and the source and the threshold voltage VT1 (Vt/O). When the maximum value of the potential Vdata of the data signal is Vdata_max, the above condition is expressed by the following formula (a3). Further, the potential VDATA_MAX is the gate potential (VDATA_MAX < 0) of the driving transistor TDR when the current amount of the driving current Idr is maximized (i.e., when the highest color gradation is reached). -17- 200818096 V n 1 < V da τ a_m ax _ V τ 1 (a3) Further, in order to make the light emission control into an open state during the light emission period, the light emission control transistor ΤΕί The gate voltage must be lower than the threshold voltage VT2. That is, the following electric TEL varies between the source and the source (a4) to establish V g - 〇 n, V τ 1 < V τ 2 ... (a 4 ) by the formula (a3) and Equation (a4) derives the following equation (a5)°

Vg_on<Vdata_max-Vti+Vt2 ......... ( a 5 ) 由式（a2 )與式（a5 )，打開電位VG_0N 示由滿足式（a6)的範圍內選出。 VdaTA_MAX-Vt1+Vt2>Vg_〇N〉-VeL-VeL_MAX + Vt2 … 又，關閉電位vG_OFF，只要是發光控制電 爲關閉狀態的電壓即可。例如，高位側的電 〇V)作爲關閉電位V(3_0FF使用。 其次，使發光控制電晶體TEL於發光期鬧 動作的場合之效果，藉由使發光控制電晶體Ί 區域使其動作的場合（以下稱爲「對比例」） ，如圖4所 (a6) :晶體TEl成 g電位 VH ( 丨在飽和區域 在非飽和 之對比來加 -18- 200818096 以說明。以下假設將給電線L 2的電源電位V L設定爲「 -VEL = -18(V)」的場合。本實施型態之打開電位▽(}__爲 「_9 ( V )」，對比例之打開電位VG_0N爲「-18 ( V )」 。此外’如圖5所示，假設發光元件E爲特性A的場合與 特性B的場合。如該圖所示，即使將驅動電流iDR設定於 相同電流量的場合，特性的發光元件之兩端間的電壓也比 特性A的發光元件E還要高。 圖6係針對特性A及特性B顯示電位VDATA的振幅（ 絕對値）與驅動電流IDR之關係之圖。圖（a)顯示根據本實 施型％^之結果’圖（b)顯不根據對比例之結果。如圖（b)所 示，於對比例，即使電位VDATA爲同電位，驅動電流IDR 也因應於發光元件E的特性而不同。相對於此，於本實施 型恶’發光兀件爲特性A以及特性B之任一*，電位V D A T A 共通的場合驅動電流Idr之電流値都高精度地一致。 其次’圖7係針對特性A及特性B顯示電位VDATA的 振幅與各節點（N i，N 2 )之電位之關係之圖。與圖6同樣 ，圖（a)顯示根據本實施型態之結果，圖（b)顯示根據對比 例之結果。如圖（b)所示，發光控制電晶體τ e L在非飽和區 域動作的話，節點N的電位因應於發光元件e的特性而不 同，進而節點N 1的電位因應於節點N 2的電位而改變。另 一方面，如圖（a)所示，於本實施型態，節點n2的電位也 因應於發光元件E的特性而變動。然而，因爲發光控制電 晶體T e l在飽和區域動作，所以發光元件E不管是在特性 或特性B節點N 1的電位都不會改變。 -19- 200818096 然而，不管發光元件E的特性爲何，爲了維持節點 川的電位於特定値之構成，例如使與發光控制電晶體TEL 分別之電晶體（以下稱爲「緩衝用電晶體」）中介於發光 控制電晶體TEL與驅動電晶體TDR之間的構成亦可考慮。 於發光期間Pel，使發光控_制電晶體TEL與對比例同樣在 非飽和區域動作，同時使緩衝用電晶體在飽和區域動作， 可以緩和對節點N i的電位之發光元件E的特性的影響。 然而，會有構成畫素P的電晶體的個數隨著緩衝用電晶體 而增加的問題。對此，於本實施型態，作爲控制對發光元 件E之驅動電流IDR的可否供給支開關元件的作用，與緩 和發光元件E的電氣特性對節點N!的電位造成的影響之 作用，可以藉由一個發光控制電晶體TEL而實現。亦即， 與被配置緩衝用電晶體的構成相比，具有畫素電路P的構 成被簡化的優點。 < B :第2實施形態> 其次，說明本發明之第2實施型態。又，針對以下各 型態之中與第1實施型態在作用或功能共通的要素被賦予 與以上相同的符號而適當省略其詳細說明。 圖8係顯示本實施型態之畫素電路P的構成之電路圖 。如該圖所示，構成畫素電路的各電晶體（驅動電晶體 Tdr、發光控制電晶體TEL、電晶體SW!)係N通道型。 亦即，給電線L !與給電線L2與畫素電路p之各要素之間 的關係與第1實施型態相反。亦即，發光元件E的陽極被 -20- 200818096 接在給電線L !，驅動電晶體tdr的源極被接在給電線L2 。給電線L2的電位V L係成爲各部的電壓的基準之電位（ 0V)。給電線L!的電位VH係僅電壓Vel之高電位（ VEL>0)。發光控制電晶體TEL，中介於發光元件E的陰 極與驅動電晶體T D R的汲極之間。電晶體s W i或電容元件 C 1之配置與第1實施型態相同。 發光控制迅號Gel[h’與第1實施型態同樣，在發光 期間Pel成爲打開電位VG_0N，其他的期間維持於關閉電 位VG_0FF。但是，發光控制電晶體TEL爲N通道型，所以 打開電位Vg_on比關閉電位VG_0FF的電位更高。打開電位 VG_0N，與第1實施型態同樣，係以使發光控制電晶體Tel 在飽和區域動作的方式選定。針對打開電位VG_ON的條件 詳述如下。 首先，爲了要在飽和區域動作，發光控制電晶體TEL 的汲極一源極間的電壓VDS，應該要比閘極一源極間的電 壓 VGS與閾値電壓 VT2 ( VT2>0 )之差分値還要高（ Vds>Vgs-Vt2 )，所以成立下式（bl)。Vg_on < Vdata_max - Vti + Vt2 (a 5 ) From the equations (a2) and (a5), the turn-on potential VG_0N is selected from the range satisfying the formula (a6). VdaTA_MAX-Vt1+Vt2>Vg_〇N>-VeL-VeL_MAX + Vt2 ... Further, the potential vG_OFF is turned off, as long as it is a voltage in which the light-emission control is turned off. For example, the high-side electric cymbal V) is used as the closing potential V (3_0FF. Next, when the illuminating control transistor TEL is operated during the illuminating period, the illuminating control transistor Ί region is operated ( Hereinafter referred to as "comparative"), as shown in Fig. 4 (a6): crystal TE1 becomes g potential VH (丨 in the saturated region in the unsaturated contrast plus -18-200818096 to illustrate. The following assumption will be given to the wire L 2 When the power supply potential VL is set to "-VEL = -18(V)", the open potential ▽ (}__ of this embodiment is "_9 (V)", and the open potential VG_0N of the proportional ratio is "-18 (V). In addition, as shown in Fig. 5, it is assumed that the light-emitting element E is the characteristic A and the characteristic B. As shown in the figure, even when the drive current iDR is set to the same current amount, the characteristic light-emitting element is The voltage between the both ends is also higher than that of the light-emitting element E of the characteristic A. Fig. 6 is a graph showing the relationship between the amplitude (absolute 値) of the potential VDATA and the drive current IDR for the characteristic A and the characteristic B. (a) shows The result of this embodiment type %^ 'Fig. (b) is not based on the result of the comparative example As shown in (b), in the comparative example, even if the potential VDATA is at the same potential, the drive current IDR differs depending on the characteristics of the light-emitting element E. On the other hand, the ' 'light-emitting element of the present embodiment has the characteristic A and Any one of the characteristics B*, when the potential VDATA is common, the current 値 of the driving current Idr is uniformly coincident. Next, Fig. 7 shows the amplitude of the potential VDATA and the respective nodes (N i, N 2 ) for the characteristic A and the characteristic B. A diagram showing the relationship between the potentials. Similarly to Fig. 6, Fig. (a) shows the result according to the present embodiment, and Fig. (b) shows the result according to the comparative example. As shown in Fig. (b), the illuminating control transistor τ e When L operates in the unsaturated region, the potential of the node N differs depending on the characteristics of the light-emitting element e, and the potential of the node N 1 changes in accordance with the potential of the node N 2 . On the other hand, as shown in (a), In the present embodiment, the potential of the node n2 also varies depending on the characteristics of the light-emitting element E. However, since the light-emission control transistor Tel operates in the saturation region, the light-emitting element E is in the characteristic or characteristic B node N1. The potential will not change. -19-200818096 However, regardless of the characteristics of the light-emitting element E, in order to maintain the configuration in which the power of the node is located at a specific level, for example, a transistor (hereinafter referred to as a "buffer transistor") for each of the light-emitting control transistors TEL is interposed. The configuration between the light-emitting control transistor TEL and the driving transistor TDR can also be considered. During the light-emitting period Pel, the light-emitting control transistor TEL and the contrast ratio are also operated in the unsaturated region, and the buffer transistor is saturated. The regional operation can alleviate the influence on the characteristics of the light-emitting element E of the potential of the node N i . However, there is a problem that the number of transistors constituting the pixel P increases with the buffer transistor. On the other hand, in the present embodiment, the effect of controlling whether or not the drive current IDR of the light-emitting element E can be supplied to the branch-switching element can be used to alleviate the influence of the electrical characteristics of the light-emitting element E on the potential of the node N! It is realized by a light-emitting control transistor TEL. That is, the configuration having the pixel circuit P is simplified as compared with the configuration in which the buffer transistor is disposed. <B: Second Embodiment> Next, a second embodiment of the present invention will be described. In the following, the same reference numerals are given to the elements that are common to the functions or functions of the first embodiment, and the detailed description thereof will be appropriately omitted. Fig. 8 is a circuit diagram showing the configuration of the pixel circuit P of the present embodiment. As shown in the figure, each of the transistors (driving transistor Tdr, illuminating control transistor TEL, and transistor SW!) constituting the pixel circuit is of an N-channel type. That is, the relationship between the power supply line L! and the respective elements of the power supply line L2 and the pixel circuit p is opposite to that of the first embodiment. That is, the anode of the light-emitting element E is connected to the power supply line L! by -20-200818096, and the source of the drive transistor tdr is connected to the power supply line L2. The potential VL of the power supply line L2 is a reference potential (0 V) of the voltage of each unit. The potential VH of the supply line L! is only a high potential (VEL > 0) of the voltage Vel. The light-emitting control transistor TEL is interposed between the cathode of the light-emitting element E and the drain of the driving transistor T D R . The arrangement of the transistor s W i or the capacitive element C 1 is the same as that of the first embodiment. Similarly to the first embodiment, the light emission control signal Gel[h' is in the light-emitting period Pel at the turn-on potential VG_0N, and the other period is maintained at the turn-off potential VG_0FF. However, since the light-emission control transistor TEL is of the N-channel type, the turn-on potential Vg_on is higher than the potential of the turn-off potential VG_0FF. The potential VG_0N is turned on, and is selected in such a manner that the light-emission control transistor Tel operates in a saturation region as in the first embodiment. The conditions for turning on the potential VG_ON are detailed below. First, in order to operate in the saturation region, the voltage VDS between the drain and the source of the light-emitting control transistor TEL should be greater than the difference between the voltage VGS between the gate and the source and the threshold voltage VT2 (VT2 > 0). To be high (Vds > Vgs-Vt2), the following formula (bl) is established.

Vn2〉Vg_on-Vt2 ......(bl) 考慮到式（bl )之電位 VN2的最大値爲「VEL-Vel_max」的話’由式（bl )導出以下之式（b2 ) (VEL一MAX〉〇) 〇 -21 - 200818096 V( 此 動電晶 一源極 要高（ 之電位 量成爲 之最大 V> 進 開狀態 VG 由 VG 由 V G ON 5 丨—O〆 VeL 一 Μ AX +Vt2 ......... ( b 2 ) 外，爲了要使驅動電晶體TDR在飽和區域動作，驅 體TDR的汲極一源極間的電壓VDS，應該要比閘極 間的電壓VGS與閾値電壓VT1 ( VT1>0 )之差分値還 Vds>VGs-Vti )，所以成立下式（b3 )。式（b3 ) VdATA + MAxCVdATA + MAX’O) ’ 係驅動電流 Idr 之電流 最大時之驅動電晶體TDR的閘極電位（電位VDATA 値）。 丨 1 > Vd AT A一 MAX-Vt 1 .........(b3) 而’於發光期間Pel發光控制電晶體TEL變化爲打 ’所以成立以下式（b4 )。 一on-VT 1 >vT2 ......... (b4) 式（b3)與式（b4)導出以下之式（b5)。 …（b 5 ) °N^VData max-VTi+Vt2 式（b2 )與式（b5 )，本實施型態之打開電位 如151 9所示由滿足式（b6 )的範圍內選出。 -22- 200818096Vn2>Vg_on-Vt2 (b) Considering that the maximum value of the potential VN2 of the equation (bl) is "VEL-Vel_max", the following equation (b2) is derived from the equation (bl) (VEL-MAX) 〉〇) 〇-21 - 200818096 V(The power source has a high source (the potential is the largest V>; the VG is from VG by VG ON 5 丨—O〆VeL Μ AX +Vt2 .. . . . (b 2 ) In addition, in order to operate the driving transistor TDR in the saturation region, the voltage VDS between the drain and the source of the body TDR should be higher than the voltage VGS between the gate and the threshold 値The voltage VT1 ( VT1 > 0 ) has a difference V Vds > VGs - Vti ), so the following formula (b3 ) is established. (b3 ) VdATA + MAxCVdATA + MAX'O) 'The driving current when the current of the driving current Idr is maximum The gate potential of the crystal TDR (potential VDATA 値).丨 1 > Vd AT A - MAX - Vt 1 (b3) and the Pel light-emission control transistor TEL changes to "on" during the light-emitting period, so that the following formula (b4) is established. An on-VT 1 > vT2 ... (b4) Equation (b3) and Equation (b4) derive the following equation (b5). (b 5 ) °N^VData max-VTi+Vt2 Formula (b2) and formula (b5), the on-potential of this embodiment is selected from the range satisfying the formula (b6) as shown by 151. -22- 200818096

Vdata_max-Vti + Vt2&lt;Vg一on〈VEl-Vel_max + Vt2 ··· (b6) 成 ( EL 元 電 電 電 極 Ο 線 極 體 連 的 前 位 又，關閉電位VG_0FF，只要是發光控制電晶體TEL 爲關閉狀態的電位即可。例如，低位側的電源電位 ον)作爲關閉電位VGOFF使用。 如以上所說明的，於本實施型態發光控制電晶體T 也在發光期間PEL在飽和區域動作，所以可減低各發光 件E的電氣特性對驅動電流IDR造成的影響。 &lt; C :第3實施形態&gt; 圖1 〇係顯示相關於本發明的第3實施型態之畫素 路P的構成之電路圖。如該圖所示，本實施型態之畫素 路P，除了第1實施型態之要素外，包含電晶體SW2與 容元件C2。電晶體SW2，係中介於驅動電晶體TDR的閘 與汲極之間而控制二者的導電連接之P通道型的電晶體 於電晶體S W2的閘極由驅動電路（省略圖示）介由控制 18供給控制訊號GCP⑴。電容元件C2包含電極Ei與電 E2。電極Ei被接續於驅動電晶體TDR之閘極。電晶 SWi，中介於電極E2與資料線1 6之間控制二者的導電 接。 圖1 1係顯示被供給至第i行的第j列之畫素電路P 訊號的波形之計時圖。如該圖所示，於寫入期間PWT之 被設定重設期間PRS與補償期間PCP。選擇訊號GWT[i] 於重設期間PRS與補償期間Pcp與寫入期間PWT成爲低 -23- 200818096 準’於發光期間PEL成爲高位準。發光控制訊號gel[1]， 於重設期間pRS與發光期間PEL成爲打開電位VG_〇N，於 補償期間PCP與寫入期間PWT成爲關閉電位V(5_〇FF ( VG_0FF&gt;VG_0N )。控制訊號Gcp[1]，於重設期間pRS與補 償期間Pcp成爲低位準，於寫入期間PWT與發光期間Pel 成爲高位準。 其次，說明一個畫素電路P的動作。首先，於重設期 間Prs ’發光控制訊號GEL[i]成爲打開電位Vg on所以發光 控制電晶體TEL維持於打開狀態。此外，控制訊號GcP[1] 遷移至低位準’所以驅動電晶體TDR介由電晶體SW2被二 極體接續。亦即，於重設期間PRS，驅動電晶體TDR之閘 極（電極E!)被初期化爲因應於發光元件E的電氣特性 之電壓。此外，於重設期間P R s以及補償期間p c p，藉由 選擇訊號GWT⑴使電晶體SWi成爲打開狀態，資料訊號Vdata_max-Vti + Vt2&lt;Vg_on<VEl-Vel_max + Vt2 ··· (b6) into (EL element electric electrode Ο line pole body connection front position, turn off potential VG_0FF, as long as the illumination control transistor TEL is off The potential of the state is sufficient. For example, the power supply potential ον on the low side is used as the turn-off potential VGOFF. As described above, in the present embodiment, the light-emission control transistor T also operates in the saturation region during the light-emitting period, so that the influence of the electrical characteristics of the respective light-emitting elements E on the drive current IDR can be reduced. &lt;C: Third Embodiment&gt; Fig. 1 is a circuit diagram showing a configuration of a pixel path P according to a third embodiment of the present invention. As shown in the figure, the pixel path P of the present embodiment includes a transistor SW2 and a capacitive element C2 in addition to the elements of the first embodiment. The transistor SW2 is a P-channel type transistor in which a conductive connection between the gate and the drain of the driving transistor TDR is controlled to be electrically connected to the gate of the transistor S W2 by a driving circuit (not shown). Control 18 supplies control signal GCP(1). The capacitive element C2 includes an electrode Ei and an electric E2. The electrode Ei is connected to the gate of the driving transistor TDR. In the electric crystal SWi, the conductive connection between the electrodes E2 and the data line 16 is controlled. Fig. 11 is a timing chart showing the waveform of the pixel circuit P signal supplied to the jth column of the i-th row. As shown in the figure, the reset period PRS and the compensation period PCP are set in the write period PWT. The selection signal GWT[i] is low during the reset period PRS and the compensation period Pcp and the writing period PWT -23-200818096 准' during the light-emitting period PEL becomes a high level. In the light-emission control signal gel[1], the reset period pRS and the light-emitting period PEL become the turn-on potential VG_〇N, and the PCP and the write period PWT become the turn-off potential V (5_〇FF (VG_0FF&gt; VG_0N) during the compensation period. In the signal Gcp[1], the reset period pRS and the compensation period Pcp are at a low level, and the writing period PWT and the light-emitting period Pel are at a high level. Next, the operation of one pixel circuit P will be described. First, during the reset period Prs 'The illumination control signal GEL[i] becomes the turn-on potential Vg on, so that the illumination control transistor TEL is maintained in the on state. In addition, the control signal GcP[1] migrates to the low level 'so the drive transistor TDR is diode-polarized via the transistor SW2 That is, during the reset period PRS, the gate of the driving transistor TDR (electrode E!) is initialized to a voltage corresponding to the electrical characteristics of the light-emitting element E. Further, during the reset period PR s and the compensation period Pcp, the transistor SWi is turned on by selecting the signal GWT(1), the data signal

Su]被維持於基準電位vREF。亦即，電極e2被維持於基準 電位V R Ε ρ。 接著，補償期間Pcp開始時，發光控制訊號GEL[i]遷 移至關閉電位VG_OFF，發光控制電晶體TEL變化爲關閉狀 態。亦即，直到抵達補償期間Pcp的終點爲止，驅動電晶 體Tdr之閘極（電容兀件C2之電極Ε!)，收斂於給電線 Li之電源電位VH(0V)與驅動電晶體tdr的閾値電壓 VT1之差分値（VH-VT1 )。 於寫入期間P w τ，控制訊號G c p [ i ]遷移至高位準使驅 動電晶體T D R的二極體接續被解除，而且電晶體s w!被維 -24- 200818096 持於打開狀態而資料訊號sn]由基準電位VRDF變更爲電 位VDATA。驅動電晶體TDR之閘極之阻抗充分地高，所以 電極E之電位（驅動電晶體TDR之閘極的電位），因應於 電極E2的電位的改變量（基準電位VREF與電位VDATA之 差分値）而改變。亦即，驅動電晶體TDR的鬧極被設定爲 因應於電位VD ATA之電位。寫入期間PWT經過後的發光期 間Pel，發光控制訊號GEL[1]被設定爲打開電位VG_0N而發 光控制電晶體TEL成爲打開狀態，所以因應於驅動電晶體 TDR之閘極電位的驅動電流IDR經由發光控制電晶體而被 供給至發光元件E。亦即，發光元件以因應於電位VDATA 的光量發光。 如以上所述，於本實施型態，將驅動電晶體TEL的閘 極電位，於補償期間Pcp使收斂於對應於閾値電位VT1的 電位，於寫入期間Pwt利用電容元件C2使其改變而設定 於因應電位 VDATA之電位。亦即，可以補償驅動電晶體 TEL的閾値電壓 VT1之誤差，高精度地產生因應於電位 V D A Τ Α之驅動電流I D R。 本實施型態之打開電位VG_0N，與第1實施型態之式 (a6 )同樣，係由使發光控制電晶體TEL以及驅動電晶體 TDR在飽和區域動作之式（e )的範圍內選定。亦即，於本 實施型態，也可發揮與第1實施型態同樣的效果。Su] is maintained at the reference potential vREF. That is, the electrode e2 is maintained at the reference potential V R Ε ρ. Then, when the compensation period Pcp is started, the light emission control signal GEL[i] is shifted to the off potential VG_OFF, and the light emission control transistor TEL is changed to the off state. That is, until the end of the compensation period Pcp is reached, the gate of the driving transistor Tdr (the electrode of the capacitor C2!) converges on the power supply potential VH (0 V) of the power supply line Li and the threshold voltage of the driving transistor tdr. The difference VT of VT1 (VH-VT1). During the writing period P w τ, the control signal G cp [ i ] migrates to a high level, so that the diode of the driving transistor TDR is successively released, and the transistor sw! is held in the open state by the dimension-24-200818096 and the data signal Sn] is changed from the reference potential VRDF to the potential VDATA. Since the impedance of the gate of the driving transistor TDR is sufficiently high, the potential of the electrode E (the potential of the gate of the driving transistor TDR) depends on the amount of change in the potential of the electrode E2 (the difference between the reference potential VREF and the potential VDATA) And change. That is, the polarity of the driving transistor TDR is set to correspond to the potential of the potential VD ATA. In the light-emitting period Pel after the PWT elapses during the writing period, the light-emission control signal GEL[1] is set to the turn-on potential VG_0N and the light-emission control transistor TEL is turned on, so that the drive current IDR corresponding to the gate potential of the drive transistor TDR is via The light-emitting control transistor is supplied to the light-emitting element E. That is, the light-emitting element emits light in response to the amount of light at the potential VDATA. As described above, in the present embodiment, the gate potential of the driving transistor TEL is caused to converge to the potential corresponding to the threshold 値 potential VT1 during the compensation period Pcp, and is set by the capacitance element C2 during the writing period Pwt. In response to the potential of the potential VDATA. That is, the error of the threshold voltage VT1 of the driving transistor TEL can be compensated for, and the driving current I D R corresponding to the potential V D A Τ 产生 can be generated with high precision. The turn-on potential VG_0N of this embodiment is selected in the range of the equation (e) in which the light-emission control transistor TEL and the drive transistor TDR operate in the saturation region, similarly to the equation (a6) of the first embodiment. That is, in the present embodiment, the same effects as those of the first embodiment can be exerted.

VdATA_MAX-Vt1+Vt2&gt;Vg_ON&gt;-Vel-VeL_MAX + Vx2 ...(c) -25- 200818096 其中，本實施型態之電位 Vdata_max，係以驅動電 Idr之電流量成爲最大的方式選定電位VDATA時在寫入 間P w T被設定的驅動電晶體T D R的閘極電位，與資料線 的電位Vdata不同。 &lt; D :第4實施形態〉 其次，說明本發明之第4實施型態。於以上之各實 型態，例示因應於資料線16之電位VDATA而被設定發 元件E的光量之電壓程式方式之畫素電路P。相對於此 本實施型態之畫素電路P，係因應於資料線1 6之電 Idata而被設定發光元件E的光量之電流程式方式。 圖1 2係顯不畫素電路P的構成之電路圖。如該圖 示，本實施型態之畫素電路P，包含與驅動電晶體TDR 發光控制電晶體TEL同樣之P通道型電晶體SWi與電晶 SW2。電晶體S Wi，由驅動電晶體TDR與發光控制電晶 TEl之間的節點N i分歧而被配置在到達資料線1 6的路 上，控制驅動電晶體Tdr之汲極與資料線1 6之電氣接 。電晶體SWi與發光控制電晶體TEL，在相互接近的位 以相同尺寸（通道長或通道寬幅）形成。電晶體SW2控 驅動電晶體TDR之閘極與汲極之電氣接續。電晶體SW 及電晶體S W2之各個的閘極被接續於選擇線1 2。 圖1 3係顯示本實施型態之發光裝置D的構成之方 圖。如該圖所示，電源電路20，除了對發光控制電路 也對寫入控制電路22供給打開電位VG_0N以及關閉電 流 期 16 施 光 ， 流 所 或 體 體 徑 續 置 制 以 塊 2 4 位 -26- 200818096VdATA_MAX-Vt1+Vt2&gt;Vg_ON&gt;-Vel-VeL_MAX + Vx2 (c) -25- 200818096 Here, the potential Vdata_max of the present embodiment is when the potential VDATA is selected such that the amount of current of the driving electric Idr becomes maximum. The gate potential of the drive transistor TDR set between the writes P w T is different from the potential Vdata of the data line. &lt;D: Fourth Embodiment> Next, a fourth embodiment of the present invention will be described. In each of the above embodiments, a pixel circuit P of a voltage program type in which the amount of light of the element E is set in response to the potential VDATA of the data line 16 is exemplified. In contrast, the pixel circuit P of the present embodiment is a current program mode in which the amount of light of the light-emitting element E is set in response to the electric current Idata of the data line 16. Fig. 1 is a circuit diagram showing the configuration of the pixel circuit P. As shown in the figure, the pixel circuit P of the present embodiment includes the P-channel type transistor SWi and the transistor SW2 similar to the driving transistor TDR light-emitting control transistor TEL. The transistor S Wi is disposed on the way to the data line 16 by the node N i between the driving transistor TDR and the light-emitting control transistor TEl, and controls the electric pole of the driving transistor Tdr and the data line 16 Pick up. The transistor SWi and the light-emission control transistor TEL are formed in the same size (channel length or channel width) at positions close to each other. The transistor SW2 controls the electrical connection between the gate and the drain of the transistor TDR. The gates of each of the transistor SW and the transistor S W2 are connected to the selection line 12. Fig. 1 is a view showing the configuration of the light-emitting device D of the present embodiment. As shown in the figure, the power supply circuit 20 supplies the open potential VG_0N and the off current period 16 to the write control circuit 22 in addition to the light emission control circuit, and the flow or body diameter is continued to block 2 4 bits-26 - 200818096

Vg_off(Vg_〇n&lt;Vg_〇ff)。如圖14所不’寫入控制電路 22，將選擇訊號GWT[I]於寫入期間設定爲打開電位VG_ON ，其他期間（包含發光期間PEL)設定爲關閉電位Vg_off 。發光控制訊號Gel [η之波形與第1實施型態相同。 資料供給電路26，係於選擇訊號GWT[i]成爲打開電位 VG_ON的寫入期間PWT，將資料訊號Su]設定爲因應於第i 行所屬的第j列之畫素電路P所指定的色階之電流Idata 之手段（例如η個電流輸出型D/A變換器）。 於以上之構成，在寫入期間Pwt選擇訊號GWT[1]遷移 至打開電位VG_ON時，驅動電晶體TDR介由電晶體8~2被 二極體接續。此外，藉由打開電位 VG 0N的供給電晶體 SWi變換爲打開狀態，所以如圖1 2之虛線所示，資料訊 號 S[j] 之電流I D A T A由給電線L 1經由驅動電晶體T D R與節 點N i與電晶體S W1流入第j列之資料線1 6。亦即，於電 容兀件Cl被保持著因應於電流Idata之電壓。 寫入期間 Pwt經過後之發光期間 Pel，選擇訊號 GWT[i]被設定於關閉電位VG_0FF使電晶體3\\^與電晶體 SW2變化爲關閉狀態。接著，發光控制訊號GEL[1]遷移至 打開電位VG_0N而發光控制電晶體TEL變化爲打開狀態時 ，因應於驅動電晶體TDR之閘極電位（在之前的寫入期間 TWT被保持於電容元件Ci的電位）之驅動電流IDR經由 發光控制電晶體TEL而被供給至發光元件E。亦即，發光 元件以因應於電流Idata的光量發光。 本實施型態之打開電位VG_0N，與第1實施型態之式 •27- 200818096 (a 6 )同樣，係由使發光控制電晶體T e l在飽和區域動作 之式（d )的範圍內選定。亦即，於本實施型態，也可發 揮與第1實施型態同樣的效果。 V DATA_MAX~V X 1 + V T2&gt;V G_ON&gt;'V EL~V EL_MAX + Vt2 ( d) 其中’式（d)之電位Vdata_max’係以驅動電流Idr 之電流量成爲最大的方式選定電流Idata時在寫入期間Vg_off (Vg_〇n &lt; Vg_〇ff). As shown in Fig. 14, the write control circuit 22 sets the selection signal GWT[I] to the turn-on potential VG_ON during the write period, and sets the other period (including the light-emitting period PEL) to the turn-off potential Vg_off. The waveform of the light emission control signal Gel [η is the same as that of the first embodiment. The data supply circuit 26 sets the data signal Su] to the color gradation specified by the pixel circuit P of the jth column to which the ith row belongs, in the write period PWT at which the selection signal GWT[i] becomes the turn-on potential VG_ON. The means of current Idata (for example, n current output type D/A converters). In the above configuration, when the Pwt selection signal GWT[1] is shifted to the turn-on potential VG_ON during the writing period, the driving transistor TDR is connected to the diode via the transistors 8~2. Further, by turning on the supply transistor SWi of the potential VG 0N to be turned on, the current IDATA of the data signal S[j] is supplied from the power supply line L1 via the driving transistor TDR and the node N as indicated by a broken line in FIG. i and the transistor S W1 flow into the data line 16 of the jth column. That is, the capacitor element C1 is held in response to the voltage of the current Idata. During the writing period Pwt elapses after the light-emitting period Pel, the selection signal GWT[i] is set to the off potential VG_0FF to change the transistor 3\\^ and the transistor SW2 to the off state. Then, when the light emission control signal GEL[1] shifts to the turn-on potential VG_0N and the light-emitting control transistor TEL changes to the open state, the gate potential of the driving transistor TDR is responded to (the TWT is held in the capacitive element Ci during the previous writing period). The drive current IDR of the potential is supplied to the light-emitting element E via the light-emission control transistor TEL. That is, the light-emitting element emits light in response to the amount of light of the current Idata. The turn-on potential VG_0N of the present embodiment is selected in the range of the formula (d) in which the light-emission control transistor T e l operates in the saturation region, similarly to the first embodiment of the formula: 27-200818096 (a 6 ). That is, in the present embodiment, the same effects as those of the first embodiment can be exerted. V DATA_MAX~VX 1 + V T2&gt;V G_ON&gt;'V EL~V EL_MAX + Vt2 ( d) where the potential Vdata_max of the equation (d) is selected when the current Idata is maximized in such a manner that the current amount of the drive current Idr is maximized. Write period

Pwt被設定的驅動電晶體TDR的閘極電位（VDATA_MAX&lt;0 ) 〇 此外，於本實施型態，電晶體SW與發光控制電晶體 TEL爲相同特性（相同導電型及相同尺寸）接近而形成， 而且電晶體SWi與發光控制電晶體TEL藉由相同的打開電 位VG_0N而成爲打開狀態。根據此構成的話，節點N的電 位（驅動電晶體TDR的汲極的電位）在寫入期間PWT與發 光期間Pel —致。亦即，在寫入期間Pwt之電流Idata的 電流量與在發光期間PEL之驅動電流IDR的電流量可以高 精度地使其一致。亦即，可將發光元件的光量因應於電流 Idata而高精度地控制。 &lt; E :變形例&gt; 對以上各型態可以加上種種的變形。具體之變形樣態 例示如下。又，亦可適當組合以下各樣態。 -28- 200818096 (1 )變形例1 於第1實施型態至第3實施型態’與第4實施型 樣，將電源電路20產生的打開電位VG_0N以及關閉 VG_OFF作爲寫入控制電路22產生的選擇訊號Gw: GWT[m]之電壓來利用亦可。根據以上的構成，電源電丨 產生的電壓的總數被削減，所以實現電源電路20的 規模的縮小或耗電量的減低。 (2 )變形例2 於第3及第4實施型態，例示畫素電路P以P通 電晶體構成的場合，但與第2實施型態同樣，圖1 0 1 2之各電晶體可適當地變更爲N通道型。此外，構 素電路P之所有的電晶體沒有必要爲相同的導電型。 ，只要驅動電晶體TDR與發光控制電晶體TEL爲相同 型，電晶體SWi或電晶體SW2之導電型可被任意變更 (3 )變形例3 如以上各型態所述根據驅動電晶體TDR在飽和區 作的構成’可以作爲安定地產生驅動電流I D R的定電 而使驅動電晶體TDR動作。然而，發光控制電晶體τ 飽和區域內動作的話，可以達成本發明所期待的效果 以驅動電晶體T D R的動作點在飽和區域內的要求對本 而言並非必要。例如，第1實施型態之式（a 5 )或第 施型態之式（b5)不成立亦可。 態同 電位 | 20 電路 道型 或圖 成畫 亦即 導電 域動 流源 EL在 ，所 發明 2實 -29- 200818096 (4 )變形例4 於以上各型態，作爲發光元件E例示了有機發光二極 體元件，但對利用此元件以外的發光元件之種種發光裝置 ，本發明亦可適用。例如，可以將包含由無機EL材料所 構成的發光層之發光元件或發光二極體元件、場發射（FE )元件、表面導電型放射（SE:Surface-conduction Electron -emitter)元件、彈道電子放出（BS:Ballistic electron Surface emitting)元件等種種光電元件利用於本發明。 &lt; F :應用例&gt; 其次，說明相關於本發明之電子機器。於圖1 5至圖 1 7，圖示相關於以上所例示的發光裝置D採用作爲顯示裝 置之電子機器之型態。 圖1 5係顯示採用發光裝置D之可攜型個人電腦的構 成之立體圖。個人電腦2 00 0，具備顯示影像之發光裝置d ，被設置電源開關2001或鍵盤2002之本體部2010。發光 裝置D因爲利用有機發光二極體元件作爲發光元件e，所 以可顯示視角寬廣容易觀賞的畫面。 圖1 6係顯示適用發光裝置D之行動電話機的構成之 立體圖。行動電話機3 00 0，具備複數操作按鍵3〇〇i以及 捲動按鍵3 0 0 2，及顯示各種影像之發光裝置d。藉由操作 捲動按鍵3002，可以使顯示於發光裝置d的畫面捲動。 圖17係顯示適用發光裝置D之攜帶資訊終端（Pda :Personal Digital Assistants)的構成之立體圖。資訊攜 -30- 200818096 帶終端4 0 0 0，具備複數操作按鍵4 0 0 1以及電源開關4 0 〇 2 ，及顯示各種影像之發光裝置D。操作電源開關40〇2時 ，通訊錄或行程表等各種資訊被顯示於發光裝置D。 又，作爲相關於本發明的發光裝置被適用的電子機器 ，除了圖1 5至圖1 7所示之機器以外，還可以舉出數位相 機、電視、攝影機、汽車導航裝置、呼叫器、電子手冊、 電子紙、計算機、文書處理機、工作站、電視電話、P 〇 S 終端、印表機、掃描器、複印機、錄放影機、具備觸控面 板的裝置等。此外，相關於本發明之發光裝置的用途不限 於影像的顯示。例如，於電子攝影方式的影像形成裝置， 因應於應該被形成於紙張等記錄材的影像而使用使感光體 曝光的曝光裝置（線狀光學頭），但此種曝光裝置也可利 用本發明之發光裝置。 【圖式簡單說明】 圖1係顯示相關於第1實施型態之發光裝置的構成之 方塊圖。 圖2係顯示選擇訊號及發光控制訊號的波形之計時圖 〇 圖3係顯示畫素電路的構成之電路圖。 圖4係供說明打開電位VG_0N的範圍之槪念圖。 圖5係顯示發光元件的端子間的電壓與電流之關係之 圖。 圖6係顯示電位VDATA與驅動電流IDR之關係之圖。 -31 - 200818096 圖7係顯示電位VDATA與各節點的電位之關係之圖。 圖8係顯示相關於第2實施型態之畫素電路的構成之 電路圖。 圖9係供說明打開電位VG_0N的範圍之槪念圖。 圖1 〇係顯示相關於第3實施型態之畫素電路的構成 之電路圖。 圖1 1係供說明畫素電路的動作之計時圖。 圖1 2係顯示相關於第4實施型態之畫素電路的構成 之電路圖。 圖13係顯不發光裝置的構成之方塊圖。 圖1 4係顯示選擇訊號及發光控制訊號的波形之計時 圖。 圖1 5係顯示適用本發明之電子機器之型態（個人電 腦）之立體圖。 圖1 6係顯示適用本發明之電子機器之型態（行動電 話）之立體圖。 圖1 7係顯示適用本發明之電子機器之型態（攜帶資 訊終端）之立體圖。 圖1 8係顯示供驅動發光元件的構成之電路圖。 【主要元件符號說明】 1 0 :元件陣列部 1 2 :選擇線 1 4 :發光控制線 -32- 200818096 1 6 :資料線 2 0 :電源電路 22 :寫入控制電路 2 4 :發光控制電路 26 :資料供給電路 D :發光裝置 E :發光元件Pwt is set to the gate potential of the driving transistor TDR (VDATA_MAX &lt; 0 ) 〇 Further, in the present embodiment, the transistor SW and the light-emitting control transistor TEL are formed in the same characteristic (same conductivity type and same size) as that of the light-emitting control transistor TEL. Further, the transistor SWi and the light-emission control transistor TEL are turned on by the same turn-on potential VG_0N. According to this configuration, the potential of the node N (the potential of the drain of the driving transistor TDR) coincides with the light-emitting period Pel during the writing period PWT. That is, the current amount of the current Idata during the writing period Pwt and the current amount of the driving current IDR during the light-emitting period PEL can be made to coincide with each other with high precision. That is, the amount of light of the light-emitting element can be controlled with high precision in accordance with the current Idata. &lt;E: Modifications&gt; Various modifications can be added to the above various types. The specific deformation pattern is exemplified as follows. Further, the following aspects can be combined as appropriate. -28-200818096 (1) Modification 1 In the first to third embodiments, the fourth embodiment, the open potential VG_0N and the off VG_OFF generated by the power supply circuit 20 are generated as the write control circuit 22. Select the signal Gw: GWT[m] voltage to use. According to the above configuration, the total number of voltages generated by the power source is reduced, so that the scale of the power supply circuit 20 is reduced or the power consumption is reduced. (2) Modification 2 In the third and fourth embodiments, the pixel circuit P is exemplified by a P-powered crystal. However, as in the second embodiment, each of the transistors of FIG. Change to N channel type. Further, all of the transistors of the constituent circuit P are not necessarily of the same conductivity type. As long as the driving transistor TDR and the light-emitting control transistor TEL are the same type, the conductivity type of the transistor SWi or the transistor SW2 can be arbitrarily changed. (3) Modification 3 As described above, the driving transistor TDR is saturated. The configuration of the region can be used to stably drive the driving current IDR to operate the driving transistor TDR. However, when the light-emitting control transistor τ is operated in the saturation region, the desired effect of the present invention can be achieved. The requirement that the operating point of the driving transistor T D R is in the saturated region is not essential. For example, the formula (a 5 ) of the first embodiment or the formula (b5) of the first embodiment may not be established. State of the same potential | 20 circuit pattern or drawing, that is, the conductive field current source EL, invented 2 real -29-200818096 (4) Modification 4 In the above various forms, as the light-emitting element E exemplifies the organic light-emitting A diode element, but the present invention is also applicable to various light-emitting devices using light-emitting elements other than the element. For example, a light-emitting element or a light-emitting diode element including a light-emitting layer composed of an inorganic EL material, a field emission (FE) element, a surface-conducting type emission (SE: Surface-conduction Electron-emitter) element, and ballistic electron emission can be emitted. Various types of photovoltaic elements such as (BS: Ballistic electron Surface emitting) elements are used in the present invention. &lt;F: Application Example&gt; Next, an electronic device related to the present invention will be described. Figs. 15 to 17 show the type of electronic apparatus in which the above-described illuminating device D is employed as a display device. Fig. 15 is a perspective view showing the construction of a portable personal computer using the light-emitting device D. The personal computer 20000 has a light-emitting device d for displaying an image, and is provided with a power switch 2001 or a body portion 2010 of the keyboard 2002. Since the light-emitting device D uses the organic light-emitting diode element as the light-emitting element e, it is possible to display a screen having a wide viewing angle and easy viewing. Fig. 16 is a perspective view showing the configuration of a mobile phone to which the light-emitting device D is applied. The mobile phone 30000 has a plurality of operation buttons 3〇〇i and a scroll button 3 0 0 2, and a light-emitting device d for displaying various images. By operating the scroll button 3002, the screen displayed on the light-emitting device d can be scrolled. Fig. 17 is a perspective view showing the configuration of a portable information terminal (Pda: Personal Digital Assistants) to which the light-emitting device D is applied. Information Carrying -30- 200818096 With terminal 4 0 0 0, it has a plurality of operation buttons 4 0 0 1 and a power switch 4 0 〇 2, and a light-emitting device D for displaying various images. When the power switch 40 〇 2 is operated, various information such as an address book or a travel schedule is displayed on the light-emitting device D. Further, as an electronic device to which the light-emitting device according to the present invention is applied, in addition to the devices shown in FIGS. 15 to 17 , a digital camera, a television, a video camera, a car navigation device, a pager, and an electronic manual can be cited. , electronic paper, computer, word processor, workstation, videophone, P 〇S terminal, printer, scanner, copier, video recorder, device with touch panel, etc. Further, the use of the light-emitting device according to the present invention is not limited to the display of an image. For example, in an image forming apparatus of an electrophotographic system, an exposure apparatus (linear optical head) for exposing a photoreceptor is used in an image to be formed on a recording material such as paper. However, such an exposure apparatus can also utilize the present invention. Light emitting device. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the configuration of a light-emitting device according to a first embodiment. Fig. 2 is a timing chart showing the waveforms of the selection signal and the illumination control signal. Fig. 3 is a circuit diagram showing the configuration of the pixel circuit. Fig. 4 is a conceptual diagram for explaining the range of the opening potential VG_0N. Fig. 5 is a view showing the relationship between voltage and current between terminals of a light-emitting element. Fig. 6 is a graph showing the relationship between the potential VDATA and the drive current IDR. -31 - 200818096 Figure 7 is a graph showing the relationship between the potential VDATA and the potential of each node. Fig. 8 is a circuit diagram showing the configuration of a pixel circuit according to the second embodiment. Fig. 9 is a conceptual diagram for explaining the range of the opening potential VG_0N. Fig. 1 is a circuit diagram showing the configuration of a pixel circuit relating to the third embodiment. Fig. 1 is a timing chart for explaining the operation of the pixel circuit. Fig. 1 is a circuit diagram showing the configuration of a pixel circuit relating to the fourth embodiment. Figure 13 is a block diagram showing the construction of a non-light emitting device. Figure 1 shows the timing diagram of the waveforms of the selection signal and the illumination control signal. Fig. 15 is a perspective view showing the type (personal computer) of the electronic apparatus to which the present invention is applied. Fig. 16 is a perspective view showing the type (mobile phone) of the electronic machine to which the present invention is applied. Fig. 1 is a perspective view showing the type of electronic device (carrying information terminal) to which the present invention is applied. Fig. 1 is a circuit diagram showing the configuration of a driving light-emitting element. [Description of main component symbols] 1 0 : component array section 1 2 : selection line 1 4 : emission control line - 32 - 200818096 1 6 : data line 2 0 : power supply circuit 22 : write control circuit 2 4 : illumination control circuit 26 : data supply circuit D: light-emitting device E: light-emitting element

GwT[i](G\VT[&quot;〜G\VT[m]:選擇訊號 GEL[i](GEL[l]〜GEL[m]):發光控制訊號 Idr :驅動電流 L1，L 2 :給電線 Ni，N2 :節點 P ： 畫素 電路 S[j](S[l] 〜S [n]): 資料訊號 S W !，SW2 :電 晶體 T D R :驅 動電晶 體 Tel :發 光控制 電晶體 Vg_ ON ： 打開電 位 Vg_ OFF ： 關閉電位 Vti 動電晶 體之閾値電壓 VT2 :發光控制電晶體之閾値電壓 -33-GwT[i](G\VT[&quot;~G\VT[m]: selection signal GEL[i](GEL[l]~GEL[m]): illumination control signal Idr: drive current L1, L 2 : give Wire Ni, N2: Node P: Pixel circuit S[j] (S[l] ~ S [n]): Data signal SW !, SW2 : Transistor TDR: Driving transistor Tel: Illumination control transistor Vg_ ON : Turn on the potential Vg_ OFF : Turn off the potential Vti The threshold voltage of the moving transistor VT2 : The threshold voltage of the light-emitting control transistor -33-

Claims (1)

200818096 十、申請專利範圍 1 · 一種畫素電路之驅動方法，係包含藉由驅動電流的 f共給而發光的發光元件與產生驅動電流的驅動電晶體，在 s前述驅動電晶體對前述發光元件供給的驅動電流的路徑 ±被配置與前述驅動電晶體相同的導電型之發光控制電晶 體的畫素電路之驅動方法，其特徵爲： 於使前述發光元件發光的發光期間以使前述發光控制 電晶體在飽和區域成爲打開（ON )狀態的方式設定該發 光控制電晶體的閘極電位。 2 ·如申請專利範圍第1項之畫素電路之驅動方法，其 中 前述驅動電晶體與前述發光控制電晶體係P通道型， 前述驅動電晶體中介於第1給電線與前述發光控制電 晶體之間，前述發光元件中介於前述發光控制電晶體與第 2給電線之間， 以前述第1給電線之電位爲基準時之前述第2給電線 的電位爲—V EL (- VEL &lt; 〇 )，以前述發光控制電晶體側 的電極的電位爲基準於前述發光元件之電壓降下爲最大時 之該發光元件的兩端間的電壓爲VEL_MAX ( VEL_MAX &lt; 0 ) ，前述發光控制電晶體之閾値電壓爲時VT2 ( VT2 &lt; 0 )時 ，前述發光期間之前述發光控制電晶體的閘極電位Vg_on ，以滿足 Vg_on〉一 Vel — Vel_max + Vt2 -34- 200818096 的方式設定。 3 .如申請專利範圍第2項之畫素電路之驅動方法， 中 前述驅動電流的電流量最大時之前述驅動電晶體的 極-源極間的電壓爲 VdATA_MAX(VdATA_MAX&lt; 0 ) ’前 驅動電晶體的閾値電壓爲V T1 ( V T i &lt; 〇 )時，把前述發 期間之前述發光控制電晶體的閘極電位V g_on以滿足 Vg_ON&lt; VdATA_MAX~ Vti+ Vt2 的方式設定。 4 .如申請專利範圍第1項之畫素電路之驅動方法， 中 前述驅動電晶體與前述發光控制電晶體係N通道型 前述發光元件中介於第1給電線與前述發光控制電 體之間，前述驅動電晶體中介於前述發光控制電晶體與 2給電線之間， 以前述第2給電線之電位爲基準時之前述第1給電 的電位爲V E L ( V E L &gt; 〇 ) ’以前述發光控制電晶體側的 極的電位爲基準於前述發光元件之電壓降下爲最大時之 發光元件的兩端間的電壓爲 VeL_MAX ( VeL_MAX&gt; 0) ’ 述發光控制電晶體之閾値電壓爲VT2 ( νΤ2 &gt; 0 )時’前 發光期間之前述發光控制電晶體的閘極電位VG_0N ’以 足 其 閘 述 光 其 晶 第 線 電 該 、r · 刖 述 滿 -35- 200818096 Vg_ON&lt; VEL— VeL_MAX+ Vt2 的方式設定。 5 .如申請專利範圍第4項之畫素電路之驅動方法，其 中 前述驅動電流的電流量最大時之前述驅動電晶體的閘 極-源極間的電壓爲 Vdata_max ( VdATA_MAX&gt; 0 )，前述 驅動電晶體的閾値電壓爲ντ1 ( VT1 &gt; 0 )時，把前述發光 期間之前述發光控制電晶體的閘極電位VG_0N以滿足 Vg ON&gt;VdATA_MAX— Vt1+Vt2 的方式設定。 6 ·如申請專利範圍第1至5項之任一項所記載之畫素 電路之驅動方法，其中 前述畫素電路包含由前述驅動電晶體與前述發光控制 電晶體之間的節點所分歧的路徑上配置的寫入控制電晶體 5 前述發光控制電晶體與前述寫入控制電晶體其導電型 以及尺寸皆共通，在先於前述發光期間的寫入期間，藉由 把在前述發光期間使前述發光控制電晶體爲打開（ON ) 狀態的電位相等的電位供給至前述寫入控制電晶體的閘極 而使該寫入控制電晶體爲打開（ON )狀態，此時藉由通 -36- 200818096 過前述驅動電晶體與前述節點與前述寫入控制電晶體的電 流設定前述驅動電晶體的閘極電位。 7 . —種畫素電路之驅動電路，係包含藉由驅動電流的 供給而發光的發光元件與產生驅動電流的驅動電晶體，在 由前述驅動電晶體對前述發光元件供給的驅動電流的路徑 上被配置與前述驅動電晶體相同的導電型之發光控制電晶 體的畫素電路之驅動電路，其特徵爲具備： 於使前述發光元件發光的發光期間以使前述發光控制 電晶體在飽和區域成爲打開（ON )狀態的方式設定該發 光控制電晶體的閘極電位的發光控制電路。 8·—種發光裝置，其特徵爲具備：包含藉由驅動電流 的供給而發光的發光元件與產生驅動電流的驅動電晶體， 在由前述驅動電晶體對前述發光元件供給的驅動電流的路 徑上被配置與前述驅動電晶體相同的導電型之發光控制電 晶體的畫素電路，及 於使前述發光元件發光的發光期間以使前述發光控制 電晶體在飽和區域成爲打開（ON )狀態的方式設定該發 光控制電晶體的閘極電位的發光控制電路。 9·如申請專利範圍第8項之發光裝置，其中 前述畫素電路，具備： 包含中介於前述驅動電晶體與前述發光控制電晶體之 間的節點與資料線之間的寫入控制電晶體， 在先於前述發光期間的寫入期間使前述寫入控制電晶 體爲打開（ON )狀態的寫入控制電路，及於前述寫入期 -37- 200818096 間藉由使電流流過前述資料線而設定前述驅動電晶體的閘 極電位的資料供給電路； 前述發光控制電晶體與前述寫入控制電晶體其導電型 與尺寸共通， 在前述寫入期間前述寫入控制電路對前述寫入控制電 晶體的閘極供給的電位，與在前述發光期間前述發光控制 電路對前述發光控制電晶體的閘極供給的電位相等。 -38-200818096 X. Patent Application No. 1 · A driving method of a pixel circuit, comprising: a light-emitting element that emits light by f-communication of a driving current and a driving transistor that generates a driving current, and the driving transistor on the light-emitting element a path of a supplied driving current ± a driving method of a pixel circuit in which a light-emitting control transistor of the same conductivity type as that of the driving transistor is disposed, characterized in that: the light-emitting period during which the light-emitting element emits light is used to control the light-emitting control The gate potential of the light-emission control transistor is set such that the crystal is in an ON state in a saturated region. 2. The method of driving a pixel circuit according to claim 1, wherein the driving transistor and the light-emitting control transistor system are of a P-channel type, wherein the driving transistor is interposed between the first power supply line and the light-emitting control transistor. Between the light-emitting control transistor and the second power supply line, the potential of the second power supply line based on the potential of the first power supply line is -V EL (- VEL &lt; 〇) The voltage between the two ends of the light-emitting element is VEL_MAX ( VEL_MAX &lt; 0 ) when the voltage of the light-emitting element is maximized based on the potential of the electrode on the light-emitting control transistor side, and the threshold of the light-emitting control transistor When the voltage is VT2 (VT2 &lt; 0), the gate potential Vg_on of the light-emission control transistor during the light-emitting period is set so as to satisfy Vg_on>-Vel_Vel_max + Vt2 -34-200818096. 3. In the driving method of the pixel circuit of claim 2, when the current amount of the driving current is the largest, the voltage between the pole and the source of the driving transistor is VdATA_MAX (VdATA_MAX &lt; 0 ) 'pre-drive power When the threshold voltage of the crystal is V T1 ( VT i &lt; 〇), the gate potential V g — on the light-emission control transistor in the period of the emission is set so as to satisfy Vg_ON &lt; VdATA_MAX to Vti + Vt2. 4. The method of driving a pixel circuit according to claim 1, wherein the driving transistor and the light-emitting control transistor system are between the first power supply line and the light-emitting control unit; The driving transistor is interposed between the light-emitting control transistor and the two power supply lines, and the potential of the first power-on when the potential of the second power supply line is used is VEL ( VEL &gt; 〇) ' The potential of the pole on the crystal side is based on the voltage at which the voltage drop of the light-emitting element is maximum. The voltage between the two ends of the light-emitting element is VeL_MAX ( VeL_MAX &gt; 0) ' The threshold voltage of the light-emitting control transistor is VT2 ( ν Τ 2 &gt; 0 The gate potential VG_0N' of the aforementioned light-emission control transistor during the pre-lighting period is set so that the gate line of the gate is electrically, and r · 刖 满 -35 - 200818096 Vg_ON &lt; VEL - VeL_MAX + Vt2. 5. The driving method of the pixel circuit of claim 4, wherein a voltage between the gate and the source of the driving transistor when the current amount of the driving current is maximum is Vdata_max (VdATA_MAX> 0), the driving When the threshold voltage of the transistor is ντ1 ( VT1 &gt; 0 ), the gate potential VG_0N of the light-emission control transistor in the light-emitting period is set so as to satisfy Vg ON &gt; VdATA_MAX - Vt1 + Vt2. The method of driving a pixel circuit according to any one of claims 1 to 5, wherein the pixel circuit includes a path diverging from a node between the driving transistor and the light-emitting control transistor. The write control transistor 5 disposed above has the same conductivity type and size as the write control transistor, and the light is emitted during the light emission period before the light emission period The control transistor is supplied with a potential equal to the potential of the ON state to the gate of the write control transistor, so that the write control transistor is in an ON state, and the pass is controlled by -36-200818096 The current of the driving transistor and the node and the write control transistor set a gate potential of the driving transistor. 7. A driving circuit for a pixel circuit, comprising: a light emitting element that emits light by supplying a driving current; and a driving transistor that generates a driving current, on a path of a driving current supplied from the driving transistor to the light emitting element. A driving circuit of a pixel circuit in which a light-emitting control transistor of the same conductivity type as that of the driving transistor is disposed is characterized in that: a light-emitting period in which the light-emitting element emits light is caused to cause the light-emitting control transistor to be turned on in a saturated region The light-emitting control circuit that sets the gate potential of the light-emitting control transistor in the (ON) state. 8. A light-emitting device comprising: a light-emitting element that emits light by supply of a driving current; and a driving transistor that generates a driving current, on a path of a driving current supplied from the driving transistor to the light-emitting element A pixel circuit in which a light-emission control transistor of the same conductivity type as that of the driving transistor is disposed, and a light-emitting period in which the light-emitting element emits light is set such that the light-emitting control transistor is turned on in a saturated region The light-emitting control circuit that controls the gate potential of the transistor. 9. The illuminating device of claim 8, wherein the pixel circuit comprises: a write control transistor including a node between the driving transistor and the illuminating control transistor and a data line; a write control circuit that causes the write control transistor to be in an ON state prior to a write period of the light-emitting period, and a current flowing through the data line between the write periods of -37-200818096 a data supply circuit for setting a gate potential of the driving transistor; the light-emitting control transistor and the write control transistor have a common conductivity type and a size, and the write control circuit pairs the write control transistor during the writing period The potential supplied by the gate is equal to the potential supplied by the light-emitting control circuit to the gate of the light-emitting control transistor during the light-emitting period. -38-
TW096122922A 2006-07-03 2007-06-25 Light emitting device, method of driving pixel circuit, and driving circuit TW200818096A (en)

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