200816151 . 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種含有整合式閘極驅動器之主動矩 一 陣型顯示裝置。 【先前技術】 薄膜電晶體液晶裝置(TFT-LCD)係為一種普遍使用於 目前消費電子與電腦系統的平板顯示裝置。一般而言，熟 ⑩ 習本項技藝者已經知道TFT-LCD使用一源極驅動器、一閘 極驅動器以及一提供驅動電壓至源極與閘極驅動器之驅 動電路，來控制此顯示裝置之内容的重整。 US2003/0189542揭露一種驅動電路之實施例，此驅動 電路用以驅動一主動矩陣型顯示裝置，此主動矩陣型顯示 裝置採用具有一整合式閘極驅動器之一顯示面板，此整合 式閘極驅動器形成於一 TFT-LCD之一主動基板上。主動基 0 板具有一顯示區與一周邊區，顯示區包含複數個晝素，其 係以具有數行與數列之矩陣配置。每個晝素包含一薄膜電 晶體、一晝素電極及一儲存電容器。每個晝素之薄膜電晶 體係經由其源極電極而連接至一資料匯流排線，並經由其 閘極電極而連接至一閘極匯流排線。複數個閘極匯流排線 將數列晝素之薄膜電晶體連接至閘極驅動器。藉由相繼地 掃描這些閘極匯流排線，且藉由以一種對應於一視頻信號 之特定順序施加信號電壓至所有資料匯流排線，可為所有 晝素定址且將一影像顯示於TFT-LCD上。 200816151 整合式閘極驅動器亦包含複數個作為開關元件的薄 膜電晶體。然而，當整合式閘極驅動器運作時，在這些晝 素之薄膜電晶體中可能會出現一些明顯的切換問題，進而 影響顯示裝置之光學性能，譬如顯示晝面變黑、影像消失 等。 — 【發明内容】 有鑑於上述課題，本發明之目的為最好在其使用壽命 • 期間能維持顯示裝置之光學性能。 此目的係利用依據本發明之申請專利範圍第1項所特 定化之顯示裝置而達成。更進一步的較佳實施例係於附屬 項2-7項中界定。 緣是，為達上述目的，一種主動矩陣型顯示裝置包含 一整合式閘極驅動器與一外部驅動電路，外部驅動電路係 用以配合整合式閘極驅動器來驅動主動矩陣型顯示裝 0 置。整合式閘極驅動器包含一監視單元，其用以監視整合 式閘極驅動器上之薄膜電晶體，而外部驅動電路包含一處 理單元，其係用以於整合式閘極驅動器之監視單元上執行 測量，且更用以調整被提供至整合式閘極驅動器之一閘極 電壓。 因此，依據本發明之第一實施樣態係提供具有一整合 式閘極驅動器之一種主動矩陣型顯示裝置。主動矩陣型顯 示裝置亦包含一外部驅動電路，其係用以配合整合式閘輝 驅動器來驅動主動矩陣型顯示器。閘極驅動器具有一整合 200816151 式監視單元，用以監視整合式閘極驅動器之薄膜電晶體， 譬如監視閘極電壓、汲極電流等。外部驅動電路包含一處 理單元，其係用以於整合式閘極驅動器之監視單元上執行 測量。 整合式閘極驅動器最好是具有複數個閘極匯流排 線，其係將整合式閘極驅動器連接至主動矩陣型顯示裝置 上之數列晝素的薄膜電晶體。這些晝素之薄膜電晶體本質 上係為開關元件，其係由施加橫越過這些薄膜電晶體之閘 極電極之適當的閘極電壓所控制。 當整合式閘極驅動器將數列之晝素切換成ON與OFF 以相繼地掃描這些閘極匯流排線時，一相當高之閘極電壓 係被施加至整合式閘極驅動器之這些薄膜電晶體之閘極 電極。重複改變整合式閘極驅動器之薄膜電晶體的閘極電 壓，在裝置之使用壽命期間影響了這些薄膜電晶體之移動 性载子之移動與這些薄膜電晶體之傳導，而最後影響了這 些整合式閘極驅動器之薄膜電晶體的臨限電壓。臨限電壓 係為需要用以將一薄膜電晶體從一中斷狀態切換至一執 行狀態之電壓。臨限電壓之改變可能導致數列之晝素之不 適當的切換，從而使顯示裝置產生故障。 為了減輕這些問題，整合式閘極驅動器上之監視單元 / 係與外部驅動電路中之一處理單元相關聯。處理單元於監 視單元上執行測量，並可判定臨限電壓是否存在有任何改 變。處理單元係用以判定臨限電壓之改變。如果於臨限電 • / 壓中偵測到改變，則外部驅動電路可調整被提供至整合式 200816151 閘極驅動器之這些薄膜電晶體的閘極電壓，俾能在整個使 用壽命期間中保證晝素列之適當的切換並維持顯示裝置 之光學性能。 於另一實施例中，監視單元係於具有類似於整合式閘 極驅動器上之薄膜電晶體之特徵之一額外薄膜電晶體。 監視單元最好是整合式閘極驅動器中之一額外薄膜 電晶體。ι-ν特徵之測量係於額外薄膦電晶體上進行。整 合式閘極驅動器上之額外薄膜電晶體具有類似於整合式 閘極驅動器上之薄膜電晶體之特徵，並因此被使用作為供 整合式閘極驅動器上之薄膜電晶體用之監視單元。整合式 閘極驅動器之監視單元受到類似於整合式閘極驅動器上 之所有其他薄膜電晶體之電壓應力。監視單元最好是整合 式閘極驅動器上之一附加單元。此種單元並未連接至一列 的晝素，而是連接至用以執行測量之外部驅動電路中之處 理單元。 於另一實施例中’整合式閘極驅動器包含一移位暫存 器與複數個閂鎖單元，各閂鎖單元包含一上拉式薄膜電晶 體與一下拉式薄膜電晶體，其係用以接收一驅動電壓脈 衝。 於另一實施例中，監視單元係為一下拉式薄膜電晶體 或一上拉式薄膜電晶體。 在這些較佳實施例中，整合式閘極驅動器包含一移位 暫存器。移位暫存器接收來自外部驅動電路之閘極電壓， 且用以將閘極電壓從移位暫存器之一侧移位至對應於第 200816151 一與最終列之晝素之另一侧。一閂鎖單元係為了每列之晝 素而設置，此閂鎖單元更包含連接至一閘極線之一上拉式 ‘ J專膜電晶體與一下拉式薄膜電晶體。當選擇一列時，外部 驅動電路提供一閘極電壓（以一導通電壓表示）至連接至那 列之閘極線之閂鎖單元之上拉式與下拉式薄膜電晶體之 、 閘極電極。大部分處於ON狀態之下拉式薄膜電晶體，因 此移位暫存器之閂鎖單元中之下拉式薄膜電晶體通常受 到最高的電壓應力。因此，將監視單元配置成一下拉式薄 • 膜電晶體是具有優點的作法。 於另一實施例中，外部驅動電路之處理單元係用以依 據被執行之測量來判定一調整之閘極電壓。 於另一實施例中，外部驅動電路包含複數個開關，用 以建立與監視單元之接觸。於另一實施例中，外部驅動電 路包含複數個電壓產生單元與一電流測量單元。 於另一較佳實施例中，在整合式閘極驅動器之每個切 換成ON之過程期間，藉由外部驅動電路中之處理單元來 ® 執行在整合式閘極驅動器之監視單元上之測量。處理單元 更可用以依據於整合式閘極驅動器之薄膜電晶體上被執 行之測量，來決定一調整之閘極電壓。 ^ 外部驅動電路中之處理單元最好是利用設置於外部 4 驅動電路中之一開關而連接至監視單元。此開關可將整合 式閘極驅動器上之監視單元和外部驅動電路中一電壓產 生單元與一電流測量單元形成通路或斷路。當監視單元沒 有連接時，監視單元無法干擾整合式閘極驅動器之運作。 9 200816151 ㈠二更進—步實_中，外部驅動電路包含複數個電 亨元。—第—閘極電壓產生單元係連接至監視單元 =閘極電極，且係用以提供所需要之電壓至閘極電極。一 第二没極·源極錢產生單元係以於監視單元之没極與 源極電極上操作。又，—電流測量單元係連接至監視單元 :汲=電極與汲極_源極電壓產生單元以測量一汲極電 後’從電流測量單元測量之及極電流被使用於處理 H藉由外部驅動電路中之處理單元計算一調整之操 電壓，以使祕電流因而在顯示裝置之使用壽命期 間可被調整。 【實施方式】 以下將參照相關圖式，說明依本發明較佳實施例之含 有整合式閘極驅動器之顯示裝置。 薄祺電晶體係為使用薄膜技術所實施之電晶體。電晶 • 體可料—電氣放大開關。電晶體之—賴電極上 之負電壓吸引電子至其表面與正載荷子或電洞至在半導 體與絕緣材料之間之介面以形成一"累積層"。當施加一電 •壓橫越過電晶體之一源極與一汲極電極時，便會產生流動 在源極與汲極電極之間的一電流。 依此方式，於閘極電極之電壓可控制在源極與汲極之 間之一電壓。顯示裝置可包含薄膜電晶體，其係為一整合 式閘極驅動器上之開關元件，用以藉由相繼地掃描一閘極 匯流排線，以將數列之畫素切換成ON與〇FF。 200816151 一般而言，相當高的電壓係被施加至閘極電極，以便 導通這些薄膜電晶體。此種高電壓導致位於閘極驅動器上 之薄膜電晶體的臨限電壓之改變，並導致這些晝素之不適 當的切換。因此，在本發明中，係將一監視單元裝設至整 合式閘極驅動器。監視單元最妤是薄膜電晶體，其並未設 置連接至這些列之晝素之閘極匯流排線，而是設置於外部 驅動電路中之一處理單元。此配置之設計最好是能使監視 單元受到與整合式閘極驅動器上之其他任何一個薄膜電 晶體相同之電壓應力。處理單元係用以藉由調整臨限電壓 來债測並補償整合式閘極驅動器上之薄膜電晶體之臨限 電壓之改變，從而在顯示裝置之使用壽命期間維持薄膜電 晶體之光學性能。 圖I顯示一裝置100之概要圖。此裝置100包含一主 動矩陣型顯示裝置105、一整合式閘極驅動器110與一外 部驅動電路130。整合式閘極驅動器110包含一監視單元 120 °外部驅動電路130更包含一處理單元140。整合式閘 極驅動器110具有複數個閘極匯流排線，其將整合式閘極 驅動器110連接至主動矩陣型顯示裝置105上之數列之晝 素薄膜電晶體。整合式閘極驅動器110與外部驅動電路130 一起被配置成用以驅動主動矩陣型顯示裝置105。 j 監視單元120形成一附加單元於整合式閘極驅動器 110上，而並未連接至主動矩陣型顯示裝置1〇5上之數列 之晝素薄膜電華體，但連接至外部驅動電路130，特別是 連接至處理單元140。監視單元120最好是一種薄膜電晶 11 200816151 體。-開始時，監視單元120之^特徵係類似於 動電路m之薄膜電晶體。因此，監視單元12〇受到^ 部驅動電路13 0上之薄膜電晶體相同的電壓應力，並ς 及顯示裝置之使用壽命期間發展出類似的π特徵。、 外部驅動電路130 t之處理單元14G於監視單元 量，並用以判定各種參數’譬如汲極電流 =整:式間極驅動器110上之薄臈電晶體之臨限 電 ==到，謝之改變，則將在外部驅動 巾之處理早％ 14Gg&置成用以藉由調整被 •整合式閘極驅動器11〇上薄 八 此種改變加《補價。因二:二=電來對 被切換成⑽之過程期間，外心每次 執仃篁來測量ΙΛ"特徵，其相當於在敕人 ，極驅動器110之薄膜電晶 量外在二 早疋M0亦用以計算薄膜電晶體此外，處理 極電壓。 取仏的ON與OFF之閘 圖2顯示組合之整合相 外部驅動電路230之結構之概。^^監視單元202與 更包含一監視單元22〇 一 θ s式閘極驅動器210 好是一種包含-閘極電極如附^早疋。監視單元220最 電極226之薄膜電晶體。 及極電極224與-源極 外部驅動電路23〇除 * 含一電流測量單元232、 ^理單元24〇以外，亦包 極電壓產生單元236。 / °电壓產生單元234與一閘 12 200816151 &視單兀22〇之沒極電極224係連接至外部驅動電路 230之-電流測量單元232。監視單元22〇之源極電極226 係連接至外部驅動電路23〇之一没極電壓產生單元234與 -一閘極電壓產生單元说。源極電極226,没極電極224 •.與閘極電極222係連接至薄膜電晶體顯示器之輸出隆起 部’然後連接至外部•驅動電路23〇。 監視單兀22〇亦經由電壓產生單元234、236與電流 測里單το 232而連接至外部驅動電路23〇之一處理單元 • 240。處理單元24〇之詳細說明將於後以次字提供。 連串的閘極匯流排線216係於主動矩陣型顯示裝置 ^連，整合式閘極驅動器21Ό至數列之晝素薄膜電晶體。 監視單兀220具有與整合式閘極驅動器21〇之其他薄膜電 晶體相同的寬度與長度(W，l)。 處理單元240亦連接至整合式閘極驅動器21〇，用以 提供並監視最佳的〇Ν與〇FF閘極電壓Vg〇n與Vg〇ff _ 至整合式閘極驅動器210上之這些薄膜電晶體之閘極電 極相^面的電壓需要被施加至整合式閘極驅動器HQ上 之這些薄膜電晶體之閘極電極，以開始薄膜電晶體中之移 動丨生載子之移動。需注意者，若施加相當高的電壓至這些 。濤膜電晶體之閘極電極，則可於整合式閘極驅動器210之 這些薄膜電晶體上建立一電壓應力。電壓產生單元234， 236所建立之應力條件確保監視單元22〇受到與整合式閘 極驅動器210上之其他薄膜電晶體相同的電壓應力。在遍 及此使用壽命期間，定電壓應力會導致這些薄膜電晶體之 13 200816151 臨限電壓之改變。 電机測里單70 232測量沒極電流，而處理單元24〇使 用所測里之;及極電流來計算這些薄膜電晶體之臨限電 壓。如果债測到薄膜電晶體之臨限電壓之任何改變，則可 調整提供至整合式閘極__料㈣之閘極電壓。 處理單元謂係用以處理監視單元韻之薄膜電晶體 特被。從經由夕卜部驅動$ @ 9 ^ „ 籾兔路230中之電流測量單元232所 接„測量特徵，處理單元24。可判㈣限電壓之改變， =鼻各種其他參數’例如閘極㈣、練電 壓之任何改變，則將處理單元24〇配置成二 错凋整提供至整合式閘極驅動器210上之薄膜電晶體之 =，來補償任何臨限電壓改變。在從所測量之二 特徵取出臨限閉極電壓之後，處理單元24〇亦判定 ^合式閘極驅動器加之薄膜電晶體之ON與OFF間極 2 與VG〇FF。然後，處理單元240可配置有外部200816151. Nineth Invention: TECHNICAL FIELD The present invention relates to a driving moment array display device including an integrated gate driver. [Prior Art] A thin film transistor liquid crystal device (TFT-LCD) is a flat panel display device commonly used in consumer electronics and computer systems. In general, the skilled artisan knows that a TFT-LCD uses a source driver, a gate driver, and a driving circuit that supplies a driving voltage to the source and gate drivers to control the contents of the display device. Reorganization. US 2003/0189542 discloses an embodiment of a driving circuit for driving an active matrix type display device using a display panel having an integrated gate driver, and the integrated gate driver is formed. On one of the active substrates of a TFT-LCD. The active base board has a display area and a peripheral area, and the display area includes a plurality of pixels, which are arranged in a matrix having a plurality of rows and columns. Each element includes a thin film transistor, a halogen electrode and a storage capacitor. Each of the thin film electro-crystalline systems is connected via its source electrode to a data bus line and via its gate electrode to a gate bus line. A plurality of gate bus lines connect a plurality of thin film transistors to a gate driver. By sequentially scanning the gate bus lines, and by applying a signal voltage to all data bus lines in a specific order corresponding to a video signal, all pixels can be addressed and an image displayed on the TFT-LCD. on. The 200816151 integrated gate driver also includes a plurality of thin film transistors as switching elements. However, when the integrated gate driver operates, some significant switching problems may occur in these thin film transistors, which may affect the optical performance of the display device, such as blackening of the surface and disappearance of the image. SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to maintain the optical performance of a display device during its lifetime. This object is achieved by a display device specified in the first item of the patent application scope of the present invention. Further preferred embodiments are defined in sub-items 2-7. For the above purpose, an active matrix display device includes an integrated gate driver and an external driver circuit for driving the active matrix display device in conjunction with the integrated gate driver. The integrated gate driver includes a monitoring unit for monitoring the thin film transistor on the integrated gate driver, and the external driving circuit includes a processing unit for performing measurement on the monitoring unit of the integrated gate driver And more to adjust the gate voltage supplied to one of the integrated gate drivers. Accordingly, a first embodiment of the present invention provides an active matrix type display device having an integrated gate driver. The active matrix display device also includes an external drive circuit for driving the active matrix display in conjunction with the integrated gate driver. The gate driver has an integrated 200816151 monitoring unit that monitors the thin film transistors of the integrated gate driver, such as monitoring gate voltage, gate current, and so on. The external drive circuit includes a processing unit for performing measurements on the monitoring unit of the integrated gate driver. Preferably, the integrated gate driver has a plurality of gate busses that connect the integrated gate drivers to the plurality of thin film transistors on the active matrix display device. These thin film transistors are essentially switching elements that are controlled by the application of appropriate gate voltages across the gate electrodes of the thin film transistors. When the integrated gate driver switches the series of pixels to ON and OFF to sequentially scan the gate bus lines, a relatively high gate voltage is applied to the thin film transistors of the integrated gate driver. Gate electrode. Repeatedly changing the gate voltage of the thin film transistor of the integrated gate driver affects the movement of the mobile carriers of these thin film transistors and the conduction of these thin film transistors during the lifetime of the device, and finally affects these integrated types. The threshold voltage of the thin film transistor of the gate driver. The threshold voltage is a voltage required to switch a thin film transistor from an interrupted state to an active state. A change in the threshold voltage may cause an improper switching of the elements of the sequence, causing the display device to malfunction. To alleviate these problems, the monitoring unit/system on the integrated gate driver is associated with one of the external driver circuits. The processing unit performs measurements on the monitoring unit and can determine if there is any change in the threshold voltage. The processing unit is used to determine the change in the threshold voltage. If a change is detected in the limit current / / voltage, the external drive circuit can adjust the gate voltage of these thin film transistors that are supplied to the integrated 200816151 gate driver, and can guarantee the quality during the entire service life. The appropriate switching is maintained and the optical performance of the display device is maintained. In another embodiment, the monitoring unit is attached to an additional thin film transistor having characteristics similar to a thin film transistor on an integrated gate driver. The monitoring unit is preferably an additional thin film transistor in the integrated gate driver. Measurement of the ι-ν characteristics was performed on an additional thin phosphine transistor. The additional thin film transistor on the integrated gate driver is similar to the thin film transistor on an integrated gate driver and is therefore used as a monitoring unit for thin film transistors on integrated gate drivers. The monitoring unit of the integrated gate driver is subjected to voltage stress similar to all other thin film transistors on the integrated gate driver. Preferably, the monitoring unit is an add-on unit on the integrated gate driver. Such a unit is not connected to a column of cells, but to a local unit in the external drive circuit for performing measurements. In another embodiment, the 'integrated gate driver includes a shift register and a plurality of latch units, each of the latch units including a pull-up thin film transistor and a pull-down thin film transistor. A drive voltage pulse is received. In another embodiment, the monitoring unit is a pull-down thin film transistor or a pull-up thin film transistor. In these preferred embodiments, the integrated gate driver includes a shift register. The shift register receives the gate voltage from the external drive circuit and is used to shift the gate voltage from one side of the shift register to the other side corresponding to the first and last columns of the 200816151. A latch unit is provided for each column of the column, and the latch unit further includes a pull-up type "J-film transistor and a pull-down film transistor" connected to a gate line. When a column is selected, the external drive circuit provides a gate voltage (indicated by a turn-on voltage) to the gate electrode of the pull-up and pull-down thin film transistors of the latch unit connected to the gate line of that column. Most of the pull-type thin film transistors are in the ON state, so the pull-down thin film transistors in the latch unit of the shift register are usually subjected to the highest voltage stress. Therefore, configuring the monitoring unit to be a pull-up thin film transistor is an advantageous method. In another embodiment, the processing unit of the external drive circuit is operative to determine an adjusted gate voltage based on the measurements being performed. In another embodiment, the external drive circuit includes a plurality of switches for establishing contact with the monitoring unit. In another embodiment, the external drive circuit includes a plurality of voltage generating units and a current measuring unit. In another preferred embodiment, during the process of switching each of the integrated gate drivers to ON, the measurement on the monitoring unit of the integrated gate driver is performed by the processing unit in the external driver circuit. The processing unit can be further configured to determine an adjusted gate voltage based on measurements performed on the thin film transistor of the integrated gate driver. ^ The processing unit in the external drive circuit is preferably connected to the monitoring unit by means of a switch provided in the external 4 drive circuit. The switch can form a path or open circuit between a monitoring unit on the integrated gate driver and a voltage generating unit in the external driving circuit and a current measuring unit. When the monitoring unit is not connected, the monitoring unit cannot interfere with the operation of the integrated gate driver. 9 200816151 (1) The second is further advanced - the actual drive circuit contains a plurality of electrical elements. - The first gate voltage generating unit is connected to the monitoring unit = gate electrode and is used to supply the required voltage to the gate electrode. A second immersive source source generating unit operates on the immersion and source electrodes of the monitoring unit. Moreover, the current measuring unit is connected to the monitoring unit: 汲=electrode and drain _source voltage generating unit to measure a 汲 pole power. The ampere current measured from the current measuring unit is used to process H by external driving. The processing unit in the circuit calculates an adjusted operating voltage such that the secret current can thus be adjusted during the life of the display device. [Embodiment] A display device including an integrated gate driver according to a preferred embodiment of the present invention will be described below with reference to the related drawings. The thin tantalum crystal system is a transistor implemented using a thin film technique. Electro-crystal • Body material – electrical amplification switch. The negative voltage on the electrode of the transistor attracts electrons to its surface and positive charge carriers or holes to the interface between the semiconductor and the insulating material to form a "cumulative layer". When a voltage is applied across one source of the transistor and one of the drain electrodes, a current flowing between the source and the drain electrode is generated. In this way, the voltage at the gate electrode can be controlled to a voltage between the source and the drain. The display device can include a thin film transistor, which is a switching element on an integrated gate driver for switching a plurality of pixels to ON and FF by successively scanning a gate bus. 200816151 In general, a relatively high voltage is applied to the gate electrode to turn on these thin film transistors. This high voltage causes a change in the threshold voltage of the thin film transistor on the gate driver and causes an unsuitable switching of these elements. Therefore, in the present invention, a monitoring unit is mounted to the integrated gate driver. The monitoring unit is most preferably a thin film transistor, which is not provided with a gate bus line connected to the columns of these columns, but is disposed in one of the processing circuits of the external driving circuit. This configuration is preferably designed to subject the monitoring unit to the same voltage stress as any other thin film transistor on the integrated gate driver. The processing unit is configured to compensate and compensate for the change in the threshold voltage of the thin film transistor on the integrated gate driver by adjusting the threshold voltage to maintain the optical performance of the thin film transistor during the lifetime of the display device. FIG. 1 shows an overview of a device 100. The device 100 includes an active matrix display device 105, an integrated gate driver 110 and an external driver circuit 130. The integrated gate driver 110 includes a monitoring unit 120. The external driving circuit 130 further includes a processing unit 140. The integrated gate driver 110 has a plurality of gate bus bars that connect the integrated gate driver 110 to a plurality of arrays of thin film transistors on the active matrix display device 105. The integrated gate driver 110 is configured together with the external driver circuit 130 to drive the active matrix type display device 105. j The monitoring unit 120 forms an additional unit on the integrated gate driver 110, and is not connected to the array of halogen film electro-optical bodies on the active matrix display device 1〇5, but is connected to the external driving circuit 130, in particular It is connected to the processing unit 140. The monitoring unit 120 is preferably a thin film transistor 11 200816151 body. - At the beginning, the characteristics of the monitoring unit 120 are similar to the thin film transistors of the moving circuit m. Therefore, the monitoring unit 12 is subjected to the same voltage stress as the thin film transistor on the driving circuit 130, and develops a similar π characteristic during the lifetime of the display device. The processing unit 14G of the external driving circuit 130t monitors the amount of the unit, and is used to determine various parameters, such as the threshold current = the current limit of the thin transistor on the inter-pole driver 110 == to, change , the external drive towel treatment is prematurely 14Gg& is set to be used to adjust the price of the integrated gate driver 11 by adding a thin eight. Because two: two = electricity = the pair is switched to (10) during the process, the external heart is measured every time to measure the ΙΛ " characteristics, which is equivalent to the thin film electro-crystal amount of the pole driver 110 in the second person 疋 M0 It is also used to calculate the thin film transistor and, in addition, to handle the pole voltage. Switching ON and OFF of the 图 Figure 2 shows the structure of the combined integrated phase external drive circuit 230. ^^Monitoring unit 202 and more including a monitoring unit 22 〇 θ s type gate driver 210 is preferably an inclusion-gate electrode such as 疋 疋. The thin film transistor of the most electrode 226 of the monitoring unit 220. The pole electrode 224 and the source external drive circuit 23 are eliminated. * A current measuring unit 232 and a unit 24 〇 are included, and the voltage is generated by the voltage. The / ° voltage generating unit 234 and the gate 12 200816151 & the single-pole 22 224 are connected to the current measuring unit 232 of the external driving circuit 230. The source electrode 226 of the monitoring unit 22 is connected to one of the external driving circuit 23, the gate voltage generating unit 234 and the - gate voltage generating unit. The source electrode 226, the electrodeless electrode 224, and the gate electrode 222 are connected to the output ridge portion of the thin film transistor display and then connected to the external drive circuit 23A. The monitoring unit 22 is also connected to the processing unit 240 of the external drive circuit 23 via the voltage generating units 234, 236 and the current meter τ 232. A detailed description of the processing unit 24 will be provided in the second word. A series of gate bus bars 216 are connected to the active matrix display device, and the integrated gate driver 21 is connected to a series of halogen film transistors. The monitor unit 220 has the same width and length (W, l) as the other thin film transistors of the integrated gate driver 21. The processing unit 240 is also coupled to the integrated gate driver 21A for providing and monitoring the optimum 〇Ν and 〇 FF gate voltages Vg 〇 n and Vg 〇 ff _ to the thin film on the integrated gate driver 210 The voltage across the gate electrode of the crystal needs to be applied to the gate electrodes of the thin film transistors on the integrated gate driver HQ to initiate the movement of the moving twin carriers in the thin film transistor. Note that if you apply a fairly high voltage to these. The gate electrode of the transistor can establish a voltage stress on the thin film transistors of the integrated gate driver 210. The stress conditions established by the voltage generating units 234, 236 ensure that the monitoring unit 22 is subjected to the same voltage stress as the other thin film transistors on the integrated gate driver 210. During this lifetime, constant voltage stress causes a change in the threshold voltage of these thin film transistors. The motor metering unit 70 232 measures the no-pole current, and the processing unit 24 uses the measured current; and the pole current to calculate the threshold voltage of the thin film transistors. If the bond detects any change in the threshold voltage of the thin film transistor, the gate voltage supplied to the integrated gate __ (4) can be adjusted. The processing unit is used to process the thin film transistor of the monitoring unit. The measurement unit 24 is connected to the measuring unit 232 from the current measuring unit 232 in the 籾兔路230 via the eve. It can be judged that (4) the change of the voltage limit, = various other parameters of the nose, such as the gate (four), any change of the training voltage, the processing unit 24 is configured to provide the second film to the thin film transistor provided on the integrated gate driver 210. = to compensate for any threshold voltage changes. After the thresholded voltage is removed from the measured two characteristics, the processing unit 24〇 also determines the ON and OFF interpoles 2 and VG〇FF of the combined gate driver plus the thin film transistor. Processing unit 240 can then be configured with an external
1驅動電路230,⑽提供最佳的 P =器210中之這些薄棋電晶體。因；St :=間f =特徵與調整閘_，可達成畫素之 ^^ 個使用壽命㈣維持顯示裝置之光學 性能。 因此’整合式開極驅動器210中之監視單元220之主 要目的，係為在不同的操作條件下之沒極電流及/或開極電 壓之改變可於監視單元㈣上被監視。有效歧，監視單 疋220作為感測器，用以指示整合式閑極驅動器⑽上 200816151 之薄膜電晶體之退化程度。由於臨限電壓之改變，薄膜電 晶體會在裝置之使用壽命期間中退化，最後導致裝置之故 障。因此，固定地監視與調整閘極電壓允許維持顯示裝置 .. 在整個使用壽命期間之光學性能。 . 圖3顯示一薄膜電晶體之I-V特徵之概要圖。X轴302 表示閘極電壓，而Y軸304表示汲極電流。實線306表示 關於典型的a-Si薄膜電晶體於攝氏270度下之汲極電流 對於閘極電壓之關係。於一般大約為-1〇伏特之電壓Vl， _ 所測量之没極電流係為約1*1(Γ12安培之Idl。當電壓從 • 增加至V2時，汲極電流從Idi減少至Idmin，其中V2表示大 約為0伏特之數值，Idmin大約為最小值之m〇-i4安培，而 當電壓大約為-5伏特時，汲極電流於臨限電壓（thresh〇ld voltage)反轉其方向，並開始朝相反方向移動。於〇伏特 下’所測量之汲極電流係大約為l*1〇-i2安培。當電壓從 V2增加至％及V3以上直到電壓達到大約為25伏特之數 ⑩ 值（其表示飽和電壓Vsat)時，汲極電流穩定地從idmin增加 至1们(大約為1*1(Γ5安培)並於電壓Vsat產生飽和。超過電 壓vsat時’沒極電流係相當固定，且薄膜電晶體之任何的 閘極電壓之增加並不會影響沒極電流。 虛線308表示在顯示裝置操作期間之某一段時間之 後同/專膜電晶體之汲極電流對閘極電壓特徵之例子。 了以看出於圖中表示為V〇ff之臨限電壓（threshold voltage) •已專在薄膜電晶體被使用持續一段期間（在顯示裝置之使 用壽命中之一特定階段期間）以後，於第一狀態（於此裝置 15 200816151 之使用壽命之初期）下從_5伏特改變至2伏 為在這些薄膜電晶體在切換成〇N之過程其特左右。這是因 上之定電壓應力而發生，其中切換成‘極電極 裝置之使用壽命期㈣遭遇到的。增加電麗*程係為在此 加汲極電流’直到汲極電流於大約為25 ::从穩定地增 約為一安培之相同數值左右之於Id2飽大 臨限電壓之改變需要補償，否則因為晝素之不。此種 因素所造成之例如顯示裝置之光學性能之退化田刀換之 的效應是會被注意到讀。因此，本發明中之處理^可注意 監視單元之㈣，並藉由龍減供至整合式^A drive circuit 230, (10) provides the best of these thin chess transistors in the P=210. Because; St:= between f = feature and adjustment gate _, can achieve the ^^ life of the pixel (four) to maintain the optical performance of the display device. Therefore, the primary purpose of the monitoring unit 220 in the integrated open-circuit driver 210 is that changes in the immersed current and/or the open-pole voltage under different operating conditions can be monitored on the monitoring unit (4). Effectively, the monitoring unit 作为220 acts as a sensor to indicate the degree of degradation of the thin film transistor of 200816151 on the integrated idler driver (10). Due to the change in threshold voltage, the thin film transistor will degrade over the life of the device, eventually causing the device to malfunction. Therefore, fixedly monitoring and adjusting the gate voltage allows the display device to maintain optical performance throughout its useful life. Figure 3 shows an overview of the I-V characteristics of a thin film transistor. The X-axis 302 represents the gate voltage and the Y-axis 304 represents the drain current. The solid line 306 represents the relationship between the gate current of a typical a-Si thin film transistor at 270 degrees Celsius for the gate voltage. The voltage of the voltage Vl, which is generally about -1 volt volt, is measured as about 1*1 (Γ12 amps of Idl. When the voltage is increased from • to V2, the drain current is reduced from Idi to Idmin, where V2 represents a value of approximately 0 volts, Idmin is approximately the minimum value of m〇-i4 amps, and when the voltage is approximately -5 volts, the drain current reverses its direction at a threshold voltage (thresh〇ld voltage), and Beginning to move in the opposite direction. The measured buckling current under '〇伏特' is approximately l*1〇-i2 amps. When the voltage increases from V2 to % and above V3 until the voltage reaches approximately 10 volts (the value of 10) ( When it represents the saturation voltage Vsat), the gate current is stably increased from idmin to 1 (about 1*1 (Γ5 amps) and saturation is generated at the voltage Vsat. When the voltage vsat is exceeded, the immersion current system is relatively fixed, and the film Any increase in the gate voltage of the transistor does not affect the immersion current. Dashed line 308 represents an example of the gate current characteristic of the same/special film transistor after a certain period of time during operation of the display device. It can be seen that it is represented as V〇ff in the figure. Threshold voltage • has been used in the first state (before the service life of this device 15 200816151) after the film transistor has been used for a period of time (during a specific phase of the life of the display device) Changing from _5 volts to 2 volts is particularly important in the process of switching these thin film transistors into 〇N. This occurs due to the constant voltage stress, which is switched to the lifetime of the 'electrode device (4). Increasing the electric current* is to add a buckling current here~ until the bungee current is about 25:: from a stable increase of about the same value of about one amp to the change of the Id2 full threshold voltage needs to be compensated , otherwise, because of the factors such as the degradation of the optical performance of the display device caused by such factors, the effect of the field knife will be noticed. Therefore, the processing in the present invention can pay attention to the monitoring unit (4), And by the dragon reduction to the integrated ^
之薄膜電晶體上之臨限電壓來補償任何臨限電麗改變，^ 中監視單元最好是一個單獨的薄膜電晶體。 A 圖4顯示整合式閘極驅動器41〇之概要圖。整合式閘 極驅動器410包含兩個部分，一部分4〇8係連接至主動= 陣型顯示單元，另一部分420係為監視單元且並未連接至 顯示單元。又，整合式閘極驅動器41〇包含一移位暫存器 412，移位暫存器412更包含一連串的閂鎖單元414。每個 問鎖單元414更包含一上拉式薄膜電晶體415、一下拉式 薄膜電晶體416與一閘極匯流排線417。 整合式閘極驅動器410之移位暫存器412接收來自外 部驅動電路之一閘極電壓脈衝，並用以將閘極電壓從移位 暫存器412之一侧移位至另一側，其係對應至第一與最終 列之晝素，且此部分係連接至顯示單元。 移位暫存器412包含彼此連接之一連串的閂鎖單元 16 200816151 414。每個問鎖單元414具有一上拉式薄膜電晶體4i5、一 下拉式薄膜電晶體416與一連接該處之閘極匯流排線 417 °閘極電壓係經由閘極匯流排線417而被提供至移位 暫存益412上之薄膜電晶體415、416。 一移位暫存器412亦包含監視單元420，其並未連接至 顯不裝置之任何一晝素。監視單元42〇具有與移位暫存器 412之任何其他閂鎖單元414相同的構造，閂鎖單元414 包含一上拉式薄膜電晶體415、一下拉式薄膜電晶體416 與一匯流排線，用以提供一閘極電壓至監視單元420之閘 極電極。用以監視閘極電壓脈衝之這些薄膜電晶體最好是 監視單元420上之下拉式薄膜電晶體416。此乃因為整合 式閘極驅動器中之下拉式薄膜電晶體416通常處於0N狀 態’並由於高電壓之施加至閘極電極而受到最高電壓應 力。因此，監視單元420之下拉式薄膜電晶體416作為一 感測器以監視整合式閘極驅動器上之所有其他薄膜電晶 、體之退化。 圖5顯示處理單元240之概要圖。處理單元240包含 一電壓產生單元542、一運算放大器544、一電阻546、一 閘極電壓產生單元550與一第二電阻548，其係為可變電 阻。一對開關560連接監視單元520與處理單元。 處理單元之主要特徵係用以執行監視單元520之下拉 式薄膜電晶體之測量，並判定整合式閘極驅動器上之薄膜 電晶體之臨限電壓之任何改變、ON與0FF之最佳閘極電 壓、汲極電流等。 17 200816151 數個測量最好是在每個切換成ON之過程期間完成。 開關560可連接或切斷整合式閘極驅動器上之監視單元 520。當開關560斷開時，監視單元52〇並不阻礙整合式 閑極驅動益之運作。 在處理單元240中之一電壓產生單元542建構所需要 的電壓位準以供執行測量。一電阻546可將所測量之電流 轉換成電壓，且亦連接至一運算放大器544，其調整被提 供至整合式閘極驅動器上之薄膜電晶體之閘極電極之閘 ⑩ 極電壓以將薄膜電晶體汲極電流維持固定。 來自運算放大器544之輸出電壓係為被提供至薄膜電 晶體之閘極電極之一最佳的閘極電壓（Vgate)。此最佳的閘 極電靨係於處理單元中從所測量之I_V特徵與一可變電阻 548計算得到，可變電阻548係用來在此裝置之使用.壽命 之初期對此裝置作初始調整。 一閘極電壓產生單元550提供需要的最佳閘極電壓至 赢 運算放大器544以及薄膜電晶體之閘極電極。處理單元係 用以界定最佳(Vgate)ON與OFF閘極電壓。 雖然參考上述實施例來闡述本發明，但是吾人將輕易 理解到其他實施例可能可選擇地用以達成相同目的。本發 明之範並未受限於上述實施例，但通常亦可被應用至顯 ! 示裝置。 需注意者，於本說明書（包含申請專利範圍）中之動詞" 包含/含有"與其變化形之使用，係被理解成指定所述特 徵、整體、步驟、元件或其群組之存在。另外，在申請專 18 200816151 利範圍中之元件之前不定冠詞"一個 — 個這種元件之存在。此外，任何❹、’不排除複數 請專利範圍之範嘴。再者，本發明之權:屬::制這些申 嶄新特徵或特徵之組合。 屬於母個與每個 本發明可被總結如下··一主叙 a 含-整合式閘極驅動器與一外部驅動電路属:f置，其包 :用以配合整合式閉極驅動器來驅動主動矩陣 置’整合式閘極驅動器包含—監視單元， ^不衣 式閘極驅動器上之薄膜電晶體之Ι-V特徵之改=皿視整合 驅動電路包含一處理單元，處理單元==丄而外部 驅動器之監視單元上執行複數個測量，並用以調極 至整合式閘極驅動器之複數個薄膜電晶體之-_^供 :::之精神與㈣，而對其進行之等效 應包含於後附之申請專利範圍中。 欠文均 m 【圖式簡單說明】 圖1顯示具有—整合式閉極驅動器與一外部驅動 之AMLCD之概要圖； 圖乂項示正a式閘極驅動器與外部驅動電路之結 示意圖； 圖3顯㈣膜電晶體之π特徵之概要圖； 圖4顯不整合式閑極驅動器之概要圖；以及 圖5顯示用以處理之子電路之概要圖。 19 200816151 元件符號說明： 100 裝置 105 主動矩陣型顯示裝置 110 整合式閘極驅動器 120 監視單元 130 外部驅動電路 140處理單元 202 監視單元 210 整合式閘極驅動器 216 閘極匯流排線 220 監視單元 222 閘極電極 224 汲極電極 226 源極電極 230 外部驅動電路 232 電流測量單元 234汲極電壓產生單元 236 閘極電壓產生單元 240 處理單元 302 X 軸 304 Y 軸 306實線 308虛線 20 200816151The threshold voltage on the thin film transistor compensates for any threshold change, and the monitor unit is preferably a single thin film transistor. A Figure 4 shows an overview of the integrated gate driver 41〇. The integrated gate driver 410 has two sections, a portion 4〇8 is connected to the active=array display unit, and the other portion 420 is a monitoring unit and is not connected to the display unit. Moreover, the integrated gate driver 41A includes a shift register 412, and the shift register 412 further includes a series of latch units 414. Each of the question lock units 414 further includes a pull-up film transistor 415, a pull-down film transistor 416 and a gate bus bar 417. The shift register 412 of the integrated gate driver 410 receives a gate voltage pulse from an external driving circuit and is used to shift the gate voltage from one side of the shift register 412 to the other side. Corresponding to the first and last columns of pixels, and this portion is connected to the display unit. The shift register 412 includes a series of latch units 16 200816151 414 that are connected to each other. Each of the interrogation unit 414 has a pull-up thin film transistor 4i5, a pull-down thin film transistor 416 and a gate bus line 417. The gate voltage is supplied via the gate bus line 417. The thin film transistors 415, 416 are transferred to the temporary storage 412. A shift register 412 also includes a monitoring unit 420 that is not coupled to any of the elements of the display device. The monitoring unit 42A has the same configuration as any other latching unit 414 of the shift register 412. The latch unit 414 includes a pull-up thin film transistor 415, a pull-down thin film transistor 416, and a bus bar. A gate electrode for providing a gate voltage to the monitoring unit 420. Preferably, the thin film transistors used to monitor the gate voltage pulses are the pull-down thin film transistors 416 on the monitor unit 420. This is because the pull-down thin film transistor 416 in the integrated gate driver is typically in the 0N state and is subjected to the highest voltage stress due to the application of a high voltage to the gate electrode. Therefore, the monitoring unit 420 pulls down the thin film transistor 416 as a sensor to monitor the degradation of all other thin film crystals and bodies on the integrated gate driver. FIG. 5 shows a schematic diagram of processing unit 240. The processing unit 240 includes a voltage generating unit 542, an operational amplifier 544, a resistor 546, a gate voltage generating unit 550, and a second resistor 548, which are variable resistors. A pair of switches 560 connect the monitoring unit 520 to the processing unit. The main feature of the processing unit is to perform the measurement of the pull-type thin film transistor of the monitoring unit 520, and determine any change of the threshold voltage of the thin film transistor on the integrated gate driver, and the optimal gate voltage of ON and 0FF. , bungee current, etc. 17 200816151 Several measurements are best done during each process of switching to ON. Switch 560 can connect or disconnect monitoring unit 520 on the integrated gate driver. When the switch 560 is turned off, the monitoring unit 52 does not hinder the operation of the integrated idler drive. A voltage generating unit 542 in processing unit 240 constructs the required voltage level for performing measurements. A resistor 546 converts the measured current into a voltage and is also coupled to an operational amplifier 544 that adjusts the gate 10 voltage of the gate electrode of the thin film transistor provided to the integrated gate driver to electrically The crystal's drain current remains fixed. The output voltage from operational amplifier 544 is the optimum gate voltage (Vgate) that is provided to one of the gate electrodes of the thin film transistor. The optimum gate power is calculated from the measured I_V characteristic and a variable resistor 548 in the processing unit, and the variable resistor 548 is used to initially adjust the device at the beginning of the life of the device. . A gate voltage generating unit 550 provides the desired optimum gate voltage to the operational amplifier 544 and the gate electrode of the thin film transistor. The processing unit is used to define the optimum (Vgate) ON and OFF gate voltages. Although the invention has been described with reference to the embodiments described above, it will be readily understood that other embodiments may be The scope of the present invention is not limited to the above embodiments, but can also generally be applied to display devices. It is to be understood that the use of the verb "inclusive"""""""""""""" In addition, the indefinite article “a” such element exists before the application of the component in the scope of the application. In addition, any ❹, ' does not exclude the plural of the patent scope. Furthermore, the present invention is entitled to: a combination of these new features or features. The invention belongs to the parent and each of the inventions can be summarized as follows: · a main description a-integrated gate driver and an external driver circuit are: f-set, package: used to cooperate with the integrated closed-pole driver to drive the active matrix The 'integrated gate driver includes-monitoring unit, the 薄膜-V feature of the thin film transistor on the non-clothing gate driver=the dish-integrated driving circuit includes a processing unit, the processing unit==丄 and the external driver The monitoring unit performs a plurality of measurements and is used to adjust the polarity of the plurality of thin film transistors of the integrated gate driver - _^ for::: the spirit and (4), and the effects thereof are included in the attached Apply for a patent.欠文均 m [Simple diagram of the diagram] Figure 1 shows a schematic diagram of an AMLCD with an integrated closed-pole driver and an external driver; Figure 乂 shows a schematic diagram of the junction of a positive-a gate driver and an external driver circuit; A schematic diagram of the π characteristics of the (4) film transistor; Fig. 4 shows a schematic view of the unconformed idler driver; and Fig. 5 shows a schematic view of the subcircuit for processing. 19 200816151 Component symbol description: 100 device 105 active matrix display device 110 integrated gate driver 120 monitoring unit 130 external driver circuit 140 processing unit 202 monitoring unit 210 integrated gate driver 216 gate bus bar 220 monitoring unit 222 gate Polar electrode 224 drain electrode 226 source electrode 230 external drive circuit 232 current measuring unit 234 drain voltage generating unit 236 gate voltage generating unit 240 processing unit 302 X axis 304 Y axis 306 solid line 308 dotted line 20 200816151
408 整合式閘極驅動器之一部分 410 整合式閘極驅動器 412 移位暫存器 414 閂鎖單元 415 上拉式薄膜電晶體 416 下拉式薄膜電晶體 417 閘極匯流排線 420 監視單元 520 監視單元 542 電壓產生單元 544 運算放大器 546 電阻 548 可變電阻 550 閘極電壓產生單元 560 開關 Idl、 * I<i2、Idmin 電流 Vi ' V2、v3、v4、v5、voff、vsat Vgate 閘極電壓 Vg〇N ON閘極電壓 VgOFF OFF閘極電壓 電壓 21408 Integrated Gate Driver One Part 410 Integrated Gate Driver 412 Shift Register 414 Latch Unit 415 Pull-Up Thin Film Transistor 416 Pull-down Thin Film Transistor 417 Gate Bus 420 Monitoring Unit 520 Monitoring Unit 542 Voltage generating unit 544 Operational amplifier 546 Resistor 548 Variable resistor 550 Gate voltage generating unit 560 Switch Id1, * I<i2, Idmin Current Vi 'V2, v3, v4, v5, voff, vsat Vgate Gate voltage Vg〇N ON Gate voltage VgOFF OFF gate voltage 21