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TW200703336A - DRAM and method for partially refreshing memory cell array - Google Patents

DRAM and method for partially refreshing memory cell array

Info

Publication number
TW200703336A
TW200703336A TW095125399A TW95125399A TW200703336A TW 200703336 A TW200703336 A TW 200703336A TW 095125399 A TW095125399 A TW 095125399A TW 95125399 A TW95125399 A TW 95125399A TW 200703336 A TW200703336 A TW 200703336A
Authority
TW
Taiwan
Prior art keywords
pasr
refresh
cell
dram
memory cell
Prior art date
Application number
TW095125399A
Other languages
English (en)
Inventor
Young-Sun Min
Jong-Hyun Choi
Nam-Jong Kim
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200703336A publication Critical patent/TW200703336A/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40622Partial refresh of memory arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
TW095125399A 2005-07-13 2006-07-12 DRAM and method for partially refreshing memory cell array TW200703336A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050063331A KR101183684B1 (ko) 2005-07-13 2005-07-13 디램 메모리 장치 및 부분 어레이 셀프 리프레시 방법

Publications (1)

Publication Number Publication Date
TW200703336A true TW200703336A (en) 2007-01-16

Family

ID=37661515

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095125399A TW200703336A (en) 2005-07-13 2006-07-12 DRAM and method for partially refreshing memory cell array

Country Status (4)

Country Link
US (1) US7349278B2 (zh)
KR (1) KR101183684B1 (zh)
DE (1) DE102006033190A1 (zh)
TW (1) TW200703336A (zh)

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JP3878573B2 (ja) * 2003-04-16 2007-02-07 株式会社東芝 不揮発性半導体記憶装置
US7453758B2 (en) * 2006-02-21 2008-11-18 Infineon Technologies Ag Control system for a dynamic random access memory and method of operation thereof
JP5623688B2 (ja) * 2007-10-29 2014-11-12 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. 半導体記憶装置、および欠陥セルテスト方法
KR100960479B1 (ko) * 2007-12-24 2010-06-01 주식회사 하이닉스반도체 플래시 메모리 장치 및 동작 방법
US8468295B2 (en) * 2009-12-02 2013-06-18 Dell Products L.P. System and method for reducing power consumption of memory
US20110296098A1 (en) 2010-06-01 2011-12-01 Dell Products L.P. System and Method for Reducing Power Consumption of Memory
CN102376346B (zh) * 2010-08-20 2014-02-12 华邦电子股份有限公司 动态随机存取存储器单元及其数据更新方法
US9153310B2 (en) * 2013-01-16 2015-10-06 Maxlinear, Inc. Dynamic random access memory for communications systems
US9754655B2 (en) * 2015-11-24 2017-09-05 Qualcomm Incorporated Controlling a refresh mode of a dynamic random access memory (DRAM) die
US10490251B2 (en) 2017-01-30 2019-11-26 Micron Technology, Inc. Apparatuses and methods for distributing row hammer refresh events across a memory device
CN112106138B (zh) 2018-05-24 2024-02-27 美光科技公司 用于行锤击刷新采样的纯时间自适应采样的设备和方法
US10685696B2 (en) 2018-10-31 2020-06-16 Micron Technology, Inc. Apparatuses and methods for access based refresh timing
WO2020117686A1 (en) 2018-12-03 2020-06-11 Micron Technology, Inc. Semiconductor device performing row hammer refresh operation
CN117198356A (zh) * 2018-12-21 2023-12-08 美光科技公司 用于目标刷新操作的时序交错的设备和方法
US10957377B2 (en) 2018-12-26 2021-03-23 Micron Technology, Inc. Apparatuses and methods for distributed targeted refresh operations
US11615831B2 (en) 2019-02-26 2023-03-28 Micron Technology, Inc. Apparatuses and methods for memory mat refresh sequencing
US11227649B2 (en) 2019-04-04 2022-01-18 Micron Technology, Inc. Apparatuses and methods for staggered timing of targeted refresh operations
US11069393B2 (en) 2019-06-04 2021-07-20 Micron Technology, Inc. Apparatuses and methods for controlling steal rates
US10978132B2 (en) 2019-06-05 2021-04-13 Micron Technology, Inc. Apparatuses and methods for staggered timing of skipped refresh operations
US11302374B2 (en) 2019-08-23 2022-04-12 Micron Technology, Inc. Apparatuses and methods for dynamic refresh allocation
US11302377B2 (en) 2019-10-16 2022-04-12 Micron Technology, Inc. Apparatuses and methods for dynamic targeted refresh steals
US11309010B2 (en) 2020-08-14 2022-04-19 Micron Technology, Inc. Apparatuses, systems, and methods for memory directed access pause
US11380382B2 (en) 2020-08-19 2022-07-05 Micron Technology, Inc. Refresh logic circuit layout having aggressor detector circuit sampling circuit and row hammer refresh control circuit
US11348631B2 (en) 2020-08-19 2022-05-31 Micron Technology, Inc. Apparatuses, systems, and methods for identifying victim rows in a memory device which cannot be simultaneously refreshed
US11557331B2 (en) 2020-09-23 2023-01-17 Micron Technology, Inc. Apparatuses and methods for controlling refresh operations
US11222686B1 (en) 2020-11-12 2022-01-11 Micron Technology, Inc. Apparatuses and methods for controlling refresh timing
US11264079B1 (en) 2020-12-18 2022-03-01 Micron Technology, Inc. Apparatuses and methods for row hammer based cache lockdown
US12125514B2 (en) 2022-04-28 2024-10-22 Micron Technology, Inc. Apparatuses and methods for access based refresh operations
US12112787B2 (en) 2022-04-28 2024-10-08 Micron Technology, Inc. Apparatuses and methods for access based targeted refresh operations

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4754050B2 (ja) * 1999-08-31 2011-08-24 富士通セミコンダクター株式会社 1対のセルにデータを記憶するdram
US6452855B1 (en) * 2001-01-05 2002-09-17 International Business Machines Corp. DRAM array interchangeable between single-cell and twin-cell array operation
JP2002216471A (ja) * 2001-01-17 2002-08-02 Mitsubishi Electric Corp 半導体記憶装置
US6590822B2 (en) * 2001-05-07 2003-07-08 Samsung Electronics Co., Ltd. System and method for performing partial array self-refresh operation in a semiconductor memory device
US6650587B2 (en) * 2001-11-19 2003-11-18 Micron Technology, Inc. Partial array self-refresh
JP2003338180A (ja) 2002-05-17 2003-11-28 Mitsubishi Electric Corp 半導体記憶装置
KR100506057B1 (ko) 2002-07-15 2005-08-03 주식회사 하이닉스반도체 부분 어레이 셀프 리프레시를 수행하는 반도체 메모리 장치
JP4229674B2 (ja) * 2002-10-11 2009-02-25 Necエレクトロニクス株式会社 半導体記憶装置及びその制御方法
JP2004221473A (ja) * 2003-01-17 2004-08-05 Renesas Technology Corp 半導体記憶装置

Also Published As

Publication number Publication date
KR20070008250A (ko) 2007-01-17
US7349278B2 (en) 2008-03-25
DE102006033190A1 (de) 2007-03-15
KR101183684B1 (ko) 2012-10-18
US20070014175A1 (en) 2007-01-18

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