200527142 玖、發明說明： 【發明所屬之技術領域】 本發明是有關於一種壓印方法，特別是指一於非平整 表面上的壓印方法。 5 【先前技術】 目前半導體工業的微影成像（microlithography)製程’ 以及相關的微製造技術是以光學微影（photolithography)蝕 刻方式為主。光學微影成像的解析度和光源的波長成正 比，所以解析度有其極限。一般認為當1C元件線寬小於 10 〇· 1 μιη時，利用光學微影製程將有困難，除了利用極紫外 線顯影技術（extreme UV lithography λ =13nm )的光源 外，只有採用非光學的方法如：離子投射顯影技術 (ion-beam projection lithography )， X 射線顯影技術 (X-ray lithography )，或是電子束投射顯影技術 15 ( electron-beam projection lithography)進行微影製程， 然而這些方法都非常的複雜而且昂貴。以壓印蝕刻 (imprinting lithography)的方法來做為微影成像製程，可達 到低成本快速，高效率的目的。 另外，近年來微電子電路已由原本之平面2D電路漸 20 漸進步至立體3D電路，於非平整表面上轉印電路佈局圖 已是必要之技術，但對於傳統光學微影而言，即使是輕微 的曲面，也會因為聚焦深度的不足，無法有效進行圖案的 轉移在非平整表面上。而現今之微米壓印蝕刻的技術運用 於在非平整表面上壓印時又存在^一些問題。參閱圖1 ’微 200527142 米壓印蝕刻的技術壓印圖形於在非平整表面上之方去β先 以熱塑性材料塗佈填充於一底面已刻有轉印圖形之模板 11上形成-披覆層12,再於該模板u及披覆層12加熱 後，將該披覆層12壓覆於一非平整表面之基板13上，待 5 冷部後脫模，使具有電路佈局外型之披覆層12貼覆於該基 板13上，再利用反應性的離子蝕刻（RIE)去除披覆層二 之凹陷部位121，僅將該披覆層12上具有轉印圖形之凸出 部位122貼覆於該基板13上。上述之步驟中，需以離子蝕 刻（RIE)去除披覆層12之凹陷部121，其過程不僅耗費 1〇 時間、成本較高，也容易於蝕刻過程中造成該披覆層12 之凸出部位122被蝕刻，致使轉印圖形被破壞。 有鑑於光學微影成像及壓印技術過程存在有上述缺 失，本發人明即針對此等缺失加以改善而進行萌思設計， 遂開發出本發明。 15 【發明内容】 於疋，本發明就是提供一效率高，成本低，且線路寬 度可達奈微米級的非平整面之壓印方法 於疋’本發明非平整面之壓印方法包含以下步驟： (A) 將填充材料填補於一非平整表面之基板的凹陷 20 部位，使該基板頂面平整。 (B) 疊鋪一光阻膜於該基板之頂面。 (C) 將一刻有凹陷之電路佈局且可透光的模板上以 遮光材料塗佈於預定部位。 (D) 將該模板覆蓋於該光阻膜之頂面，並施以壓力 200527142 以將該光阻膜上壓印形成一具有電路佈局的凸出部，及無 没置電路佈局之凹陷部。 (E) 以光源曝照互相疊壓之模板與基板，使部分光 阻膜產生變化。 (F) 將該模板脫模，由該基板頂面移除。 (G) 將該光阻膜之凹陷部洗除，留下該具有電路佈 局形狀之光阻膜凸出部於該基板上。 本發明結合壓印技術以及光罩曝光技術，其優點不僅 可以保持圖形的完整性也可在非平整的表面上製作微奈 ίο 15 米級且具高深寬比的圖形，還可節省時間及降低成本。 【實施方式】 有關本發明之前述及其他技術内容、特點與功效，在 以下配a參考圖式之一較佳實施例的詳細說明中，將可清 楚的明白。 本發明之方法是用於在一非平整面上壓印出一電路 佈局圖形的方法，該非平整表面—般是指d_RAM〇led 的陽極材料_後之表面。其壓印方法之較佳實施例包含 有以下步驟： (A)將填充材料填補於_具有非平整表面之基板2 的凹陷部位21，使該基板2頂面平整。其係先將該基板2 加熱至80 C ’再將填充材料塗佈於該基板2之非平整表面 形成一填補層3，再施加壓力壓整，使該填補層3之填充 材料充分填補入該基板2之凹防都a 〇 ί -c 土低z I凹部位21，再以機械研磨的 方式將該填補層3表面平整地研磨拖光直到該基板2之非 20 200527142 平整表面的凸出部位22顯露出來為止。其中填充材料是 是-種冷卻後可乾硬脆化之物質，本實施例中是用sw8 光阻劑作為填充材料，而實施上不以上述之材質為限。 (B)疊舖-光阻膜4於該基板2之頂面。該光阻膜4 5 ^組成材質有正型光阻劑與負型光阻劑兩種。本實施例中 疋以正型光阻劑材質作說明。一般光阻膜4的型態有乾膜 式及屋式兩種’如為乾旗式則以浮貼方式貼於該基板2之 頂面。如為渔式，則以旋轉塗佈方式貼覆於該基板2之頂 面。 ) (C)在一刻有凹陷之電路佈局且可透光的模板5上 以遮光材料塗佈於該模板5之凹陷部位51上。配合參閱 圖3，其詳細做法是先將遮光材料均勻地濺鍍於該模板5 底面开y成一遮光層6，待遮光層6固化後，將該模板5凸 出部位52上的遮光層6以機械研磨方式磨除，至使該模 板5之凸出部位52可透光為止，使該遮光層6塗佈遮蔽 於該模板5之凹陷部位51。該模板5 一般是以鉻石英為材 質，以電子束刻字機刻上轉印圖形如電路佈局圖等，再以 溼式蝕刻法將該模板5上蝕刻出具有電路佈局圖案的凹陷 部位51。一般電路佈局之線路寬度可精細達35nm，已達 奈微米級之線路寬度。 (D)於肋艺環境之下，將該模板5覆蓋於該光阻膜 4之頂面，並施以壓力向下壓印且保持溫度與壓力$分鐘， 致使該光阻膜4上壓印形成一具有電路佈局的凸出部， 及無設置電路佈局之凹陷部42。 200527142 (E) 以光源曝照互相疊壓之模板5與基板2，使該光 阻膜4之凹陷部42曝光並產生變化。而該凸出部4丨受該 遮光層6遮蔽而未變質。 (F) 將該模板5脫模，由該基板2頂面移除。 5 10 15 (G) 以莫爾濃度〇1之弱鹼性碳酸鈉水溶液以鹼洗方 式將該光阻膜4之已曝光變質之凹陷部42洗除，留下該 具有電路佈局形狀之光阻膜4凸出部41於該基板2之頂 面上。 (H)以丙酮或強鹼性溶液，將該基板2之凹陷部位 内的真補層3洗除，將電路佈局形狀之®形完整轉印於 該非平整表面之基板2上。 、 於本實施例中該光阻膜4之材料是以正型光阻劑作說 I +於v驟（B )中是以負型光阻劑材料作為光阻膜4， $ ^驟（C)中遮光材料是塗佈於於該模板$之凸出部位 52/、以形成一遮光層6，以致於步驟（E)的曝光過程中， 光I1膜4之凸出部曝光並產生變化。而於步驟（G) +以莫_濃度（U之驗性碳義水溶液將該光阻膜4 之未曝光之凹陷部42洗除。於曝光顯影製程中，正、負 |光阻d疋吊見之材料，且非本發明之特徵，以下不再多 作說明’也不另作圖式說明。 由以上本實施例的實施可以發現，本實施例盥習知者 相較具有如下之優點： /、 20 1 ·效率古 。 N ’不4使用習知步驟中之反應性離子蝕刻製 私可解省餘刻時間。 200527142 2·成本低，本實施例中所 +曰主 1災用之材枓成本低廉，且不 而叩貝之器材，降低製作成本。 5 3·轉印之圖形完整 將该光阻膜4之凹陷部 轉印圖形完整性。 轉印過程中僅是以鹼洗顯影方式 42洗除，不會因蝕刻製程而破壞 故歸納上述本發明結麵印與曝光之技術，完整將圖 古£ ρ於非平整表面上，使壓印過程時程縮短，效率提 w成本低，壓印線路完整且線路寬度可達奈微米級的非 平整面上壓印之方法。 10 15 惟以上所述僅為本發明二較佳可行實施例，舉凡熟習 此員技藝人仕，其依本發明精神範喻所作之修飾或變更， 均理應包含在本案申請專利範圍内。 【圖式簡單說明】 圖1疋白知之非平整面之摩印方法的過程示意圖； 圖2是本發明非平整面之產印方法的較佳實施例的過 程示意圖；及 圖3疋.亥較佳實施例中一模板之凹陷部位塗上遮光材 料形成一遮光層的過程示意圖。 10 200527142 圖式之主要元件代表符號說明 2 基板 21 凹陷部位 22 凸出部位 3 填補層 4 光阻膜 41 凸出部 42 凹 陷部 5 模 板 51 凹 陷部位 52 凸 出部位 6 遮 光層 11200527142 (1) Description of the invention: [Technical field to which the invention belongs] The present invention relates to an imprint method, and particularly to an imprint method on a non-planar surface. 5 [Previous technology] The current microlithography process in the semiconductor industry and related micro-manufacturing technologies are mainly based on photolithography etching methods. The resolution of optical lithography is directly proportional to the wavelength of the light source, so resolution has its limits. It is generally believed that when the line width of a 1C element is less than 10 μm, it will be difficult to use the optical lithography process. In addition to the light source using extreme UV lithography (extreme UV lithography λ = 13nm), only non-optical methods such as: Ion-beam projection lithography, X-ray lithography, or electron-beam projection lithography15 for lithography, but these methods are very complicated And expensive. Imprinting lithography is used as a lithography imaging process, which can achieve the purpose of low cost, fast speed, and high efficiency. In addition, in recent years, microelectronic circuits have gradually progressed from original flat 2D circuits to stereo 3D circuits. It is necessary to transfer circuit layout diagrams on uneven surfaces. However, for traditional optical lithography, even Slightly curved surfaces will not be able to transfer patterns on non-planar surfaces because of insufficient focus depth. However, the current micro-imprint etch technology has some problems when applied to imprints on uneven surfaces. Refer to Figure 1 'Micro 200527142 m embossing etching technology. The embossed pattern is formed on a non-flat surface. Β is first coated with a thermoplastic material and filled on a template 11 with a transfer pattern engraved on the bottom surface. A coating layer is formed. 12. After the template u and the coating layer 12 are heated, the coating layer 12 is laminated on a substrate 13 having a non-planar surface, and is demolded after 5 cold parts, so that the coating having a circuit layout appearance is coated. The layer 12 is pasted on the substrate 13, and then the recessed part 121 of the coating layer 2 is removed by reactive ion etching (RIE), and only the convex part 122 with the transfer pattern on the coating layer 12 is pasted on On the substrate 13. In the above steps, the recessed portion 121 of the coating layer 12 needs to be removed by ion etching (RIE). This process not only takes 10 time and costs a lot, but also easily causes the protruding portion of the coating layer 12 during the etching process. 122 is etched, causing the transfer pattern to be destroyed. In view of the above-mentioned defects in the optical lithography imaging and imprinting technology process, the present inventor has made thoughtful designs to improve these defects, and developed the present invention. 15 [Summary of the Invention] In the present invention, the present invention is to provide a non-planar surface embossing method with high efficiency, low cost, and a line width of up to nanometers. The present invention includes the following steps: : (A) Fill the filling material in the recess 20 of a substrate with a non-planar surface to make the top surface of the substrate flat. (B) Laying a photoresist film on the top surface of the substrate. (C) Apply a light-shielding material to a predetermined location on a light-transmitting template with a circuit layout that is recessed. (D) Cover the template on the top surface of the photoresist film and apply pressure 200527142 to emboss the photoresist film to form a protruding portion with a circuit layout and a recessed portion without a circuit layout. (E) Expose the laminated template and substrate with a light source to change part of the photoresist film. (F) Demold the template and remove from the top surface of the substrate. (G) The recessed portion of the photoresist film is washed away, leaving the projected portion of the photoresist film with a circuit layout shape on the substrate. The invention combines embossing technology and photomask exposure technology. Its advantages can not only maintain the integrity of the graphics, but also make micro-nano on a non-flat surface. 15 meters of high-aspect-ratio graphics can save time and reduce cost. [Embodiment] The foregoing and other technical contents, features, and effects of the present invention will be clearly understood in the following detailed description of a preferred embodiment with reference to the accompanying drawings. The method of the present invention is a method for embossing a circuit layout pattern on a non-planar surface. The non-planar surface generally refers to the surface after the anode material of d_RAM_led. A preferred embodiment of the embossing method includes the following steps: (A) Filling a recessed portion 21 of a substrate 2 with a non-planar surface with a filling material to make the top surface of the substrate 2 flat. It firstly heats the substrate 2 to 80 C ', and then applies a filling material to the non-flat surface of the substrate 2 to form a filling layer 3, and then applies pressure to press and make the filling material of the filling layer 3 fully fill the filling material. The concave part of the substrate 2 is a 〇ί -c 低 Low z I concave part 21, and then the surface of the filling layer 3 is ground and polished by mechanical polishing until the non-20 200527142 convex part of the flat surface is polished. 22 is revealed. The filling material is a kind of material which can be dried, hard and brittle after cooling. In this embodiment, a sw8 photoresist is used as the filling material, and the implementation is not limited to the above materials. (B) Overlay-photoresist film 4 on the top surface of the substrate 2. The material of the photoresist film 4 5 ^ includes two types: a positive photoresist and a negative photoresist. In this embodiment, 疋 is described using a positive photoresist material. Generally, the photoresist film 4 has two types: a dry film type and a house type. If it is a dry flag type, it is pasted on the top surface of the substrate 2 by a floating method. If it is a fishing type, it is attached to the top surface of the substrate 2 by a spin coating method. ) (C) A light-transmitting template 5 with a circuit layout of a recess at a moment is coated on the recessed portion 51 of the template 5 with a light-shielding material. With reference to FIG. 3, the detailed method is to uniformly sputter the light-shielding material on the bottom surface of the template 5 to form a light-shielding layer 6. After the light-shielding layer 6 is cured, the light-shielding layer 6 on the protruding portion 52 of the template 5 It is removed by mechanical grinding until the protruding portion 52 of the template 5 can transmit light, and the light-shielding layer 6 is applied to cover the recessed portion 51 of the template 5. The template 5 is generally made of chrome quartz, and a transfer pattern such as a circuit layout is engraved with an electron beam engraving machine. Then, a recess 51 having a circuit layout pattern is etched on the template 5 by a wet etching method. The line width of general circuit layout can be as fine as 35nm, which has reached the line width of nanometer level. (D) In a ribbed environment, cover the template 5 on the top surface of the photoresist film 4 and apply pressure to imprint down and maintain the temperature and pressure for $ minutes, so that the photoresist film 4 is imprinted. A protruding portion with a circuit layout and a recessed portion 42 without a circuit layout are formed. 200527142 (E) Exposing the template 5 and the substrate 2 laminated on each other with a light source to expose the recessed portion 42 of the photoresist film 4 and change it. The protruding portion 4 丨 is shielded by the light shielding layer 6 without being deteriorated. (F) The template 5 is demolded and removed from the top surface of the substrate 2. 5 10 15 (G) Wash the exposed and deteriorated depressions 42 of the photoresist film 4 with an alkaline washing with a weakly alkaline sodium carbonate aqueous solution at a Mohr concentration of 0, leaving the photoresist with the shape of the circuit layout. The protruding portion 41 of the film 4 is on the top surface of the substrate 2. (H) With acetone or a strong alkaline solution, the true patch layer 3 in the recessed part of the substrate 2 is washed away, and the ® shape of the circuit layout shape is completely transferred on the substrate 2 with the uneven surface. In this embodiment, the material of the photoresist film 4 is a positive photoresist I. In v step (B), a negative photoresist material is used as the photoresist film 4. The light-shielding material is coated on the protruding portion 52 / of the template $ to form a light-shielding layer 6, so that during the exposure process of step (E), the protruding portion of the light I1 film 4 is exposed and changes. In step (G) + the unexposed recessed portion 42 of the photoresist film 4 is washed away with a carbon aqueous solution of Mo concentration (U). In the exposure development process, positive and negative | photoresist d is suspended The material that is seen is not a feature of the present invention, so it will not be described in more detail below. It will not be described in other figures. From the implementation of the above embodiment, it can be found that the person skilled in the present embodiment has the following advantages compared to the following: /, 20 1 · The efficiency is ancient. N 'Do not use reactive ion etching in the conventional steps to save time. 200527142 2 · Low cost, the material used in this example + master 1 disaster枓 Low cost, but also the equipment of the shell, reducing the production cost. 5 3 · The transferred pattern is complete. The recessed part of the photoresist film 4 is transferred to the complete pattern. The transfer process is based on alkaline washing and developing only. 42 cleaning, which will not be damaged due to the etching process, so the above-mentioned technology of the surface printing and exposure of the present invention is summarized, and the graph is completely on a non-flat surface, which shortens the duration of the embossing process and improves efficiency and low cost. Non-flat surface with imprinted circuit and circuit width up to nanometer level 10 15 But the above is only the second preferred feasible embodiment of the present invention. For those skilled in the art, any modifications or changes made according to the spirit paradigm of the present invention should be included in the scope of the patent application for this case. [Brief description of the drawings] FIG. 1 is a schematic diagram of the process of rubbing a non-planar surface, which is known; FIG. 2 is a schematic process diagram of a preferred embodiment of a method for producing a non-planar surface according to the present invention; and FIG. 3 疋. The schematic diagram of the process of applying a light-shielding material to form a light-shielding layer in the recessed part of a template in the preferred embodiment. 10 200527142 Symbol description of the main elements of the diagram 2 Substrate 21 Depression 22 Protrusion 3 Filler 4 Photoresist film 41 Convex Outer part 42 Recessed part 5 Template 51 Recessed part 52 Projected part 6 Light-shielding layer 11