TW200518289A - Solder bump structure formed on integrated circuit package substrate and method for fabricating the same - Google Patents
Solder bump structure formed on integrated circuit package substrate and method for fabricating the sameInfo
- Publication number
- TW200518289A TW200518289A TW092132114A TW92132114A TW200518289A TW 200518289 A TW200518289 A TW 200518289A TW 092132114 A TW092132114 A TW 092132114A TW 92132114 A TW92132114 A TW 92132114A TW 200518289 A TW200518289 A TW 200518289A
- Authority
- TW
- Taiwan
- Prior art keywords
- resist layer
- conductive film
- pads
- openings
- solder bump
- Prior art date
Links
Classifications
-
- H10W74/15—
-
- H10W90/724—
Landscapes
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
A solder bump structure formed on an integrated circuit package substrate and a method for fabricating the same are proposed. A first conductive film is formed on an insulating layer of the substrate, and a first resist layer is formed thereon with a plurality of openings to expose the first conductive film. A patterned circuit layer including a plurality of pads is formed within the openings by an electroplating method, and a second resist layer is formed thereon without covering the pads. After a first solder material and a metal protective layer are in turn formed on the pads by an electroplating method, the second resist layer, first resist layer and the first conductive film underneath the first resist layer are removed. An insulating protective layer is formed over the surface of the substrate with openings to expose the pads, and a second conductive film is formed thereon. A third resist layer is formed on the second conductive film with openings to expose the second conductive film on the pads, and a second solder material is formed within the openings of the third resist layer by an electroplating method. After the third resist layer and the second conductive film underneath the third resist layer are removed, a solder bump is formed on the pad by a reflow-soldering process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092132114A TWI242849B (en) | 2003-11-17 | 2003-11-17 | Solder bump structure formed on integrated circuit package substrate and method for fabricating the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW092132114A TWI242849B (en) | 2003-11-17 | 2003-11-17 | Solder bump structure formed on integrated circuit package substrate and method for fabricating the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200518289A true TW200518289A (en) | 2005-06-01 |
| TWI242849B TWI242849B (en) | 2005-11-01 |
Family
ID=37022622
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW092132114A TWI242849B (en) | 2003-11-17 | 2003-11-17 | Solder bump structure formed on integrated circuit package substrate and method for fabricating the same |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI242849B (en) |
-
2003
- 2003-11-17 TW TW092132114A patent/TWI242849B/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| TWI242849B (en) | 2005-11-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |