SU1008921A1 - Device for cyclic synchronization at binary convolution coding - Google Patents

Abstract

DEVICE .For TsIKLOi VOY SYNCHRONIZATION IN BINARY CODING SVERTOCHKOM comprising a serially connected switch test sequence generator, generator Syndrome sequence for each "th input of which is connected the other output of the switch, and Threshold counter prohibiting signal generator and the sample size counter having an input merged with the corresponding input of the switch and the connection to the output of the clock pulse generator, characterized in that, in order to reduce and the timing of synchronization, blocks of coincidence are entered into it, the counting trigger and the shaper of the temporary information rewrite shaft, while the output of the generator of sequential sequence is connected to the first BHF. SNMP of the first block of coincidence, the output of which is connected to the first input of the former through the threshold counter prohibitory signals, the second input is combined with another input of the threshold counter by the installation input of the counting trigger and nof is connected to the output of the counter of the sample size, the output of the driver for These signals are connected to the control input of the switch, and the direct output S of the counting trigger is connected to the first input of the second coincidence unit, the second, whose input is connected to the output of the forcing clock, the output of the second block . The information rewriting shaft is connected to the counting input of the counting trigger, the inverse output of which is connected to the X) second input of the first block of the same day. Nd

Description

The invention relates to telecommunications and can be used for frame synchronization in equipment to improve the reliability of data transmission in binary convolutional coding.

A device for frame alignment with binary convolutional coding is known, comprising a series-connected prohibiting unit, a switch, keys, a unit for. error detection unit, for error correction, as well as serially connected clock pulse shaping, the output of which is connected to the first input of the inhibit unit, sample volume counter, pulse driver, zero setting, OR element, threshold counter, trigger and inhibitor pulse generator, output which is connected to the second input of the blocking block Lll.

However, the known device has a relatively large time of entry into the sylconism.

The purpose of the invention is to reduce the time of occurrence. in synchronicity.

The goal is achieved by the fact that blocks of coincidence are entered into the device, the counting trigger and the shaper of the information rewriting time interval, while the output of the syndromic sequencer is connected to the first input of the first coincidence unit, the output of which through the threshold counter is banned ShI .X signals, the second in. Input of which is combined with another input of the threshold counter and the installation input of the counting trigger "connected to the output of the sample volume counter, Atel prohibiting signal is coupled to a control input of the switch and the forward output countable trigger connected to the first input of the second block matcher, the second input of which is connected to the output of the clock pulse output

- the second match block through the shaper of the time interval for rewriting information is connected to the counting input of the counting trigger, the inverter output of which is connected to the second input of the first match block.

The drawing shows a structural electrical circuit of the proposed device.

The device contains a switch 1, a shaper 2 of a check sequence, spines, a shaper 3 of a sequence of syndromes, a first biok-4 coincidence threshold counter 5 rover 6 prohibitory signals, a factor of 7 clock pulses, a count. a sample 8 fb of the sample, a counting trigger 9, a second block 10 of coincidence, and a shaper 11 of the rewriting time interval,

The device works as follows about & again.

The input code sequence is split in the switch. 1 on the info. mating and check sequences. Symbols of the information sequence follow the input of the former, which extracts from the THESE signals, a test sequence. Last together

Q with check sequence

removed from the appropriate output of switch 1, goes to the two inputs of the driver 3, which forms the syndrome sequence by

J comparison of the indicated sequences of symbols modulo 2. The type of the syndromic sequence depends both on the establishment of frame synchronization and on the presence of errors in the information section n) investigator

Jj st When establishing cyclic synchronization and the absence of a fault, a null syndrome sequence is formed. In all other cases, a nonzero syndromic sequence is formed, and in cases where there is no sync cycle (in the presence or absence of errors in the information sequence), the number of nonzero symbols in the syndromic sequence significantly exceeds their number as compared to the case where are present. errors in the information sequence,

The syndromic sequence h & re the first block 4 of coincidence is fed to the input of the threshold counter 5, to another input which is followed by pulses from the output of the counter 8 of the sample size. If at the end of time

analysis of the syndrome sequence determined by the pulse following period from the output of counter 8, there is no pulse signal at the output of the threshold counter 5,

5 then the shaper 6 does not generate SIGN4 / 1, which prohibits the clock of the pulses from the output of the shaper of 7 clock pulses to the input of the switch 1, which goes off. This case corresponds to the presence of certain synchronization. If E1 is at the end of the analysis time, the number of nonzero symbols in the sequential sequence exceeds the selected threshold value, then the output of the 5 signal will be a pulse signal. Under the action of the latter, a forwarded signal is generated in the forma- tor 6 (coinciding in phase with the output pulse signal of the sample volume counter 8), which prevents: the passage of one pulse of the specified last clock pulse to the input of the switch 1. Inhibiting clock pulses leads to a shift in the phase of the received information in the switchboard 1, resulting in a loop synchronization of the decoder. Pulses from the output of Counter 8, the sampling volume also goes to the installation input of the counting trigger 9, setting it to state 1. At. With this signal from the output of the counting trigger 9, block 4 is locked, thereby stopping the syndrome sequence from entering the Threshold Counter 5, and the signal from the direct output of the counting trigger 9 is unlocked, and the clock pulses from the output are set to & 7 clock pulses are followed to the input of the driver 11 1 214 rewriting time interval info | mashga. At the output of the latter, a pulse signal delayed with respect to the input signal is required for the time interval required for overwriting the information in the generator register of the 2-check combination after the next prohibition of the clock pulse: in the coxutator 1. The pulse from the output of the driver 11 converts the counting trigger 9 to the original condition. This locks the block 10 ,. coincidence thereby terminating the arrival of clock pulses to the input of the imager 11 rewriting time interval information, and also block 4 coincides with the skip to the input of the Threshold counter 5 syndrome syndrom. In the proposed device, by stopping the arrival of the syndrome sequence at the input of the threshold counter 5 during the rewriting time of the information sequence in the generator 2 register of the check sequence, the number of non-zero symbols of the syndromic sequential is reduced. These are formed at the expense of the memory of the former 2. In this case, the probability of missing the framing time of the decoder's frame synchronization is reduced, thereby reducing the time & m of synchronization.

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Claims (1)

DEVICE FOR CYCLE SYNCHRONIZATION WITH BINARY CONVOLUTIONARY CODING, containing serially connected. a switch, a test sequence generator, a syndrome sequence generator, to the other input of which another switch output is connected, as well as a threshold counter, an inhibitor signal generator and a sample size counter, the input of which is combined with the corresponding switch input and connected to the output of the Pulse generator, different the fact that, in order to reduce the time of entering synchronism, into it Coincidence blocks, a counting trip ⁴ · ger, and a shaper of the time interval for rewriting information were introduced, while the output of the syndromic sequencer is connected to the first input of the first coincidence block, the output of which through the threshold counter 'is connected to the first input of the inhibitory signal generator, the second input of which is combined with the other input of the threshold counter and the installation input of the counting trigger and connected to the output of the counter of the sample size, the output of the inhibitory signal generator is connected to the control the switch, and the direct output of the counting trigger is connected to the first input of the second coincidence unit, the second input of which is connected to the output of the shaper-clock pulses, the output of the second coincidence block through the shaper of time inter. the information rewrite shaft is connected to the counting input of the even trigger, the inverse output of which is connected to the second input of the first coincidence block. ΙΖ6800Γ ^{,, υ} 7Τ§ · 3 *