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RU2443008C1 - FUNCTIONAL STRUCTURE OF A TRANSFORMER OF PRELIMINARY FA fΣ [ni]&[mi](2n) OF PARALLEL-SERIAL MULTIPLICATOR fΣ (Σ) CONDITIONALLY, OF "i" DIGIT TO SUM UP OF POSITIONAL ADDITIVE OF SUMS [ni]f(2n) AND [mi]f(2n) OF PARTIAL PRODUCTS USING ARITHMETICAL AXIOMS OF TERNARY NOTATION f(+1, 0, -1) WITH THE FORMATION OF A RESULTING SUM [SΣ]f(2n) IN A POSITIONAL FORMAT - Google Patents

FUNCTIONAL STRUCTURE OF A TRANSFORMER OF PRELIMINARY FA fΣ [ni]&[mi](2n) OF PARALLEL-SERIAL MULTIPLICATOR fΣ (Σ) CONDITIONALLY, OF "i" DIGIT TO SUM UP OF POSITIONAL ADDITIVE OF SUMS [ni]f(2n) AND [mi]f(2n) OF PARTIAL PRODUCTS USING ARITHMETICAL AXIOMS OF TERNARY NOTATION f(+1, 0, -1) WITH THE FORMATION OF A RESULTING SUM [SΣ]f(2n) IN A POSITIONAL FORMAT Download PDF

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RU2443008C1
RU2443008C1 RU2010130857/08A RU2010130857A RU2443008C1 RU 2443008 C1 RU2443008 C1 RU 2443008C1 RU 2010130857/08 A RU2010130857/08 A RU 2010130857/08A RU 2010130857 A RU2010130857 A RU 2010130857A RU 2443008 C1 RU2443008 C1 RU 2443008C1
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functional
logical function
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preliminary
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Лев Петрович Петренко (UA)
Лев Петрович Петренко
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Лев Петрович Петренко
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Abstract

FIELD: computational engineering.
SUBSTANCE: construction arithmetic of devices and introduction of different arithmetic procedures on arguments with positional symbolic structure of analog signals arguments [ni]f(2n) and [mi]f(2n) using arithmetical axioms of ternary notation f(+1, 0, -1).
EFFECT: increased the summing-up speed as the variants of the structure are realized using logical elements NOT, AND, OR, AND -NOT, OR-NOT.
1 dwg

Description

Текст описания приведен в факсимильном виде.

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The text of the description is given in facsimile form.
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Claims (2)

1. Функциональная структура предварительного сумматора fΣ [ni]&[mi](2n) параллельно-последовательного умножителя fΣ (Σ) условно «i» разряда для суммирования позиционных аргументов слагаемых [ni]f(2n) и [mi]f(2n) частичных произведений с применением арифметических аксиом троичной системы счисления f(+1,0,-1) и формированием результирующей суммы [SΣ]f(2n) в позиционном формате, которая включает логические функции f1(})-ИЛИ, f2(})-ИЛИ, f3(})-ИЛИ, f4(})-ИЛИ, f5(})-ИЛИ, f1(}&)-ИЛИ-НЕ, f1(&)-И, f2(&)-И, f3(&)-И, f4(&)-И, f1( & )-НЕ и логическую функцию f1(&)-И-НЕ, функциональные входные связи которой являются функциональными входными связями структуры для приема аргументов ni и mi, при этом функциональная входная связь логической функции f2(&)-И является функциональной выходной связью логической функции f1(})-ИЛИ, а функциональные входные связи логической функции f3(&)-И являются функциональными выходными связями соответственно логической функции f3(})-ИЛИ, f4(})-ИЛИ, отличающаяся тем, что введены дополнительные логические функции f2( & )-НЕ, f2(&)-И-НЕ, f3(&)-И-НЕ, f4(&)-И-НЕ и f5(&)-И-НЕ, при этом функциональные связи в структуре предварительного сумматора выполнены в соответствии с математической моделью вида
Figure 00000099

где «= & 1=» - логическая функция f1( & )-НЕ;
Figure 00000100
- логическая функция f1(&)-И;
Figure 00000101
- логическая функция f1(})-ИЛИ;
Figure 00000102
- логическая функция f1(&)-И-НЕ;
Figure 00000103
- логическая функция f1(}&)-ИЛИ-НЕ.1. The functional structure of the preliminary adder f Σ [n i ] & [m i ] (2 n ) of a parallel-series multiplier f Σ (Σ) of conditionally “i” category for summing the positional arguments of the terms [n i ] f (2 n ) and [m i ] f (2 n ) partial products using arithmetic axioms of the ternary number system f (+ 1,0, -1) and generating the resulting sum [S Σ ] f (2 n ) in a positional format that includes the logical functions f 1 (}) - OR, f 2 (}) - OR, f 3 (}) - OR, f 4 (}) - OR, f 5 (}) - OR, f 1 (} & ) - OR NOT, f 1 (&) - And, f 2 (&) - And, f 3 (&) - And, f 4 (&) - And, f 1 ( & ) -НЕ and the logical function f 1 ( & ) -И- NOT functional input connection which are functional input structure constraints for receiving arguments n i and m i, wherein the functional input connection logic function f 2 (k) - and a functional output coupled logic function f 1 (}) - OR, and functional input connection logic the functions f 3 (&) - AND are the functional output connections, respectively, of the logical function f 3 (}) - OR, f 4 (}) - OR, characterized in that additional logical functions f 2 ( & ) -НЕ, f 2 ( &) -and NOR f 3 (k) -and NOR f 4 (k) -and-NO 5 and f (k) -and-NO, wherein the functional linkages in trukture pre-adder are executed in accordance with the mathematical model of the form
Figure 00000099

where "= & 1 =" is the logical function f 1 ( & ) -НЕ;
Figure 00000100
- logical function f 1 (&) - And;
Figure 00000101
- logical function f 1 (}) - OR;
Figure 00000102
- logical function f 1 ( & ) -AND-NOT;
Figure 00000103
- logical function f 1 (} & ) -OR-NOT. 2. Функциональная структура предварительного сумматора fΣ [ni]&[mi](2n) параллельно-последовательного умножителя fΣ (Σ) условно «i» разряда для суммирования позиционных аргументов слагаемых [ni]f(2n) и [mi]f(2n) частичных произведений с применением арифметических аксиом троичной системы счисления f(+1,0,-1) и формированием результирующей суммы [SΣ]f(2n) в позиционном формате, которая включает логические функции f1(})-ИЛИ, f2(})-ИЛИ, f3(})-ИЛИ, f1(}&)-ИЛИ-НЕ, f1(&)-И, f2(&)-И, f3(&)-И, f4(&)-И, f1( & )-НЕ и логическую функцию f1(&)-И-НЕ, функциональные входные связи которой являются функциональными входными связями структуры для приема аргументов ni и mi, при этом функциональная входная связь логической функции f2(&)-И является функциональной выходной связью логической функции f1(})-ИЛИ, отличающаяся тем, что введены дополнительные логические функции f2( & )-НЕ, f2(&)-И-НЕ, f3(&)-И-НЕ, f4(&)-И-НЕ, f5(&)-И-НЕ, f6(&)-И-НЕ и f7(&)-И-НЕ, при этом функциональные связи в структуре предварительного сумматора выполнены в соответствии с математической моделью вида
Figure 00000104
2. The functional structure of the preliminary adder f Σ [n i ] & [m i ] (2 n ) of a parallel-series multiplier f Σ (Σ) of conditionally “i” category for summing the positional arguments of the terms [n i ] f (2 n ) and [m i ] f (2 n ) partial products using arithmetic axioms of the ternary number system f (+ 1,0, -1) and generating the resulting sum [S Σ ] f (2 n ) in a positional format that includes the logical functions f 1 (}) - OR, f 2 (}) - OR, f 3 (}) - OR, f 1 (} & ) - OR NOT, f 1 (&) - AND, f 2 (&) - AND, f 3 (&) - AND, f 4 (&) - AND, f 1 ( & ) -НЕ and the logical function f 1 ( & ) -AND-NOT, the functional input connections to which are the functional input relationships of the structure for receiving the arguments n i and m i , while the functional input link of the logical function f 2 (&) - AND is the functional output link of the logical function f 1 (}) - OR, characterized in that additional logical functions f 2 ( & ) -НЕ, f 2 ( & ) -AND-NOT, f 3 ( & ) -AND NOT, f 4 ( & ) -AND NOT, f 5 ( & ) -AND NOT, f 6 ( & ) -I-NOT and f 7 ( & ) -I-NOT, while the functional relationships in the structure of the preliminary adder are made in accordance with a mathematical model of the form
Figure 00000104
RU2010130857/08A 2010-07-22 2010-07-22 FUNCTIONAL STRUCTURE OF A TRANSFORMER OF PRELIMINARY FA fΣ [ni]&[mi](2n) OF PARALLEL-SERIAL MULTIPLICATOR fΣ (Σ) CONDITIONALLY, OF "i" DIGIT TO SUM UP OF POSITIONAL ADDITIVE OF SUMS [ni]f(2n) AND [mi]f(2n) OF PARTIAL PRODUCTS USING ARITHMETICAL AXIOMS OF TERNARY NOTATION f(+1, 0, -1) WITH THE FORMATION OF A RESULTING SUM [SΣ]f(2n) IN A POSITIONAL FORMAT RU2443008C1 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2378682C2 (en) * 2007-12-17 2010-01-10 Лев Петрович Петренко INPUT STRUCTURE FOR PARALLEL ADDER IN POSITION-SIGN CODES f(+/-)(VERSIONS)
RU2386162C2 (en) * 2008-04-29 2010-04-10 Лев Петрович Петренко FUNCTIONAL STRUCTURE OF PARALLEL ADDER FOR MULTIPLICATION, WHEREIN ARGUMENTS OFTERMS OF PARTIAL PRODUCTS ARE ARGUMENTS OF TERNARY NUMBER SYSTEM f(+1,0,-1) IN POSITIONAL-SIGN FORMAT THEREOF f(+/-) (VERSIONS)

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2378682C2 (en) * 2007-12-17 2010-01-10 Лев Петрович Петренко INPUT STRUCTURE FOR PARALLEL ADDER IN POSITION-SIGN CODES f(+/-)(VERSIONS)
RU2386162C2 (en) * 2008-04-29 2010-04-10 Лев Петрович Петренко FUNCTIONAL STRUCTURE OF PARALLEL ADDER FOR MULTIPLICATION, WHEREIN ARGUMENTS OFTERMS OF PARTIAL PRODUCTS ARE ARGUMENTS OF TERNARY NUMBER SYSTEM f(+1,0,-1) IN POSITIONAL-SIGN FORMAT THEREOF f(+/-) (VERSIONS)

Non-Patent Citations (1)

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УЭЙКЕРЛИ Дж. Проектирование цифровых устройств. - М.: Постмаркет, 2002, т.1, с. 508, рис. 5.91. *

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