KR900012354A - Packaged integrated circuit with decoupling capacitors in the cavity - Google Patents
Packaged integrated circuit with decoupling capacitors in the cavityInfo
- Publication number
- KR900012354A KR900012354A KR1019900000464A KR900000464A KR900012354A KR 900012354 A KR900012354 A KR 900012354A KR 1019900000464 A KR1019900000464 A KR 1019900000464A KR 900000464 A KR900000464 A KR 900000464A KR 900012354 A KR900012354 A KR 900012354A
- Authority
- KR
- South Korea
- Prior art keywords
- cavity
- integrated circuit
- decoupling capacitors
- packaged integrated
- packaged
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US29779789A | 1989-01-17 | 1989-01-17 | |
| US297,797 | 1989-01-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR900012354A true KR900012354A (en) | 1990-08-03 |
| KR0168424B1 KR0168424B1 (en) | 1999-01-15 |
Family
ID=23147788
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019900000464A Expired - Lifetime KR0168424B1 (en) | 1989-01-17 | 1990-01-16 | Packaged Integrated Circuits With Decoupling Capacitors in the Cavity |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH0362566A (en) |
| KR (1) | KR0168424B1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7489035B2 (en) | 2004-11-09 | 2009-02-10 | Samsung Electronics Co., Ltd. | Integrated circuit chip package having a ring-shaped silicon decoupling capacitor |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997011492A1 (en) * | 1995-09-20 | 1997-03-27 | Hitachi, Ltd. | Semiconductor device and its manufacture |
| JP4618941B2 (en) * | 2001-07-24 | 2011-01-26 | 三洋電機株式会社 | Semiconductor device |
| JP4538473B2 (en) * | 2007-06-25 | 2010-09-08 | 富士通株式会社 | Semiconductor device |
| US8818296B2 (en) | 2012-11-14 | 2014-08-26 | Power Integrations, Inc. | Noise cancellation for a magnetically coupled communication link utilizing a lead frame |
| US9035435B2 (en) | 2012-11-14 | 2015-05-19 | Power Integrations, Inc. | Magnetically coupled galvanically isolated communication using lead frame |
| CN207217523U (en) * | 2014-11-12 | 2018-04-10 | 株式会社村田制作所 | Complex electronic device, circuit module and DC-DC converter module |
-
1990
- 1990-01-16 KR KR1019900000464A patent/KR0168424B1/en not_active Expired - Lifetime
- 1990-01-17 JP JP2008104A patent/JPH0362566A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7489035B2 (en) | 2004-11-09 | 2009-02-10 | Samsung Electronics Co., Ltd. | Integrated circuit chip package having a ring-shaped silicon decoupling capacitor |
Also Published As
| Publication number | Publication date |
|---|---|
| KR0168424B1 (en) | 1999-01-15 |
| JPH0362566A (en) | 1991-03-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19900116 |
|
| PG1501 | Laying open of application | ||
| A201 | Request for examination | ||
| PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 19950116 Comment text: Request for Examination of Application Patent event code: PA02011R01I Patent event date: 19900116 Comment text: Patent Application |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 19980327 Patent event code: PE09021S01D |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19980715 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 19981002 Patent event code: PR07011E01D |
|
| PR1002 | Payment of registration fee |
Payment date: 19981002 End annual number: 3 Start annual number: 1 |
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| PG1601 | Publication of registration | ||
| PR1001 | Payment of annual fee |
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| FPAY | Annual fee payment |
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| EXPY | Expiration of term | ||
| PC1801 | Expiration of term |
Termination date: 20140402 Termination category: Expiration of duration |