KR20090010757A - Polycrystalline silicon thin film and method of manufacturing thin film transistor using same - Google Patents

Abstract

A method for producing a silicon thin film is disclosed, wherein the silicon thin film is formed on a substrate by a high density plasma chemical vapor deposition method having a plasma density of 2.00E + 11 cm ^-3 or more. High-quality polycrystalline silicon thin films can be formed even at low temperatures, and thus low cost and practical high quality thin film transistors can be obtained.

Description

Fabrication method of poly-crystalline Si thin film and transistor adopting the same}

The present invention relates to a polycrystalline silicon thin film and a method of manufacturing a thin film transistor using the same.

Polycrystalline Si (hereinafter, referred to as p-Si) has higher mobility and good light stability than amorphous silicon. Such polycrystalline silicon is used in a wide range of applications, especially in TFTs and memory devices. Poly-Si TFTs are used for example as switching elements in displays. Display devices that use active devices such as TFTs include TFT-LCDs, TFT-OLEDs, and the like.

TFT-LCD or TFT-OLED has a structure in which TFTs are arranged for each pixel arranged in an X-Y matrix. As described above, the performance of LCDs, OLEDs, and the like in which a plurality of TFTs are arranged depends greatly on the electrical characteristics of the TFTs themselves. One of the important characteristics of the TFT is the mobility of the Si active layer. Crystallization is essential to increase the mobility of the Si active layer. The study of crystalline silicon is the development of poly-Si close to a single crystal. U. S. Patent 6,322, 625 relates to a process for producing high quality silicon crystals. As such, much research on the crystallization of silicon has been progressed to obtain a crystal structure that is even close to a single crystal. The disadvantage of such polycrystalline silicon thin film is that it is difficult to obtain uniform physical properties as a whole, and this non-uniformity is intensified as the area becomes larger.

Instead of such polycrystalline silicon, a method of manufacturing microcrystalline silicon, which is less practical than this but has improved uniformity than a general polycrystalline silicon thin film, has been proposed (see Jounal of Applied Physics-October 1, 1999, Volume 86, Issue 7). , pp. 3812-3821 by INESC). This method uses PECVD to form a microsilicon thin film having the properties and quality between amorphous silicon and polycrystalline silicon. In this method, the silicon bond in the weak bond state is removed by hydrogen atoms in the deposited silicon film. This method requires a higher dilution ratio of hydrogen because the lower the deposition temperature, the less the etch effect by hydrogen. For example, when deposition proceeds at room temperature, the dilution ratio of hydrogen reaches 99%, in which case the crystallinity is not high. Such a conventional method is likely to be limited in forming high quality microcrystalline silicon thin films on thermally weak substrates such as plastic and soda-lime glass.

The present invention has an intermediate quality between amorphous silicon and polycrystalline silicon, and provides a method of manufacturing a nano-crystal silicon thin film that can be practically used in high quality electronic products.

Method for producing a polycrystalline silicon thin film according to the present invention is:

A polycrystalline silicon thin film is formed on the substrate by a high density plasma chemical vapor deposition method having a plasma density of 2.00E + 11cm ^-3 or more.

The method for manufacturing a silicon thin film according to a preferred embodiment of the present invention uses a plastic or glass substrate as the substrate.

A method of manufacturing a polycrystalline silicon thin film transistor according to the present invention is:

And forming an active layer having a channel region and source and drain regions on both sides of the channel region.

Forming the active layer is:

Forming a polycrystalline silicon thin film on the insulating substrate by High Density Plasma Enhanced Chemical Vapor Deposition having a plasma density of 2.00E + 11 cm ^-3 or more; and

And patterning the silicon thin film to form an active layer of the thin film transistor.

The present invention provides a polycrystalline silicon thin film having a nano-sized particle diameter having 1 to 50 in the middle of amorphous silicon having a mobility of 1 cm ² / Vs or less and polycrystalline silicon having a mobility in the range of 50 ~ 300 cm ² / Vs. Form. According to this method, a low-cost, practical high-performance thin film transistor can be manufactured by manufacturing a polycrystalline silicon thin film having low research and manufacturing cost advantages and a range of mobility that is less than polycrystalline silicon but is sufficient to be applied to general devices such as display devices. Can be. In particular, the present invention can form high-quality polycrystalline silicon even at low temperatures, so that thin film transistors can be formed on substrates such as plastic and low-cost glass. Such a manufacturing method of the present invention can be applied to the manufacture of both a top gate type and a bottom gate type thin film transistor.

Hereinafter, a preferred embodiment of a polycrystalline silicon (c-Si) thin film having a nano-sized particle diameter and a method of manufacturing a thin film transistor using the same according to the present invention will be described in detail with reference to the accompanying drawings.

The present invention utilizes a high density plasma chemical vapor deposition (HDP CVD) method in which deposition and etching of a material occur simultaneously, wherein a silicon material is formed under a specific plasma density condition. The deposition forms a polycrystalline silicon thin film having a nano-sized grain size. In the HDP-CVD process, silicon deposition and etch repeatedly occur. At this time, since the amount of deposition is higher than the amount of etching, a c-Si thin film may be formed on the substrate. The etched process is a process in which Si-Si bonds, which are weak in bonding strength, are decomposed in the Si-Si bond structure, thus obtaining c-Si thin films by strong Si-Si bonds by HDP-CVD. The amount or thickness of sputtered increases relatively linearly with the increase or decrease in power applied to the substrate during deposition.

According to the results obtained through the process of trial and error, 2.00E + 11 cm ^- when depositing silicon at a density of ³ nm for the purpose - was obtained a polycrystalline silicon thin film having a size of the input.

1 is a view for explaining a c-Si thin film formation method according to the present invention.

Referring to FIG. 1, _a c-Si thin film 20 is formed on a substrate 10 using Si _a H _b as _a source gas, for example SiH ₄ , and Ar or He as a transport gas. At this time, the plasma density is adjusted to 2.00E + 11cm ^-3 or more. One of various conventional methods may be selected for forming the c-Si thin film 20. Background arts such as a plasma apparatus and a source gas for forming a c-Si thin film 20 by high density plasma are typically Korean Patent Application No. 10-1999-002774 for a method for manufacturing a silicon film having high crystallinity by high density plasma. The method presented in can be applied to the production method of the present invention. In applying this high density deposition method, the plasma density should also be adjusted to 2.00E + 11 cm ⁻³ or more.

2A and 2B show examples of a top gate thin film transistor and a bottom gate thin film transistor which can be manufactured by the manufacturing method according to the present invention.

Referring to FIG. 2A, a buffer layer 11 formed of SiO 2 or SiN having a function as a buffer layer is formed on an upper surface of the substrate 10. The active layer 13 obtained from the c-Si thin film 20 manufactured by the manufacturing method of the present invention is provided on the buffer layer 11, which is a doped source region and a drain region and a channel therebetween. It is divided into channels. The gate insulating layer 14 is formed on the active layer 13, and through holes 14s and 14d corresponding to the source and drain regions are formed therein.

A gate is formed on a channel of the active layer 13, and an interlayer dielectric 15 is formed thereon. In the ILD 15, through holes 15s and 15d corresponding to the source and drain regions of the active layer and communicating with the through holes 14s and 14d of the gate insulating layer 14 are formed. The ILD 15 includes a source electrode and a drain electrode contacting the source region and the drain region of the active layer 13 through the through holes 14s 15s and 14d 15d.

Referring to FIG. 2B, a buffer layer 10a is formed on an upper surface of the substrate 10, and a gate GATE is formed thereon. SiO ₂ on the gate A gate insulating layer 14a formed of or the like is formed. An active layer 13 obtained from the c-Si thin film manufactured by the manufacturing method of the present invention is provided on the gate insulating layer 14a, which is also doped source and drain regions and channels therebetween. It is divided into channels. An interlayer dielectric 15 (ILD) is formed on the active layer 13. Through holes 15s and 15d corresponding to the source and the drain of the active layer 13 are formed in the ILD 15. The ILD 15 includes a source electrode and a drain electrode contacting the source and drain regions of the active layer 13 through the through holes 15s and 15d, respectively.

The two types of transistors as described above are manufactured by a known process, except that the active layer 13 is manufactured by the method of the present invention mentioned in FIG. Therefore, the method of manufacturing a thin film transistor according to the present invention includes forming a c-Si thin film and patterning the same to form an active layer.

3 is a graph showing various experimental results for obtaining a polycrystalline silicon thin film having a nano-sized particle diameter, it can be seen that the crystal formation of silicon starts around a specific value density, that is, 2.00E + 11 cm ⁻³ . 3 shows the change in the CVF (Crystal Volume Fraction,%) according to the plasma density change. Here, CVF means the index which shows the crystallinity of a silicon thin film. As shown in FIG. 3, crystallized silicon was observed at a density of 2.00E + 11 cm ⁻³ or more, but not below. In the graph, the limit of the measuring instrument is 5.00E + 11cm ^{- 3} Only results are shown.

Each process condition is as follows.

① 800W, 30mtorr, SiH4 / He = 2 / 20sccm

② 1000W, 30mtorr, SiH4 / He = 2 / 20sccm

③ 1000W, 20mtorr, SiH4 / He / Ar = 2/20 / 20sccm

④ 1000W, 20mtorr, SiH4 / Ar = 2 / 20sccm

⑤ 1000W, 30mtorr, SiH4 / Ar / H2 = 2/20 / 20sccm

As mentioned earlier, the Journal of Applied Physics (October 1, 1999-Volume 86, Issue 8, pp.3812-3821) is generally used at low temperatures between a-Si (amorphous silicon) and p-Si (polycrystalline silicon). A method for producing a silicon thin film having a particle diameter is disclosed. This method contains hydrogen gas as an etchant in Plasma Enhanced Chemical Vapor Deposition (PECVD). Hydrogen decomposes weak Si—Si bonds in the amorphous mode to form only strong and rigid Si—Si thin films in crystalline mode. This method reduces the etch effect by hydrogen as the process temperature decreases, and thus the dilution ratio of hydrogen must be increased to increase the amount of etch. In the case of deposition at room temperature, the dilution ratio reaches 99%, but it is difficult to expect high crystallinity.

In the present invention, a crystalline silicon thin film is formed without depending on the etch effect by other etching gas (Cl, F series) containing hydrogen as described above, which is a Raman analysis graph showing the comparative experiment results in FIGS. 4A, 4B, and 4C. .

4A shows the Raman peak of a silicon thin film obtained using SiH ₄ gas and Ar gas without hydrogen gas. 4b shows Raman peaks of a silicon thin film obtained using SiH ₄ source gas and He transport gas without hydrogen gas as well. As shown in FIGS. 4A and 4B, a-Si peaks appear near 480 nm and c-Si (crystallin Si) appears near 520 nm. However, FIG. 4C shows the Raman peak of a silicon thin film deposited at a plasma density lower than 2.00 E + 11 cm ⁻³ . As shown, only a peak of a-Si appears around 480 nm.

According to the above results, in the conventional method in which hydrogen is included as an etchant, crystalline silicon was not formed even though hydrogen gas was included at a plasma density below a certain value. It can be seen that the crystal chamber silicon can be formed in density.

Figure 5a is an SEM image of the c-Si thin film actually produced by the present invention, Figure 5b is a TEM image. Deposition conditions of the c-Si thin film as shown in Figure 5a, 5b is as follows.

Output: 1 kW

Substrate: Diameter 8 "Wafer

Pressure: 30 mtorr

SiH4 / He: 2/20 sccm

Plasma Density: 2.9 e + 11 cm ^-3

6A and 6B are graphs comparing the electrical characteristics (drain voltage Vd = 0.1 V) of a thin film transistor having an active layer having a width / length of 20/20 (µm) manufactured by the invention and the conventional high temperature PECVD method.

TFT parameter The present invention Prior art Mobility (cm ² / Vs)  18  10.9  Threshold Voltage (Vth) V  1.8  1.2  Subthreshold slope (s.s.) (V / dec.)  0.4  0.5  Ion / Ioff ratio  10e5

According to the above results, it can be seen that according to the present invention, a high-quality c-Si thin film and a thin film transistor using the same can be obtained.

The present invention can produce a high-quality c-Si thin film and a thin film transistor using the same without the help of hydrogen or other etchant by the plasma of a specific density or more. However, in some cases, hydrogen may be included as an auxiliary material to aid in crystallization when producing a silicon thin film by a plasma density of a certain value or more defined in the present invention.

This invention is applicable to semiconductor devices based on silicon, in particular any device for forming channels in the active layer by an electric field. The most widely used field is a thin film transistor, and thus a representative target product is a flat panel display device.

While some exemplary embodiments have been described and illustrated in the accompanying drawings in order to facilitate understanding of the present invention, it should be understood that these embodiments merely illustrate the broad invention and do not limit it, and the invention is illustrated and described. It is to be understood that the invention is not limited to structured arrangements and arrangements, as various other modifications may occur to those skilled in the art.

1 is a view for explaining the polycrystalline silicon thin film deposition method of the present invention.

2A is a schematic cross-sectional view of a top gate thin film transistor manufactured by the present invention.

2B is a schematic cross-sectional view of a bottom gate thin film transistor manufactured by the present invention.

Figure 3 is a graph showing the difference in crystallinity of the silicon thin film according to the production method and the conventional method according to the present invention.

4A and 4B show Raman peaks showing whether crystals of a silicon thin film manufactured by the present invention are formed.

Figure 4c shows a Raman peak showing the crystal formation of the silicon thin film prepared by the prior art.

5A is an SEM image of a silicon thin film actually manufactured by the present invention, and FIG. 5B is a TEM image.

6A and 6B are graphs comparing the electrical characteristics (drain voltage Vd = 0.1 V) of a thin film transistor having an active layer having a width / length of 20/20 (µm) manufactured by the invention and the conventional high temperature PECVD method.

Claims (6)

A method for producing a silicon thin film, characterized in that the silicon thin film is formed on the substrate by a high density plasma chemical vapor deposition method having a plasma density of 2.00E + 11cm ^-3 or more. The method of claim 1, Method for producing a silicon thin film, characterized in that further comprising hydrogen gas in the reaction gas when forming the silicon thin film. The method according to claim 1 or 2, The gas for forming the silicon thin film is a method for producing a silicon thin film, characterized in that any one of Ar, He. And forming an active layer having a channel region and source and drain regions on both sides of the channel region. Forming the active layer is: Forming a silicon thin film on the insulating substrate by High Density Plasma Enhanced Chemical Vapor Deposition having a plasma density of at least 2.00E + 11 cm ^-3 ; and Patterning the silicon thin film to form an active layer of the thin film transistor. The method of claim 4, wherein The method of manufacturing a polycrystalline silicon thin film transistor, characterized in that further comprising hydrogen gas in the reaction gas when forming the silicon thin film. The method according to claim 4 or 5, A method of manufacturing a polycrystalline silicon thin film transistor, characterized in that any one of Ar and He is contained in the gas forming the silicon thin film.

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