KR20080020337A - Liquid crystal display - Google Patents

Abstract

A liquid crystal display device having increased surface planarization is provided. The liquid crystal display includes a gate electrode formed on an insulating substrate, a semiconductor layer overlapping the gate electrode, a source electrode and a drain electrode formed on the semiconductor layer overlapping with the gate electrode, and spaced apart from each other, and a gate electrode on the semiconductor layer. A first display panel formed in an area other than opposite regions of the source electrode and the drain electrode, the dummy floating electrode separated from the source electrode and the drain electrode, and a pixel electrode connected to the drain electrode; The display panel may include a second display panel spaced apart from the display panel and a column spacer configured to maintain a gap between the first display panel and the second display panel, wherein the column spacer is disposed to overlap the gate electrode between the first display panel and the second display panel.

Description

Liquid crystal display

1 is a diagram schematically illustrating a pixel array of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display of FIG. 1.

3 is a layout diagram of a first display panel of a liquid crystal display according to an exemplary embodiment of the present invention.

4A and 4B are enlarged views illustrating the first thin film transistor and the second thin film transistor of FIG. 3.

5 is a layout diagram of a second display panel of a liquid crystal display according to an exemplary embodiment of the present invention.

6 is a layout diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view taken along the line VII-VII 'of FIG. 6.

<Description of the symbols for the main parts of the drawings>

100: first display panel 200: second display panel

300: liquid crystal layer 310: column spacer

400: liquid crystal display

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display with increased surface planarization.

The liquid crystal display device includes a first display panel in which thin film transistors are arrayed, a second display panel opposite thereto, and a liquid crystal layer interposed therebetween. A spacer is provided between the first display panel and the second display panel to maintain a cell gap therebetween.

The spacer is mainly disposed in the non-transmissive region. For example, the semiconductor device may be disposed to overlap the gate line, the data line, or the thin film transistor of the first display panel and to overlap the black matrix of the second display panel. Here, the overlap region of the first display panel is preferably a thin film transistor formation region having a relatively large area. For example, the column spacer may be formed to overlap the black matrix on the second display panel, and then the ends of the column spacer may face the upper surface of the first display panel at a position overlapped with the thin film transistor.

The thin film transistor is formed by combining a gate wiring, a data wiring and a semiconductor layer. However, some regions may be formed on the semiconductor layer, and some regions may not be formed. In this case, the thickness difference according to the region may be reflected, and thus the surface may be uneven such that a step is formed on the upper surface of the protective film covering the regions. Thus, when the end of the column spacer is brought into contact with it, the spacing may become unstable or the interval may vary. That is, the cell gap failure of the liquid crystal display may occur.

An object of the present invention is to provide a liquid crystal display device having an increased surface planarization of a protective film.

Another object of the present invention is to provide a liquid crystal display device in which stable spacing of column spacers and accurate cell gaps are maintained.

Technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

A liquid crystal display according to an exemplary embodiment of the present invention for achieving the technical problem is formed by overlapping with the gate electrode formed on an insulating substrate, a semiconductor layer overlapping the gate electrode, on the semiconductor layer A source electrode and a drain electrode spaced apart from each other, and overlapping with the gate electrode on the semiconductor layer, and formed in a region other than an opposite region of the source electrode and the drain electrode, and separated from the source electrode and the drain electrode. A first display panel including a dummy floating electrode, and a pixel electrode connected to the drain electrode, a second display panel spaced apart from and opposed to the first display panel, and a column maintaining a distance between the first display panel and the second display panel A spacer, the gate electrode and an ohmic region between the first display panel and the second display panel; And a column spacer which is located so that the lap.

Specific details of other embodiments are included in the detailed description and drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the present embodiments are intended to complete the disclosure of the present invention, and the general knowledge in the art to which the present invention pertains. It is provided to fully convey the scope of the invention to those skilled in the art, and the present invention is defined only by the scope of the claims. In the drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity.

When elements or layers are referred to as "on" or "on" of another element or layer, intervening other elements or layers as well as intervening another layer or element in between It includes everything. On the other hand, when a device is referred to as "directly on" or "directly on" indicates that no device or layer is intervened in the middle. Like reference numerals refer to like elements throughout. “And / or” includes each and all combinations of one or more of the items mentioned.

The spatially relative terms " below ", " beneath ", " lower ", " above ", " upper " It may be used to easily describe the correlation of a device or components with other devices or components. Spatially relative terms are to be understood as including terms in different directions of the device in use or operation in addition to the directions shown in the figures. Like reference numerals refer to like elements throughout.

The dummy floating electrode included in the liquid crystal display according to the exemplary embodiment of the present invention contributes to planarization of the overlapped region with the gate electrode and the semiconductor layer. Therefore, the column spacer disposed to overlap the region may serve as a stable spacing, and accurately maintain the cell gap according to the design. Hereinafter, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings. An exemplary embodiment of the present invention described below includes a first display panel, a second display panel, and a liquid crystal layer interposed therebetween, wherein the pixel electrode of the first display panel includes a first sub pixel electrode and a second sub pixel. The present invention relates to a liquid crystal display device divided into electrodes, each sub pixel electrode being driven by a separate switching element. However, of course, it is not limited to the liquid crystal display device which has the said structure.

1 is a diagram schematically illustrating a pixel array of a liquid crystal display according to an exemplary embodiment of the present invention. FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display of FIG. 1.

Referring to FIGS. 1 and 2, the overall structure and operation of the liquid crystal display according to the exemplary embodiment of the present invention will be described. The liquid crystal display transmits a plurality of gate lines G and data signals that transmit gate signals. Data lines Da and Db. The plurality of gate lines G extend parallel to each other, for example, in the row direction. The plurality of data lines Da and Db extend parallel to each other, for example, in the column direction.

The pixels PX are arranged in a matrix and include a pair of sub pixels PXa and PXb. Each of the sub-pixels PXa and PXb includes switching elements Qa and Qb connected to the corresponding data lines Da and Db and one gate line G, and liquid crystal capacitors Clca and Clcb connected thereto. ), And storage capacitors Csta and Cstb connected thereto. That is, two data lines Da and Db and one gate line G are allocated to the pair of sub pixels PXa and PXb. The storage capacitors Csta and Cstb may be omitted as necessary.

The switching elements Qa and Qb of each of the sub-pixels PXa and PXb are formed of a thin film transistor or the like provided in the first display panel, and are connected to a control terminal connected to a gate line G to which a gate signal is applied (hereinafter, Gate electrodes), input terminals (hereinafter referred to as source electrodes) connected to the data lines Da and Db, and output terminals (hereinafter referred to as drains) connected to the liquid crystal capacitors Clca and Clcb and storage capacitors Csta and Cstb. Electrode) having a three-terminal element. As such switching elements Qa and Qb, thin film transistors are exemplified.

The liquid crystal capacitors Clca and Clcb have two terminals of the sub pixel electrode of the first display panel and the common electrode of the second display panel, and the liquid crystal layer between the sub pixel electrode and the common electrode functions as a dielectric. Each sub pixel electrode Pa or Pb is formed to be electrically separated from the first display panel, and is connected to the switching elements Qa and Qb. The common electrode is formed on the entire surface of the second display panel and receives the common voltage Vcom. The common electrode may be provided on the first display panel.

The storage capacitors Csta and Cstb, which serve as an auxiliary part of the liquid crystal capacitors Clca and Clcb, are formed by overlapping the storage wirings provided on the first display panel with the sub pixel electrodes with an insulator interposed therebetween. A predetermined voltage such as Vcom is applied.

As described above, one pixel includes two switching elements and sub pixel electrodes Pa and Pb connected to each switching element. It is assumed here that a relatively low data voltage is applied to the first sub pixel electrode Pa and a relatively high data voltage is applied to the second sub pixel electrode Pb. Hereinafter, high and low of the data voltage means high and low of the difference between the common voltage and the data voltage. In addition, a pixel to which a data voltage is applied to the first sub pixel electrode Pa through the first data line Da positioned on the left side of the pixel is referred to as a B-type pixel, and the second data line (located on the right side of the pixel ( A pixel to which a data voltage is applied to the first sub pixel electrode Pa through Db) will be referred to as an A-type pixel.

In the liquid crystal display according to the present exemplary embodiment, as shown in FIG. 1, A-type pixels and B-type pixels are alternately arranged in a horizontal direction and a vertical direction. From this arrangement, the vertical stripes or the horizontal stripes in the liquid crystal display can be prevented from being recognized.

If the data voltage is applied to the first sub-pixel electrode Pa through the first data line Da for all the pixels, that is, when the pixel array is all formed of the B-type pixels, the liquid crystal display may perform column inversion. When driven by an inversion, vertical stripes moving in the horizontal direction may be viewed with respect to the test pattern moving in the horizontal direction by one pixel per frame. In contrast, a data voltage is applied to the first sub pixel electrode Pa through the first data line Da for one pixel row, and the second data line Db for the pixels forming the next pixel row. When the data voltage is applied to the first sub pixel electrode Pa through, that is, when the rows of the B-type pixels and the rows of the A-type pixels are alternately arranged, the aforementioned vertical stripes moving in the horizontal direction are prevented from being recognized. can do. However, the first sub pixel electrode Pa is coupled with the first and second data lines Da and Db positioned at both sides thereof, and the first sub pixel electrode Pa and the first and second Since the coupling capacitance of the data lines Da and Db is different depending on the B-type pixel and the A-type pixel, the horizontal stripes can be viewed.

Therefore, as in the liquid crystal display according to the exemplary embodiment of the present invention illustrated in FIG. 1, the vertical stripes or horizontal lines moving in the horizontal direction by arranging the A-type pixels and the B-type pixels in the horizontal and vertical directions alternately. Streaks can be prevented.

Hereinafter, the pixel structure of the liquid crystal display device as described above will be described in more detail. 3 is a layout diagram of a first display panel of a liquid crystal display according to an exemplary embodiment of the present invention. 4A and 4B are enlarged views illustrating the first thin film transistor and the second thin film transistor of FIG. 3. 5 is a layout diagram of a second display panel of a liquid crystal display according to an exemplary embodiment of the present invention. 6 is a layout diagram of a liquid crystal display according to an exemplary embodiment of the present invention. FIG. 7 is a cross-sectional view taken along the line VII-VII 'of FIG. 6. In the layout diagram of FIG. 6, the layout of FIG. 3 and the layout of FIG. 5 are combined. 3, 5, and 6 illustrate layouts for two pixels, B-type pixels and A-type pixels, which are adjacent to each other in the row direction.

First, the first display panel of the liquid crystal display according to the exemplary embodiment of the present invention will be described with reference to FIGS. 3, 6, and 7.

The first display panel 100 uses an insulating substrate 110 made of transparent glass, quartz, plastic, or the like as a base substrate.

A gate line 122 made of a conductive material, a first gate electrode 124a connected to the gate line 122, and a second gate electrode 124b are formed on the insulating substrate 110. In the drawing, the first gate electrode 124a and the second gate electrode 124b are disposed in the A-type pixel on the left side, and the second gate electrode 124b and the first gate in the B-type pixel on the right side. It arrange | positions in order of the electrode 124a. The shape of the first gate electrode 124a and the second gate electrode 124b may be substantially the same.

In addition, the storage wiring 128 is formed on the same layer as the gate line 122 on the insulating substrate 100. Although the storage wiring 128 is formed to cross the center portion of the pixel in the drawing, the position and shape of the storage wiring 128 may be variously modified.

The gate line 122, the first and second gate electrodes 124a and 124b, and the storage wiring 128 are covered by the gate insulating layer 130. The gate insulating layer 130 may be, for example, a single film made of silicon oxide or silicon nitride or a stacked film thereof.

The semiconductor layers 140a and 140b made of hydrogenated amorphous silicon or the like are formed on the gate insulating layer 130. The semiconductor layer includes a first semiconductor layer 140a and a second semiconductor layer 140b. The first semiconductor layer 140a overlaps the first gate electrode 124a, and the second semiconductor layer 140b overlaps the second gate electrode 124b.

First and second data lines 162 and 163 made of a conductive material are formed on the first and second semiconductor layers 140a and 140b. The first data line 162 is disposed on the left side of the pixel, and the second data line 163 is disposed on the right side of the pixel.

The first data line 162 or the second data line 162 is branched toward the first semiconductor layer 140a to overlap the first gate electrode 124a and the first semiconductor layer 140a. ). In addition, the first data line 162 or the second data line 162 is branched toward the second semiconductor layer 140b and overlaps the second gate electrode 124b and the first semiconductor layer 140b. (165b) is formed. In the example illustrated in the drawing, the first source electrode 165a is connected to the first data line 162, and the second source electrode 165b is connected to the second data line 163. have. In the pixel on the right side of the drawing, the first source electrode 165a is connected to the second data line 163, and the second source electrode 165b is connected to the first data line 162.

Such a connection is different depending on the row direction of the pixel as described with reference to FIG. 1. That is, the data lines to which the first source electrode 165a and the second source electrode 165b are connected to each other in the row direction are different from each other. The first source electrode 165a and the second source electrode 165b are alternately branched with respect to the first data line 162 for each pixel in the column direction.

The first drain electrode 166a is formed on the first semiconductor layer 140a to face the first source electrode 165a. A second drain electrode 166b spaced apart from the second source electrode 165b is formed on the second semiconductor layer 140a. A dummy floating electrode 168b is also formed on the second semiconductor layer 140a, which is separated from the second source electrode 165b and the second drain electrode 166b. Detailed description of the dummy floating electrode 168b will be described later.

The first gate electrode 124a, the first source electrode 165a, and the first drain electrode 166a form a first thin film transistor having the first semiconductor layer 140a as a channel. In addition, the second gate electrode 124b, the second source electrode 165b, and the second drain electrode 166b form a second thin film transistor having the second semiconductor layer 140b as a channel.

On the other hand, ohmic contact layers 155a and 156a are formed between the first semiconductor layer 140a and the first source electrode 165a and between the first semiconductor layer 140a and the first drain electrode 166a, respectively. In addition, between the second semiconductor layer 140b and the second source electrode 165b, between the first semiconductor layer 140b and the second drain electrode 166b, and between the first semiconductor layer 140a and the dummy floating electrode 168b. The ohmic contact layers 155b, 156b, and 158b are formed between the two layers. The ohmic contact layers 155a, 156a, 155b, 156b, and 158b are made of n + hydrogenated amorphous silicon doped with a high concentration of n-type impurities, and lowers the contact resistance between the semiconductor layers 140a and 140b and the upper wiring. Do it.

The first and second data lines 162 and 163, the first and second source electrodes 165a and 165b, the first and second drain electrodes 166a and 166b, and the dummy floating electrode 168b may have a first protection. Covered by membrane 170. The first passivation layer 170 is made of, for example, silicon nitride. The second passivation layer 172 made of an organic material or the like is formed on the first passivation layer 170. One of the first passivation layer 170 and the second passivation layer 172 may be omitted.

The first passivation layer 170 and the second passivation layer 172 pass through the first drain electrode 166a forming region to form the first contact hole 176a, and pass through the second drain electrode 166b forming region. Two contact holes 176b are formed.

The pixel electrodes 182a and 182b made of ITO or IZO, which is a transparent conductive material, are formed on the second passivation layer 172. The pixel electrode is divided into a first sub pixel electrode 182a and a second sub pixel electrode 182b.

The first sub pixel electrode 182a is connected to the first drain electrode 166a through the first contact hole 176a. The second sub pixel electrode 182b is connected to the second drain electrode 166b through the second contact hole 176b. The first sub pixel electrode 182a and the second sub pixel electrode 182b are separated from each other with a gap 183 therebetween. In addition, the first sub pixel electrode 182a and the second sub pixel electrode 182b each have a cutout 184 similar to the gap 183 therein. The gap 183 and the cutout 184 together with the cutout 253 of the second display panel 200 to be described later contribute to regulating the domain of the liquid crystal 320.

The first sub pixel electrode 182a has a larger area than the second sub pixel electrode 182b and is formed to surround the second sub pixel electrode 182b from, for example, three sides. As described above, a voltage lower than the second sub pixel electrode 182b is applied to the first sub pixel electrode 182a.

Subsequently, the first thin film transistor and the second thin film transistor will be described in more detail with reference to FIGS. 4A and 4B.

As described above, the first drain electrode 166a of the first thin film transistor is connected to the first sub pixel electrode 182a having a relatively large area. Therefore, in order to charge the first sub-pixel electrode 182a having a relatively large area, the amount of current passing through the channel region of the first thin film transistor must be large, so that the channel region of the first thin film transistor is the second thin film. It must be wider than the channel region of the transistor. To this end, the first source electrode 165a of the first thin film transistor is generally longer than the second source electrode 165b of the second thin film transistor. That is, the source electrodes 165a and 165b and the drain electrodes 166a and 166b are meshed with each other, and the distance d1 between the first source electrode 165a and the first drain electrode 166a, which is the length of the channel, is formed. The distance d2 between the two source electrodes 166a and the second drain electrode 166b is substantially the same, but the length of the region in which the first source electrode 165a and the first drain electrode 166a, which are the width of the channel, is spaced apart ( l1 is larger than the length l2 of the region where the second source electrode 165b and the second drain electrode 166b are spaced apart from each other.

In this regard, the shape of the first source electrode 165a may be, for example, a 'ㅌ' or 'E' shape, and the shape of the second source electrode 165b may be, for example, a 'c' or 'U' shape. . Accordingly, the first drain electrode 166a may have a '11' shape, and the second drain electrode 166b may have a '1' shape.

However, the first semiconductor layer 140a generally occupies most of the surfaces of the first source electrode 165a and the first drain electrode 166a, but the second semiconductor layer 140b is disposed on the second source electrode ( Since the areas of the 165b and the second drain electrode 166b are relatively small, there are many aspects in which they do not occupy. In particular, when the liquid crystal display 400 is enlarged, the thicknesses of the source electrodes 165a and 165b and the drain electrodes 166a and 166b are also increased. Thus, the second source electrode is formed on the second semiconductor layer 140b. When there are many surfaces not occupied by 165b and the second drain electrode 166b, the surfaces of the first protective film 170 and the second protective film 172 formed thereon also have steps. When the second protective film 172 has a step, when the spacer 310 is disposed thereon, the stability of the spacer 310 may be impaired, and it is difficult to maintain an accurate cell gap.

Therefore, the dummy floating electrode 168b is provided on the second semiconductor layer 140b to minimize the above-described step. That is, since the dummy floating electrode 168b is separated from the second source electrode 165b and the second drain electrode 166b, the dummy floating electrode 168b does not perform a separate electrical operation and compensates only a surface level difference. Preferably, the second passivation layer 172 overlapped on the second semiconductor layer 140b is formed to have substantially the same surface as the second passivation layer 172 formed on the first semiconductor layer 140a. do. That is, the overall shape of the dummy floating electrode 168b, the second source electrode 165b, and the second drain electrode 166b on the second semiconductor layer 140b may have a first source electrode 165a on the first semiconductor layer 140a. ) And the first drain electrode 166b may be substantially the same as the overall shape. However, since the dummy floating electrode 168b is separated from the second source electrode 165b and the second drain electrode 166b, there is a difference in shape in the region.

In the example of FIG. 4B, a portion of the dummy floating electrode 168b is formed in a substantially 'ㅌ' shape together with the second source electrode 165b to substantially form the first source electrode 165a on the first semiconductor layer 140a. The same shape is shown. In addition, another portion of the dummy floating electrode 168b is substantially '11' shaped together with the second drain electrode 166b to be substantially the same shape as the first drain electrode 166a on the first semiconductor layer 140a. Indicates.

As shown in FIG. 7, the surface of the second protective film 172 formed on the second semiconductor layer 140b is also formed on the first semiconductor layer 140a as shown in FIG. 7. 172 may be leveled.

Next, the second display panel of the liquid crystal display according to the exemplary embodiment of the present invention will be described with reference to FIGS. 5 to 7.

In the case of the second display panel 100, the base substrate is an insulating substrate 210 made of transparent glass, quartz, or plastic.

The black matrix 220 is formed on the insulating substrate 210. The black matrix 220 defines an opening, and the color filter 230 is formed in the opening. The black matrix 220 is generally aligned to overlap the gate line 122 of the first display panel and the first and second data lines 162 and 163, and the color filter 230 is arranged in the first sub pixel electrode 182a. And overlap the second sub pixel electrode 182b.

An overcoat layer 240 is formed on the black matrix 220 and the color filter 230. The common electrode 250 made of ITO or IZO, which is a transparent conductive material, is formed on the overcoat layer 240. A cutout 253 is formed in the common electrode 250, and contributes to regulating the domain of the liquid crystal 320 together with the gap 183 and the cutout 184 of the first display panel 100.

In the meantime, the column spacer 310 is formed on the common electrode 250 in the region overlapping with the black matrix 220. A plurality of column spacers 310 are disposed between the first display panel 100 and the second display panel 200 to maintain their cell gaps. For example, two column spacers 310 may be disposed per pixel.

An end of the column spacer 310 may contact the second passivation layer 172 on the first display panel 100. The region where the column spacer 310 abuts may be a light blocking region through which light does not pass. For example, it may be a region overlapping with the first gate electrode 124a of the first thin film transistor having a relatively large area and the second gate electrode 124b of the second thin film transistor. However, as described above, not only the surface of the second passivation layer 172 in the region overlapping the first gate electrode 124a, but also the surface of the second passivation layer 172 overlapping the second gate electrode 124b. Since the semiconductor substrate 140 is planarized by providing the dummy floating electrode 168b on the semiconductor layer 140b, even when the column spacer 310 is positioned, stable spacing may play a role. Therefore, the cell gap according to the design can be maintained accurately.

The liquid crystal layer 300 including the liquid crystal 310 is formed in a region where the cell gap is maintained by the column spacer 310. In the liquid crystal layer 310 of the liquid crystal layer 300, the dielectric constant and transmittance are changed by an electric field generated by the pixel electrodes 182a and 182b of the first display panel 100 and the common electrode 250 of the second display panel 200. do.

Although not illustrated, an alignment layer (not shown) may be further provided between the liquid crystal layer 300 and the first display panel 100 and between the liquid crystal layer 300 and the second display panel 200. .

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

According to the liquid crystal display according to the exemplary embodiment of the present invention, a surface layer that may be formed on the semiconductor layer according to the source and drain electrode formation areas may be compensated by the dummy floating electrode to minimize the step and the protective layer formed thereon. The surface of can be planarized. Therefore, even if the column spacer is disposed here, it can play a stable spacing role and maintain an accurate cell gap.

Claims (11)

A gate electrode formed on the insulating substrate, A semiconductor layer overlapping the gate electrode; A source electrode and a drain electrode formed overlapping with the gate electrode on the semiconductor layer, and spaced apart from each other; A dummy floating electrode formed on the semiconductor layer so as to overlap the gate electrode, and formed in a region other than an opposite region of the source electrode and the drain electrode, and separated from the source electrode and the drain electrode; A first display panel including a pixel electrode connected to the drain electrode; A second display panel spaced apart from the first display panel to face the first display panel; And And a column spacer spaced apart from the first display panel and the second display panel, the column spacer being disposed to overlap the gate electrode between the first display panel and the second display panel. According to claim 1, The first display panel includes a plurality of pixels arranged in a matrix, and in one pixel, the pixel electrode is divided into a first sub pixel electrode and a second sub pixel electrode. The method of claim 2, In the one pixel, the gate electrode includes a first gate electrode and a second gate electrode connected to the same gate line, The semiconductor layer may include a first semiconductor layer overlapping the first gate electrode and a second semiconductor layer overlapping the second gate electrode. The source electrode includes a first source electrode and a second source electrode connected to different data lines. The drain electrode includes a first drain electrode spaced apart from and facing the first source electrode and a second drain electrode spaced apart from and facing the second source electrode, The first drain electrode is electrically connected to the first sub pixel electrode. The second drain electrode is electrically connected to the second sub pixel electrode. The method of claim 3, wherein The first sub pixel electrode has a larger area than the second sub pixel electrode. The method of claim 4, wherein The length of a region where the first source electrode and the first drain electrode are spaced apart is greater than a length of a region where the second source electrode and the second drain electrode are spaced apart from each other. The method of claim 4, wherein The dummy floating electrode is formed on the second semiconductor layer, and is separated from the second source electrode and the second drain electrode. The method of claim 6, The overall shape of the first source electrode and the first drain electrode formed to overlap the first gate electrode on the first semiconductor layer may be formed by overlapping the second gate electrode on the second semiconductor layer. A liquid crystal display device substantially the same as the overall shape of the source electrode, the second drain electrode, and the dummy floating electrode. The method of claim 6, The first source electrode has a 'ㅌ' shape, and the second source electrode has a 'c' shape. The method of claim 8, The dummy floating electrode has a substantially 'ㅌ' shape with the second source electrode, except that the dummy floating electrode is separated from the second source electrode. The method of claim 3, wherein The first and second gate electrodes connected to the same gate line have a different arrangement order for each of the neighboring pixels in the row direction. The first and second source electrodes connected to the same data line are alternately arranged for each pixel in the column direction. According to claim 1, The second display panel further includes a black matrix pattern. The column spacer is formed on the second display panel so as to overlap the black matrix pattern.

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