KR20020007861A - Method for forming a word line of a flash memory device - Google Patents

Abstract

The present invention relates to a word line forming method of a flash memory device, the method comprising: forming a floating gate by forming a tunnel oxide film and a first polysilicon layer on a semiconductor substrate on which a field oxide film is formed, and then patterning the first polysilicon layer; And forming a second polysilicon layer on the dielectric film after forming the dielectric film on the entire upper surface, and argon (Ar) ions to improve the flatness of the surface after forming the metal silicide layer on the second polysilicon layer. Injecting the metal silicide layer into an amorphous layer, and patterning the metal silicide layer and the second polysilicon layer to form a control gate.

Description

Method for forming a word line of a flash memory device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a word line forming method of a flash memory device, and more particularly, to a word line forming method of a flash memory device made of polysilicon and a metal silicide.

In general, a control gate of a memory cell used as a word line in a manufacturing process of a flash memory device is formed of a polycide structure in which polysilicon and tungsten silicide (WSix) are stacked. This has the purpose of preventing the lowering of the operation speed of the device according to the size reduction of the pattern by using tungsten silicide (WSix) having a lower electrical resistivity value than polysilicon, and then a method of forming a word line of a conventional flash memory device When described through to 1c as follows.

1A to 1C are cross-sectional views of devices for describing a word line forming method of a conventional flash memory device.

FIG. 1A illustrates a tunnel oxide film 3 and a first polysilicon layer 4 sequentially formed on a semiconductor substrate 1 on which a field oxide film 2 is formed, followed by patterning and floating the first polysilicon layer 4. As a cross-sectional view of a gate formed state, the first polysilicon layer 4 is formed by depositing doped polysilicon by low pressure chemical vapor deposition (LPCVD).

Figure 1b is, for example, an oxide film (SiO _2), a nitride film (Si ₃ N _4), and an oxide film (SiO ₂₎ The dielectric film 5 after forming the dielectric film 5 of the ONO structure consisting of the entire upper surface A cross-sectional view of a state in which a second polysilicon layer 6 is formed on the surface of the second polysilicon layer 6 by a step (part A) generated due to the overlap of the field oxide film 2 and the floating gate. The state where the flatness is poor is shown.

FIG. 1C illustrates that a tungsten silicide (WSix) layer 7 and a second polysilicon layer 6 are patterned after forming a tungsten silicide (WSix) layer 7 on the second polysilicon layer 6. The cross-sectional view of the gate is formed, and the step difference on the surface of the tungsten silicide (WSix) layer 7 is also poor due to the step difference on the surface of the second polysilicon layer 6, and thus, when tungsten silicide (WSix) is deposited, A fine gap 8 is formed in a portion where the step is poor.

The reason why the gap 8 is formed in the surface portion of the tungsten silicide (WSix) layer 7 as described above will be described in detail as follows.

When forming a floating gate in a manufacturing process of a flash EEPROM device having a stacked gate, it is partially overlapped with the field oxide film to increase the coupling ratio. However, in the case of a device having a word line width of 0.35 μm or more, the distance between both sides of the field oxide film and the overlapping floating gate does not cause a problem even after the subsequent process, but in the case of a device having a word line width of 0.25 μm or less Since the distance between both sides of the field oxide film and the floating gate overlapping is narrow, the step of the second polysilicon layer 6 is deepened on the field oxide film 2 as shown in FIG. 1B.

Therefore, in the process of depositing tungsten silicide (WSix), the growth direction of the crystal is changed in the convex part (B part) and the concave part (C part), thereby weakening the structure of the film at the part where the crystal growth is opposed. This results in fine gaps 8, in which deposits are embedded in these gaps 8 during the formation of an antireflective film (not shown) for subsequent patterning process, whereby the size of the gaps 8 is caused by stress caused by the deposition. Is increased to cause disconnection of the tungsten silicide (WSix) layer 7.

Therefore, the formation and disconnection of the gap 8 act as a factor to increase the self-resistance of the word line, and the operation speed of the device is reduced due to the time delay (RC delay) caused by the increase of the resistance, thereby Problems related to deterioration of the reliability of the device, such as malfunction of the device, occur.

Therefore, the present invention forms a metal silicide layer on the polysilicon layer, and then implants argon (Ar) ions to amorphize the surface portion of the tungsten silicide (WSix) layer, thereby eliminating the above-mentioned word line of the flash memory device. The purpose is to provide a formation method.

1A to 1C are cross-sectional views of a device for explaining a word line forming method of a conventional flash memory device.

2A to 2D are cross-sectional views of a device for explaining a word line forming method of a flash memory device according to the present invention.

<Explanation of symbols for the main parts of the drawings>

1 and 11: semiconductor substrates 2 and 12: field oxide film

3 and 13: tunnel oxide films 4 and 14: first polysilicon layer

5 and 15: dielectric films 6 and 16: second polysilicon layer

7 and 17: tungsten silicide layer 8: gap

The word line forming method of a flash memory device according to the present invention comprises the steps of forming a floating gate by forming a tunnel oxide film and a first polysilicon layer on a semiconductor substrate on which a field oxide film is formed, and then patterning the first polysilicon layer; Forming a second polysilicon layer on the dielectric film after forming a dielectric film on the upper surface, and forming a metal silicide layer on the second polysilicon layer, and then implanting argon (Ar) ions to improve the flatness of the surface Thereby amorphizing the surface portion of the metal silicide layer, and patterning the metal silicide layer and the second polysilicon layer to form a control gate.

Before the tunnel oxide film is formed, the surface of the semiconductor substrate is cleaned using DHF and SC-1 solutions, and the tunnel oxide film is subjected to a wet oxidation process at a temperature of 750 to 800 ° C. and a 900 to 910 ° C. It is formed by a heat treatment for 20 to 30 minutes in the temperature and nitrogen (N ₂ ) gas atmosphere.

The first polysilicon layer is made of doped polysilicon deposited by low pressure chemical vapor deposition at a temperature of 550 to 620 ° C. and a pressure of 0.1 to 3.0 Torr, and is formed to a thickness of 500 to 1500 kPa.

The step of cleaning using the DHF and SC-1 solution from the step of forming the floating gate, further comprising the steam heat treatment at a temperature of 750 to 790 ℃ to improve the film quality and interfacial properties from the step of forming the dielectric film It further comprises a step.

The dielectric layer includes a lower oxide layer, a nitride layer, and an upper oxide layer, and the lower oxide layer and the upper oxide layer are formed of source gas using DCS (SiH ₂ Cl ₂ ) and N ₂ O at a pressure of 0.5 Torr or less and a temperature of 810 to 850 ° C. It is a thermal oxide film deposited using, and the nitride film is deposited by a low pressure chemical vapor deposition method using NH ₃ and DCS (SiH ₂ Cl ₂ ) gas.

The second polysilicon layer is made of amorphous silicon deposited by a low pressure chemical vapor deposition method at a temperature of 510 to 550 ° C. and a pressure of 1 Torr or less, and is formed to a thickness of 500 to 1000 kPa, and is undoped with the dope amorphous silicon film. The deposition ratio of the loft amorphous silicon film is 5 to 7: 1.

The metal silicide layer is made of tungsten silicide and is formed to a thickness of 500 to 2000 kPa, and the tungsten silicide is deposited by DCS and WF ₆ gas at a temperature of 300 to 500 ° C.

The argon (Ar) ions are implanted at a dose of 1 X 10 ¹¹ to 1 X 10 ¹⁴ ions / cm ² and energy of 30 to 150 KeV, implanted at an inclination angle of 0 to 45 degrees, and the total thickness of the metal silicide layer. It is injected within 70%.

Next, the present invention will be described in detail with reference to the accompanying drawings.

2A to 2D are cross-sectional views of devices for describing a word line forming method of a flash memory device according to the present invention.

FIG. 2A illustrates that the tunnel oxide film 13 and the first polysilicon layer 14 are sequentially formed on the semiconductor substrate 11 on which the field oxide film 12 is formed, and then the first polysilicon layer 14 is patterned and floated. A cross-sectional view of a gate formed state, wherein DHF (HF: H ₂ O = 50: 1 or 100: 1 diluted solution) and SC-1 (NH ₄ OH / H ₂ ) before forming the tunnel oxide layer 13. The surface of the semiconductor substrate 11 is cleaned using an O ₂ / H ₂ O) solution, and a wet oxidation process is performed at a temperature of 750 to 800 ° C. to allow the tunnel oxide film 13 and the semiconductor substrate 11 to be cleaned. Minimize the bonding density at the interface with). In addition, after the tunnel oxide film 13 is formed, heat treatment is performed for 20 to 30 minutes at a temperature of 900 to 910 ° C. and a nitrogen (N ₂ ) gas atmosphere.

On the other hand, the first polysilicon layer 14 is a low pressure chemical using a silicon (Si) source gas, such as SiH ₄ or Si ₂ H ₆ and PH ₃ gas at a temperature of 550 to 620 ℃ and a pressure of 0.1 to 3 Torr Doped polysilicon is deposited by vapor deposition (LP CVD), and is formed to a thickness of 500 to 1500 mW.

In addition, during the patterning process for forming the floating gate, the loss of the semiconductor substrate 11, the field oxide layer 12, and the tunnel oxide layer 13 due to excessive etching is prevented.

FIG. 2B shows a dielectric film 15 having an ONO structure composed of, for example, a lower oxide film, a nitride film, and an upper oxide film on the entire upper surface, and then a second polysilicon layer 16 is formed on the dielectric film 15. 1 is a cross-sectional view showing a state in which the flatness of the surface of the second polysilicon layer 16 is poor due to a step (part A) generated due to the overlap of the field oxide film 12 and the floating gate.

Here, before forming the dielectric film 15, DHF (solution diluted with HF: H ₂ O = 50: 1 or 100: 1) and SC-1 (NH ₄ OH / H ₂ O ₂ / H ₂ O) The cleaning process using the solution is performed to remove the native oxide film and particles (not shown) grown on the surface of the first polysilicon layer 14.

In addition, the lower oxide film and the upper oxide film of the dielectric film 15 may have DCS (SiH ₂ Cl ₂ ) having excellent breakdown voltage and good time dependent dielectric breakdown (TDDB) characteristics at a pressure of 0.5 Torr or less and a temperature of 810 to 850 ° C. It is composed of a hot temperature oxide (HTO) deposited using N ₂ O as the source gas, the nitride film is a low pressure chemical vapor deposition (LP CVD) method using NH ₃ and DCS (SiH ₂ Cl ₂ ) gas Is deposited.

Meanwhile, after the dielectric film 15 is formed, steam heat treatment is performed at a temperature of 750 to 790 ° C. in order to improve film quality and interface characteristics. In addition, the second polysilicon layer 16 is doped so as to be substituted with the lower dielectric layer 15 during the subsequent deposition of tungsten silicide (WSix) to prevent diffusion of fluorine (F), which may cause an increase in the thickness of the oxide layer. An amorphous silicon film and an undoped amorphous silicon film are formed in a stacked structure, wherein the dope amorphous silicon film and the undoped amorphous silicon film are deposited at a ratio of 5 to 7: 1, and the total thickness is 500 to 1000 mW. . That is, the doped amorphous silicon film is deposited in a state where a silicon source gas such as SiH ₄ or Si ₂ H ₆ and a PH ₃ gas are supplied, and then the deposition is continuously performed while the supply of the PH ₃ gas is stopped. The undoped amorphous silicon film is deposited on the doped amorphous silicon film.

FIG. 2C is a cross-sectional view of a tungsten silicide (WSix) layer 17 formed on the second polysilicon layer 16. The tungsten silicide (WSix) is due to a step difference in the surface of the second polysilicon layer 16. Referring to FIG. The level difference of the surface of the layer 17 is also poor, and thus a fine gap 8 is formed in a portion where the level difference is poor when tungsten silicide (WSix) is deposited.

Here, the tungsten silicide (WSix) layer 17 was small amount of fluorine (F) at a temperature of 300 to 500 ℃ such that the appropriate layers deophim done is lower the heat treatment Stress adhesive properties and good DCS (SiH ₂ Cl ₂₎ and By the reaction of WF ₆ to be deposited to a thickness of 500 ~ 2000Å, the stoichiometric ratio is 2.0 to 2.8 to minimize the self-resistance (Rs).

FIG. 2D is a cross-sectional view of the surface of the tungsten silicide (WSix) layer 17 amorphous by injecting argon (Ar) ions into the entire upper surface, thereby improving the flatness of the surface. As a result, the crystal structure of tungsten silicide (WSix) is broken and changed to an amorphous state, thereby improving the flatness of the surface. This amorphous portion is allowed to recrystallize in a subsequent process.

Here, the argon (Ar) ions are implanted with a dose of 1 X 10 ¹¹ to 1 X 10 ¹⁴ ions / cm 2 and energy of 30 to 150 keV, and implanted to form a projected range (RP) within 70% of the total thickness. do. In this case, if the implantation angle of argon (Ar) ions is adjusted to 0 to 45 degrees, amorphousization of tungsten silicide (WSix) may be easily performed.

Thereafter, the tungsten silicide (WSix) layer 17 and the second polysilicon layer 16 are patterned to form a control gate.

As described above, the present invention forms a tungsten silicide (WSix) layer on the polysilicon layer, and then implants argon (Ar) ions to amorphous the surface portion of the tungsten silicide (WSix) layer, thereby forming a surface of the tungsten silicide (WSix) layer surface. Flatness is good. Therefore, the generation and disconnection of the gap due to the lower step can be prevented, so that the resistance value of the word line can be maintained at a desired level, thereby increasing the reliability and yield of the device. In addition, according to the present invention, since the planarization is performed simply by ion implantation, no additional equipment and process are added, and the subsequent process is easily performed, thus enabling the manufacture of a highly integrated flash memory device.

Claims (18)

Forming a tunnel oxide film and a first polysilicon layer on the semiconductor substrate on which the field oxide film is formed, and then patterning the first polysilicon layer to form a floating gate; Forming a dielectric film on the entire upper surface and then forming a second polysilicon layer on the dielectric film; Forming a metal silicide layer on the second polysilicon layer, and implanting argon (Ar) ions to improve the surface flatness, thereby amorphizing the surface portion of the metal silicide layer; Patterning the metal silicide layer and the second polysilicon layer to form a control gate. The method of claim 1, And cleaning the surface of the semiconductor substrate by using DHF and SC-1 solutions before forming the tunnel oxide layer. The method of claim 1, The tunnel oxide film is subjected to a wet oxidation process at a temperature of 750 to 800 ℃, And a heat treatment for about 20 to 30 minutes in a temperature of 900 to 910 ° C. and a nitrogen (N ₂ ) gas atmosphere. The method of claim 1, The first polysilicon layer is made of a doped polysilicon deposited by a low pressure chemical vapor deposition method at a temperature of 550 to 620 ℃ and a pressure of 0.1 to 3.0 Torr, flash characterized in that formed to a thickness of 500 to 1500Å Word line formation method of a memory device. The method of claim 1, And cleaning using a DHF and SC-1 solution from the step of forming the floating gate. The method of claim 1, And heat-treating steam at a temperature of 750 to 790 ° C. to improve film quality and interface characteristics from forming the dielectric film. The method of claim 1, And the dielectric film is formed of a lower oxide film, a nitride film, and an upper oxide film. The method of claim 7, wherein The lower oxide layer and the upper oxide layer are flash memory devices which are deposited using DCS (SiH ₂ Cl ₂ ) and N ₂ O as a source gas under a pressure of 0.5 Torr or less and a temperature of 810 to 850 ° C. How to form wordlines. The method of claim 7, wherein The nitride film is a word line forming method of a flash memory device, characterized in that the deposition by low pressure chemical vapor deposition method using NH ₃ and DCS (SiH ₂ Cl ₂ ) gas. The method of claim 1, The second polysilicon layer is made of amorphous silicon deposited by low pressure chemical vapor deposition at a temperature of 510 to 550 ° C. and a pressure of 1 Torr or less, and has a thickness of 500 to 1000 kW. Forming method. The method of claim 1, And the second polysilicon layer is formed of a doped amorphous silicon film and an undoped amorphous silicon film. The method of claim 11, The doped amorphous silicon film is deposited by a silicon source gas of any one of SiH ₄ and Si ₂ H ₆ and a PH ₃ gas, and the undoped amorphous silicon film is formed of any one of SiH ₄ and Si ₂ H ₆ . (Si) A word line forming method of a flash memory device, characterized in that deposited by the source gas. The method of claim 11, The deposition rate of the doped amorphous silicon film and the undoped amorphous silicon film is a word line forming method of the flash memory device, characterized in that 5 to 7: 1. The method of claim 1, The metal silicide layer is made of tungsten silicide, and the word line forming method of the flash memory device, characterized in that formed in a thickness of 500 to 2000Å. The method of claim 14, The tungsten silicide is deposited by DCS and WF ₆ gas at a temperature of 300 to 500 ℃, the stoichiometric ratio is 2.0 to 2.8 word line forming method of the flash memory device. The method of claim 1, And argon (Ar) ions are implanted at a dose of 1 X 10 ¹¹ to 1 X 10 ¹⁴ ions / cm 2 and energy of 30 to 150 KeV. The method of claim 1, And argon (Ar) ions are implanted at an inclination angle of 0 to 45 degrees. The method of claim 1, And argon (Ar) ions are implanted within 70% of the total thickness of the metal silicide layer.