JPS638500B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a method of configuring an input/output processing device that controls a plurality of channel devices.

(b) Background of the Technology A typical configuration of a recent data processing system consists of a central controller, an input/output processor that controls multiple channel devices, a main memory, and a memory control unit. The memory control unit has the function of controlling memory access and controlling the interface path between each device.

Additionally, a system configuration is generally constructed in which one input/output device is connected to a plurality of channel devices and can be accessed from either channel device.

Furthermore, as a recent technological trend, there is a tendency to manage channel path selection at the input/output processing device level, such as which channel device is used to activate the input/output device.

On the other hand, with the recent increase in system size, there is a trend to increase the number of input/output processing devices from one to a plurality of devices.

When considering the configuration of a system having multiple input/output processing devices, for example, two input/output processing devices, each input/output processing device and the plurality of channel devices connected to it are considered to be a group of mutually independent systems ( For example, if configured as a channel subsystem (called a channel subsystem), there are two physical input/output processing devices that control 16 channel devices and 1024 input/output devices.
Since the system is only connected to the memory control unit, the system as a whole cannot be considered as a flexible system.Therefore, an effective method of configuring the input/output processing device has been desired.

(c) Prior Art and Problems When a data processing system having two input/output processing devices is configured using the prior art, the system configuration is shown in FIG.

Here, 1 is a central control unit (CPU), 2 is a main memory (MS), 3 is an input/output processing unit (IOP) related to the present invention, and 4 is a memory control unit (MCU).
In addition to memory access to the main storage device (MS) 2, it also controls interface paths between each device. And 5 is a channel device (CHE).
Also, among the interface lines that connect the memory control unit (MCU) 4 and the input/output processing unit (IOP) 3, the interface line is for the central control unit, and is used for sending and receiving control information related to input/output processing. It will be done. is a main storage device interface line, and data is exchanged with the main storage device (MS).

In this system configuration, both physically and logically, there are two input/output processing units (IOP) 3 with N channel units (CHE) 5, and overall there are Although the number has increased to 2N units, since they are configured independently from each other, channel path selection is limited to channel devices within each subsystem.

Therefore, if a failure occurs in one input/output processing device (IOP) 3, there is a problem in that the channel device 5 and input/output device connected to that input/output processing device cannot be accessed at all.

(d) Purpose of the Invention In view of the above-mentioned conventional drawbacks, the present invention provides a structure in which one input/output device can be shared by a plurality of channel devices corresponding to different input/output processing devices, regardless of the type of input/output processing device. By doing this, the software can treat multiple input/output processing devices as one input/output processing device that controls all connected channel devices without having to be aware of the different input/output processing devices. Therefore, physically multiple input/output processing devices are combined into one (hereinafter referred to as "logically one")
The purpose of the present invention is to provide a method for configuring an input/output processing device that looks like an input/output processing device (such as the above).

(e) Structure of the Invention And this object is to provide a memory control unit which is connected to the central controller and the main memory and controls memory access from the central controller and the channel device to the main memory. It has a main memory interface that controls reading/writing of data with the device and a central controller interface that exchanges control information related to input/output processing with the central controller. a plurality of devices for controlling a channel device to be processed and selecting an access path to the input/output device, the device for setting one of the plurality of input/output processing devices as a master and the others as a slave; Means for blocking the interface of the slave-side input/output processing device to the central controller, and a means for blocking the input/output processing device of the slave-side input/output processing device between the master-side input/output processing device and each slave-side input/output processing device. This is achieved by providing a method of sharing one input/output device among a plurality of channel devices corresponding to different input/output processing devices by providing a communication means for sending and receiving related control information. , multiple input/output processing devices that control N input/output devices can be operated as one input/output processing device that controls N× multiple input/output devices, creating a flexible system. There are benefits that can be gained.

(f) Examples of the invention Examples of the invention will be described in detail below with reference to the drawings.
FIG. 2 is a block diagram showing the concept of an embodiment of the present invention, and A shows its physical configuration;
B is a diagram showing a logical image.

Here, 4 and 3 are the same as those explained in FIG. 1, and devices other than 4 and 3 are omitted because they are not directly related to the concept of the present invention.

First, A showing the physical configuration shows the connection between two input/output processing devices and a memory control unit when the present invention is implemented, and , are the same as those explained in FIG. 1. .

When implementing the present invention in a data processing system having two input/output processing devices, one input/output processing device must be set as the master and the other input/output processing device as the slave, and there is no connection between the two input/output processing devices. A communication means is provided to transmit control information related to input/output processing of the slave side input/output processing device to the central control unit interface line of the master side input/output processing device,
2 connected to the memory control unit (MCU) 4 by sending and receiving via the communication means.
The input/output processing devices 3 are configured to operate as one input/output processing device.

However, regarding the data lines, it is necessary to ensure the data transfer capability of each input/output processing device 3, so it is necessary to leave the physical interface lines alone.

Diagram B is a logical image of the concept of the present invention. Originally, the two input/output processing units 3, master and slave, are one input/output processing unit when viewed from the memory control unit (MCU) 4, and the interface line for control information to the central control unit is one. It is collected in a book.

However, in the configuration of A, one memory control unit (MCU) 4 is connected to the input/output processing unit (IOP) 3 on the slave side via the input/output processing unit (IOP) 3 on the master side. Therefore, in the present invention, it is necessary to provide communication means between two input/output processing units (IOPs) 3, a master and a slave.

An embodiment of the communication means is shown in FIG. In this drawing, 1 to 4 are the same as those explained in FIG. 1, and as explained in FIG. 2, if one of the two input/output processing units (IOP) 3 is the master, The other is configured to be a slave.

Considering the necessary conditions for a means of communication between these two input/output processing units (IOP) 3, first, an input/output activation command is received from the central control unit (CPU) 1 through the memory control unit (MCU) 4. , know the subchannel number (corresponding to the input/output device), check the status of the input/output device from the subchannel corresponding to the input/output device provided in the main memory (MS) 2, and send the information to the central control unit (CPU) 1. When a condition code (CC) is returned, information exchange with the central control unit (CPU) 1 is performed only by the input/output processing unit (IOP) 3 on the master side, so the subchannel also processes the input/output processing on the master side. The condition code (CC) read by the device (IOP) 3 and determined by the status of the input/output device is sent back to the central control unit (CPU) 1.
The central control unit (CPU) 1 is released.

If an input/output operation is to be performed after the central control unit (CPU) 1 is released, the input/output processing unit (IOP) 3 on the master side returns a condition code (CC) and then returns to the main memory ( MS) 2 reads a channel command word and performs an input/output operation, but if the channel device number to perform the input/output operation is related to the input/output processing unit (IOP) 3 on the slave side, the above communication It is necessary to send the channel device number and input/output device number to the slave-side input/output processing unit (IOP) 3 by means of means to transfer control of the input/output operation.

At this time, an activation signal to the slave side input/output processing unit (IOP) 3 is sent through the RQ line, and when the slave side input/output processing unit (IOP) 3 receives this RQ signal, it immediately sends a response signal RS.
After that, the input/output processing unit (IOP) 3 on the master side sends the channel device number and input/output device number to the input/output processing unit (IOP) 3 on the slave side through the DATA line, and from then on, the input/output processing unit (IOP) 3 on the slave side A channel command word related to the input/output operation is read through the main storage interface line of the input/output processing unit (IOP) 3, and data is transferred in accordance with the command.

When the data transfer is completed, the input/output processing unit (IOP) on the master side is transferred from the input/output processing unit (IOP) on the slave side to the input/output processing unit (IOP) on the master side in order to have the central control unit (CPU) 1 perform final processing related to the input/output operation. The input/output processing unit (IOP) 3 on the master side that receives the information sends necessary information (various statuses) to the memory control unit (MCU) 4 in the same manner as above. An interrupt is applied to the central control unit (CPU) 1 through the interface line, and a final processing request is issued.

To summarize the above, as an example of communication between two input/output processing units (IOP) 3: 1. Example of communication from a master input/output processing unit to a slave input/output processing unit.

Startup for the slave side input/output processing device.

(b) Transfer of input/output operations.

Transmission of channel device number and subchannel number.

2 Example of communication from slave I/O processing device to master I/O processing device.

b) Response to activation from the master input/output processing device.

(b) Sending of various status information necessary for finalization processing after completion of input/output operations.

etc. can be mentioned.

Figure 4 shows two input/output processing units (IOP) 3 and multiple channel devices (CHE) 5 connected to them.
1 and the connection relationship with the input/output devices connected to the channel device (CHE) 5, where A shows the case of the conventional example, and B shows the case according to the present invention.

In the conventional example of B, the channel devices (CHE) 5 connected to each input/output processing unit (IOP) 3 are independent from each other, so if one input/output processing unit (IOP) 3 becomes a failure, the The channel device (CHE) 5 and input/output devices connected to the input/output processing device (IOP) 3 become uncontrollable.

Therefore, in the example of connection to the input/output processing device (IOP) 3 according to the present invention in (b), two input/output processing devices (IOP) are logically connected to one device having 2N channel devices (CHE) 5. is controlled to operate as an input/output processing unit (IOP) 3 of
As shown in the diagram, each input/output device is shared, so even if one of the two input/output processing units (IOPs) fails,
The other input/output processing unit (IOP) can control all input/output devices.

(g) Effects of the invention As explained in detail above, according to the present invention, two
In a data processing system that has two input/output processing devices, the two input/output processing devices are master/
Set it on one of the slaves, close the interface of the slave side input/output processing device to the central control device, and provide communication means between the two input/output processing devices, so that the two input/output processing devices , it is logically controlled to operate as one input/output processing device with 2N channel devices, so one input/output device can be shared by multiple channel devices that correspond to different input/output processing devices. In addition, as shown in Figure 4, even if one of the two input/output processing devices fails, all input/output devices can be controlled by the other input/output processing device. Compared to the conventional method in which input/output processing devices are provided independently from each other, the present invention has the advantage of being able to configure a data processing system that is more flexible and highly reliable.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional configuration of a data processing system having two input/output processing devices, FIG. 2 is a conceptual diagram showing an embodiment of the present invention, and FIG. FIG. 3 is a block diagram showing an example of communication between input/output processing devices necessary for carrying out the present invention, and FIG. 4 shows the connection relationship between the input/output processing device, channel device, and input/output device. This is a diagram. In the drawing, 1 is the central control unit (CPU), 2
is the main memory (MS), 3 is the input/output processing unit (IOP), 4 is the memory control unit (MCU), 5 is the channel device (CHE), is the interface line to the central controller, is the interface to the main memory Ace line, RQ, RS, and DATA indicate communication lines between input/output processing devices, respectively.

Claims (1)

[Scope of Claims] 1. Between the central control unit and a memory control unit that is connected to the main memory and controls memory access from the central control unit and the channel device to the main memory; A main storage device interface that controls data reading/writing in the main storage device and a central controller interface that exchanges control information related to input/output processing with the central controller, and a corresponding channel device. a plurality of devices for controlling and selecting access paths to the input/output devices; means for setting one of the plurality of input/output processing devices as a master and the others as slaves; and an input/output device on the slave side. Means for closing the interface of the output processing device to the central control device, and control information related to input/output processing of the slave side input/output processing device between the master side input/output processing device and each slave side input/output processing device. What is claimed is: 1. An input/output processing device comprising: a communication means for sending and receiving information; and one input/output device is shared by a plurality of channel devices corresponding to different input/output processing devices.