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JPH02301187A - Manufacture of both-sided wiring board - Google Patents

Manufacture of both-sided wiring board

Info

Publication number
JPH02301187A
JPH02301187A JP12039689A JP12039689A JPH02301187A JP H02301187 A JPH02301187 A JP H02301187A JP 12039689 A JP12039689 A JP 12039689A JP 12039689 A JP12039689 A JP 12039689A JP H02301187 A JPH02301187 A JP H02301187A
Authority
JP
Japan
Prior art keywords
thin film
plating layer
metal thin
hole
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12039689A
Other languages
Japanese (ja)
Inventor
Yoshihiro Kawamura
義裕 河村
Yoshio Yarita
鑓田 好男
Tomoyuki Minami
智幸 南
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Toyo Metallizing Co Ltd
Original Assignee
Casio Computer Co Ltd
Toyo Metallizing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd, Toyo Metallizing Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP12039689A priority Critical patent/JPH02301187A/en
Publication of JPH02301187A publication Critical patent/JPH02301187A/en
Pending legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は両面配線基板の製造方法に関し、特に両面配
線基板の表裏面の導通を図る方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a double-sided wiring board, and more particularly to a method for achieving electrical conduction between the front and back surfaces of a double-sided wiring board.

[従来技術J 従来1表裏両面の配線パターンが接続される両面配線基
板は、以下のような方法により製造されている。まず、
絶縁性フィルム等よりなる基板の表裏面に銅等の金属箔
をラミネートする。この後、パンチングやドリル等の機
械加工により表面の金属箔から基板を通って裏面の金属
箔に貫通する貫通孔を形成する。しかる後、貫通孔の内
面を含む金属箔の全表面に下地メッキ層を無電解メッキ
により形成する。そして、貫通孔の箇所で基板の表裏に
対応する配線パターン形成領域を除く表裏の金属箔にレ
ジストをパターン形成し、このレジストをマスクとして
貫通孔を含む配線パターン形成領域の下地メッキ層に銅
等のメッキ層を電解メッキにより形成する。最後に、レ
ジストを除去して下地メッキ層を露出させ、メッキ層を
マスクとして下地メッキ層および金属箔を順次エツチン
グして不要な部分を除去する。これにより、基板の表裏
面にはメッキ層、下地メッキ層および金属箔よりなる3
層構造の配線パターンが貫通孔の箇所で接続されて形成
される。
[Prior Art J Conventional Art 1 A double-sided wiring board to which wiring patterns on both the front and back sides are connected is manufactured by the following method. first,
Metal foils such as copper are laminated on the front and back surfaces of a substrate made of an insulating film or the like. Thereafter, a through hole is formed from the metal foil on the front surface through the substrate to the metal foil on the back surface by machining such as punching or drilling. Thereafter, a base plating layer is formed on the entire surface of the metal foil including the inner surface of the through hole by electroless plating. Then, a resist is patterned on the metal foil on the front and back sides excluding the wiring pattern forming areas corresponding to the front and back sides of the board at the locations of the through holes, and using this resist as a mask, copper etc. are applied to the base plating layer of the wiring pattern forming areas including the through holes. A plating layer is formed by electrolytic plating. Finally, the resist is removed to expose the base plating layer, and using the plating layer as a mask, the base plating layer and the metal foil are sequentially etched to remove unnecessary portions. As a result, three layers consisting of a plating layer, a base plating layer, and a metal foil are formed on the front and back surfaces of the board.
A layered wiring pattern is formed by being connected at the through hole.

[発明が解決しようとする課題J しかし、上述したような両面配線基板の製造方法におい
ては、予め、基板の表裏面に金属箔をラミネートしなけ
ればならず、この後1貫通孔を形成し、少なくきもその
内面に下地メッキ層およびメッキ層を形成し、しかる後
、最初にラミネートされた金属箔をエツチングすること
により、基板の表裏面に配線パターンを形成しているた
め、製造工程数が多く、製造作業が煩雑で、生産性が悪
く、コスト高になるという問題がある。
[Problem to be Solved by the Invention J However, in the method for manufacturing a double-sided wiring board as described above, it is necessary to laminate metal foil on the front and back surfaces of the board in advance, and after that, one through hole is formed, At the very least, a base plating layer and a plating layer are formed on the inner surface, and then the first laminated metal foil is etched to form wiring patterns on the front and back surfaces of the board, which requires a large number of manufacturing steps. However, there are problems in that manufacturing operations are complicated, productivity is low, and costs are high.

このような問題を解消するために、貫通孔内に導電ペー
ストを充填する方法も検討されているが、導電ペースト
はカーボン等の導電粒子をペースト中に混入したもので
あるから、電気的な抵抗値が高く、耐候性や電流容量の
点において信頼性に欠けるという問題がある。
In order to solve this problem, a method of filling the through holes with conductive paste has been considered, but since conductive paste is made by mixing conductive particles such as carbon into the paste, the electrical resistance is low. It has a problem of high value and lack of reliability in terms of weather resistance and current capacity.

この発明の目的は、導電ペーストを用いず、製造工程の
簡素化を図り、生産性がよく、しかも表裏両面の配線パ
ターンの導通を確保することができる両面配線基板の製
造方法を提供することにある。
An object of the present invention is to provide a method for manufacturing a double-sided wiring board that does not use conductive paste, simplifies the manufacturing process, has good productivity, and can ensure continuity between wiring patterns on both the front and back sides. be.

[課題を解決するための手段] この発明は上述した目的を達成するために、絶縁性フィ
ルムに表面から裏面へ貫通する貫通孔をドリルやプレス
等の機械加工により形成し、前記絶縁性フィルムの表裏
面および前記貫通孔の内面に蒸着またはスパッタリング
により金属I;]膜を形成したのち、少なくとも前記貫
通孔の箇所で対応する配線パターン形成領域の金属薄膜
にメッキ層をパターン形成し、最後に金属薄膜をエツチ
ングして不要な部分を除去することにより、メッキ層と
金i薄膜よりなる2層構造の配線パターンを貫通孔の箇
所で導通させて形成することにある。
[Means for Solving the Problems] In order to achieve the above-mentioned object, the present invention forms a through hole penetrating the insulating film from the front surface to the back surface by machining such as a drill or a press. After forming a metal I film on the front and back surfaces and the inner surface of the through hole by vapor deposition or sputtering, a plating layer is patterned on the metal thin film in the corresponding wiring pattern forming area at least at the location of the through hole, and finally the metal By etching the thin film and removing unnecessary parts, a two-layer wiring pattern consisting of a plating layer and a gold i thin film is formed with electrical continuity at the through hole.

[作 用] この発明によれば、最初に絶縁性フィルムに貫通孔を形
成し、この後貫通孔の内面を含む絶縁性フィルムの表面
に金属薄膜およびメッキ層を順次積層形成してエツチン
グすることにより、メッキ層と金属薄膜よりなる2層構
造の配線パターンを貫通孔の箇所で導通させて形成した
ので、従来のように絶縁性フィルムの表裏面に金属箔を
ラミネートする工程が不要となるばかりか、その金属箔
をエツチングして配線パターンを形成する工程も不要と
なる。これにより、製造工程の簡素化を図ることがでさ
、生産性の向上をも図ることができ、製造コストの低減
化を図ることができる。この場合、絶縁性フィルムに貫
通孔を形成した後、この絶縁性フィルムの表裏面および
貫通孔の内面に蒸着またはスパッタリングにより金属薄
膜を形成するので、絶縁性フィルムの表裏面は勿論のこ
と1貫通孔の内面にも金属薄膜を容易に形成することが
できる。しかも、この金属薄膜はメッキ層の下地メッキ
となるので、後工程で金属薄膜の表面にメッキ層を簡単
かつ良好に形成することができる。これにより、貫通孔
の内面に形成された金属薄膜およびメッキ層により表裏
の配線パターンの導通を確保することができる。
[Function] According to the present invention, a through hole is first formed in an insulating film, and then a metal thin film and a plating layer are sequentially laminated and etched on the surface of the insulating film including the inner surface of the through hole. As a result, a two-layered wiring pattern consisting of a plating layer and a thin metal film is made conductive at the through-holes, eliminating the need for the conventional process of laminating metal foil on the front and back sides of an insulating film. In addition, the process of etching the metal foil to form a wiring pattern becomes unnecessary. This makes it possible to simplify the manufacturing process, improve productivity, and reduce manufacturing costs. In this case, after forming a through hole in the insulating film, a metal thin film is formed by vapor deposition or sputtering on the front and back surfaces of the insulating film and the inner surface of the through hole. A thin metal film can also be easily formed on the inner surface of the hole. Moreover, since this metal thin film serves as the base plating for the plating layer, a plating layer can be easily and favorably formed on the surface of the metal thin film in a subsequent process. Thereby, conduction between the front and back wiring patterns can be ensured by the metal thin film and plating layer formed on the inner surface of the through hole.

[第1実施例] 以下、第1図を参照して、この発11の第1実施例の製
造方法を説’Jlする。
[First Embodiment] The manufacturing method of the first embodiment of this invention 11 will be explained below with reference to FIG.

まず、第1図(A)に示すように、絶縁性フィルムlを
用意する。この絶縁性フィルムlはポリイミド、ポリエ
ステル、ガラスエポキシ等の合成樹脂よりなり、シート
状に形成されている。そして、第1図(B)に示すよう
に、絶縁性フィルムlにドリルやプレス等の機械加工に
より表面から裏面に貫通する貫通孔2を形成する。
First, as shown in FIG. 1(A), an insulating film 1 is prepared. This insulating film 1 is made of synthetic resin such as polyimide, polyester, glass epoxy, etc., and is formed into a sheet shape. Then, as shown in FIG. 1(B), a through hole 2 penetrating from the front surface to the back surface is formed in the insulating film 1 by machining such as a drill or a press.

次に、第1図(C)に示すように、絶縁性フィルムlの
表裏面および貫通孔2の内面に蒸着またはスパッタリン
グにより金属薄膜3を形成する。
Next, as shown in FIG. 1C, a metal thin film 3 is formed on the front and back surfaces of the insulating film 1 and the inner surface of the through hole 2 by vapor deposition or sputtering.

この金属薄!13は1例えば銅(Cu)、アルミニウム
(A1)等の金属を用い、その厚さは数百λ〜数千λ程
度に形成される。この場合、金属i膜3は貫通孔2を通
して絶縁性フィルム1の表裏面に亘って連続して形成さ
れる。勿論実際には、この蒸着またはスパッタリングは
絶縁性フィルム1の表面と裏面の2回に分けて行なわれ
るが1貫通孔2への金属薄1lI3の付着は、その両方
で行なわれ、より確実となる。
This metal is thin! 13 is made of a metal such as copper (Cu) or aluminum (A1), and is formed to have a thickness of about several hundred λ to several thousand λ. In this case, the metal i-film 3 is continuously formed through the through hole 2 over the front and back surfaces of the insulating film 1. Of course, in reality, this vapor deposition or sputtering is performed twice, on the front and back surfaces of the insulating film 1, but the attachment of the metal thin film 1lI3 to the 1 through hole 2 is performed on both of them, making it more reliable. .

この後、第1図(D)に示すように、金属薄膜3の全表
面に電解メッキによりメッキ層4を形成する。このメッ
キ層4は金属薄1193が下地メッキとなるので、電解
メッキにより簡単に金属薄膜3の表面に形成されるほか
、特に貫通孔2内の金属薄!13の表面にも形成される
。この場合、メッキ層4の材質は上述した金属薄159
3と同じものでもよいが、異なるものであってもよい、
また、このメッキ層4の厚さはaJLm〜数十gm程度
に形成される。
Thereafter, as shown in FIG. 1(D), a plating layer 4 is formed on the entire surface of the metal thin film 3 by electrolytic plating. Since the metal thin film 1193 serves as the base plating for this plating layer 4, it can be easily formed on the surface of the metal thin film 3 by electrolytic plating. It is also formed on the surface of 13. In this case, the material of the plating layer 4 is the metal thin 159 mentioned above.
It may be the same as 3, but it may be different.
Moreover, the thickness of this plating layer 4 is formed to be approximately aJLm to several tens of gm.

この後、第1図(E)に示すように、絶縁性フィルムl
の表裏のメッキ層4において、貫通孔2の箇所で一部が
互いに対応する配線パターン形成領域にレジスト5をス
クリーン印刷もしくはフォトパターニング等により形成
する。このレジスト5としては熱溶融性樹脂あるいはフ
ォトレジスト等を用いる。そして、このレジスト5をス
クリーン印刷により形成する場合には、絶縁性フィルム
l上にスクリーンを介してレジストを印刷することによ
り形成される。また、フォトパターニング法によりレジ
スト5を形成する場合には、絶縁性フィルム1の全表面
にフォトレジス) ヲ?J 布し、このフォトレジスト
をマスクを介して露光し現像することによりパターン形
成される。
After this, as shown in FIG. 1(E), the insulating film l
In the plated layers 4 on the front and back sides, a resist 5 is formed by screen printing, photo patterning, or the like in wiring pattern formation regions whose portions correspond to each other at the locations of the through holes 2. As this resist 5, a thermofusible resin, a photoresist, or the like is used. When the resist 5 is formed by screen printing, it is formed by printing the resist on the insulating film l through a screen. In addition, when forming the resist 5 by a photo patterning method, the photoresist is formed on the entire surface of the insulating film 1. A pattern is formed by exposing the photoresist to light through a mask and developing it.

しかる後、第1図(F)に示すように、レジスト5をマ
スクとして、メッキ層4および金属薄膜3を順次エツチ
ングして不要な部分、つまりレジスト5が形成されてい
ない配線パターン形成領域以外のメッキ層4および金属
■膜3を除去する。
Thereafter, as shown in FIG. 1(F), using the resist 5 as a mask, the plating layer 4 and the metal thin film 3 are sequentially etched to remove unnecessary parts, that is, areas other than the wiring pattern forming area where the resist 5 is not formed. The plating layer 4 and metal film 3 are removed.

この場合、メッキ層4と金属薄膜3とが同じ材質であれ
ば、1回のエツチング処理で同時にエツチングを行なう
ことができるが、異なる材質であれば各層3,4ごとに
それぞれエツチング処理を行なう。
In this case, if the plating layer 4 and the metal thin film 3 are made of the same material, they can be etched simultaneously in one etching process, but if they are made of different materials, each layer 3 and 4 is etched separately.

最後に1第1図CG)に示すように、レジスト5を除去
する。この場合には、レジスト5を加熱し溶融させるこ
とにより除去するか、あるいはエツチングにより除去す
る。このようにレジスト5を除去すると、メッキ層4お
よび金属薄膜3よりなる2層構造の配線パターン7が形
成される。
Finally, as shown in FIG. 1 (CG), the resist 5 is removed. In this case, the resist 5 is removed by heating and melting, or by etching. When the resist 5 is removed in this way, a two-layer wiring pattern 7 consisting of the plating layer 4 and the metal thin film 3 is formed.

この配線パターン7は、貫通孔2の箇所において、絶縁
性フィルムlの表裏に対応する部分が互いに導通する。
In this wiring pattern 7, portions corresponding to the front and back sides of the insulating film 1 are electrically connected to each other at the location of the through hole 2.

これにより、絶縁性フィルムlの表裏面に配線パターン
7が貫通孔2の箇所で導通した両面配線基板が得られる
As a result, a double-sided wiring board in which the wiring pattern 7 is electrically connected to the front and back surfaces of the insulating film 1 at the through holes 2 is obtained.

したがって、上述したような両面配線基板の製造方法に
よれば、最初に、絶縁性フィルムlに貫通孔2を形成し
、この後、貫通孔2の内面を含む絶縁性フィルムlの全
表面に金属薄膜3を形成するとともに、この金属薄膜3
の全表面にメッキ層4を形成し、最後に、レジスト5を
マスクとしてメッキ層4および金属薄膜3を順次エツチ
ングすることにより、金属薄ll13とメッキ層4より
なる2層構造の配線パターン7を貫通孔2の箇所で導通
させて形成することができる。そのため、従来のように
予め絶縁フィルムlに金属箔をラミネートする必要がな
く、シかもこの金属箔をエツチングして配線パターンに
形成する必要もないので、製造工程の大幅な簡素化を図
ることができ、生産性がよく、能率よく両面配線基板を
製造することができる。
Therefore, according to the method for manufacturing a double-sided wiring board as described above, the through holes 2 are first formed in the insulating film l, and then the entire surface of the insulating film l including the inner surface of the through holes 2 is coated with metal. While forming the thin film 3, this metal thin film 3
A plating layer 4 is formed on the entire surface of the etching layer 4, and finally, the plating layer 4 and the metal thin film 3 are sequentially etched using the resist 5 as a mask, thereby forming a two-layer wiring pattern 7 consisting of the metal thin layer 13 and the plating layer 4. It can be formed to be electrically conductive at the location of the through hole 2. Therefore, there is no need to laminate metal foil on the insulating film in advance as in the past, and there is also no need to etch this metal foil to form a wiring pattern, which greatly simplifies the manufacturing process. It is possible to manufacture double-sided wiring boards with good productivity and efficiency.

この場合、特に、絶縁性フィルムlに貫通孔2を形成し
た後、この絶縁性フィルムlの全表面および貫通孔2の
内面に蒸着またはスパッタリングにより金属薄膜3を形
成するので、絶縁性フィルム1の表面および裏面は勿論
のこと1貫通孔2の内面にも金属QI15I3を形成す
ることができる。しかも、このように形成された金属薄
膜3は、メッキ層4の下地ノー2キとなるので、金属薄
W23の表面に電解メッキによりメッキ層4を簡単かつ
良好に形成することができる。この結果7貫通孔2の箇
所で互いに対応する配線パターン7が金属薄膜3および
メッキ層4により形成され、この表裏の配線パターン7
は貫通孔2の内面に形成された金属薄膜3およびメッキ
層4により確実に接続される。特に1貫通孔2の内面に
形成された金属薄膜3およびメッキ層4は、導電ペース
トに比べて。
In this case, in particular, after forming the through holes 2 in the insulating film 1, the metal thin film 3 is formed on the entire surface of the insulating film 1 and the inner surface of the through holes 2 by vapor deposition or sputtering. Metal QI15I3 can be formed not only on the front and back surfaces but also on the inner surface of the 1 through hole 2. Moreover, since the metal thin film 3 formed in this manner serves as the base material for the plating layer 4, the plating layer 4 can be easily and favorably formed on the surface of the metal thin W23 by electrolytic plating. As a result, wiring patterns 7 corresponding to each other at the through holes 2 are formed by the metal thin film 3 and the plating layer 4, and the wiring patterns 7 on the front and back sides are formed by the metal thin film 3 and the plating layer 4.
are reliably connected by the metal thin film 3 and plating layer 4 formed on the inner surface of the through hole 2. In particular, the metal thin film 3 and plating layer 4 formed on the inner surface of the first through hole 2 are compared to conductive paste.

電気的な抵抗値が低く、耐妖性および電流6軟の点にお
いて信頼性が高い、そのため表裏の配線パターン7を確
実に接続することができ、導通信頼性の極めて高いもの
を得ることができる。
It has a low electrical resistance value and is highly reliable in terms of resistance and current resistance, so the wiring patterns 7 on the front and back sides can be reliably connected, resulting in extremely high continuity reliability. .

[第2実施例1 次に、第2図を参照して、この発明の第2実施例の製造
方法を説明する。この場合、前述した第1実施例と同一
部分には同一符号を付し、その説明は省略する。
[Second Embodiment 1 Next, referring to FIG. 2, a manufacturing method according to a second embodiment of the present invention will be described. In this case, the same parts as in the first embodiment described above are given the same reference numerals, and the explanation thereof will be omitted.

前述した実施例と同様に、予め、絶縁性フィルムlに表
面から裏面に貫通する貫通孔2を形成し、この絶縁性フ
ィルムlの表裏面および貫通孔2の内面に蒸着またはス
パッタリングにより金属R膜3を形成する。この後、第
2図(A)に示すように、貫通孔2の箇所で1いに対応
する配線パターン形成領域を除く金属薄W23にレジス
ト5を前述した実施例と同様な方法でパターン形成する
。これにより、配線パターン形成領域の金属薄膜3のみ
が露出する。
Similar to the above embodiment, a through hole 2 penetrating from the front surface to the back surface is formed in the insulating film l in advance, and a metal R film is formed on the front and back surfaces of the insulating film l and the inner surface of the through hole 2 by vapor deposition or sputtering. form 3. Thereafter, as shown in FIG. 2(A), a pattern of resist 5 is formed on the thin metal W 23 except for the wiring pattern forming area corresponding to 1 at the location of the through hole 2 in the same manner as in the embodiment described above. . As a result, only the metal thin film 3 in the wiring pattern forming area is exposed.

しかる後、第2図(B)に示すように1露出した金属薄
膜3の表面に電解メッキによりメッキ層4を形成する。
Thereafter, as shown in FIG. 2(B), a plating layer 4 is formed on the exposed surface of the metal thin film 3 by electrolytic plating.

このメッキ層4は前述した実施例と同様に金属薄膜3が
下地メッキとなるので、電解メ、ツキにより簡単に露出
した金属薄Il!3のみに形成されるが、レジスト5の
表面には全く形成されない、これは、電解メッキである
ため、レジスト5の表面にはメッキ液の金属粒子が付着
しないからである。この場合、メッキ層4の厚さは最終
的に数JLm〜数十膳m程度に形成されるが、メッキ層
4の材質が金属薄膜3と同じ場合には、後工程で金属薄
[3と共にエツチングされるため、これを見込んで予め
金属薄膜3の厚さ分だけ厚く形成しておく、また、メッ
キ層4の材質が金属薄膜3と異なる場合には、金属薄W
J3と同時にエツチングされないので、メッキ層4を予
め厚く形成しておく必要はない。
In this plating layer 4, since the metal thin film 3 serves as the base plating as in the above-mentioned embodiment, the metal thin film 3 is easily exposed by electrolytic coating. 3, but not at all on the surface of the resist 5. This is because metal particles of the plating solution do not adhere to the surface of the resist 5 due to electrolytic plating. In this case, the thickness of the plating layer 4 is finally formed to be approximately several JLm to several tens of meters, but if the material of the plating layer 4 is the same as that of the metal thin film 3, the thickness of the plating layer 4 is Since the plating layer 4 is etched, it should be formed as thick as the thickness of the metal thin film 3 in advance in anticipation of this. Also, if the material of the plating layer 4 is different from the metal thin film 3, the metal thin W
Since it is not etched at the same time as J3, there is no need to form the plating layer 4 thickly in advance.

最後に、第2図(C)に示すように、レジスト5を前述
した実施例と同様に剥離して、不要な部分の金属薄膜3
を露出させる。そして、この状態でメッキ層4をマスク
として露呈した金属薄膜3をエツチングして除去する。
Finally, as shown in FIG. 2(C), the resist 5 is peeled off in the same manner as in the embodiment described above, and the metal thin film 3 is removed from unnecessary parts.
expose. Then, in this state, the exposed metal thin film 3 is removed by etching using the plating layer 4 as a mask.

すなわち、金属薄膜3をエツチングする場合には、高速
エツチング液を用いて短時間で金属薄膜3を一除去する
のであるが、これと同時に、メッキ層4も金属薄膜3の
厚ざ分だけ除去される。しかし、メッキ層4は予め金属
薄膜3の厚さ分厚く形成されているので、最終的に上述
した数gm〜数+gm程度の厚さに形成される。これに
より、メッキ層4と金1i!Q1g!3よりなる2層構
造の配線パターン7が絶縁フィルムlの表裏面に形成さ
れる。この結果、第1実施例と同様な絶縁性フィルムl
の表裏面に配線パターン7が貫通孔2の箇所で導通した
両面配線基板が得られる。
That is, when etching the metal thin film 3, one part of the metal thin film 3 is removed in a short time using a high-speed etching solution, but at the same time, the plating layer 4 is also removed by the thickness of the metal thin film 3. Ru. However, since the plating layer 4 is formed in advance to be as thick as the metal thin film 3, it is finally formed to have a thickness of approximately several gm to several + gm as described above. As a result, plating layer 4 and gold 1i! Q1g! A wiring pattern 7 having a two-layer structure consisting of three layers is formed on the front and back surfaces of the insulating film l. As a result, the same insulating film l as in the first embodiment was obtained.
A double-sided wiring board is obtained in which the wiring pattern 7 is electrically connected to the front and back surfaces at the locations of the through holes 2.

したがって、このような両面配線基板の製造方法によれ
ば、第1実施例と同様に、絶縁性フィルムlに貫通孔2
を形成し、この絶縁性フィルム1の表裏面および貫通孔
2の内面に金属薄膜3を形成し、この後、金属!!13
の配線パターン形成領域にのみメッキ層4を形成し、こ
のメッキ層4をマスクとして金属薄!I3をエツチング
することにより、メッキ層4と金属B膜3よりなる2層
構造の配線パターン7を貫通孔2の箇所で導通させて形
成したので、前述した第1実施例と同様の効果があるほ
か、特にメッキ層4をエツチングする工程が不要となり
、金属薄膜3のみをエツチングするだけでよいため、よ
り一層、製造工程のmi化を図ることができ、極めて能
率よく両面配線基板を製作することができる。特に、メ
ッキ層4を形成する場合には、配線パターン形成領域以
外にレジスト5を形成し、このレジスト5をマスクとし
てメッキ層4を形成するので、レジスト5の表面にはメ
ッキ層4は形成されず1表面にN呈した配線パターン形
成領域の金属薄膜3の表面のみにメッキ層4を形成する
ことができる。そのため、メッキ液が無駄にならず、効
率よくメッキを施すことができる。
Therefore, according to the manufacturing method of such a double-sided wiring board, as in the first embodiment, the through holes 2 are formed in the insulating film l.
A thin metal film 3 is formed on the front and back surfaces of the insulating film 1 and on the inner surface of the through hole 2. ! 13
A plating layer 4 is formed only in the wiring pattern formation area, and this plating layer 4 is used as a mask to form a thin metal layer! By etching I3, the two-layer wiring pattern 7 consisting of the plating layer 4 and the metal B film 3 is made conductive at the through hole 2, so that the same effect as in the first embodiment described above is obtained. In addition, the process of etching the plating layer 4 is no longer necessary, and only the metal thin film 3 needs to be etched, making it possible to further integrate the manufacturing process and manufacturing double-sided wiring boards extremely efficiently. I can do it. In particular, when forming the plating layer 4, the resist 5 is formed outside the wiring pattern forming area, and the plating layer 4 is formed using this resist 5 as a mask, so the plating layer 4 is not formed on the surface of the resist 5. The plating layer 4 can be formed only on the surface of the metal thin film 3 in the wiring pattern forming area on the surface of the metal thin film 3. Therefore, the plating solution is not wasted and plating can be performed efficiently.

なお、この発明は上述した実施例に限定されず、種々応
用変形が可能である0例えば、金属薄膜3やメー、キ層
4のエツチングはエツチング液に漬けて行なってもよく
、またドライエツチングで行なってもよい、また、メッ
キ層4の金属材料として、半田や金(Au)等を用いれ
ば、腐食し難い。
Note that the present invention is not limited to the embodiments described above, and can be modified in various ways. For example, the metal thin film 3 and the metal layer 4 may be etched by immersion in an etching solution, or by dry etching. Alternatively, if solder, gold (Au), or the like is used as the metal material of the plating layer 4, it will not easily corrode.

また、金属薄膜3は必ずしも1層構造である必要はなく
、多層構造にしてもよい、また、貫通孔2は1箇所のみ
でなく、複数箇所に設けて接続の信頼性を向上させるよ
うにしてもよい、また、絶縁性フィルム1は、表面処理
や適当なコーテイング材を塗布したものを用いたり、複
数枚ラミネートしたものを用いたりすることもできる。
Further, the metal thin film 3 does not necessarily have to have a single layer structure, but may have a multilayer structure, and the through holes 2 are provided not only in one place but in multiple places to improve the reliability of the connection. Alternatively, the insulating film 1 may be surface-treated or coated with a suitable coating material, or may be laminated with a plurality of sheets.

さらに、この発明でいう両面配線基板は上述したものに
限らず、例えば基板と基板、または基板と電子部品、あ
るいは電子部品と電子部品とを接続する配線パターンの
みが形成された配線基板、いわゆるコネクタと称される
ものをも含む。
Furthermore, the double-sided wiring board referred to in the present invention is not limited to the above-mentioned one, and includes, for example, a wiring board on which only a wiring pattern is formed to connect one board to another, or a board to an electronic component, or one electronic component to another, a so-called connector. It also includes what is called.

[発明の効果] 以上詳細に説明したように、この発明に係る両面配線基
板の製造方法によれば、最初に絶縁性フィルムに貫通孔
を形成し、この後貫通孔の内面を含む絶縁性フィルムの
表面に金属薄膜およびメッキ層を順次積層形成してエツ
チングすることにより、メッキ層と金属薄膜よりなる2
層構造の配線パターンを貫通孔の箇所で導通させて形成
したので、従来のように絶縁性フィルムの表裏面に金属
箔をラミネートする工程が不要となるばかりか、その金
属箔をエツチングして配線パターンを形成する工程も不
要となる。これにより、製造工程の簡素化を図ることが
でき、生産性の向上をも図ることがでさ、製造コストの
低減化を図ることができる。この場合、絶縁性フィルム
に貫通孔を形成した後、この絶縁性フィルムの表裏面お
よび貫通孔の内面に蒸着またはスパーフタリングにより
金属薄膜を形成するので、絶縁性フィルムの表裏面は勿
論のこと1貫通孔の内面にも金属薄膜を容易に形成する
ことができる。しかも、この金!薄膜はメッキ層の下地
メッキとなるので、後工程で金属薄膜の表面にメッキ層
を簡単かつ良好に形成することができる。これにより、
貫通孔の内面に形成された金属薄膜およびメッキ層によ
り表裏の配線パターンの導通を確保することができる。
[Effects of the Invention] As explained in detail above, according to the method for manufacturing a double-sided wiring board according to the present invention, a through hole is first formed in an insulating film, and then the insulating film including the inner surface of the through hole is formed. By sequentially laminating a metal thin film and a plating layer on the surface of the plated layer and etching the two
Since the layered wiring pattern is made conductive at the through holes, not only does the conventional process of laminating metal foil on the front and back sides of the insulating film become unnecessary, but the metal foil can also be etched to form the wiring. The process of forming a pattern is also unnecessary. This makes it possible to simplify the manufacturing process, improve productivity, and reduce manufacturing costs. In this case, after the through holes are formed in the insulating film, a metal thin film is formed by vapor deposition or spar phthaling on the front and back surfaces of the insulating film and on the inner surfaces of the through holes. A metal thin film can also be easily formed on the inner surface of the first through hole. And this money! Since the thin film serves as the base plating for the plating layer, the plating layer can be easily and favorably formed on the surface of the metal thin film in a subsequent process. This results in
The metal thin film and plating layer formed on the inner surface of the through hole can ensure electrical continuity between the front and back wiring patterns.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の第1実施例を示し、第1図(A)は
絶縁性フィルムを示す要部断面図、第1図(B)は絶縁
性フィルムに貫通孔を形成した状!島の要部断面図、第
1図(C)は絶縁性フィルムの表裏面および貫通孔の内
面に金IiA薄膜を形成した状態の要部断面図、第1図
(D)は金属薄膜の全表面にメッキ層を形成した状態の
要部断面図、第1図゛(E)はメッキ層の配線パターン
形成領域にレジストを形成した状態の要部断面図、第1
図(F)はレジストをマスクとしてメッキ層および金属
薄膜をエツチングした状態の要部断面図、第1図(G)
はレジスト除去してなる両面配線基板の要部断面図、第
2図はこの発明の第2実施例の製造方法を示し、第2図
(A)は金属薄膜の配線パターン形成領域以外にレジス
トを形成した状態の要部断面図、第2図(B)はレジス
トをマスクとして配線パターン形成領域の金属薄膜にメ
ッキ層を形成した状態の要部断面図、第2図(C)はレ
ジストを除去した状態の要部断面図である。 1・・・・・・絶縁性フィルム、2・・・・・・貫通孔
、3・・・・・・金属薄膜、4・・・・・・メッキ層、
5・・・・・・レジスト、7・・・・・・配線パターン
。 特許出願人 カシオ計算機株式会社 同 上   東洋メタライジング株式会社1”−””) 代理人 (f理士 町 1)俊 正   □;二・・、
− (Aう    ε)てZン二zしでΣ]乙−1釉fi性
i+几ム(B)7コ/l]1 第1図 第2図
Fig. 1 shows a first embodiment of the present invention, Fig. 1 (A) is a sectional view of the main part of an insulating film, and Fig. 1 (B) shows a state in which through-holes are formed in the insulating film! Figure 1 (C) is a cross-sectional view of the main part of the island, with gold IiA thin film formed on the front and back surfaces of the insulating film and the inner surface of the through hole, and Figure 1 (D) is a cross-sectional view of the main part of the island with gold IiA thin film formed on the front and back surfaces of the insulating film and the inner surface of the through hole. Figure 1 (E) is a cross-sectional view of the main part with a plating layer formed on the surface, and (E) is a cross-sectional view of the main part with a resist formed on the wiring pattern forming area of the plating layer.
Figure (F) is a sectional view of the main part after etching the plated layer and metal thin film using the resist as a mask, and Figure 1 (G).
2 is a cross-sectional view of a main part of a double-sided wiring board obtained by removing the resist, FIG. 2 shows a manufacturing method according to a second embodiment of the present invention, and FIG. Figure 2 (B) is a cross-sectional view of the main part of the formed state, Figure 2 (B) is a cross-sectional view of the main part of the state where a plating layer is formed on the metal thin film in the wiring pattern formation area using the resist as a mask, and Figure 2 (C) is the resist removed. FIG. 1... Insulating film, 2... Through hole, 3... Metal thin film, 4... Plating layer,
5...Resist, 7...Wiring pattern. Patent applicant Casio Computer Co., Ltd. Same as above Toyo Metallizing Co., Ltd.
- (A u ε) te Z n 2 z de Σ] Otsu-1 glaze fi property i + 几mu (B) 7 pieces/l] 1 Figure 1 Figure 2

Claims (3)

【特許請求の範囲】[Claims] (1)絶縁性フィルムに表面から裏面へ貫通する貫通孔
をドリルやプレス等の機械加工により形成する工程と、 前記絶縁性フィルムの表裏面および前記貫通孔の内面に
蒸着またはスパッタリングにより金属薄膜を形成する工
程と、 前記金属薄膜の全表面のうち、少なくとも前記貫通孔の
箇所で対応する配線パターン形成領域にメッキ層を形成
する工程と、 前記金属薄膜をエッチングして不要な部分を除去するこ
とにより、前記絶縁フィルムの表裏面に前記貫通孔の箇
所で互いに導通する配線パターンを形成する工程と、 を含むことを特徴とする両面配線基板の製造方法。
(1) A step of forming a through hole penetrating the insulating film from the front surface to the back surface by machining such as a drill or press, and forming a metal thin film by vapor deposition or sputtering on the front and back surfaces of the insulating film and the inner surface of the through hole. forming a plating layer on the entire surface of the metal thin film at least in a wiring pattern forming area corresponding to the through hole; and etching the metal thin film to remove unnecessary portions. A method for manufacturing a double-sided wiring board, comprising the steps of: forming a wiring pattern on the front and back surfaces of the insulating film that is electrically connected to each other at the through hole.
(2)請求項第1項において、前記金属薄膜の全表面の
うち、少なくとも前記貫通穴の箇所で対応する配線パタ
ーン形成領域にメッキ層を形成する工程は、 前記絶縁性フィルムの表裏面および前記貫通孔の内面に
形成された前記金属薄膜の全表面にメッキ層を形成する
工程と、 前記メッキ暦のうち、前記貫通孔の箇所で対応する配線
パターン形成領域にレジストをパターン形成する工程と
、 前記レジストをマスクとして前記メッキ層をエッチング
して除去する工程と、 を含むことを特徴とする両面配線基板の製造方法。
(2) In claim 1, the step of forming a plating layer on the entire surface of the metal thin film at least in a wiring pattern forming area corresponding to the through hole includes the steps of: a step of forming a plating layer on the entire surface of the metal thin film formed on the inner surface of the through hole; a step of patterning a resist in a wiring pattern forming area corresponding to the through hole in the plating calendar; A method for manufacturing a double-sided wiring board, comprising: etching and removing the plating layer using the resist as a mask.
(3)請求項第1項において、前記金属薄膜の全表面の
うち、少なくとも前記貫通穴の箇所で対応する配線パタ
ーン形成領域にメッキ層を形成する工程は、 前記絶縁性フィルムの表裏面および前記貫通孔の内面に
形成された金属薄膜のうち、前記配線パターン形成領域
以外の金属薄膜にレジストをパターン形成する工程と、 前記レジストをマスクとして前記配線パターン形成領域
の金属薄膜にのみメッキ層を形成する工程と、 前記配線パターン形成領域以外に形成されたレジストを
除去する工程と、 を含むことを特徴とする両面配線基板の製造方法。
(3) In claim 1, the step of forming a plating layer on the entire surface of the metal thin film at least in a wiring pattern forming area corresponding to the through hole includes the steps of: forming a resist pattern on the metal thin film formed on the inner surface of the through-hole other than the wiring pattern forming area; forming a plating layer only on the metal thin film in the wiring pattern forming area using the resist as a mask; A method for manufacturing a double-sided wiring board, comprising: a step of removing resist formed in areas other than the wiring pattern forming area.
JP12039689A 1989-05-16 1989-05-16 Manufacture of both-sided wiring board Pending JPH02301187A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12039689A JPH02301187A (en) 1989-05-16 1989-05-16 Manufacture of both-sided wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12039689A JPH02301187A (en) 1989-05-16 1989-05-16 Manufacture of both-sided wiring board

Publications (1)

Publication Number Publication Date
JPH02301187A true JPH02301187A (en) 1990-12-13

Family

ID=14785173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12039689A Pending JPH02301187A (en) 1989-05-16 1989-05-16 Manufacture of both-sided wiring board

Country Status (1)

Country Link
JP (1) JPH02301187A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004113065A1 (en) * 2003-06-24 2004-12-29 Fcm Co., Ltd. Electrically conductive sheet whose electrically conductive layers on front and back surfaces are electrically connected to each other through through-holes
WO2005004050A1 (en) * 2003-07-02 2005-01-13 Fcm Co., Ltd. Conductive sheet for non-contact type ic card having built-in antenna and non-contact type ic card having built-in antenna
WO2005005142A1 (en) * 2003-07-10 2005-01-20 Fcm Co., Ltd. Conductive sheet having more than one through hole or via hole
KR100623882B1 (en) * 2005-06-22 2006-09-19 디케이 유아이엘 주식회사 Flexible Circuit Board Patterning Method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56104493A (en) * 1980-01-25 1981-08-20 Asahi Chemical Ind Method of manufacturing thick film fine pattern
JPS6295894A (en) * 1985-10-23 1987-05-02 株式会社エイト工業 Formation of through hole substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56104493A (en) * 1980-01-25 1981-08-20 Asahi Chemical Ind Method of manufacturing thick film fine pattern
JPS6295894A (en) * 1985-10-23 1987-05-02 株式会社エイト工業 Formation of through hole substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004113065A1 (en) * 2003-06-24 2004-12-29 Fcm Co., Ltd. Electrically conductive sheet whose electrically conductive layers on front and back surfaces are electrically connected to each other through through-holes
WO2005004050A1 (en) * 2003-07-02 2005-01-13 Fcm Co., Ltd. Conductive sheet for non-contact type ic card having built-in antenna and non-contact type ic card having built-in antenna
WO2005005142A1 (en) * 2003-07-10 2005-01-20 Fcm Co., Ltd. Conductive sheet having more than one through hole or via hole
KR100623882B1 (en) * 2005-06-22 2006-09-19 디케이 유아이엘 주식회사 Flexible Circuit Board Patterning Method

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