JPH099000A - CCD drive system and method - Google Patents

Abstract

(57) [Abstract] [Purpose] To achieve both high-speed processing and high image quality when image data is read from the CCD at a resolution that is a multiple of the basic resolution of the CCD. [Structure] For example, in the case of reading at a resolution of 1 / N of the basic resolution, N CCD driving pulses φCCD are output in one cycle of a reset pulse φRST to synthesize data for N pixels. And these N CCD drive pulses φ CC
Of D, when the clamp period corresponding to the high level of the first pulse is t1, the sampling period corresponding to the low level of the last pulse is t2, and the rest is t3, the CC
Applying the D drive pulse to the CCD is t3 / (t1 + t2) <
It is set to satisfy the relationship of N-1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving system for a CCD (charge transfer device) used in an image reading apparatus, and particularly to driving a CCD when reading an image at a resolution lower than the basic resolution (= optical resolution) of the CCD. Regarding the scheme.

[0002]

2. Description of the Related Art In a digital image forming apparatus such as a digital copying machine or a printer, and an image information file apparatus for accumulating digital image information on a file medium such as a magneto-optical disk, a line image sensor using a CCD is generally used. For example, a document image is read at a high resolution of 400 dpi or more.

By the way, there are many applications in which a large amount of image data is stored in a memory at high speed even if the image quality is slightly degraded in the above apparatus. In that case, the basic resolution of the CCD, that is, optical It will be read at a lower resolution than the resolution.

The conventional reading method of image data in this case is, for example, 3 when the basic resolution of the CCD is 600 dpi.
1 / of the basic resolution, as when reading at 00 dpi
The case of reading at a resolution of 2 will be described as an example.

FIG. 1 shows CC in the first conventional reading method.
The time chart of a D drive method is shown.

Here, φCCD is a CCD drive pulse, and the charge (= signal) of one pixel is in the low level period.
Is read. φRST is a reset pulse, and at its high level, the CCD output potential Vout is a predetermined potential Vref.
The output potential Vout once settles to the field-through level potential Vf when there is no signal when reset to low level. The potential Vs is a signal level, and a signal value, that is, image data is obtained by sampling the signal level Vs using the field through level Vf as a reference potential in the circuit in the subsequent stage.

In the first conventional reading method, the CCD is driven and the signal level Vs for each pixel output from the CCD is driven in the same manner as in the case of reading at the basic resolution as shown in FIG.
Is sampled and A / D-converted, and then signal values of two adjacent pixels are combined (for example, added or averaged) to obtain 1-pixel data.

The second conventional reading method also drives the CCD as shown in FIG. 1 and takes in the data output from this CCD every other pixel.

However, the first method has a problem that it takes a long time to perform a signal combining process, and the second method has a problem that the image quality is deteriorated due to thinning of pixel data, and particularly moire fringes are likely to occur. There is.

In view of the above, a reading method has been proposed in which two pixels are combined in the CCD by the driving method shown in FIG.

That is, the CCD driving method shown in FIG.
The D drive pulse φCCD is applied at the same timing as in the normal state shown in FIG. 1, and the reset pulse φRST is applied once every two cycles of the CCD drive pulse φCCD to combine the charges of two pixels in the CCD. And output it.

Although this driving method solves the problems of the above-described composition processing time and image quality deterioration, the processing time is the same as that at the basic resolution in spite of halving the resolution. After all it is not satisfactory.

Therefore, a CCD driving method as shown in FIG. 3 has been proposed in Japanese Patent Laid-Open No. 5-75780.
This drive system is the drive system shown in FIG. 2 in which the drive frequency is doubled. As a result, the processing time can be reduced to 1/2.

As shown in FIG. 6, the period reserved for clamping is the clamp period t1 and the period reserved for sampling is the sampling period t2. In addition, both the clamp period t1 and the sampling period t2 have a period in which the output potential Vout is unstable at first, and a period suitable for the clamp and the sampling comes after that. Therefore, a period suitable for the clamp and the sampling is set thereafter. The clamp signal stable period and the sampling signal stable period will be called respectively, and the output potential Vout at that time will be called the field through level Vf and the signal level Vs, respectively. The period t3 during that period is a period for reading the previous pixel data.

Further, in the period t1 of the first potential level of the first cycle of the CCD drive pulse corresponding to the clamp period, the output potential Vout is generally higher than the field through level Vf during the period when the reset pulse is high level. Although there is a period in which the potential of Vref is also high, this period is considered to be 0 in the present invention. However, it is shown in the figure.

[0016]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
The CCD driving method proposed in Japanese Patent No. 75780 and the like has a problem that the image quality is deteriorated as compared with the method of FIG. As shown in FIG. 3, the main cause is that the clamp period t1 and the sampling period t2 are 1/2 of the normal time.
It has been shortened to. That is, when the clamp period t1 or the sampling period t2 is too short, the output potential Vout becomes the field through level Vf or the signal level V.
The clamp period t1 and the sampling period t2 may end during the transient state before settling at s. In the latter circuit, when the signal level Vs is sampled after the reference potential is clamped to the field through level Vf, in order to obtain a highly accurate signal value, a clamp signal stable period longer than a certain length or A sampling signal stable period (for example, 100 nsec or more) is required, but if the clamp period t1 or the sampling period t2 is too short, it may not be possible to sufficiently secure them. For this reason, it is considered that it is not possible to obtain a highly accurate signal value and the image quality deteriorates.

The above circumstances are applicable to all cases of reading at a resolution lower than the basic resolution, not limited to the case of reading at a resolution half the basic resolution.

The present invention has been made in view of such circumstances, and an object thereof is to read image data from the CCD at a resolution lower than the basic resolution of the CCD.
It is an object of the present invention to provide a CCD drive system that can satisfy both high-speed processing and high-quality processing.

[0019]

A CCD driving system of the present invention comprises pulse generating means for generating a CCD driving pulse for defining a clamp period and a sampling period of the CCD and a reset pulse for resetting the output of the CCD. When the pulse generation unit generates N cycles (N is an integer of 2 or more) of CCD drive pulses consisting of the first and second potential levels in one cycle of the reset pulse, one cycle of the reset pulse In, corresponding to the clamp period,
The period of the first potential level of the first cycle of the CCD drive pulse is t1, the period of the second potential level of the last cycle of the CCD pulse is t2, which corresponds to the sampling period, and further corresponds to the clamp period. the period of t1,
When the remaining period excluding the period of t2 corresponding to the sampling period is set to t3, these periods are set to satisfy the relationship of t3 / (t1 + t2) <N-1.

[0020]

In the present invention, by outputting a plurality of CCD drive pulses during one cycle of the reset pulse,
The data of a plurality of pixels are combined in the CCD and output. That is, the resolution becomes lower than the basic resolution. Of the plurality of CCD drive pulses output within one cycle of the reset pulse, the first voltage level period of the first pulse defines the clamp period, and the second voltage level period of the last pulse defines the sampling period. Stipulate. In the present invention, the clamp period and the sampling period are set so that the time ratio of one reset pulse period is larger than that of the remaining period. Therefore, even if the driving frequency of the CCD is increased and the processing time is shortened, the clamp period and the sampling period can be secured as a sufficiently long period necessary for the static leveling of the potential level and the clamp and sampling, so that high-quality output can be obtained. To be

[0021]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 4 is a block diagram of a CCD driving system according to the embodiment of the present invention.

The output potential Vout from the CCD 1 is CDS
(Correlated double sampler) 2 is input. The CDS2 clamps its own reference potential to the output potential Vout in the clamp period for each cycle of the reset pulse φRST, and then samples the output potential Vout in the sampling period to obtain the difference between the reference potential and the sampling potential, that is, the signal. Send to A / D converter 3. This signal (that is, image data) is converted from an analog signal to a digital code by the A / D converter 3 and input to the controller 4, where various image processing such as shading correction and UCR (undercolor removal) is performed. Is given. The controller 4 is a CCD
A control signal such as a CCD drive pulse φCCD or a reset pulse φRST is supplied to 1 and a control signal for driving them in synchronization with the CCD 1 is supplied to the CDS 2 and the A / D converter 3.

FIG. 5 is a time chart (FIG. 5 (A)) of the CCD driving method when reading is performed at a resolution half the basic resolution of the CCD in this embodiment.
For comparison, a time chart (FIG. 5B) of the conventional driving method (hereinafter referred to as a conventional example) shown in FIG. 3 is also shown side by side on the same time axis.

In this embodiment shown in FIG. 5A, the CCD drive pulse φCCD is generated at a speed twice as high as that in the normal reading, and the reset pulse φRST is C, as in the conventional example shown in FIG.
By generating at a speed of 1/2 of the CD drive pulse φCCD, two pixels are combined in the CCD 1 to reduce the resolution to 1 /.
The processing time is reduced to 2 and the processing time is shortened to 1/2 of the normal reading.

Here, the feature of the driving method of the present embodiment is that the first CCD drive pulse P1 for reading the data of the preceding pixel of the two pixel data to be combined and the subsequent pixel data are read. The second CCD drive pulse P2 has the same period but a different ratio between the high level period and the low level period, that is, a duty ratio. That is, in the first CCD drive pulse P1, the duty ratio is set so that the proportion of the high level period in the cycle is longer than that in the low level period, while on the other hand, in the second CCD drive pulse P2, the low level is reversed. The duty ratio is set such that the period ratio is longer than the high level period.

Here, as can be seen from FIG. 5, the first CD
The high level period of the D drive pulse P1 defines the clamp period t1 of the output potential Vout, and the low level period of the second drive pulse P2 defines the sampling period t2 of the output potential Vout. Therefore, by the above duty ratio setting, the reset clamp period t1 and the sampling period t2 in the cycle of two pixels.
And will be secured for a relatively long time.

FIG. 7A shows 1/2 of the basic resolution of CCD.
It is another embodiment in the case of reading at the resolution of. This CCD driving method is different from the embodiment shown in FIG. 5A in that the first CCD driving pulse P1 for reading the data of the first pixel of the two pixel data to be combined and the subsequent pixel. The second CCD drive pulse P2 for reading data is not equal in cycle. In this embodiment, for comparison, the conventional driving method shown in FIG.
A time chart (referred to as a conventional example) (FIG. 7B) is also shown side by side on the same time axis.

Further, FIG. 8A shows an example of reading at a resolution of 1/4 of the basic resolution. In this embodiment, the CCD drive pulse is composed of P1 to P4, and their periods are not equal as in the embodiment shown in FIG.
From this figure, it can be seen that even in the case of a resolution of ¼ of the basic resolution, the idea can be exactly the same as in the case of ½ of the basic resolution. FIG. 8B is a time chart of the conventional driving method.

Now, FIG. 6 is a waveform diagram of the output potential Vout for explaining the effect when the clamp period t1 and the sampling period t2 are long as described above.

(1) As shown in the figure, if the clamp period t1 is sufficiently long, the field through level Vf is settled to a prescribed potential after the transition period. Similarly, if the sampling period t2 is sufficiently long, the signal level Vs also settles at a correct level after the transition period. Therefore, the output potential V
The correct field through level Vf and signal level Vs appear at out.

(2) Further, when the CDS2 clamps the field through level Vf and samples the signal level Vs, if the clamping period t1 and the sampling period t2 are sufficiently long, it is necessary to obtain a highly accurate output suitable for practical use. A clamp signal stable period and a sampling signal stable period (for example, 100 nsec or more) can be secured.

As a result of the above (1) and (2), it is possible to read a high quality image. Note that these periods do not necessarily have to be long for both periods, and if either one is longer, the effect will be obtained. If this is expressed by an equation, when N cycles (N is an integer of 2 or more) of CCD drive pulses are generated in one cycle of the reset pulse, C of the CCD drive pulse is generated.
It means that the application to the CD should be set so as to satisfy the relationship of t3 / (t1 + t2) <N-1.

As a specific example, the clamp period t1 is set to, for example, about 100 nsec to 200 nsec, and the sampling period t2 is set to, for example, about 1 μsec (1 MHz). Further, the period sandwiched between the clamp period t1 and the sampling period t2, that is, the period t3 for reading the previous pixel data is set to 200 nsec (5 MHz), for example. Charge reading is 5 to 20M in general CCD
Since it is guaranteed that sufficient accuracy is obtained at about Hz, the above-mentioned reading period is sufficient.

As described above, the resolution of 1/2 of the basic resolution and 1 /
Although an example of reading at a resolution of 4 has been described, the present invention can be generally applied to all cases of reading at a resolution lower than the basic resolution. That is, when reading at a resolution of 1 / N of the basic resolution, the cycle of the CCD drive pulse φCCD is set to N times the cycle of the reset pulse φRST, and the first CCD in the cycle of the reset pulse φRST is set.
Clamping period by drive pulse φCCD or last C
This means that the sampling period by the CD drive pulse φCCD or both of them should be secured sufficiently long.

[0036]

According to the present invention, both high processing speed and high image quality can be satisfied when image data is read from the CCD at a low resolution that is a multiple of the basic resolution of the CCD.

[Brief description of drawings]

FIG. 1 is a time chart of a conventional CCD driving method.

FIG. 2 is a time chart of a conventional CCD driving method for performing two-pixel synthesis.

FIG. 3 is a time chart of a conventional CCD driving method in which two pixels are combined and the processing speed is increased.

FIG. 4 is a block diagram showing a configuration of a CCD driving system according to an embodiment of the present invention.

FIG. 5 is a time chart comparing the CCD driving method in the embodiment with FIG.

FIG. 6 is a waveform diagram of an output potential for explaining the effect of the same embodiment.

FIG. 7 is a time chart comparing a method in which the cycles of CCD driving pulses are not made uniform when two-pixel synthesis is performed, with comparison with the conventional method in FIG.

FIG. 8 is a time chart in comparison with an example in which 4-pixel synthesis is performed without making the periods of CCD drive pulses uniform, with a conventional 4-pixel synthesis method.

[Explanation of symbols]

 1 CCD 2 CDS 3 A / D converter 4 controller

Claims (2)

[Claims] 1. A pulse generator for generating a CCD drive pulse for defining a clamp period and a sampling period of the CCD and a reset pulse for resetting the output of the CCD, wherein the pulse generator has one cycle of the reset pulse. In the case of generating N cycles (N is an integer of 2 or more) of CCD drive pulses composed of the first and second potential levels, in one cycle of the reset pulse, the CCD drive pulse corresponding to the clamp period is generated. The period of the first potential level of the first cycle is t1, the period of the second potential level of the last cycle of the CCD pulse corresponding to the sampling period is t2 in one cycle of the reset pulse, and the reset In one pulse cycle, the t1 period corresponding to the clamp period and the t2 period corresponding to the sampling period When the remaining period t3, characterized in that it sets these periods so as to satisfy the t3 / (t1 + t2) <N-1 relationship C except
CD drive system. 2. A process of applying a reset pulse for resetting the output of the CCD to the CCD, and in one cycle of the reset pulse, a CCD drive pulse defining a clamp period and a sampling period is N periods (N is 2 or more). And a step of applying the CCD drive pulse to the CCD so that the CCD drive pulse corresponds to a clamp period in one cycle of the reset pulse, and the first cycle of the first cycle of the CCD drive pulse. The period of the potential level of T1 is t1, the period of the second potential level of the last cycle of the CCD pulse corresponding to the sampling period is t2, and the period of t1 corresponding to the clamp period and the sampling period When the remaining period excluding the period of t2 is set to t3, these periods satisfy the relation of t3 / (t1 + t2) <N-1. A CCD driving method characterized by being applied to a CCD.