JPH0690676B2 - Command operation control method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a command operation control system of a control device which performs a specified command operation under a central processing unit.

[Conventional technology]

A control device such as a common line signaling device in a telephone exchange system usually has an interface with a central processing unit and a function of accessing a main storage device in a direct access mode after a command is activated from the central processing unit. A specific command is continuously executed in response to a chain instruction from the device. However, there has not conventionally been provided a function of processing a command different from a command to be chained independently of the chain operation while continuously operating a specific command sent from the central processing unit by a chain instruction.

[Problems to be Solved by the Invention] As described above, in the related art, since another command operation cannot be performed during the command chain operation,
For example, when trying to confirm the operation status of a write / read command by another maintenance control system command during a write command operation or a read command operation, the chain instruction is temporarily cut and its normal termination is processed centrally. After confirmation on the device side, a maintenance control system command was sent to the control device to confirm normal termination, and then the chain activation of the write / read command had to be performed again.

However, the reason why the chain operation is performed is because it is desired to continuously execute a plurality of commands. Therefore, cutting the chain during the chain operation may hinder the original processing of the control device. In particular, in a device such as a common line signal device that must always receive data on the line side, disconnecting the chain during the chain operation of the read command directly leads to disconnection of the link. Due to such a reason, conventionally, there is a drawback that it is difficult to periodically collect information on the maintenance state.

The present invention has been made in view of such circumstances,
The purpose is to enable the maintenance control system commands to be executed without affecting the chain operation during continuous operation of specific commands by chain instructions, and to enable periodic maintenance status information collection, etc. is there.

[Means for solving problems]

In order to achieve the above object, the present invention provides a control device for continuously executing a specific command in response to a chain instruction from a central processing unit, wherein an interrupt for storing a maintenance control system command issued from the central processing unit. A factor register is provided, and when an idle time occurs during the chain operation of the specific command, the interrupt by the command of the maintenance control system from the interrupt factor register is permitted, and the interrupt by the command of the maintenance control system is generated. The maintenance control system command is executed in the interrupt processing related to the interrupt, and after the completion of the execution, the interruption by the maintenance control system command from the interrupt factor register is disabled and the interrupt processing is exited.

[Action]

Cutting a chain by unconditionally interposing another command between a command and a command chained to this during the chain operation will hinder the original chain operation. If there is a free time such as waiting for an event in a certain command, even if the command of the maintenance control system is executed in that free time, if the execution time of this command falls within the free time, it will hinder the chain operation. Instead, by adopting the above configuration, the maintenance control operation can be performed without lowering the processing capacity of the control device.

〔Example〕

 Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 2 is a block diagram of a common line signal device to which an embodiment of the present invention is applied, 1 is a command register for temporarily storing commands from a central processing unit (not shown), and 2 is a decoder for decoding commands in the command register 1. Then, the decoding result of the write command is stored in the interrupt factor register 3a, the decoding result of the read command is stored in the interrupt factor register 3b, and the decoding result of the maintenance control system command is stored in the interrupt factor register.
Stored in 3c. The contents of each interrupt factor register 3a-3c are
It is added to the sequencer 4 via the gate circuit 5. The sequencer 4 includes a test circuit 6 that determines a jump condition of firmware, a control memory 7 that stores a firmware necessary for a read-related process by a write command, a read command, etc., a write-related process, and a firmware required for a maintenance control-related process. , And the output of the control memory 7 is connected to a central processing unit (not shown) via an arithmetic circuit (ALU) 8, a line control circuit (L-CTL) 12 and an interface 13. The operation circuit 8 and the buffer memory 9 are connected to the operand bus 10 and the operation result output bus 11, and the line control circuit 12 is connected to the operation result output bus 11 to perform processing on the line side not shown. Although not shown in FIG. 2, it has a function of accessing the main memory in the direct access mode after the command is activated from the central processing unit.

In FIG. 2, when one read command is added to the command register 1 by a chain instruction from a central processing unit (not shown), the contents are decoded by the decoder 2 and set in the interrupt factor register 3b, and the sequencer 4 The sequence processing that matches the contents is started, and the read processing is performed. When execution of one read command is completed,
When the control memory 7 sends a completion report to the central processing unit via the interface 13 and the next read command to be chained is input to the command register 1, the same operation as above is continuously performed. . The chain operation by the write command is similarly performed.

Now, when the sequencer 4 waits for an event such as waiting for data reception from the line side during execution of one write / read command and becomes ready to accept another command, as shown in FIG. Enable the interrupt by the maintenance control system command by the interrupt factor register 3c. Therefore, at this time, if a maintenance control system command is input to the command register 1 and the decoding result is stored in the interrupt factor register 3c, an interrupt due to the maintenance control system command is generated during the idle time of the above event waiting, that is, the chain operation. Accepted,
Maintenance control commands are executed by interrupt processing as shown in FIG. Then, after the execution of the maintenance control system command is completed, the interruption of the maintenance control system command is disallowed and the process returns. As a maintenance control system command, in order to confirm the operation status of the write / read command, etc., information of each part of the device is collected and sent to the central processing unit via the interface 13 or saved in the device internal memory. Command is used.

〔The invention's effect〕

As described above, according to the present invention, the maintenance control system command is executed in the idle time during the chain operation, and in particular, the interrupt is not permitted after the execution of the maintenance control system command that has permitted the interrupt is completed. So that if the idle time during the chain operation is exhausted at the end of the execution of one maintenance control system command, the next maintenance control system command will be interrupted. Even if it is stored in the factor register, its execution is carried out to the next free time, so it is possible to perform the maintenance control operation without affecting the chain operation, that is, without lowering the processing capacity of the control device. Becomes Also, since the central processing unit has the initiative in collecting information on the maintenance status of the control unit by the maintenance control system command, the central processing unit should output any maintenance control system command or a combination thereof to the control unit. As a result, any maintenance control operation can be performed according to the occasion.

[Brief description of drawings]

FIG. 1 is an operation explanatory diagram of the present invention, and FIG. 2 is a block diagram of a common line signal device to which an embodiment of the present invention is applied. In the figure, 1 ... Command register, 2 ... Decoder, 3a-3c ... Interrupt factor register, 4 ... Sequencer,
5 ... Gate circuit, 6 ... Test circuit, 7 ... Control memory, 8 ... Operation circuit, 9 ... Buffer memory, 10 ... Operand bus, 11 ... Operation result output bus, 12 ... Line control circuit , 13 ... Interface.

Claims (1)

[Claims] 1. A control device for continuously executing a specific command in response to a chain instruction from a central processing unit, comprising an interrupt factor register for storing a maintenance control system command issued from the central processing unit, When a free time occurs during the chain operation of a specific command, the interrupt by the maintenance control system command from the interrupt factor register is enabled, and the interrupt by the maintenance control system command is generated. A command operation control method characterized in that a maintenance control system command is executed in processing, and after the execution is completed, interruption by the maintenance control system command from the interrupt factor register is disabled and the process is exited from the interrupt processing. .