JPH065483A - Aligning method for semiconductor crystal substrate - Google Patents

Abstract

PURPOSE:To enable precise position alignment of the crystallographic axis orientation of a semiconductor crystal substrate and a process pattern. CONSTITUTION:An insulating mask 11 having a circular apeature 12 is formed on a semiconductor single crystal substrate 1. By anisotropic etching, an alignment mark 13 wherein the crystallographic axis orientation can be directly confirmed by visual observation is formed on the semiconductor single crystal substrate 1. A mask pattern 3 is made to coincide with the alignment mark 13. Thereby the precise position alignment of the crystallographic axis orientation of the substrate 1 and the mask pattern 3 is enabled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor in which a processing pattern is aligned with the crystallographic axis direction in order to perform a process which depends on the crystallographic orientation of a semiconductor crystal substrate, such as pressure-sensitive resistance formation in a semiconductor pressure sensor. The present invention relates to a method of aligning a crystal substrate.

[0002]

2. Description of the Related Art Generally, it is known that a semiconductor single crystal substrate has anisotropy or isotropic property with respect to a crystal plane or a crystal direction, and a treatment that depends on the crystal orientation of the semiconductor single crystal substrate, for example, When forming a pressure-sensitive resistor in a semiconductor pressure sensor, it is important to accurately arrange the resistance pattern in the crystal direction. The pressure-sensitive resistor detects strain due to pressure by utilizing the piezoresistive effect, but the piezoresistive effect has a crystal orientation dependence, and therefore its characteristics differ depending on its axial orientation. Therefore, it is necessary to accurately match the resistance pattern and the crystal axis direction of the semiconductor single crystal substrate.

Conventionally, an aligner having a mechanical alignment mechanism is used, and a mask alignment method often used in the manufacture of integrated circuits, that is, a well-known mask alignment method based on orientation flat is used to form a resistance pattern and a semiconductor. The position was aligned with the crystal axis direction of the single crystal substrate. Here, the orientation flat is an abbreviation for orientation flat, and is a cut portion 2 on the outer periphery of the semiconductor single crystal substrate 1 as shown in FIG. The orientation flat 2 is formed by, for example, when the semiconductor single crystal substrate 1 is a silicon substrate, when the silicon is in an ingot state, the crystal axis orientation is previously detected by X-ray analysis and cut according to the desired crystal axis orientation. To be done.
The crystal axis orientation of orientation flat 2 is represented by an orientation (direction indicated by a chain double-dashed line in the figure) perpendicular to the cut side as shown in FIG.

[0004]

However, in the conventional processing of the orientation flat 2, for example, as shown in FIG.
00) In the semiconductor single crystal substrate 1 having a crystal plane,
When the orientation flat 2 perpendicular to the [011] orientation is formed, the processing accuracy causes an error α between the orientation flat 2 and the actual crystal axis orientation [0-11] as shown in FIG. There was a problem of being lost. In the present specification, a vector in which a negative symbol is written on a number that is generally used to express the crystal axis orientation is represented by writing a negative symbol before the number.

Conventionally, the alignment between the crystal axis orientation of the semiconductor single crystal substrate 1 and the processing pattern is, for example, the mask pattern 3 shown in FIG. Designed axis direction [011],
This is performed by matching the axial orientation [011] of the orientation flat 2 as shown in FIG. However, conventionally, since the orientation flat 2 is positioned by using the mask aligner having the mechanical positioning mechanism as described above, the error β is equal to that in the normal mask alignment as shown in FIG. 5C. There was a problem that is caused.

When the orientation flat 2 is used as a reference for the crystal axis orientation in this way, an error α due to the processing accuracy of the orientation flat 2 occurs between the orientation flat 2 and the crystal axis orientation, so that the original crystal axis orientation and the mask pattern 3 are formed. It was not always the case that the axial orientation in the design was the same. Further, since the accuracy of detection and alignment of the orientation flat 2 is limited by the ability of the device for performing alignment, the alignment between the crystal axis orientation of the semiconductor single crystal substrate 1 and the designed axial orientation of the mask pattern 3 is made. Due to the error β, it cannot be said to be performed accurately. Due to these errors α and β, a large deviation occurs between the crystal axis orientation of the semiconductor single crystal substrate 1 and the designed axis orientation of the mask pattern 3.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor crystal substrate alignment method capable of accurately aligning the crystal axis orientation of a semiconductor crystal substrate with a processing pattern. I am trying.

[0008]

In order to solve the above problems, the present invention provides a method for aligning a semiconductor crystal substrate in which a processing pattern is aligned with a crystal axis direction of the semiconductor crystal substrate, wherein an insulating film is formed on the surface of the semiconductor crystal substrate. After forming a substantially circular opening in the insulating film, anisotropically etching the semiconductor crystal substrate to form alignment marks on the semiconductor crystal substrate, and further forming the insulating film on the surface of the semiconductor crystal substrate. After removing the, the processing pattern is aligned with the alignment mark of the formed semiconductor crystal substrate.

[0009]

According to the method of the present invention, when an insulating film is formed on the surface of a semiconductor crystal substrate and a substantially circular opening is formed in the insulating film, anisotropic etching is applied to the semiconductor crystal substrate. Depends on the crystal orientation, an alignment mark in which a specific crystal plane appears is formed on the semiconductor crystal substrate. Then, a specific and accurate crystal axis orientation is exposed at the bottom of the alignment mark, that is, at the boundary between the semiconductor crystal substrate surface and the etched portion. Therefore, after removing the insulating film on the surface of the semiconductor crystal substrate, if the designed axial orientation of the processing pattern is aligned with the formed alignment mark, the processing pattern is accurately aligned with the specific crystal axis orientation of the semiconductor crystal substrate. Aligned.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor crystal substrate alignment method according to the present invention will be described below with reference to the drawings. In the figure, the same components as those in the conventional example are designated by the same reference numerals and the description thereof will be omitted. 1A to 1D are schematic views showing an example of a method of aligning a semiconductor crystal substrate according to the present invention in the order of steps, and FIGS. 1A to 1C are schematic plan views of a main part. FIG. 1B is a schematic cross-sectional view of the semiconductor single crystal substrate, and FIG. 1D is a schematic plan view in the final step.

In this embodiment, a semiconductor single crystal substrate 1 made of silicon having a (100) crystal plane is used. As shown in FIG. 1A, first, an insulating film mask 1 is formed on the semiconductor single crystal substrate 1.
1 (first step), and then a circular opening 12 having a diameter of, for example, about 20 μm is formed in the insulating film mask 11 (second step). The reason why the opening 12 has a circular shape here is to make it difficult for an error to occur during alignment with the mask pattern 3 performed in a sixth step described later. That is, if the opening 12 has a polygonal shape, the shape of the alignment mark 13 formed as will be described later becomes complicated, and a deviation occurs at the time of alignment, and the alignment accuracy with respect to the crystal axis direction of the semiconductor single crystal substrate 1 decreases. This is because

Next, the semiconductor single crystal substrate 1 is anisotropically etched using an alkaline chemical such as KOH to form alignment marks 13 on the semiconductor single crystal substrate 1 (third step). In the etching with this alkaline chemical, the etching rate greatly depends on the crystal axis orientation.
In the semiconductor single crystal substrate 1 of (00), the etching rate of the (111) plane is slower than the etching rate of the (100) plane. Therefore, by this etching, the semiconductor single crystal substrate 1
A specific crystal plane, that is, the (111) plane in this case appears in the etched portion, and a square cone-shaped alignment mark 13 can be formed as shown in FIG.

After the formation of the alignment mark 13,
The insulating film mask 11 on the semiconductor single crystal substrate 1 is removed (fourth step). As a result, as shown in FIG. 1C, the alignment mark 1 corresponding to the boundary between the semiconductor single crystal substrate 1 and the alignment mark 13 is formed on the surface of the semiconductor single crystal substrate 1.
It is confirmed that the bottom side 13a of 3 is formed in a square shape. Each base 13a of the alignment mark 13 is (1
It is a line of intersection between the (00) crystal face and the (111) crystal face, and indicates a specific crystal axis orientation. Since the line of intersection between the (100) crystal plane and the (111) crystal plane is the [011] crystal axis orientation, the [011] crystal axis orientation can be known from each base 13a.

Finally, the second alignment mark 14 having the [011] axis orientation formed on the mask pattern 3 when the mask pattern 3 is formed in advance is used as a semiconductor unit as shown in FIG. It is aligned with the alignment mark 13 of the crystal substrate 1 (fifth step). As a result, the mask pattern 3 is accurately aligned with the [011] crystal axis direction of the (100) semiconductor single crystal substrate 1.

As described above, in the above embodiment,
The alignment mark 13 whose crystal axis orientation can be directly visually confirmed is formed on the semiconductor single crystal substrate 1, and the mask pattern 3 is aligned with the alignment mark 13 to thereby locate the crystal axis orientation of the semiconductor single crystal substrate 1 and the mask pattern 3. Since the alignment is performed, the alignment accuracy can be improved.

[0016]

As described above, according to the method for aligning a semiconductor crystal substrate of the present invention, the alignment mark whose crystal axis orientation can be directly visually confirmed is formed on the semiconductor crystal substrate,
By aligning the crystallographic axis orientation of the semiconductor crystal substrate with the process pattern by aligning the process pattern with the alignment mark, easy and highly accurate alignment can be realized.

[Brief description of drawings]

FIG. 1A is a schematic sectional view of a semiconductor single crystal substrate in first and second steps of the method of the present invention, and FIG. 1B is a schematic sectional view of a semiconductor single crystal substrate in a third step of the method of the present invention. , (C) is a schematic sectional view of the semiconductor single crystal substrate in the fourth step of the method of the present invention, and (D) is a schematic plan view of the semiconductor single crystal substrate in the fifth step of the method of the present invention.

FIG. 2 is a plan view of a general semiconductor crystal substrate.

FIG. 3 is an explanatory diagram showing a relationship between orientation flats and crystal axis orientations.

FIG. 4A is an explanatory diagram showing a crystal axis orientation in designing an orientation flat, and FIG. 4B is an explanatory diagram of processing accuracy of a conventional orientation flat.

5A is an explanatory view showing a design axial direction of a mask pattern, FIG. 5B is a schematic view when a semiconductor single crystal substrate and a mask pattern are aligned, and FIG. It is explanatory drawing which showed the alignment precision in the case of.

[Explanation of symbols]

 3 Mask Pattern 10 Semiconductor Single Crystal Substrate 11 Insulating Film Mask 12 Opening 13 Alignment Mark

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 29/84 A 9278-4M

Claims (1)

[Claims] 1. A method for aligning a semiconductor crystal substrate in which a processing pattern is aligned with a crystal axis direction of the semiconductor crystal substrate, comprising: a first step of forming an insulating film on the surface of the semiconductor crystal substrate; and a substantially circular shape on the insulating film. A second step of forming an opening of the semiconductor crystal substrate, and a third step of anisotropically etching the semiconductor crystal substrate to form alignment marks on the semiconductor crystal substrate after the second step; A semiconductor comprising: a fourth step of removing the insulating film on the surface of the substrate; and a fifth step of aligning the processing pattern with an alignment mark of the semiconductor crystal substrate formed in the fourth step. Crystal substrate alignment method.