JPH06314190A - Electronic device - Google Patents

Abstract

(57) [Summary] [Purpose] It is possible to modify the firmware built into mass-produced electronic devices by inputting modification information from the outside, and R
Even if the correction information is input, the correction is not performed on the electronic device for which the correction is unnecessary by exchanging the OM. [Structure] ROM 3 stored in EEPROM 13
The correction information of is stored in the correction address register 8 and the correction data register 7. The comparator 9 compares the execution address in the address bus with the modified address, and when they match, switches the switching switch 10 to the modified data register 7 side.
As a result, the correction content stored in the RAM 4 is executed instead of the correction portion of the ROM 3. The correction information input from the EEPROM 13 includes the version code of the electronic device that needs to be corrected, and the electronic device 1 uses the ROM 3
Only when it matches the version code stored in
This process is executed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device such as a dedicated microcontroller, particularly a central processing unit (hereinafter referred to as CPU), and a read only memory (hereinafter referred to as ROM) in which programs and data are fixedly stored.
And a random access memory (hereinafter referred to as RAM) and the like on one chip.

[0002]

2. Description of the Related Art Conventionally, an electronic device such as a camera integrated video tape recorder (hereinafter referred to as a camcorder) is a single-chip electronic device, a so-called microcontroller, which is a single chip as a control means for controlling the whole or a part of the electronic device. Is installed. Such a microcontroller is generally a dedicated microcomputer including a CPU, memories such as ROM and RAM, and peripheral circuits such as input / output ports.

Here, the CPU controls access to a memory or the like as an address controller, or executes a program as a processor. In addition, the ROM stores information such as programs and data for controlling the mounted electronic devices in a fixed form in the form of firmware.
M provides the CPU with a working area and the like when executing a program, and the peripheral circuits are used for communication with the outside.

[0004]

In order to improve the performance and differentiation of electronic equipment in recent years, R of the microcontroller has been improved.
The capacity of the firmware stored in the OM is increasing year by year. With regard to the quality of the firmware, due to the structure of the program and various tests, maximum efforts are made to prevent bugs from occurring after mass production of the microcontroller. If a mass production bug is found, it is necessary to take measures that require the cost, time, and human resources, such as correction by adding an external circuit, mass production of a bug-corrected microcontroller again, and replacement. I was collecting. However, in the case of electronic devices with high packing density of components such as camcorders,
Modification by adding external circuits has become almost impossible.

The present invention has been made in order to solve such a problem, and in a system using a plurality of electronic devices such as a microcontroller, the architecture of the electronic device can cope with mass production bugs in advance. Even if a bug in mass production is discovered, it is possible to avoid the bug by giving correction information only once from outside, and if the correction information is no longer needed by rewriting the ROM of the electronic device. An object of the present invention is to provide an electronic device in which, even if correction information is given, processing using the correction information is not executed.

[0006]

In order to solve the above problems, the present invention provides a fixed storage means for fixedly storing information, and a processing for performing processing based on the information stored in the fixed storage means. Means and an input / output means for inputting / outputting information to / from the outside, in an electronic device integrated, a correction address storage means for storing a correction address of information stored in the fixed storage means and a fixed storage means Correction content storage means for storing the correction content of the stored information, and compares the version code of the electronic device input from the external storage means with the version code of the electronic device stored in the fixed storage means to match them. The modification content stored in the modification content storage means is executed only when the correction content is stored.

In order to store the version code, an area for storing the version code itself is provided in the external storage means. The version code may be added to the error check data, and an area for storing the added data may be provided. By doing so, the storage capacity of the external storage means can be saved. Furthermore, in this case,
If the data in which the complement of the version code is added to the error check data is also stored, the function of preventing malfunction due to an error in the version code is improved.

[0008]

According to the present invention, only when the version code input from the external storage means and the version code stored in the fixed storage means of the electronic device match, the correction content stored in the correction content storage means. Is executed. Therefore, if the version code in the fixed storage means is updated when the content of the fixed storage means is replaced with an electronic device that does not require modification, the correction content is input to this electronic device from the external storage means. However, since the version codes do not match, the correction contents are not executed. When the electronic device is replaced, it is possible to prevent the correction by replacing it with an external storage unit that does not store the correction information, but it takes time and effort to replace the electronic device. In contrast, the present invention only needs to update the version code.

[0009]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an electronic device to which the present invention is applied. First, the configuration of this electronic device will be described. The electronic device 1 includes a CPU 2 and a ROM
3, a RAM 4, a data bus 5, an address bus 6, a modified data register 7, a modified address register 8, a comparator 9, a switch 10, and communication circuits 11 and 16. The communication circuit 11 is connected to the EEPROM 1 via the communication line 12.
3, the communication circuit 16 is connected to the commander 18 by a communication line 17.

The EEPROM 13 is an external storage means for storing the correction address in the ROM 3, that is, the address or start address of the correction portion, the correction content, that is, the content to be patched to the correction portion, the address on the ROM 3 to be restored after the patch, and the like. . Hereinafter, the correction address and the correction content are collectively referred to as correction information. EEPROM 13
The modified address stored in is stored in the 16-bit modified address register 8 via the communication line 12, the communication circuit 11, and the 8-bit data bus 5. Similarly,
The one-word correction data stored in the EEPROM 13 is written in the correction data register 7. Furthermore, EEP
The correction content stored in the ROM 13 is written in the RAM 4. This writing is the IPL stored in ROM3
(Initial Patch Loader).

The 16-bit comparator 9 monitors the execution address of the address bus 6 and outputs a coincidence signal E when it coincides with the corrected address. The comparator 9 may be configured by hardware or software.
The switch 10 selects whether to output the data from the ROM 3 or the correction data from the correction data register 7 to the data bus 5, and only when the comparator 9 outputs the coincidence signal E, the correction data register 7 is selected. Select the correction data from.

The commander 18 is an operating means for writing and rewriting correction information, and is provided with various operation keys and a display. When a command for writing or rewriting correction information is input from the commander 18, the communication line 1
7, is input to the CPU 2 via the communication circuit 16 and the 8-bit data bus 5. Upon receiving this command, the CPU 2 prohibits writing the correction address stored in the EEPROM 13 into the correction address register 8 and writing the correction data into the correction data register 7. The reason for performing this processing is as follows.

That is, if the correction information stored in the EEPROM 13 has an error, there is a possibility that the program will run out after the patch processing and the address control will not return to the ROM 3. In this case, EEPROM1
Although it is possible to perform correct processing by rewriting the correction information stored in No. 3, the correction information is written and rewritten using the IPL stored in the ROM 3, so When the program goes out of control as described above, the control cannot be transferred to this IPL, and the correction information cannot be rewritten. On the other hand, if the above process is performed, the patch process cannot be performed, and thus control by the IPL becomes possible.

FIG. 2 is a flowchart showing the operation of the electronic device to which the present invention is applied. The operation of the electronic device will be described below with reference to FIGS. 1 and 2. First, at the time of initialization after the power is turned on, it waits until the state between the commander 18, the communication line 17 and the communication circuit 16 becomes stable by the IPL stored in the ROM 3 (S1 in FIG. 2). In this process, the time may be measured by a timer, or a signal may be transmitted and received between the commander 18 and the communication circuit 16 to detect the stable state.

Next, it is determined whether the communication line 17 is in a predetermined state (S2). Here, the predetermined state of the communication means includes, for example, a state in which a command for writing or rewriting correction information is not input from the commander 18, a state in which the commander 18 is not connected to the electronic device 1, and the like. If the communication means is not in the predetermined state, the IPL processing is terminated (S6). Then, for example, if a command for writing or rewriting correction information is input from the commander 18, RO
The processing shifts to the patch data changing program in M3.
Further, when the commander 18 is not connected to the electronic device 1, control is transferred to a program or the like for controlling a control target (a servo system of a camcorder, etc.) of an electronic device that incorporates the electronic device 1.

When the communication means is in a predetermined state, the IPL
The correction address of the correction information stored in the EEPROM 13 is latched in the correction address register 8 (S
3) The corrected data is latched in the corrected data register 7 (S4). Further, the correction content is read into the RAM 4 (S
5). This completes the processing by the IPL. Next, the comparator 9 compares the execution address output to the address bus 6 with the correction address stored in the correction address register 8 (S7). When the execution address and the correction address do not match, the switch 10 is switched to the ROM 3 side (S14), and the data stored in the ROM 3 is the data stored in the ROM 3 as a result of the CPU 2 accessing the ROM 3.
Is output to (S15).

On the other hand, when the execution address and the modified address match, the switch 10 is switched to the modified data register 7 side (S8), and the modified data latched in the modified data register 7 is output to the data bus 5 ( S
9). Here, the correction data is a 1-byte table call instruction that refers to the table on the ROM 3. By referring to this table, the correction program start processing program stored in a predetermined address on the ROM 3 is executed, and R
The address of the correction program on AM4 is calculated (S10). Then, the correction program on the RAM 4 is executed (S11). Since the return from the table call is performed by the jump instruction, an instruction for discarding the return address saved in the stack or the like is placed at the end of the correction content and is executed (S12). Finally, the jump instruction written in the correction program is executed to return to the address where the correction portion of the ROM 3 is skipped (S13). The address comparison by the comparator 9 is continuously performed in preparation for access to the modified portion again (S7).

If the ROM 3 has a plurality of modified portions, step S11 in the above-mentioned flow chart.
Then, the correction address register 8 and the correction data register 7 may be updated to the next correction address and the next correction data, respectively. Further, a plurality of comparators 9, correction address registers 8 and correction data registers 7 may be provided so as to correspond to a plurality of correction points.

Further, in FIG. 1, an invalid address may be latched in the correction address register 8 by operating an external switch or the like. Further, a gate circuit or a switching circuit for controlling the on / off control of the outputs of the comparator 9 and the correction data register 7 may be provided so that the on / off control can be performed from the outside. With this configuration, the processes of S1, S2 and S6 of FIG. 2 are unnecessary.

Further, in FIG. 1, an EEPROM 13 is provided inside the electronic device 1 and an EEPROM writer is connected to the communication line 12 to write the correction information into the EEPROM 13 so that the correction information is rewritten inside the electronic device 1. You may make it resident in a possible state. Further, in FIG. 1, the correction information stored in the EEPROM 13 is written in the RAM 4 before step S1, and the correction address written in the RAM 4 is latched in the correction address register 8 when the communication means is in a predetermined state in step S2. However, the correction data may be latched in the correction data register 7.

FIG. 3 is a block diagram for explaining the operation of the electronic device according to the embodiment of the present invention. Here, the parts corresponding to those in FIG. 1 are designated by the corresponding numbers, and the description thereof will be omitted. The electronic device A is obtained by adding a communication circuit 15 for communicating with the electronic devices B and C to the electronic device 1 shown in FIG. In addition, the patch control register 14A is shown in FIG.
The modified address register 8 and the modified data register 7 of FIG. Comparator 9 and switch 1 in FIG.
0 is omitted.

The electronic device B is obtained by removing the communication circuits 11 and 16 from the electronic device 1 shown in FIG. 1 and adding a communication circuit 21B for communicating with the electronic device A. The patch control register 14B is also a combination of the correction address register 8 and the correction data register 7 of FIG. The electronic device C and the like have the same configuration as the electronic device B.

Communication line 2 for electronic devices A and electronic devices B, C, etc.
They are connected by 2B, 22C, etc., and are configured to perform bidirectional communication. Also, each electronic device has its own R
The OM stores each electronic device code and version code. FIG. 4 shows the EEPROM 13 and RO of FIG.
It is explanatory drawing of the data stored in M3A, 3B.
FIG. 3A shows the data stored in the EEPROM 13, and one data block is formed for each electronic device to be patched. Each data block is composed of the number of data of the data block, the code of the electronic device to be patched, the version code of the electronic device, the patch data and the error check data.
Here, the version code is a code that is updated each time the program on the ROM of the electronic device is updated.
In FIG. 3A, the EEPROM 13 stores the code (01) of the first version. Further, as the error check data, for example, the lower 1 byte and the upper 1 byte of the sum total from the total number of data in the data block to the patch data are arranged at the end of the data block.

3B and 3C respectively show the ROM 3
R is the electronic device code stored in A and 3B.
OM3A has electronic device code 0A and version code 0
1 indicates that the electronic device code 0B and the version code 02 are stored in the ROM 3B. The electronic device B is the second version in which the contents of the ROM 3B are once updated.

FIG. 5 is a flowchart of the IPL of the electronic device A of FIG. 4, and FIG. 6 is a flowchart of the IPL of the electronic device B of FIG. The operation of the IPL of the system shown in FIG. 3 will be described below with reference to FIGS. First, the electronic device A includes the communication line 12 and the communication circuit 1.
The total data number of the data block is read from the EEPROM 13 via 1 (S21). Next, the data of one data block from the target electronic device code to the error check data is read based on the total number of read data (S22).
These data are stored in the buffer area of the RAM 4.

Next, it is judged whether or not the target electronic device code read in S22 is the code of the own device, that is, the electronic device A stored in the ROM 3A (S23). If the code of the own device is present, the next data block is detected. The total data number of is read (S21). On the other hand, if it is not the code of the own device, that is, the code of the electronic devices B, C, etc., the data of one data block stored in the buffer area of the RAM 4A is transferred to the electronic devices B, C, etc. via the communication circuit 15 and the communication line 22. To the communication circuits 21B, 21C and so on (S24).

Next, it is judged whether the data of all the data blocks have been read from the EEPROM 13 (S2).
5). This process is performed, for example, by inserting a specific code at the end of the last data block and detecting it. If you do not read the data of all data blocks,
The total number of data in the next data block is read (S21).
If all the data blocks have been read, it is determined whether patch modification is permitted (S2).
6). This determination corresponds to step S2 in FIG.
If the patch correction is not permitted, the electronic device B, C or the like is notified that the patch correction is prohibited (S30), and the process is ended. On the other hand, if the patch correction is permitted, after notifying the electronic devices B and C that the patch correction is permitted (S27),
The version code stored in the buffer area of the RAM 4A is compared with the version code stored in the ROM 3A to determine whether they match (S28).

If they match, the patch data of its own device read in the buffer area of RAM4A is stored in RAM4.
At the same time as moving to the patch data storage area A, the correction address and the correction data are latched in the patch control register 14A and the processing is ended (S29). If they do not match, the process ends. Here, since all match with 01, the process of S29 is performed.

Next, the operation of the electronic device that receives data from the electronic device A will be described by taking the electronic device B as an example. First,
The data received from the electronic device A via the communication line 22 and the communication circuit 21B is read into the buffer area of the RAM 4B (S31). Next, it is determined whether or not the number of data read in the buffer area is equal to the total number of data at the beginning of the data block (S32). If they are equal, the error check code is then checked to determine whether or not there is an error. (S3
3) If there is no error, it is determined whether or not the patch correction permission is notified from the electronic device A. If it is permitted, the version code stored in the buffer area of the RAM 4B and the version code stored in the ROM 3B are determined next. To determine if they match. If they match, the patch data of the device itself read in the buffer area of the RAM 4B is moved to the patch data storage area of the RAM 4B, the correction address and the correction data are latched in the patch control register 14B, and the processing is completed. Yes (S3
6). On the other hand, if the number of received data does not match the total number of data, there is an error, patch modification is prohibited, or the version codes do not match, the process ends.

Here, the received version code is 0
1, the version code stored in the ROM 4B is 02, and the version code does not match, the process of S36 is not performed. This means that the ROM 4B stores a new program from which bugs have been removed, and thus patch processing is unnecessary. FIG. 7 shows the EEPROM 13 of FIG.
FIG. 6 is an explanatory diagram of another example of data stored in the.

In this example, the 1-byte version code is not allocated in the data block, but the data obtained by adding the error check code and the version code to the 2 bytes at the end of the data block is allocated. More specifically, as error check data, for example, the total sum of the total number of data to patch data is calculated, the version code (01) is simply added to the lower 1 byte, and the complement of the version code is added to the upper 1 byte. (FE) is added. In this way, the capacity of the EEPROM can be saved.

The method of error checking and determining the version code match is as follows. First, the lower 1 byte of “total data number” + “target electronic device code” + “patch data” calculated from the received data is compared with “error check data + (01)” − “01”,
Further, the upper 1 byte of the calculated value is compared with "error check data + (FE)"-FE. Then, only when they match each other, the version code is set to 01 assuming that there is no error in the data. As a result, it is possible to reduce the possibility that the patch will be erroneously corrected as compared with the case where only the version code 01 is used.

The present invention is not limited to the above-mentioned embodiments, but various modifications can be made within the scope of the present invention, and they are not excluded from the scope of the present invention. For example, in FIG. 6, the process of determining whether the version codes match may be arranged at any position between S31 and S34. However, when the version code is added to the error check data, it is performed within the process of S33. Further, the electronic device A may check the data of its own device for an error.

[0034]

As described above in detail, according to the present invention, when a bug is found in the fixed storage means of the electronic device, it is possible to avoid the bug simply by inputting the correction information from the external storage means. Becomes Also, when the contents of the fixed storage means are replaced with new electronic devices that do not require modification, if the version code in the fixed storage means is updated, the correction contents will be erroneously applied to electronic devices that do not require modification. It can be prevented from executing. In this case, since it is not necessary to replace the external storage means, it is possible to expect reduction in man-hours and mistakes when the repair department replaces the electronic device when the electronic device fails.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an electronic device to which the present invention is applied.

FIG. 2 is a flowchart showing an operation of an electronic device to which the present invention is applied.

FIG. 3 is a block diagram illustrating an operation of an electronic device according to an exemplary embodiment of the present invention.

FIG. 4 is an EEPROM 13 and ROMs 3A and 3B shown in FIG.
3 is an explanatory diagram of data stored in FIG.

5 is a flowchart of an IPL of the electronic device A of FIG.

6 is a flowchart of an IPL of the electronic device B of FIG.

7 is an explanatory diagram of another example of data stored in the EEPROM 13 of FIG.

[Explanation of symbols]

1 ... Electronic device, 2 ... CPU, 3 ... ROM, 4 ... RAM,
7 ... correction data storage means, 8 ... correction address storage means,
9 ... Comparator

Claims (4)

[Claims] 1. Fixed storage means for fixedly storing information, processing means for performing processing based on the information stored in the fixed storage means, and input / output means for inputting / outputting information to / from the outside. In an integrated electronic device, a correction address storage unit that stores a correction address of the information stored in the fixed storage unit, and a correction content storage unit that stores the correction content of the information stored in the fixed storage unit Provided, the version code of the electronic device input from the external storage means and the version code of the electronic device stored in the fixed storage means are compared and stored in the correction content storage means only when they match. An electronic device characterized by executing a modification. 2. The electronic device according to claim 1, wherein an area for storing a version code is provided in the external storage means. 3. The electronic device according to claim 1, wherein the external storage means is provided with a region for storing data obtained by adding a version code to the error check data. 4. The electronic device according to claim 3, wherein the data obtained by adding the version code to the error check data and the data obtained by adding the complement of the version code to the error check data are stored.