JPH05328250A - Synchronization detection circuit - Google Patents

Abstract

PURPOSE:To provide the synchronization detection circuit suitable for a television receiver or a VTR or the like, in which phase synchronization detection is realized without any adjustment especially. CONSTITUTION:An oscillation signal of a reference wave oscillator comprising a piezoelectric resonator 12 and an oscillation circuit (OSC) 13 is inputted to a +45 deg. phase shifter 3 via a voltage controlled phase shifter circuit (PS) 15. A phase detector (APC) 4 applies phase detection to an output of the +45 deg. phase shifter 3 and an intermediate frequency input 5 and an output of the APC 4 (phase error detection voltage) is inputted to a comparator 16 via an LPF 6 and an output of the comparator 16 is inputted to an integration type adder 14. The output voltage of the integration adder 14 is fed to a phase shift control terminal of the phase shift circuit 15. Thus, a PLL is formed, the phase of the oscillated signal is adjusted and the oscillated signal is used for a reference wave for the video synchronization detector (P-Det) 8 via a -45 deg. phase shifter to realize synchronization detection with no adjustment.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous detection circuit suitable for a television receiver, a VTR and the like. The present invention particularly aims to provide a synchronous detection circuit that can realize phase-coherent detection without adjustment.

[0002]

2. Description of the Related Art In recent television receivers,
The synchronous detection circuit often detects the video signal and the audio intermediate frequency (SIF) signal from the intermediate frequency input. The mainstream of the synchronous detection circuit is that which obtains a reference wave required for detection by a Phase Locked Loop (PLL). This situation will be described with reference to FIG. 4 showing a conventional synchronous detection circuit.

A reference oscillation signal 2 oscillating in a VCO (voltage controlled variable frequency oscillator) 1 is + 45 ° phase shifter 3
Is input to the phase detector 4 (hereinafter, APC 4) through. On the other hand, the intermediate frequency input 5 obtained by the tuner of the receiver and passed through necessary steps (not shown here) such as a buffer amplifier and a video filter is also input to the APC 4. AP
At C4, the phases of the two input signals are compared, and an effective voltage corresponding to the phase error between the two signals is output. An example thereof is shown in FIG. In this example, the phase difference between the two signals is 90 °
The output effective voltage becomes higher than Va when the phase of the incident wave advances with respect to the reference wave, and the output effective voltage becomes V when the phase of the incident wave is delayed.
It is lower than a.

On the other hand, the VCO 1 is a voltage controlled variable frequency oscillator which changes the oscillation frequency according to the control voltage, and an example of this characteristic is shown in FIG. In this example, when the control voltage is high, the output frequency is low, and when the control voltage is low, the output frequency is high. In the configuration shown in FIG. 4, the phase error voltage (effective voltage) output of the APC 4 is passed through the low pass filter (hereinafter, LPF) 6 to the VCO 1
To control voltage.

When the output voltage of the APC 4 is the midpoint voltage (Va), the intermediate frequency input 5 and the output 2 of the VCO 1
And VCO1 have a phase difference of 90 °.
If the oscillation frequency of the VCO 1 is adjusted by the resonance circuit 11 of 1, the blocks 1, 3, 4, 6 form a PLL.

In the PLL operation, when the phase of the reference wave, which is the output of the VCO 1 phase-shifted by + 45 ° with respect to the intermediate frequency signal 5, advances, the APC 4 generates a voltage higher than the midpoint voltage, which is Since it becomes the control voltage of the VCO 1 via the LPF 6, the oscillation frequency of the VCO 1 becomes low, and as a result, the phase of the reference wave is delayed and follows the intermediate frequency signal 5. Even when the phase is delayed, the control voltage is high and low, and the phase advance / retard is the same. The PLL locks and the VCO 1 continues to oscillate in the frequency range that the loop follows.

The output 2 of the VCO 1 thus obtained
Is further shifted by -45 ° by the -45 ° phase shifter 7 to form the reference wave 17 of the synchronous detector, and is supplied to the video synchronous detector (P-Det) 8. In the video synchronous detector 8, the phase detection of the input intermediate frequency signal 5 and the reference wave 17 is performed, and the detection output 10 (the video signal and the audio intermediate frequency (SIF) signal) is obtained via the LPF 9.

The generation of the reference wave in the conventional synchronous detection is as follows.
With the PLL, the APC 4 detects a phase shift as a voltage, and the VCO 1 changes the frequency with the detected voltage (phase difference information) as a control voltage. The loop operates to minimize the phase error as a result of changing its frequency.

Here, in order to perform an accurate loop operation, the oscillation frequency of the VCO 1 is accurately adjusted in the state where there is no phase difference information (that is, the state where the APC 4 is outputting the midpoint voltage). It means that you must keep it. As the adjusting means, an accurate intermediate frequency signal carrier is supplied as an intermediate frequency input 5, and at this time, AP
Generally, the resonance circuit 11 is adjusted so that the output voltage of C4 becomes the midpoint voltage of APC4, and the oscillation frequency of the VCO 1 is set. As described above, the conventional synchronous detection circuit inevitably requires a troublesome adjustment process of adjusting the oscillation of the VCO 1. This adjustment process has led to an increase in the manufacturing cost of the synchronous detection circuit.

In order to realize no adjustment of VCO1, P
The oscillation part of LL is changed to a Colpitts oscillator using a piezoelectric resonator as shown in FIG. 7, the capacitor C is used as a variable capacitance diode, and a control voltage from the APC 4 is applied to P.
A circuit configuration for configuring the LL is also conceivable. However, in this method, since the Q of the piezoelectric resonator is high, the oscillation frequency changes only by ± 100 ppm (percent per million) even if the external capacitance is changed, and it does not operate as a loop. there were.

[0011]

What is the problem to be solved by the present invention is to provide a synchronous detection circuit capable of performing phase-coherent detection having the same performance as in the prior art without requiring a troublesome adjustment work. The point is to take measures.

[0012]

In order to solve the above problems, the present invention provides a synchronous detection circuit for synchronously detecting a video signal and an audio intermediate frequency signal from an intermediate frequency input of a television signal. A reference wave oscillator including a piezoelectric resonator and an oscillating circuit, which outputs an oscillating signal for obtaining a reference wave serving as a multiplication signal of the An output of the voltage controlled phase shifter, a phase detector for phase detecting the intermediate frequency input, a low pass filter for smoothing the output of the phase detector, and the low pass type A comparator for comparing the output of the filter with a predetermined voltage and an integrating-type adder for integrating the output of the comparator are provided, and the voltage-controlled phase shifter is the output of the integrating-type adder. Control the amount of phase shift of The output of the voltage controlled phase phase shifter and the reference wave, there is provided a synchronous detection circuit, characterized in that the synchronous detection of the intermediate frequency input.

[0013]

The present invention does not change the oscillation frequency of the reference wave oscillator by the phase error detection voltage detected by the phase detector, but detects the phase of the oscillation signal obtained by the reference wave oscillator. A PLL is configured by changing a phase shifter (other than an oscillator) controlled by a voltage, and a reference wave for synchronous detection is obtained.

FIG. 1 shows a block diagram of an embodiment of the present invention. The same parts as those in the conventional example are designated by the same reference numerals.
In this embodiment, similarly to the conventional example shown in FIG. 4, the reference wave 17 and the intermediate frequency input 5 are synchronously detected by the video synchronous detector (P-Det) 8, the carrier frequency component is removed by the LPF 9, and the detection output 10 is obtained. Is getting The difference from the conventional example lies in the method of generating the reference wave. Hereinafter, referring to FIG.
An embodiment of the present invention will be described.

A reference wave oscillator for obtaining an oscillation signal which is a basis of a reference wave is a piezoelectric resonator 1 such as a crystal oscillator.
2 and oscillator circuit 13. The oscillation signal from the oscillation circuit 13 is supplied to the + 45 ° phase shifter 3 (fixed phase shifter) and the −45 ° phase shifter 7 via the voltage control phase shift circuit (PS) 15.
(Fixed phase shifter).

Next, the output of the + 45 ° phase shifter 3 and the intermediate frequency input 5 are phase-detected by the phase detector (APC) 4, and the output (phase error detection voltage) of the APC 4 is compared via the LPF 6. The output of the comparator 16 is input to the integrating-type adder 14. The output voltage of the integrating adder 14 is applied to the phase shift amount control terminal of the phase shift circuit 15.
Thus, the PLL is constructed.

On the other hand, the output of the -45 ° phase shifter 7 is supplied to the video synchronous detector 8 as a reference wave, the video synchronous detector 8 synchronously detects the intermediate frequency input 5, and the output of the video synchronous detector 8 is The carrier frequency component is removed by the LPF 9 to obtain the detection output 10.

Next, the operation of each circuit block will be described. As described above, the reference wave oscillator includes the piezoelectric resonator 12 that serves as a reference and the oscillation circuit 13 around the reference piezoelectric resonator 12, and is used in commonly known Colpitts oscillators (see FIG. 7) and Hartley oscillators. Such a configuration is acceptable. The piezoelectric resonator 12 generally has a high Q. For example, in a vacuum-sealed crystal unit, the Q is about 10 ^6. Therefore, the oscillation signal obtained from the oscillation circuit 13 does not change in frequency. , Becomes a stable oscillation signal.

The phase shifter (PS) 15 is a voltage-controlled phase shifter capable of changing the input phase by an applied voltage, and may be a phase advance type or a phase delay type. Here, a simple delay type phase shifter is shown in FIG. FIG. 3A is a basic configuration diagram of a delay type phase shifter. In such a circuit configuration, the delay amount is less than 90 °, so a phase shift amount of up to 180 ° is secured. In order to do so, it is necessary to connect at least three stages in the configuration of FIG. FIG. 3B is an example of the phase shifter based on FIG. D1 to D3 are variable capacitance diodes, and when a control voltage is applied to the phase shift amount control terminal A, their respective capacitances change and the phase of the input signal is delayed within a maximum range of 270 °. .. Since the phase shift circuit as shown in FIG. 3 (a) exhibits an attenuation characteristic (-3 dB at -45 °), an automatic gain adjustment amplifier (AGC amplifier) for attenuation compensation is placed after the phase shift part. To be done. With such a configuration, it is possible to realize a phase shifter in which the amplitude is constant and only the phase is changed by the control voltage. If this function is satisfied, the phase shifter 15 of this embodiment
Does not have to have the configuration of FIG.

The comparator 16 has a built-in reference voltage generator,
A voltage that is the difference between the input voltage Vin and the reference voltage Vr is output, and the output Vout is configured so that Vout = Vin−Vr. It is well known that such a circuit can be configured by an operational amplifier or the like.

The integrating-type adder 14 performs an operation of integrating the voltage applied to the input terminal on the time axis. When the applied voltage is positive, the output voltage is increased, and when it is negative, the integrating voltage is increased. The configuration is such that the output voltage is lowered. For example, as shown in FIG. 2, it may have a simple circuit configuration in which a capacitor is charged or discharged depending on whether the applied voltage is positive or negative, or may be configured by an operational amplifier or the like.

Next, the circuit operation of the embodiment will be described. First, the reference wave oscillator including the piezoelectric resonator 12 and the oscillation circuit 13 oscillates at an intermediate frequency, and the oscillation signal is passed through the phase shifter 15 and the + 45 ° phase shifter 3 shifts the + 45 ° phase. , And the phase detection is performed by the intermediate frequency input 5 and the APC 4. Next, the output (phase error detection voltage) of the APC 4 is smoothed by the LPF 6 and input to the comparator 16.

The reference voltage Vr in the comparator 16 is set to APC4
When set to the midpoint voltage, it is +45 more than the intermediate frequency input 5.
° When the phase of the output of the phase shifter 3 is advanced, the LPF6
Since the output voltage of the APC 4 smoothed by is larger than the midpoint voltage, the output of the comparator 16 becomes positive. In the integrating adder 14, the voltage of the output increases while the output of the comparator 16 is positive. Since the output is input to the phase shift amount control terminal of the phase shifter 15, the phase shift amount of the phase shifter 15 (phase delay amount in this example) increases.

The phase of the output of the + 45 ° phase shifter 3 is gradually delayed, and when the output thereof has a 90 ° phase relationship with the intermediate frequency input 5, the output of the comparator 16 becomes zero. Therefore, the output voltage of the integrating adder 14 stops increasing, and as a result, a phase locked loop (PLL) is formed. In this case, the reference voltage Vr of the comparator 16 is APC
Since the loop operates near the midpoint voltage of 4, it is not necessary to set a strict reference voltage.

As a result, the output of the phase shifter 15 is + 45 °.
The signal phase-shifted by + 45 ° by the phase shifter 3 is the intermediate frequency output 5 and 9
The relationship of 0 ° is maintained. Therefore, the phase of the reference wave 17 obtained through the −45 ° phase shifter 7 from the output of the phase shifter 15 matches the intermediate frequency output 5. Therefore, by inputting the reference wave 17 and the intermediate frequency output 5 to the video synchronous detector 8 to perform synchronous detection, the detection output 10 is obtained, and the synchronous detection circuit having the same performance as the conventional one without adjusting the oscillation unit. Can be realized.

[0026]

As described above, the synchronous detection circuit of the present invention is
Since a piezoelectric resonator with high oscillation accuracy is used for the reference wave oscillator for generating the reference wave, there is no need to control the oscillation frequency, and even if a piezoelectric resonator with high oscillation accuracy is used,
Since the PLL can be locked, the phase of the oscillation signal can be automatically controlled by the PLL. Therefore, the synchronous detection circuit can realize the synchronous detection having the same performance as the conventional one without adjusting the oscillating section, and can simplify the manufacturing process and reduce the cost.

[Brief description of drawings]

FIG. 1 is a diagram showing a block configuration of an embodiment.

FIG. 2 is a diagram showing a configuration example of an integrating type adder.

FIG. 3 is a diagram showing a configuration example of a lag type phase shifter.

FIG. 4 is a diagram showing a conventional synchronous detection circuit.

FIG. 5 is a diagram showing an example of input / output characteristics of a phase detector (APC).

FIG. 6 is a diagram showing an example of input / output characteristics of a VCO.

FIG. 7 is a diagram showing a specific example of a Colpitts oscillator.

[Explanation of symbols]

 3 + 45 ° phase shifter 4 phase detector (APC) 5 intermediate frequency input 6, 9 LPF 7 -45 ° phase shifter 8 video synchronous detector (P-Det) 10 detection output 12 piezoelectric resonator 13 oscillator circuit ( OSC) 14 integrating type adder 15 voltage controlled phase shifter (PS) 16 comparator 17 reference wave for synchronous detection

Claims (1)

[Claims] 1. A synchronous detection circuit for synchronously detecting a video signal and an audio intermediate frequency signal from an intermediate frequency input of a television signal, and outputting an oscillation signal for obtaining a reference wave which is a multiplication signal of the synchronous detection. A reference wave oscillator including a piezoelectric resonator and an oscillation circuit, a voltage control phase shifter for shifting the phase of the output of the oscillation circuit, an output of the voltage control phase shifter, and the intermediate frequency input And a phase detector for phase detecting, a low-pass filter that smoothes the output of the phase detector, an output of the low-pass filter, a comparator for comparing with a predetermined voltage, the An integrating-type adder for integrating the output of the comparator is provided, and the output of the integrating-type adder controls the phase shift amount of the voltage-controlled phase shifter to obtain the voltage-controlled phase shifter. Use the output as the reference wave and input the intermediate frequency A synchronous detection circuit characterized by synchronously detecting force.