JPH043908A - Manufacture of semiconductor substrate - Google Patents

Abstract

PURPOSE:To reduce a warpage or to control a warpage quantity freely by providing, at least, either of first and second semiconductor substrates with a warpage and bonding them, which its concave plane is grinded so as to form a semiconductor layer having a reduced thickness on an insulating film. CONSTITUTION:A first semiconductor substrate 1 is a flat 6-inch Si water, on the front and the rear of which thermally oxidized films 1a and 1b of 0.5mum thick are formed. Meanwhile, a second semiconductor substrate 2 is a 6-inch Si wafer whose surface is a recessed plane of about 40mum of warpage quantity. The rear of the first semiconductor substrate 1 is bonded with the front of the second semiconductor substrate 2 and these are annealed at 1000-1250 deg.C so as to complete the bonding. The first semiconductor substrate 1 is grinded and polished from its surface in order to form a semiconductor layer 3 having a thickness of 0.1-10mum less. Thus, a bonded SOI substrate without a warpage can be obtained, which uses the second semiconductor substrate 2 as a supporting substrate, and the semiconductor layer 3 of reduced thickness as an element substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a method of manufacturing a semiconductor substrate, and particularly to a method of manufacturing a SOR substrate.

The purpose is to provide an SOI substrate with small warpage or a controlled amount of warpage.

At least one of the first semiconductor substrate having an insulating film uniformly formed on one main surface and the second semiconductor substrate has a warp, and the one main surface of the first semiconductor substrate bonding one principal surface of the second semiconductor substrate to each other to form a warped bonded substrate, and grinding the concavely warped surface of the bonded substrate to form a thickness on the insulating film. forming a semiconductor layer with reduced warpage and reducing warpage of the bonded substrate.

In addition, ions are implanted into a warped semiconductor substrate from its concave surface at such high acceleration as to leave a crystal layer on the surface, and then annealing is performed.

A method for manufacturing a semiconductor substrate is used to obtain an SOI substrate in which an insulating film buried inside is formed, a supporting substrate is provided below the insulating film, and an element substrate is provided above the insulating film.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor substrate, and particularly to a method for manufacturing an SOI substrate.

Semiconductor devices using SOI substrates can be completely isolated by using trench element isolation, etc., and have many advantages such as improved radiation resistance, elimination of the launch-up phenomenon, and increased speed. However, as a drawback, S
Since the OI substrate has a thick insulating layer 2, for example, an insulating layer of SiOz, the Si layer was subjected to mechanical stress and was warped. Wafer warping not only hinders the drawing of fine patterns, but also causes crystal defects due to stress and the segregation of unnecessary impurities in areas where stress is concentrated, deteriorating device characteristics.

Therefore, it is desired to develop a method for manufacturing an SOI substrate with small warpage.

[Conventional technology]

FIGS. 11(a) to 11(c) are diagrams for explaining conventional problems in bonded SOI substrates, in which 1 is a first semiconductor substrate, la and lb are insulating films, and 2 is a second semiconductor. The substrate, 3, represents a semiconductor layer of reduced thickness.

The first semiconductor substrate 1° and the second semiconductor substrate 2 on which the insulating films 1a and 1b are formed are not warped before being bonded together, but after being bonded together, the surface of the first semiconductor substrate 1 is ground and
Semiconductor layer 3 whose thickness has been reduced by polishing and removing the insulating layer 1a
When the semiconductor layer 3 is formed, the semiconductor layer 3 whose thickness is reduced is warped so as to have a convex surface. The final warpage of the wafer is determined by the process of forming the device, so the initial warp of the wafer λ- is not simply small enough; it must be determined according to the process, but it is In the case of a bonded SOI substrate, the warpage is regulated by the insulating film, and one warp cannot be freely controlled.

In this regard, in the case of a single Si substrate, warpage has conventionally been able to be freely controlled through the slicing process, grinding process, etc.

[Problem to be solved by the invention]

An object of the present invention is to study the causes of warpage in conventional bonded SOI substrates and to provide a method for manufacturing an SOI substrate with small warpage or a method for manufacturing an SOI substrate in which the amount of warpage can be freely controlled.

[Means to solve the problem]

The warpage in the conventional bonded SOI substrate shown in FIG. 11 can be explained as being caused by the fact that the thermal expansion coefficient of SiO is larger than that of 5 in 2 .

Therefore, before bonding the first semiconductor substrate and the second semiconductor substrate together, at least one of them is warped,
To obtain an SOI substrate with small warpage or a bonded SOI substrate with a controlled amount of warpage by absorbing the warpage that occurs in conventional bonded SOI substrates.

Thus, the above problem is solved because at least one of the first semiconductor substrate 1 having an insulating film uniformly formed on one main surface and the second semiconductor substrate 2 has a warp, and the first semiconductor substrate 1 has a warp. A step of bonding the one principal surface of the substrate 1 and a permanent surface of the second semiconductor substrate 2 to each other to form a warped bonded substrate, and grinding the concavely warped surface of the bonded substrate.

The problem is solved by a method for manufacturing a semiconductor substrate, which includes the steps of forming a semiconductor layer 3 with a reduced thickness on the insulating film and eliminating warpage of the laminated substrate.

Further, ions are implanted into the warped semiconductor substrate 4 from its concave surface at such high acceleration as to leave a crystal layer on the surface, and then annealing is performed.

An insulating film 6 buried inside is formed, and a support substrate 8 is placed under the insulating film 6. SO with the element substrate 7 on the insulating film 6
The problem is solved by a semiconductor substrate manufacturing method that obtains an I-substrate.

[Operation] FIGS. 9(a) to 9(c) are diagrams for explaining the present invention in detail. Before bonding the first semiconductor substrate 1 and the second semiconductor substrate 2, which have insulating films 1a and lb formed on the front and back surfaces, for example, the second semiconductor substrate 2 is warped so that the bonded surface is concave. (See Figure 9(a)).

In the bonded state, the surface of the first semiconductor substrate 1 is warped with a concave surface (see FIG. 9(v)).
.

The surface of the first semiconductor substrate 1 is ground and removed.

When the semiconductor layer N3 with a reduced thickness is formed, a stress is generated that makes the surface of the semiconductor layer 3 with a reduced thickness convex, which cancels out the warpage that occurs in the bonded state, making it possible to obtain a bonded SOI substrate with small warpage. (See Figure 9(c)).

FIG. 10 is a diagram showing the relationship between the amount of warpage before bonding and the amount of warpage after grinding and polishing.

The horizontal axis is the amount of warpage of the support substrate before lamination.

Plus (convex) means that the surface to be pasted is convex.

Minus (concave) indicates that the surface to be bonded is concave. The supporting substrate is a 6-inch Si with a thickness of 500 to 600 μm.
The amount of warpage in a wafer is expressed as the distance from the center of the wafer to a plane including the periphery. On the vertical axis, 6-inch Si wafers with oxide films formed on the front and back sides are pasted together, then annealed to ensure complete adhesion, and the oxide film and Si on the two surfaces are ground.
It represents the amount of warpage when a thin Si layer with a thickness of 10 μm or less is left after polishing.
．． The case of 5 μm is shown.

From this figure, when the thickness of the oxide film is 0.5 μm.

When the amount of warpage of the supporting substrate is 140 μm, the amount of warping after grinding and polishing becomes almost zero, and when the thickness of the oxide film is 1 μm, when the amount of warping of the supporting substrate is 170 μm, the amount of warping after grinding and polishing becomes almost zero. It can be seen that the amount of warpage is almost zero.

This kind of warpage occurs in the bonded SO■ board.

This can be explained as being due to the difference in thermal expansion coefficient between Si and SiO□O. In the present invention, on the contrary, this property is utilized to control the warpage of the bonded SOI substrate to be small or to a predetermined value.

That is, immediately after bonding the first semiconductor substrate 1 and the second semiconductor substrate 2 together, the surface of the first semiconductor substrate, which will become an element substrate in the future, is made concave, and the surface is ground to reduce the thickness. A semiconductor layer 3 is formed.

Let's consider the stress after the supporting substrate and the semiconductor layer 3 of reduced thickness are formed with an insulating film in between.

Since the reduced thickness of the semiconductor layer 3 is extremely thin compared to the thickness of the support substrate, the difference in thermal expansion coefficient between the insulating film and the support substrate is mainly effective against stress. This difference in thermal expansion coefficient acts to make the semiconductor layer 3 side with reduced thickness a convex surface.

Therefore, the first semiconductor substrate 1. By making at least one of the second semiconductor substrates 2 warp so that the element substrate side has a concave surface in the bonded state, it is possible to finally obtain an SOI substrate with small warpage.

Moreover, what is the final amount of warpage of the bonded SOI substrate?

Thickness of insulating film, 1st. It can be adjusted as required by changing the thickness of the second semiconductor substrate and the amount of warpage before bonding.

In addition, when ions are implanted into a warped semiconductor substrate 4 from its concave surface at high acceleration to form an insulating film at a rate high enough to leave a crystal layer on the surface, annealing is performed to form an insulating film 6 buried inside. Since the difference in thermal expansion coefficient between the insulating film 6 and the semiconductor substrate 4 acts in the direction of relaxing the curvature of the concave surface and making it a convex surface, it is possible to reduce the curvature and adjust the amount of curvature. Since the element substrate 7 portion is overwhelmingly thinner than the support substrate 8 portion, its contribution to the warping of the element substrate can be ignored.

〔Example〕

FIGS. 1 to 8 are cross-sectional views for explaining Examples I to II, and the following description will be made with reference to these figures.

Example I The first semiconductor substrate process was performed using a flat 6-inch Si wafer.
Thermal oxide film 1a + lb with a thickness of 0.5 μm on the front and back surfaces
is formed. The second semiconductor substrate 2 has a thickness of 500~
This is a 6-inch Si wafer whose 600 μm surface is a concave surface with a warpage of approximately 40 μm (see FIG. 1(a)).

The back surface of the first semiconductor substrate 1 and the front surface of the second semiconductor substrate 2 are pasted together and annealed at 1000 to 1250 DEG C. to ensure complete adhesion (see FIG. 1(b)).

Grind and polish the first semiconductor substrate 1 from the surface.

A semiconductor layer 3 with a reduced thickness of 0.1 to 10 μm is formed (see FIG. 1(c)).

In this way, the second semiconductor substrate 2 is used as a support substrate,
A flat bonded SOI substrate with no warpage was obtained, using the semiconductor layer 3 with reduced thickness as an element substrate.

Example 2 The first semiconductor substrate 1 is a flat 6-inch Si wafer with a thickness of 500 to 600 μm and on the front and back surfaces of which thermal oxide films 1a and 1b of 0.5 μm thick are formed.

The second semiconductor substrate 2 is a 6-inch Si wafer with a concave surface with a warpage of about 40 μm (see FIG. 2(a)).
.

The back surface of the second semiconductor substrate 2 and the front surface of the first semiconductor substrate 1 are pasted together and annealed at 1000 to 1250° C. to ensure complete adhesion (see FIG. 2(b)).

Grind and polish the second semiconductor substrate 2 from the surface.

Thickness 0.1~IC)c! A semiconductor layer 3 having a thickness of m is formed (see FIG. 2(c)).

Thereafter, the oxide film 1b on the back surface of the first semiconductor substrate 1 is removed by grinding (see FIG. 2(d)).

In this way, the first semiconductor substrate 1 is used as a support substrate,
A flat bonded SOI substrate with no warpage was obtained, using the semiconductor layer 3 with reduced thickness as an element substrate.

Example■ The first semiconductor substrate 1 is a flat 6-inch Si wafer.
Thermal oxide film la, lb with a thickness of 0.5 μm on the front and back surfaces
is formed. The second semiconductor substrate 2 has a thickness of 500~
600 urn, the amount of warpage on the surface is about 80I! A thermal oxide film 2a having a concave surface of m and a thickness of 0.5 μm on the 2 surfaces and the back surface,
2b is a 6-inch Si wafer (third
(See figure (a)).

The back surface of the first semiconductor substrate 1 and the front surface of the second semiconductor substrate 2 are pasted together and annealed at 1000 to 1250 DEG C. to ensure complete adhesion (see FIG. 3(b)).

Grind and polish the first semiconductor substrate 1 from the surface.

A semiconductor layer 3 having a thickness of 0.1 to 10 μm is formed (see FIG. 3(c)).

Thereafter, the oxide film 2b on the back surface of the second semiconductor substrate 2 is removed by grinding (see FIG. 3(d)).

In this way, the second semiconductor substrate 2 is used as a support substrate,
The semiconductor layer 3 whose thickness has been reduced is used as an element substrate.

A bonded SOI substrate with almost no warpage was obtained.

Example ■ The first semiconductor substrate 1 is a 6-inch Si substrate with a thickness of 500 to 600 μm, 1 having a concave surface with a warpage of about 80 μm, and 3 thermal oxide films 1a and 1b having a thickness of 0.5 μm formed on the front and back surfaces. It's a wafer. The second semiconductor substrate 2 is a flat 6
9-inch Si wafer with a thickness of 0.5 μm on the front and back sides
Thermal oxide films 2a and 2b are formed (see FIG. 4(a)).
)reference).

The back surface of the first semiconductor substrate 1 and the front surface of the second semiconductor substrate 2 are pasted together and annealed at 1000 to 1250° C. to ensure complete adhesion (see FIG. 4, 1).

The first semiconductor substrate l is ground and polished from the surface to a thickness of 0.
A semiconductor layer 3 having a thickness of 1 to 10 μm is formed (see FIG. 4(c)).

Thereafter, the oxide film 2b on the back surface of the second semiconductor substrate 2 is removed by grinding (see FIG. 4(d)).

In this way, the second semiconductor substrate 2 is used as a support substrate,
Using the reduced thickness semiconductor layer 3 as an element substrate, a bonded SOI substrate with almost no warpage was obtained.

Example ■ The first semiconductor substrate 1 is a 6-inch Si substrate with a thickness of 500 to 600 μm, 1 having a concave surface with a warpage of about 40 μm, and 2 thermal oxide films 1a and 1b having a thickness of 0.5 μm formed on the front and back surfaces. It's a wafer. The second semiconductor substrate 2 has a thickness of 50 mm.
It is a 6-inch Si wafer having a concave surface of 0 to 600 μm and a warpage of about 40 μm (see FIG. 5(a)).

The back surface of the first semiconductor substrate 1 and the front surface of the second semiconductor substrate 2 are pasted together and annealed at 1000 to 1250 DEG C. to ensure complete adhesion (see FIG. 5(b)).

Grind and polish the first semiconductor substrate 1 from the surface.

A semiconductor layer 3 with a reduced thickness of 0.1 to 10 μm is formed (see FIG. 5(c)).

In this way, the second semiconductor substrate 2 is used as a support substrate,
The semiconductor layer 3 whose thickness has been reduced is used as an element substrate.

A laminated SOI substrate having a concave surface with a reduced thickness and a warp amount of about 10 μm was obtained.

Example ■ The first semiconductor substrate 1 has a thickness of 500 to 600 μm, has a concave surface with a warpage of about 40 μm, and has a thickness of 0 on the front and back surfaces.
．． It is a 6-inch Si wafer on which thermal oxide films 1a and lb of 5 μm are formed. The second semiconductor substrate 2 has a thickness of 500 mm.
It is a 6-inch Si wafer having a concave surface with a warpage of about 40 μm on the surface of ~600 μm (see FIG. 6(a)).

The back surface of the second semiconductor substrate 2 and the front surface of the first semiconductor substrate 20 are pasted together and annealed at 1000 to 1250 DEG C. to ensure complete adhesion (see FIG. 6(b)).

Grind and polish the second semiconductor substrate 2 from the surface.

A semiconductor layer 3 having a thickness of 0.1 to 10 μm is formed (see FIG. 6(c)).

Thereafter, the oxide film 1b on the back surface of the first semiconductor substrate l is removed by grinding (see FIG. 6(d)).

In this way, the first semiconductor substrate 1 is used as a support substrate,
The semiconductor layer 3 whose thickness has been reduced is used as an element substrate.

A laminated SOI substrate having a concave surface with a reduced thickness and a warp amount of about 10 μm was obtained.

Example ■ The first semiconductor substrate 1 has a thickness of 500 to 600 μm 9 has a concave surface with a warpage of about 40 μm, and has a thickness of 0 on the front and back surfaces.
．． It is a 6-inch Si wafer on which thermal oxide films 1a and lb of 5 μm are formed. The second semiconductor substrate 2 has a thickness of 500 mm.
~600 μm 1 Thermal oxide films 2a, 2b with a concave surface with a warpage of about 40 μm and a thickness of 0.5 μm on the front and back surfaces
It is a 6-inch Si wafer on which is formed (Fig. 7(a)
)reference).

The back surface of the first semiconductor substrate 1 and the front surface of the second semiconductor substrate 2 are pasted together and annealed at 1000 to 1250 DEG C. to ensure complete adhesion (see FIG. 7(b)).

The first semiconductor substrate 1 is ground and polished from the surface to a thickness of 0.
A semiconductor layer 3 having a thickness of 1 to 10 μm is formed (see FIG. 7(c)).

Thereafter, the oxide film 2b on the back surface of the second semiconductor substrate 2 is removed by grinding (see FIG. 7(d)).

In this way, the second semiconductor substrate 2 is used as a support substrate,
A substantially flat laminated SOI substrate using the thinned semiconductor layer 3 as an element substrate was obtained.

Various cases have been described above in Examples I to 2, but the essential requirements are that the surface of the bonded substrate has a concave curvature and that an insulating film is present on the bonded surface. If this condition is satisfied, the first semiconductor substrate 1 or the second semiconductor substrate 2 does not necessarily need to have an insulating film on both the front and back surfaces. You can. However, whether there is an insulating film on both the top and bottom of the bonding surfaces, whether there is an insulating film only above the bonding surfaces, or whether there is an insulating film only below the bonding surfaces, there are subtle differences in the characteristics of the semiconductor device that is subsequently formed. Therefore, it is necessary to select according to the purpose.

Example (2) The semiconductor substrate 4 is a 6-inch Si wafer having a thickness of 500 to 600 .mu.m and a concave surface with a warpage of about 80 .mu.m.

Oxygen (0.) ions are implanted from the concave surface under the conditions of an acceleration voltage of 200 keV and a dose of 2.times.10 "cm.sup.-". An oxygen ion implantation region 5 with a high oxygen ion concentration and a thickness of 0.5 to 1 μm is formed inside, leaving a crystal layer of about 0.1 to 0.5 μm on the surface.

(See Figure 8(a)).

High temperature annealing is performed at 1250° C. for 30 minutes to form a buried insulating film 6.

In this way, under the buried insulating film 6, the support substrate 8.
A substantially flat SOI substrate with the element substrate 7 on the upper side was obtained. (
(FIG. 8(b)) As ions for forming the insulating film 6.

In addition to 01, N", Oz, Nz, O", N"0□
g+, N2g+, etc. can also be used.

〔Effect of the invention〕

As explained above, (1) according to the present invention, (9) the warpage is small;
Alternatively, a 301 substrate with a controlled amount of warpage can be obtained. By using the SOI substrate of the present invention, stable operation of elements can be ensured and reliability can be improved.

The present invention greatly contributes to improving the yield of device miniaturization.

[Brief explanation of drawings]

FIGS. 1(a) to 1(c) are cross-sectional views for explaining Example I. FIGS. 2(a) to 2(d) are cross-sectional views for explaining embodiment (2). FIGS. 3(a) to 3(d) are sectional views for explaining the embodiment (2). FIGS. 4(a) to (d) are sectional views for explaining the embodiment (2). FIGS. 5(a) to 5(c) are sectional views for explaining the embodiment (2). FIGS. 6(a) to (d) are sectional views for explaining the embodiment (2). FIGS. 7(a) to 7(d) are sectional views for explaining embodiment (2). FIGS. 8(a) and 8(b) are cross-sectional views for explaining embodiment (2). FIGS. 9(a) to 9(c) are diagrams for explaining the present invention in detail. FIG. 10 is a diagram showing the relationship between the amount of warpage before lamination and the amount of warpage after grinding and polishing. FIGS. 11(a) to 11(c) are diagrams for explaining the conventional problems. In the figure, 1 is a first semiconductor substrate. 2 is a second semiconductor substrate la, Ib, 2a and 2b are insulating films, which are oxide films. 3 is a semiconductor layer 4 whose thickness has been reduced, and a semiconductor substrate 5 is an oxygen ion implantation region. 6 is a buried insulating film. 7 is the element board. 8 is the support substrate (σ) (b) (C) Real small dekigenn Ida bow I Katsu 1 diagram (b”1 ((j (d) Real hogi (Mochi 1 Earth 2 diagram ■ (,J) Tsuman To door・I T, 4 concave ■ (O) (d) To 7 example■ also 3 Figure (α) (b) Tsuman regular layer 5 Figure (b) (C) (d) Su S application) Chapter Fig. ■ 4 e, (U・j ■ Range 8 Fig. The kth figure is also q concave (concave) (convex) Upholstery color N, 1 and t
) Measurement of warpage of ri F + Ih anus Grinding resistance U Soryo course of warpage amount of curve 10 (b) Conventional f problems, Y1 east

Claims (1)

[Claims] [1] At least one of the first semiconductor substrate (1) having an insulating film uniformly formed on one main surface and the second semiconductor substrate (2) is free from warping. forming a warped bonded substrate by bonding the one main surface of the first semiconductor substrate (1) and the one main surface of the second semiconductor substrate (2) to each other; A semiconductor layer (3) whose thickness is reduced on the insulating film by grinding the concavely curved surface of the laminated substrate.
and reducing warpage of the laminated substrate. [2] Ions are implanted into the warped semiconductor substrate (4) from its concave surface at high acceleration to form an insulating film that leaves a crystal layer on the surface, and then annealing is performed to remove the insulating film ( 6) to obtain an SOI substrate having a supporting substrate (8) below the insulating film (6) and an element substrate (7) above the insulating film (6). Method. [3] As ions for forming the insulating film, O^+,
N^+, O_2^+, N_2^+, O^2^+, N^2
3. The method of manufacturing a semiconductor substrate according to claim 2, wherein ^+, O_2^2^+, and N_2^2^+ are used.