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JP3569923B2 - Manufacturing method of laminated hybrid integrated circuit component - Google Patents

Manufacturing method of laminated hybrid integrated circuit component Download PDF

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Publication number
JP3569923B2
JP3569923B2 JP35623891A JP35623891A JP3569923B2 JP 3569923 B2 JP3569923 B2 JP 3569923B2 JP 35623891 A JP35623891 A JP 35623891A JP 35623891 A JP35623891 A JP 35623891A JP 3569923 B2 JP3569923 B2 JP 3569923B2
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JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
forming
substrate
electrode
Prior art date
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JP35623891A
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Japanese (ja)
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JPH05175656A (en
Inventor
哲生 高橋
大和 中西
俊幸 佐々木
政幸 吉田
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TDK Corp
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TDK Corp
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Description

【0001】
【発明の属する技術分野】
本発明は、機能部品であるセラミック積層体を基板として備える積層混成集積回路部品の製造方法に関するものである。
【0002】
【従来の技術】
一般に、積層混成集積回路部品としては、コンデンサまたはインダクタ或いは双方をセラミック積層体に内蔵した機能部品を基板にし、電極や抵抗を形成すると共に、IC等の電子部品を搭載するよう構成するものがある。
【0003】
その混成集積回路部品を製造するには、基板も一つの機能部品であるところから、機能部品として部品単位に形成した後、各基板に対して混成集積回路部品を構成する所定の加工処理を個々に施すことが行われている。
【0004】
然し、これでは煩雑な作業が伴い、搬送方式も複雑になって、リードタイムが長く掛かるところから生産性に劣るばかりでなく、各基板が極小なものであるため、微細な電極パターンや端部電極等を内蔵部品と正確に位置を合わせて高精度に形成するのも困難である。
【0005】
【発明が解決しようとする課題】
本発明は、生産個数を増大できしかも搬送方式も簡略化できて処理能力を高め得ることから生産性を向上できると共に、混成集積回路部品を構成する各部をセラミック積層体に内蔵する部品と高精度に位置合わせさせて能率よく形成可能な積層集積回路部品の製造方法を提供することを目的とする。
【0006】
【課題を解決するための手段】
本発明に係る積層混成集積回路部品の製造方法においては、混成集積回路部品の複数個取り分に相当する一枚ものの機能部品であるセラミック積層体を基板として備え、混成集積回路部品を該基板の板面に各々同一のパターンで形成した後に、セラミック積層体を混成集積回路部品単位に分割形成し、複数個の混成集積回路部品を同時に製造するもので、
複数個のスルーホールを基板の混成集積回路部品1個分に相当する各板面の輪郭線に沿って設ける工程と、スルーホールの必要個所を基点に、平面電極をセラミック基板の板面に印刷形成する工程と、抵抗を平面電極の必要間に位置させて印刷形成する工程とを経て、平面電極並びに抵抗を基板の混成集積回路部品1個分に相当する各板面に同一のパターンで形成し、
次に、ガラスコートを基板の平面全面に形成し、そのガラスコートをトリミングで平面電極並びに抵抗の保護被膜として形成する工程と、メッキ用の下地膜を基板の平面全面に形成する工程と、レジスト被膜を基板の平面全面に形成する工程と、所定パターンの露光部をフォトレジストでレジスト被膜に形成し、メッキ用の下地膜を露光部の除去で露出する工程と、レジスト被膜の露光部に応じた電極を下地膜の露出面にメッキで形成する工程と、残余のレジスト被膜の剥離により露出するメッキ用の下地膜を除去し、且つ、電極をトリミングするエッチング工程とを経て、端部電極をスルーホールの孔内に形成すると共に、平面電極,抵抗,端部電極を含む各部を回路接続し、混成集積回路部品を複数個取り分に相当する基板の板面に各々同一のパターンで形成するようにされている。
【0007】
【作用】
本発明に係る積層混成集積回路部品の製造方法では、混成集積回路部品の複数個取り分に相当する一枚ものの機能部品であるセラミック積層体を基板として備え、混成集積回路部品を構成する平面電極,抵抗を混成集積回路部品1個分に相当する基板の各板面に同一のパターンで形成した後、保護被膜の形成,下地膜の形成,レジスト被膜の形成,露光部の形成,露光部の除去を行ない、メッキ処理により電極を形成し、更に、残余のレジスト被膜の剥離並びに下地膜の除去を行い、混成集積回路部品をセラミック積層体の板面に形成し、最終的に基板を混成集積回路部品単位に分割形成することから、混成集積回路部品の生産個数を増大できしかも基板の搬送方式も簡略化できて処理能力を高め得ると共に、混成集積回路部品を構成する各部をセラミック積層体に内蔵する部品と高精度に位置合わせさせて能率よく形成できる。
【0008】
【発明の実施の形態】
以下、添付図面を参照して説明すると、図1〜図10は、本発明に係る積層混成集積回路部品の製造方法を適用し、所定の加工が施された基板の形態を各工程順に示す。その基板は、ICを搭載する前の最終工程まで積層混成集積回路部品の複数個取り分(図面では、便宜上、4個分が示されている。)に相当する一枚ものに保たれる。
【0009】
図1は、積層混成集積回路部品の基板となる混成集積回路部品の複数個取り分として一枚ものに形成されたセラミック積層体1を示す。そのセラミック積層体1は、磁性材料及びまたは誘電材料を印刷法またはシート法で積層し、コンデンサまたはインダクタ或いは双方を内蔵する機能部品として形成されている。
【0010】
そのセラミック積層体1は、積層形成工程で用いられた担持シートまたはフィルムから混成集積回路部品の複数個取り分として一枚もののまま剥離し、相対的に大きな面積を有する基板形態で取り扱うことにより、以後の混成集積回路部品の製造工程に順次送り込む。このため、混成集積回路部品の基板として各加工工程並びに工程順の搬送過程で容易に取扱えしかも各加工処理で必要な位置決めも容易に行える。
【0011】
混成集積回路部品の複数個取り分に相当する一枚もののセラミック積層体1(以下、単に「基板1」という。)には、まず、図2で示すように端部電極を形成するに用いられるスルーホール2,2…を設ける。このスルーホール2,2…は、パンチング,エッチング或いはビーム照射等の孔あけ手段を適用することから、セラミック積層体の焼成前或いは焼成後の工程で形成できる。そのスルーホール2,2…は、混成集積回路部品1個分に相当する各基板10,11…(以下、単に「各基板10,11…」という。)の輪郭線に沿って夫々設ける。
【0012】
そのスルーホール2,2…の必要個所を基点とし、図3で示すように平面電極3,3…を各基板10,11…の板面に形成する。この平面電極3,3…は、スクリーン印刷等を適用し、各基板10,11…の板面毎に夫々同一のパターンで形成する。
【0013】
次に、平面電極3,3…の必要間に配置することから、図4で示すように抵抗4,4…を各基板10,11…の板面に形成する。この抵抗4,4…もスクリーン印刷等を適用し、各基板10,11…の板面に夫々同一のパターンで形成する。
【0014】
平面電極3,3…並びに抵抗4,4…の形成後、図5で示すようにガラスコート5を基板1の平面全面に印刷形成する。そのガラスコート5は、ビーム照射等でトリミングし、平面電極3,3…並びに抵抗4,4…を覆う保護被膜(図示せず)として各基板10,11…毎の必要個所に同一のパターンで形成する。
【0015】
保護被膜の形成後、図6で示すように後述するメッキ用の下地膜6を導電材料から形成する。このメッキ用の下地膜6は、スパッタリング等を適用することから基板1の平面全面に形成する。
【0016】
下地膜6の形成後、レジスト剤を基板1の平面全面に塗布することから、レジスト被膜を形成する。このレジスト被膜には、フォトレジストを適用し、露光部を平面電極3,3…等のパターンに応じて各基板の板面毎に形成する。図7は、露光部(白抜き部分参照)を設けたレジスト被膜7(黒描部分参照)を示す。
【0017】
そのレジスト被膜7から露光部をアルカリ或いは溶剤処理で除去した後、端部電極並びに接続回路用電極を形成するメッキ処理を下地膜6の露出した基板1の板面に施す。図8は、電極のメッキ被膜8(黒描部分参照)を形成した基板1を示す。
【0018】
その後に、残余のレジスト被膜7を剥離する。図9は、レジスト被膜を剥離した基板1を示す。この基板1には、メッキ被膜8(白抜き部分参照)による端部電極並びに配線電極を形成した部分以外の余分なメッキ用の下地膜6(黒描部分参照)がレジスト被膜の剥離で露出する。
【0019】
その基板1には、メッキ用の下地膜6を除去し、且つ、メッキ被膜8をトリミングするエッチング処理を施す。図10は、エッチング処理後の基板1を示し、板面には平面電極3,3…、抵抗4、4…、スルーホール2,2…の孔内に設けられる端部電極8a,8a…を含む各部を配線電極8b,8b…で回路接続することによる混成集積回路部品が各基板10,11…の板面に同一のパターンで夫々形成されている。
【0020】
これまでの製造工程は、混成集積回路部品の複数個取り分に相当する一枚形態に保たれたセラミック積層体に対して加工処理を施すから、大きな板材のセラミック積層体として容易に位置決めできて各部を正確に形成でき、また、各工程間の搬送処理も簡易な手段で能率よく行うことができる。
【0021】
ここまでの工程を経た後、一枚形態に保たれたセラミック積層体は混成集積回路部品単位に分割することからチップ状部品として複数個に形成される。そのチップ状部品は、一連の混成集積回路部品の製造工程を一サイクル経ることにより複数個同時に製造できる。このため、上述した製造工程によると、多数個を短時間に能率よく製造できて生産性を著しく向上できる。
【0022】
この混成集積回路部品において、IC等の電子部品を搭載するときにはセラミック積層体の分割前に搭載処理するとよく、或いは各混成集積回路部品単位に分割後搭載処理してもよい。図11は、IC9が搭載された積層混成集積回路部品の最終形態を示す。その積層混成集積回路部品は、通常通りに特性チェックした後、電子部品連としてテーピング,包装することにより製品として出荷される。
【0023】
【発明の効果】
以上の如く、本発明に係る積層混成集積回路部品の製造方法に依れば、混成集積回路部品の生産個数を増大できしかも基板の搬送方式も簡略化できて処理能力を高め得ると共に、混成集積回路部品を構成する各部をセラミック積層体に内蔵する部品と高精度に位置合わせさせて能率よく形成できる。
【図面の簡単な説明】
【図1】本発明に係る方法で用いられる機能部品であるセラミック積層体を示す。
【図2】図1のセラミック積層体にスルーホールを設けた状態を示す。
【図3】図2のセラミック積層体に平面電極を設けた状態を示す。
【図4】図3のセラミック積層体に抵抗を設けた状態を示す。
【図5】図4のセラミック積層体に保護被膜を設けた状態を示す。
【図6】図5のセラミック積層体にメッキ用の下地膜を設けた状態を示す。
【図7】図1のセラミック積層体にメッキ用の下地膜及びレジスト被膜を設けた状態を示す。
【図8】図7のセラミック積層体にメッキ処理を施した状態を示す。
【図9】図8のセラミック積層体からレジスト被膜を除去した状態を示す。
【図10】図9のセラミック積層体の下地膜にエッチング処理を施した状態を示す。
【図11】ICが搭載された積層混成集積回路部品の製品形態を示す。
【符号の説明】
1 部品複数個取り分のセラミック積層体
10,11… 部品1個分に相当する基板
2,2… スルーホール
3,3… 平面電極
4,4… 抵抗
5 ガラスコート
6 メッキ用の下地膜
7 レジスト被膜
8 電極
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a laminated hybrid integrated circuit component having a ceramic laminate as a functional component as a substrate.
[0002]
[Prior art]
Generally, as a laminated hybrid integrated circuit component, there is a component configured such that a functional component in which a capacitor or an inductor or both are incorporated in a ceramic laminate is used as a substrate, electrodes and resistors are formed, and electronic components such as an IC are mounted. .
[0003]
In order to manufacture the hybrid integrated circuit component, since the substrate is also one functional component, after forming the component as a functional component for each component, a predetermined processing for forming the hybrid integrated circuit component is performed on each substrate individually. It is done to be applied.
[0004]
However, this involves complicated operations, complicates the transport method, and leads to a long lead time, which is not only inferior in productivity, but also because the size of each substrate is extremely small, so that fine electrode patterns and edge It is also difficult to form electrodes and the like with high precision by accurately aligning them with built-in components.
[0005]
[Problems to be solved by the invention]
The present invention is not only capable of increasing the number of products to be produced, but also simplifying the transfer method and improving the processing capacity, thereby improving the productivity. In addition, the parts which constitute the hybrid integrated circuit parts in the ceramic laminate are highly accurate. It is an object of the present invention to provide a method of manufacturing a laminated integrated circuit component which can be formed efficiently by being aligned with the above.
[0006]
[Means for Solving the Problems]
In a method for manufacturing a laminated hybrid integrated circuit component according to the present invention, a ceramic laminated body, which is a single functional component corresponding to a plurality of hybrid integrated circuit components, is provided as a substrate, and the hybrid integrated circuit component is mounted on a board of the substrate. After forming the same pattern on the surface, the ceramic laminate is divided and formed into hybrid integrated circuit component units, and a plurality of hybrid integrated circuit components are simultaneously manufactured.
Steps of providing a plurality of through holes along the contour of each board surface corresponding to one hybrid integrated circuit component of the board, and printing a plane electrode on the board surface of the ceramic board, starting from the required locations of the through holes Forming a flat electrode and a resistor in the same pattern on each plate surface corresponding to one hybrid integrated circuit component of a substrate through a forming process and a process of printing and forming the resistor between necessary plane electrodes. And
Next, a step of forming a glass coat on the entire surface of the substrate, forming the glass coat as a planar electrode and a protective film for resistance by trimming, a step of forming a base film for plating on the entire surface of the substrate, A step of forming a coating on the entire surface of the substrate, a step of forming an exposed portion of a predetermined pattern on the resist film with a photoresist, and exposing a base film for plating by removing the exposed portion; Forming the exposed electrode of the underlying film by plating, removing the underlying film for plating exposed by peeling off the remaining resist film, and etching the electrode to trim the end electrode. Formed in the hole of the through-hole, and connect each part including the plane electrode, the resistor, and the end electrode to the circuit board. It is adapted to form one pattern.
[0007]
[Action]
In the method for manufacturing a laminated hybrid integrated circuit component according to the present invention, a planar electrode constituting a hybrid integrated circuit component, comprising a ceramic laminate as one functional component corresponding to a plurality of hybrid integrated circuit components as a substrate, After forming a resistor in the same pattern on each plate surface of a substrate corresponding to one hybrid integrated circuit component, forming a protective film, forming a base film, forming a resist film, forming an exposed portion, and removing the exposed portion. To form electrodes by plating, further stripping of the remaining resist film and removal of the underlying film, forming hybrid integrated circuit components on the surface of the ceramic laminate, and finally forming the substrate on the hybrid integrated circuit. By dividing and forming each component, it is possible to increase the number of hybrid integrated circuit components to be produced, to simplify the substrate transfer method and to increase the processing capacity, and to increase the processing capacity of each hybrid integrated circuit component. The let me align the parts and high precision built in the ceramic laminate can be formed well efficiency.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
Referring to the accompanying drawings, FIGS. 1 to 10 show a form of a substrate which has been subjected to a predetermined processing by applying a method for manufacturing a laminated hybrid integrated circuit component according to the present invention, in the order of each step. Until the final step before mounting the IC, the substrate is kept as a single substrate corresponding to a plurality of stacked hybrid integrated circuit components (four in the drawing, for convenience).
[0009]
FIG. 1 shows a ceramic laminate 1 formed as a single piece as a plurality of hybrid integrated circuit components serving as a substrate of a multilayer hybrid integrated circuit component. The ceramic laminate 1 is formed by laminating a magnetic material and / or a dielectric material by a printing method or a sheet method, and is formed as a functional component including a capacitor or an inductor or both.
[0010]
The ceramic laminate 1 is peeled off from the carrier sheet or film used in the lamination forming step as a single piece of a plurality of hybrid integrated circuit components, and is handled in a substrate form having a relatively large area. To the manufacturing process of the hybrid integrated circuit part. For this reason, the substrate of the hybrid integrated circuit component can be easily handled in each of the processing steps and the transport process in the order of the steps, and the positioning required for each processing can be easily performed.
[0011]
First, as shown in FIG. 2, a through-hole used to form an end electrode is formed on one ceramic laminate 1 (hereinafter, simply referred to as “substrate 1”) corresponding to a plurality of hybrid integrated circuit components. Holes 2, 2, ... are provided. The through holes 2, 2,... Can be formed in a step before or after firing of the ceramic laminated body because a hole making means such as punching, etching, or beam irradiation is applied. The through holes 2, 2,... Are respectively provided along the contours of the substrates 10, 11,... (Hereinafter simply referred to as “the substrates 10, 11,...”) Corresponding to one hybrid integrated circuit component.
[0012]
With the necessary portions of the through holes 2, 2,... As base points, planar electrodes 3, 3,... Are formed on the plate surfaces of the substrates 10, 11,. Are formed in the same pattern on each plate surface of each of the substrates 10, 11,... By applying screen printing or the like.
[0013]
Next, since the plane electrodes 3, 3,... Are arranged between required areas, the resistors 4, 4,... Are formed on the plate surfaces of the substrates 10, 11,. The resistors 4, 4,... Are also formed by the same pattern on the plate surfaces of the substrates 10, 11,.
[0014]
After the formation of the planar electrodes 3, 3,... And the resistors 4, 4,..., A glass coat 5 is printed on the entire surface of the substrate 1 as shown in FIG. The glass coat 5 is trimmed by beam irradiation or the like to form a protective coating (not shown) covering the planar electrodes 3, 3... And the resistors 4, 4,. Form.
[0015]
After the formation of the protective film, a base film 6 for plating, which will be described later, is formed from a conductive material, as shown in FIG. The base film 6 for plating is formed over the entire surface of the substrate 1 by applying sputtering or the like.
[0016]
After the formation of the base film 6, a resist agent is applied to the entire surface of the substrate 1 to form a resist film. A photoresist is applied to this resist film, and an exposed portion is formed on each plate surface of each substrate according to the pattern of the planar electrodes 3, 3,. FIG. 7 shows a resist film 7 (see black portions) provided with exposed portions (see white portions).
[0017]
After the exposed portion is removed from the resist film 7 by an alkali or solvent treatment, a plating process for forming an end electrode and a connection circuit electrode is performed on the surface of the substrate 1 where the base film 6 is exposed. FIG. 8 shows the substrate 1 on which the plating film 8 of the electrode (see the black drawing) is formed.
[0018]
Thereafter, the remaining resist film 7 is peeled off. FIG. 9 shows the substrate 1 from which the resist coating has been stripped. In the substrate 1, an extra plating base film 6 (see black portions) other than the portions where the end electrodes and the wiring electrodes are formed by the plating film 8 (see white portions) is exposed by peeling of the resist film. .
[0019]
The substrate 1 is subjected to an etching process for removing the base film 6 for plating and trimming the plating film 8. FIG. 10 shows the substrate 1 after the etching process. On the surface of the substrate 1, flat electrodes 3, 3..., Resistors 4, 4,..., And end electrodes 8a, 8a. . Are formed in the same pattern on the plate surfaces of the substrates 10, 11,... By connecting the respective parts including the circuits with the wiring electrodes 8b, 8b.
[0020]
In the manufacturing process up to this point, the ceramic laminated body kept in a single shape corresponding to a plurality of hybrid integrated circuit parts is processed, so that it can be easily positioned as a large-plate ceramic laminated body and each part can be positioned. Can be formed accurately, and the transfer processing between the respective steps can be efficiently performed by simple means.
[0021]
After the steps up to this point, the ceramic laminate maintained in a single-piece form is divided into hybrid integrated circuit component units, so that a plurality of chip-like components are formed. A plurality of such chip-shaped parts can be manufactured simultaneously by passing through a series of manufacturing steps of a hybrid integrated circuit part for one cycle. For this reason, according to the above-mentioned manufacturing process, a large number can be efficiently manufactured in a short time, and productivity can be remarkably improved.
[0022]
In this hybrid integrated circuit component, when an electronic component such as an IC is mounted, the mounting process may be performed before the ceramic laminate is divided, or the mounting process may be performed after being divided for each hybrid integrated circuit component. FIG. 11 shows the final form of the laminated hybrid integrated circuit component on which the IC 9 is mounted. After checking the characteristics as usual, the laminated hybrid integrated circuit component is shipped as a product by taping and packaging as a series of electronic components.
[0023]
【The invention's effect】
As described above, according to the method of manufacturing a laminated hybrid integrated circuit component according to the present invention, it is possible to increase the production number of the hybrid integrated circuit component, simplify the substrate transfer system, increase the processing capacity, and improve the hybrid integration. Each part constituting a circuit component can be efficiently formed by accurately aligning each part with a component incorporated in the ceramic laminate.
[Brief description of the drawings]
FIG. 1 shows a ceramic laminate which is a functional component used in the method according to the present invention.
FIG. 2 shows a state in which through holes are provided in the ceramic laminate of FIG.
FIG. 3 shows a state where a planar electrode is provided on the ceramic laminate of FIG. 2;
FIG. 4 shows a state in which a resistor is provided on the ceramic laminate of FIG. 3;
5 shows a state in which a protective coating is provided on the ceramic laminate of FIG.
FIG. 6 shows a state in which a base film for plating is provided on the ceramic laminate of FIG. 5;
7 shows a state in which a base film for plating and a resist film are provided on the ceramic laminate of FIG. 1;
8 shows a state in which a plating process has been performed on the ceramic laminate of FIG. 7;
9 shows a state in which a resist film has been removed from the ceramic laminate of FIG. 8;
FIG. 10 shows a state in which an etching process has been performed on a base film of the ceramic laminate of FIG. 9;
FIG. 11 shows a product form of a laminated hybrid integrated circuit component on which an IC is mounted.
[Explanation of symbols]
1 Ceramic laminates 10 and 11 for taking multiple components Substrates 2 and 2 corresponding to one component Through holes 3 and 3 Planar electrodes 4 and 4 Resistance 5 Glass coat 6 Undercoat film 7 for plating Resist coating 8 electrodes

Claims (1)

混成集積回路部品の複数個取り分に相当する一枚ものの機能部品であるセラミック積層体を基板として備え、混成集積回路部品を該基板の板面に各々同一のパターンで形成した後に、セラミック積層体を混成集積回路部品単位に分割形成し、複数個の混成集積回路部品を同時に製造する積層混成集積回路部品の製造方法において、
複数個のスルーホールを基板の混成集積回路部品1個分に相当する各板面の輪郭線に沿って設ける工程と、スルーホールの必要個所を基点に、平面電極をセラミック基板の板面に印刷形成する工程と、抵抗を平面電極の必要間に位置させて印刷形成する工程とを経て、平面電極並びに抵抗を基板の混成集積回路部品1個分に相当する各板面に同一のパターンで形成し、
次に、ガラスコートを基板の平面全面に形成し、そのガラスコートをトリミングで平面電極並びに抵抗の保護被膜として形成する工程と、メッキ用の下地膜を基板の平面全面に形成する工程と、レジスト被膜を基板の平面全面に形成する工程と、所定パターンの露光部をフォトレジストでレジスト被膜に形成し、メッキ用の下地膜を露光部の除去で露出する工程と、レジスト被膜の露光部に応じた電極を下地膜の露出面にメッキで形成する工程と、残余のレジスト被膜の剥離により露出するメッキ用の下地膜を除去し、且つ、電極をトリミングするエッチング工程とを経て、端部電極をスルーホールの孔内に形成すると共に、平面電極,抵抗,端部電極を含む各部を回路接続し、混成集積回路部品を複数個取り分に相当する基板の板面に各々同一のパターンで形成するようにしたことを特徴とする積層混成集積回路部品の製造方法。
A ceramic laminate, which is a single functional component corresponding to a plurality of hybrid integrated circuit components, is provided as a substrate, and after forming the hybrid integrated circuit components in the same pattern on the plate surface of the substrate, the ceramic laminate is formed. In the method of manufacturing a laminated hybrid integrated circuit component, which is formed by dividing the hybrid integrated circuit component unit and simultaneously manufacturing a plurality of hybrid integrated circuit components,
Steps of providing a plurality of through holes along the contour of each board surface corresponding to one hybrid integrated circuit component of the board, and printing a plane electrode on the board surface of the ceramic board, starting from the required locations of the through holes Forming a flat electrode and a resistor in the same pattern on each plate surface corresponding to one hybrid integrated circuit component of a substrate through a forming process and a process of printing and forming the resistor between necessary plane electrodes. And
Next, a step of forming a glass coat on the entire surface of the substrate, forming the glass coat as a planar electrode and a protective film for resistance by trimming, a step of forming a base film for plating on the entire surface of the substrate, A step of forming a coating on the entire surface of the substrate, a step of forming an exposed portion of a predetermined pattern on the resist film with a photoresist, and exposing a base film for plating by removing the exposed portion; Forming the exposed electrode of the underlying film by plating, removing the underlying film for plating exposed by peeling off the remaining resist film, and etching the electrode to trim the end electrode. Formed in the hole of the through-hole, and connect each part including the plane electrode, the resistor, and the end electrode to the circuit board. Method of manufacturing a multilayer hybrid integrated circuit component, characterized in that in order to form one pattern.
JP35623891A 1991-12-24 1991-12-24 Manufacturing method of laminated hybrid integrated circuit component Expired - Lifetime JP3569923B2 (en)

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JP35623891A JP3569923B2 (en) 1991-12-24 1991-12-24 Manufacturing method of laminated hybrid integrated circuit component

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Application Number Priority Date Filing Date Title
JP35623891A JP3569923B2 (en) 1991-12-24 1991-12-24 Manufacturing method of laminated hybrid integrated circuit component

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JPH05175656A JPH05175656A (en) 1993-07-13
JP3569923B2 true JP3569923B2 (en) 2004-09-29

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