JP3018985B2 - Method of forming dielectric thin film - Google Patents
Method of forming dielectric thin filmInfo
- Publication number
- JP3018985B2 JP3018985B2 JP8167282A JP16728296A JP3018985B2 JP 3018985 B2 JP3018985 B2 JP 3018985B2 JP 8167282 A JP8167282 A JP 8167282A JP 16728296 A JP16728296 A JP 16728296A JP 3018985 B2 JP3018985 B2 JP 3018985B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- dielectric thin
- forming
- ferroelectric
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000010409 thin film Substances 0.000 title claims description 102
- 238000000034 method Methods 0.000 title claims description 25
- 239000000758 substrate Substances 0.000 claims description 20
- 239000013078 crystal Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 13
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 239000010410 layer Substances 0.000 claims description 2
- 239000002344 surface layer Substances 0.000 claims description 2
- 239000010408 film Substances 0.000 description 28
- 230000007547 defect Effects 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 238000000151 deposition Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 241000257465 Echinoidea Species 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910002367 SrTiO Inorganic materials 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000003980 solgel method Methods 0.000 description 1
- 229910052712 strontium Inorganic materials 0.000 description 1
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体素子などの
製造に用いられる誘電体薄膜の形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a dielectric thin film used for manufacturing a semiconductor device or the like.
【0002】[0002]
【従来の技術】SiO2に代わって強誘電体または高誘
電体を絶縁膜とした半導体素子の開発が急がれている。
前者は不揮発性メモリとしての用途、後者は微細化に伴
うDRAM等のメモリ容量不足をカバーする用途として
注目されている。 2. Description of the Related Art Development of a semiconductor device using a ferroelectric or a high dielectric as an insulating film in place of SiO 2 is urgently required.
The former attracts attention as a non-volatile memory, and the latter attracts attention as a use for covering a shortage of memory capacity of a DRAM or the like due to miniaturization.
【0003】こうした強誘電体薄膜または高誘電体薄膜
の成膜方法には、ゾル・ゲル法、有機金属溶液堆積法、
レーザーアブレーション法、スパッタ法、有機金属ガス
を用いる化学気相成長法(MOCVD)等がある。強誘
電特性や高誘電特性は結晶膜で得られ、SiO2のよう
な非晶質膜では得られない。そのため、強誘電体や高誘
電体の結晶膜を成膜する必要があるが、多結晶膜は、単
結晶薄膜に比べて表面モフォロジーが悪い、特性にバラ
ツキが出やすい、電流・電圧特性が劣化する等の問題が
ある。したがって、強誘電特性や高誘電特性を持つ絶縁
膜として単結晶膜が望まれている。[0003] Such a ferroelectric thin film or a high dielectric thin film is formed by a sol-gel method, an organometallic solution deposition method,
There are a laser ablation method, a sputtering method, a chemical vapor deposition method (MOCVD) using an organic metal gas, and the like. Ferroelectric characteristics and high dielectric characteristics can be obtained with a crystalline film, but not with an amorphous film such as SiO 2 . For this reason, it is necessary to form a ferroelectric or high-dielectric crystal film, but a polycrystalline film has poor surface morphology compared to a single-crystal thin film, tends to vary in characteristics, and has deteriorated current / voltage characteristics. Problem. Therefore, a single crystal film is desired as an insulating film having ferroelectric characteristics and high dielectric characteristics.
【0004】単結晶の強誘電体薄膜を得るために、格子
定数の近い基板を用いてヘテロエピタキシャル成長を行
う方法などが試みられている(第56回応用物理学会学
術講演会予稿集、1995年、p399)。[0004] In order to obtain a single crystal ferroelectric thin film, a method of performing heteroepitaxial growth using a substrate having a close lattice constant has been attempted (The 56th Annual Meeting of the Japan Society of Applied Physics, 1995, p399).
【0005】[0005]
【発明が解決しようとする課題】しかしながら、強誘電
体あるいは高誘電体と格子定数の近い材料としてMgO
等が用いられているが該材料は潮解性があり不安定であ
る。However, MgO is used as a material having a lattice constant close to that of a ferroelectric or high dielectric.
And the like are used, but the material is deliquescent and unstable.
【0006】また、一般に、強誘電体薄膜や高誘電体薄
膜を容量素子として半導体素子に用いる場合には、Si
基板上にSiO2を配し、この上に下部電極を形成した
上で強誘電体薄膜あるいは高誘電体薄膜を形成して容量
素子が作製される。しかし、SiO2は非晶質であるた
め、この上の金属は結晶化するものの、上述したMgO
等の単結晶膜を形成することは困難であり、強誘電体ま
たは高誘電体の基板とすることは望めない。In general, when a ferroelectric thin film or a high dielectric thin film is used for a semiconductor element as a capacitor,
A capacitor is manufactured by disposing SiO 2 on a substrate, forming a lower electrode on the SiO 2 , and then forming a ferroelectric thin film or a high dielectric thin film. However, since SiO 2 is amorphous, the above metal is crystallized, but the above-mentioned MgO
It is difficult to form a single crystal film such as that described above, and a ferroelectric or high dielectric substrate cannot be expected.
【0007】さらに、ヘテロエピタキシャル成長により
形成された膜には、一般に、格子定数の差から生じる歪
みや欠陥が存在し、良好な電気特性は得られない場合が
多い。Further, in general, a film formed by heteroepitaxial growth has strains and defects caused by a difference in lattice constant, and good electrical characteristics cannot be obtained in many cases.
【0008】すなわち、単結晶の強誘電体薄膜や高誘電
体薄膜をヘテロエピタキシャル成長によって形成するこ
とには多くの困難がある。また、例えヘテロエピタキシ
ャル成長が可能だとしても、この基板となるMgO等の
材料は潮解性があり、半導体素子に適用することは難し
い。さらに、一般にへテロエピタキシャル成長により形
成される膜には格子定数の差から生じる歪みや欠陥が存
在するため、良好な電気特性を望めない。That is, there are many difficulties in forming a single crystal ferroelectric thin film or high dielectric thin film by heteroepitaxial growth. Further, even if heteroepitaxial growth is possible, the material such as MgO serving as the substrate has deliquescence and is difficult to apply to a semiconductor device. Further, a film formed by heteroepitaxial growth generally has strains and defects caused by a difference in lattice constant, so that good electrical characteristics cannot be expected.
【0009】そこで本発明の目的は、上記問題を解決
し、歪みや欠陥の少ない良好な電気特性を有し且つ安定
な単結晶の誘電体薄膜を形成することである。SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems and to form a stable single-crystal dielectric thin film having good electric characteristics with little distortion and defects.
【0010】[0010]
【課題を解決するための手段】本発明者は、上記の目的
を達成するために種々の検討を重ねた結果、本発明を完
成した。Means for Solving the Problems The present inventor has made various studies in order to achieve the above object, and as a result, completed the present invention.
【0011】第1の発明は、基板上の積層薄膜の表面層
に、後の強誘電体あるいは高誘電体薄膜形成時に凹部内
で成長核の配向が下地と側面から制限を受けて定まるよ
うに、凹部を形成して該凹部内に下層の一部を露出さ
せ、次いで、該凹部を有する表面上に強誘電体あるいは
高誘電体薄膜を形成し、該凹部内にグラフォエピタキシ
ャル成長により単結晶の強誘電体あるいは高誘電体薄膜
を形成することを特徴とする誘電体薄膜の形成方法に関
する。According to a first aspect of the present invention , a concave portion is formed in a surface layer of a laminated thin film on a substrate when a ferroelectric or high dielectric thin film is formed later.
The orientation of the growth nucleus is determined by the restrictions from the base and the side
Sea urchin, to form a recess to expose a portion of the lower layer in the recess, then forming a ferroelectric or high-dielectric thin film on a surface having a recess, graphoepitaxy into the recess
The present invention relates to a method for forming a dielectric thin film, which comprises forming a single crystal ferroelectric or high dielectric thin film by thermal growth .
【0012】第2の発明は、基板上に金属薄膜を形成す
る工程と、該金属薄膜上に誘電体薄膜を形成する工程
と、該誘電体薄膜に、後の強誘電体あるいは高誘電体薄
膜形成時に凹部内で成長核の配向が下地と側面から制限
を受けて定まるように、凹部を形成して該凹部内に前記
金属薄膜の一部を露出させる工程と、該凹部を有する表
面上に強誘電体あるいは高誘電体薄膜を形成し、該凹部
内にグラフォエピタキシャル成長により単結晶の強誘電
体あるいは高誘電体薄膜を形成する工程を含むことを特
徴とする誘電体薄膜の形成方法に関する。According to a second aspect of the present invention, a step of forming a metal thin film on a substrate, a step of forming a dielectric thin film on the metal thin film, and a step of forming a ferroelectric or high dielectric thin
The orientation of growth nuclei in the recess during film formation is limited from the base and side
As determined by receiving, exposing a portion of the metal thin film in the recess to form a recess, and forming a ferroelectric or high-dielectric thin film on a surface having a recess, the recess A step of forming a single crystal ferroelectric or high dielectric thin film by grapho-epitaxial growth .
【0013】第3の発明は、凹部の段差が10〜50n
mである第1又は第2の発明の誘電体薄膜の形成方法に
関する。According to a third aspect of the present invention, the step of the concave portion is 10 to 50 n.
m, the method for forming a dielectric thin film according to the first or second invention.
【0014】第4の発明は、凹部の積層薄膜面内の一辺
が0.1〜5μmである第1、第2又は第3の発明の誘
電体薄膜の形成方法に関する。A fourth invention relates to the method for forming a dielectric thin film according to the first, second or third invention, wherein one side of the concave portion in the plane of the laminated thin film is 0.1 to 5 μm.
【0015】第5の発明は、強誘電体あるいは高誘電体
薄膜の形成を有機金属を用いる化学気相成長法によって
行う第1〜第4のいずれかの発明の誘電体薄膜の形成方
法に関する。The fifth invention relates to the method for forming a dielectric thin film according to any one of the first to fourth inventions, wherein a ferroelectric or high dielectric thin film is formed by a chemical vapor deposition method using an organic metal.
【0016】第6の発明は、誘電体薄膜の主成分がSi
O2或いはSi3N4である第1〜第5のいずれかの発明
の誘電体薄膜の形成方法に関する。According to a sixth aspect, the main component of the dielectric thin film is Si.
O 2 or a method of forming a dielectric thin film the Si 3 N 4 in which the first to fifth invention of any one of.
【0017】本発明においては結晶性の誘電体薄膜が凹
凸上に形成される。その際、凹部内部に形成される膜
は、下地からだけではなく側面からも配向の制限を受け
るため配向が定まりグラフォエピタキシの原理で単結晶
成長が可能となる。また、下地の格子定数を引き継いだ
単結晶成長ではないため、その不整合に起因する界面近
傍の歪みや欠陥が無く良好な電気特性を得ることができ
る。In the present invention, a crystalline dielectric thin film is formed on irregularities. At this time, since the orientation of the film formed inside the concave portion is restricted not only from the base but also from the side, the orientation is determined, and single crystal growth can be performed by the principle of graphoepitaxy. In addition, since the single crystal growth is not performed by inheriting the lattice constant of the underlayer, good electric characteristics can be obtained without distortion or defects near the interface due to the mismatch.
【0018】[0018]
【発明の実施の形態】以下、本発明の実施の形態を挙げ
て図面を参照しながら詳細に説明する。Embodiments of the present invention will be described below in detail with reference to the drawings.
【0019】まず、図1(a)に示すように、基板
(1)上に第一の誘電体薄膜(2)、金属薄膜(3)及
び第二の誘電体薄膜(4)を形成する。First, as shown in FIG. 1A, a first dielectric thin film (2), a metal thin film (3) and a second dielectric thin film (4) are formed on a substrate (1).
【0020】その後、通常半導体プロセスで用いられる
リソグラフィ手段により、図1(b)に示すように第二
の誘電体薄膜を局所的に除去する。この結果、表面には
凹部が生じる。Thereafter, as shown in FIG. 1B, the second dielectric thin film is locally removed by lithography means usually used in a semiconductor process. As a result, a concave portion is formed on the surface.
【0021】次に、強誘電体薄膜または高誘電体薄膜を
MOCVD法で形成する。成膜ガスは、金属薄膜上には
非常に付着し難いのに対して誘電体膜上には付着し易い
ため、第二の誘電体膜が露出した面に強誘電体薄膜また
は高誘電体薄膜が形成される。特に、該誘電体薄膜がS
iO2又はSi3N4を主成分に含む場合に成膜ガスは吸
着しやすい。従って、図1(c)に示すように、初期成
長核(5)は第二の誘電体膜(4)上および凹部内の側
面位置に形成される。Next, a ferroelectric thin film or a high dielectric thin film is formed by MOCVD. The deposition gas is very difficult to adhere to the metal thin film, but easily adheres to the dielectric film. Therefore, the ferroelectric thin film or the high dielectric thin film is exposed on the surface where the second dielectric film is exposed. Is formed. In particular, when the dielectric thin film is S
When iO 2 or Si 3 N 4 is contained as a main component, the deposition gas is easily adsorbed. Therefore, as shown in FIG. 1 (c), the initial growth nucleus (5) is formed on the second dielectric film (4) and at the side surface position in the concave portion.
【0022】上記凹部内の側面に形成される強誘電体ま
たは高誘電体の成長核の配向は、側面と同時に下地から
制限を受けるため配向が定まり、凹部内には単結晶の強
誘電体または高誘電体薄膜(6)が形成される。一方、
凹部の外の第二の誘電体薄膜(4)の主表面ではそのよ
うな制限がないため、多結晶の強誘電体または高誘電体
薄膜(7)が形成される(図1(d))。The orientation of the growth nucleus of the ferroelectric or high dielectric formed on the side surface in the concave portion is determined because it is restricted from the base simultaneously with the side surface, and the orientation is determined. A high dielectric thin film (6) is formed. on the other hand,
Since there is no such restriction on the main surface of the second dielectric thin film (4) outside the concave portion, a polycrystalline ferroelectric or high dielectric thin film (7) is formed (FIG. 1 (d)). .
【0023】上記の強誘電体あるいは高誘電体薄膜の形
成には、被覆性、選択性および組成制御性が必要であ
り、これらの条件を満たす方法としてはMOCVD法が
望ましい。The formation of the above ferroelectric or high dielectric thin film requires coverage, selectivity and composition controllability, and MOCVD is desirable as a method satisfying these conditions.
【0024】凹部の寸法が増大すると、凹部内の結晶の
体積エネルギーが増加し、単結晶性の維持が困難になり
再現性が低下するため、上述の方法による単結晶膜の形
成では、誘電体膜に形成する凹部の膜面内の一辺を0.
1〜5μmにすることが望ましい。この凹部の膜面内の
形状は矩形形状であることが望ましい。When the size of the concave portion is increased, the volume energy of the crystal in the concave portion is increased, and it becomes difficult to maintain single crystallinity and the reproducibility is reduced. One side in the film surface of the concave portion formed in the film is set to 0.
Desirably, the thickness is 1 to 5 μm. It is desirable that the shape of the concave portion in the film surface be rectangular.
【0025】また、凹部内の側面における結晶核のラン
ダムな発生を抑制し多結晶化を抑制するため、凹部の段
差は10〜50nmであることが望ましい。Further, in order to suppress the random generation of crystal nuclei on the side surface inside the concave portion and to suppress the polycrystallization, it is preferable that the step of the concave portion is 10 to 50 nm.
【0026】上記の結晶成長は、基板の格子定数に左右
されるものでないため、Si基板やGaAs基板などの
基板材料の選択に制約を与えるものでは無いことは言う
までもない。Since the above-mentioned crystal growth does not depend on the lattice constant of the substrate, it goes without saying that there is no restriction on the selection of a substrate material such as a Si substrate or a GaAs substrate.
【0027】また、金属薄膜にも特別な制約は無く、強
誘電体容量や高誘電体容量が使われている素子によく用
いられるPt、Pt/Ti、Au、RuOx、IrOx等
の電極材料の全てが適用可能である。There is no particular limitation on the metal thin film, and electrodes such as Pt, Pt / Ti, Au, RuO x , and IrO x are often used for devices using a ferroelectric capacitor or a high dielectric capacitor. All of the materials are applicable.
【0028】第一の誘電体薄膜には、SiO2やSi3N
4等の半導体産業で通常用いられている誘電体の全てが
適用可能である。なお、第一の誘電体薄膜は必要に応じ
て設けられる。The first dielectric thin film is made of SiO 2 or Si 3 N
All of the dielectrics commonly used in the semiconductor industry, such as 4, are applicable. Note that the first dielectric thin film is provided as needed.
【0029】第二の誘電体薄膜は、有機金属ガスの吸着
の容易なSiO2又はSi3N4を主成分とする誘電体薄
膜が望ましい。The second dielectric thin film is preferably a dielectric thin film containing SiO 2 or Si 3 N 4 as a main component, which easily adsorbs an organic metal gas.
【0030】強誘電体や高誘電体には、通常、強誘電体
や高誘電体が使用される素子に用いられているものの全
てが適用可能である。例えば、BaTiO3、Ba1-xS
rxTiO3等のバリウム系強誘電体、PbTiO3、P
bZr1-xTixO3、Pb(La1-yZry)1-xTixO3
等の鉛系強誘電体、SrBi2Ti2O9等のビスマス系
強誘電体、SrTiO3等のストロンチウム系高誘電体
などが挙げられる。As the ferroelectric or high-dielectric, all of those usually used for elements using the ferroelectric or high-dielectric can be applied. For example, BaTiO 3 , Ba 1-x S
barium-based ferroelectrics such as r x TiO 3 , PbTiO 3 , P
bZr 1-x Ti x O 3 , Pb (La 1-y Zr y) 1-x Ti x O 3
And the like, a bismuth-based ferroelectric such as SrBi 2 Ti 2 O 9, and a strontium-based high dielectric such as SrTiO 3 .
【0031】[0031]
【実施例】以下、本発明を実施例によりさらに説明する
が、本発明はこれらに限定するものではない。EXAMPLES The present invention will be further described below with reference to examples, but the present invention is not limited to these examples.
【0032】まず、図2(a)に示すように、Si酸化
膜基板(11)上にスパッタ法でPt/Ti薄膜(1
3)をPt膜厚2000Å、Ti膜厚500Åに形成し
た後、SiO2薄膜(14)をCVD法により膜厚40
00Åに形成した。First, as shown in FIG. 2A, a Pt / Ti thin film (1) is formed on a Si oxide film substrate (11) by a sputtering method.
3) the Pt film thickness 2000 Å, after forming a Ti film thickness 500 Å, the film thickness by CVD SiO 2 film (14) 40
00 °.
【0033】その後、通常のリソグラフィ技術を用い
て、図2(b)のようにSiO2薄膜を局所的に除去し
て3×3μm2の凹部(膜面内の形状は矩形形状)を形
成した。Thereafter, the SiO 2 thin film was locally removed by a usual lithography technique to form a 3 × 3 μm 2 concave portion (the shape in the film surface was rectangular) as shown in FIG. 2B. .
【0034】次に、PbZrxTi1-xO3薄膜(PZT
薄膜)をMOCVD法で形成した。成膜ガスにPb(C
11H19O2)2、Zr(C11H19O2)4及びTi(i-O
C3H 7)4を用い、ガス流量はそれぞれ10〜50scc
m、10〜50sccm、1〜5sccm、基板温度は450〜
650℃、成膜圧力は1〜10Torrに制御した。成膜ガ
スは、Pt/Ti薄膜上には付着しにくいため、SiO
2薄膜上に選択的に付着する。従って、図2(c)に示
すように、PZT初期成長核(15)はSiO2薄膜
(14)上および凹部内の側面位置に形成される。Next, PbZrxTi1-xOThreeThin film (PZT
A thin film) was formed by the MOCVD method. Pb (C
11H19OTwo)Two, Zr (C11H19OTwo)FourAnd Ti (i-O
CThreeH 7)FourAnd the gas flow rate is 10-50 scc
m, 10-50 sccm, 1-5 sccm, substrate temperature 450-
650 ° C. and the film forming pressure were controlled at 1 to 10 Torr. Deposition gas
Is difficult to adhere to the Pt / Ti thin film,
TwoSelectively adheres to thin films. Therefore, as shown in FIG.
As shown, the PZT initial growth nucleus (15) is SiO 2TwoThin film
(14) It is formed on the side surface position in the upper part and in the concave part.
【0035】上記条件下でPZTを、凹部を有しないS
iO2薄膜とPt/Ti薄膜の平面上に堆積する場合、
初期成長核は(100)面配向する。しかし、本発明で
はPt/Ti薄膜が露出した箇所では成長核がSiO2
薄膜とPt/Ti薄膜の境界にのみ形成され、その時配
向は下地と側面の両方から制限を受けて一つに定まる。
そのため、Pt/Ti薄膜が露出した面内には単結晶の
PZT薄膜(16)が形成される。一方、SiO2薄膜
(14)で被覆された箇所では面内回転に対する制限が
ないため(100)面内で回転した多結晶PZT薄膜
(17)が形成される(図2(d))。Under the above conditions, PZT was replaced with S
When depositing on the plane of the iO 2 thin film and the Pt / Ti thin film,
The initial growth nuclei are (100) -oriented. However, in the present invention, the growth nucleus is formed of SiO 2 at the portion where the Pt / Ti thin film is exposed.
It is formed only at the boundary between the thin film and the Pt / Ti thin film. At that time, the orientation is limited to one from both the base and the side surfaces.
Therefore, a single-crystal PZT thin film (16) is formed on the exposed surface of the Pt / Ti thin film. On the other hand, since there is no restriction on the in-plane rotation at the portion covered with the SiO 2 thin film (14), a polycrystalline PZT thin film (17) rotated in the (100) plane is formed (FIG. 2D).
【0036】[0036]
【発明の効果】以上の説明から明らかなように本発明に
よれば、へテロエピタキシャルのように新たな格子整合
用基板を持ち込むことなく、グラフォエピタキシャル成
長により薄膜形成を行うため、特別に工夫することなく
Si基板を用いることができる。そのため、容易に薄膜
形成ができるとともに、特別な材料を用いる必要がない
ため安定な薄膜を形成することができる。As is apparent from the above description, according to the present invention, a thin film is formed by grapho-epitaxial growth without bringing in a new substrate for lattice matching as in heteroepitaxial. A Si substrate can be used without any special measures. Therefore, a thin film can be easily formed, and a stable thin film can be formed because there is no need to use a special material.
【0037】また、ヘテロエピタキシャルで得られる膜
に比べて、界面の歪みや欠陥を抑制できる。その理由
は、ヘテロエピタキシャル成長は、基板側と原子配列や
格子定数が近いことを利用して成長させるため微小な格
子不整合が生じ、そのため歪みや欠陥が生じるのに対
し、グラフォエピタキシャル成長は、基板側との界面エ
ネルギーによる配向を利用しており、上記のような微小
な格子不整合に起因する歪みや欠陥は生じないためであ
る。これによりI−V特性が大幅に改善され、リーク電
流が5Vで10-8A/cm2程度に抑えられ、さらに再
現性良く成膜ことができる。Further, as compared with a film obtained by heteroepitaxial, distortion and defects at the interface can be suppressed. The reason is that heteroepitaxial growth is performed by utilizing the closeness of the atomic arrangement and lattice constant to the substrate side, so that a small lattice mismatch occurs, thereby causing distortion and defects. This is because the orientation by the interface energy with the side is used, and no distortion or defect due to the minute lattice mismatch as described above occurs. As a result, the IV characteristics are greatly improved, the leakage current is suppressed to about 10 −8 A / cm 2 at 5 V, and a film can be formed with higher reproducibility.
【図1】本発明の誘電体薄膜の形成方法の工程断面図で
ある。FIG. 1 is a process sectional view of a method for forming a dielectric thin film of the present invention.
【図2】本発明の誘電体薄膜の形成方法の工程断面図で
ある。FIG. 2 is a process sectional view of a method for forming a dielectric thin film of the present invention.
1 基板 2 第一の誘電体薄膜 3 金属薄膜 4 第二の誘電体薄膜 5 初期成長核 6 単結晶の強誘電体あるいは高誘電体薄膜 7 多結晶の強誘電体あるいは高誘電体薄膜 11 Si酸化膜基板 13 Pt/Ti薄膜 14 SiO2薄膜 15 PZT初期成長核 16 単結晶PZT薄膜 17 多結晶PZT薄膜DESCRIPTION OF SYMBOLS 1 Substrate 2 First dielectric thin film 3 Metal thin film 4 Second dielectric thin film 5 Initial growth nucleus 6 Single crystal ferroelectric or high dielectric thin film 7 Polycrystalline ferroelectric or high dielectric thin film 11 Si oxidation Film substrate 13 Pt / Ti thin film 14 SiO 2 thin film 15 PZT initial growth nucleus 16 Single crystal PZT thin film 17 Polycrystalline PZT thin film
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI H01L 29/792 (58)調査した分野(Int.Cl.7,DB名) H01L 27/10 451 H01L 21/8242 H01L 21/8247 H01L 27/108 H01L 29/788 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 identification code FI H01L 29/792 (58) Investigated field (Int.Cl. 7 , DB name) H01L 27/10 451 H01L 21/8242 H01L 21 / 8247 H01L 27/108 H01L 29/788
Claims (6)
電体あるいは高誘電体薄膜形成時に凹部内で成長核の配
向が下地と側面から制限を受けて定まるように、凹部を
形成して該凹部内に下層の一部を露出させ、次いで、該
凹部を有する表面上に強誘電体あるいは高誘電体薄膜を
形成し、該凹部内にグラフォエピタキシャル成長により
単結晶の強誘電体あるいは高誘電体薄膜を形成すること
を特徴とする誘電体薄膜の形成方法。The present invention relates to a method in which a surface layer of a laminated thin film on a substrate is later strongly induced.
Distribution of growth nuclei in the recesses when forming dielectric or high dielectric thin films
A concave portion is formed to expose a part of the lower layer in the concave portion so that the direction is determined by the restriction from the base and the side surface, and then a ferroelectric or high dielectric thin film is formed on the surface having the concave portion. Forming a single crystal ferroelectric or high dielectric thin film in the recess by grapho-epitaxial growth .
金属薄膜上に誘電体薄膜を形成する工程と、該誘電体薄
膜に、後の強誘電体あるいは高誘電体薄膜形成時に凹部
内で成長核の配向が下地と側面から制限を受けて定まる
ように、凹部を形成して該凹部内に前記金属薄膜の一部
を露出させる工程と、該凹部を有する表面上に強誘電体
あるいは高誘電体薄膜を形成し、該凹部内にグラフォエ
ピタキシャル成長により単結晶の強誘電体あるいは高誘
電体薄膜を形成する工程を含むことを特徴とする誘電体
薄膜の形成方法。2. A step of forming a metal thin film on a substrate, a step of forming a dielectric thin film on the metal thin film, and forming a recess in the dielectric thin film when forming a ferroelectric or high dielectric thin film later.
Orientation of growth nuclei is limited by the base and sides
Gurafoe manner, thereby exposing a portion of the metal thin film in the recess to form a recess, and forming a ferroelectric or high-dielectric thin film on a surface having a recess, into the recess
A method for forming a dielectric thin film, comprising the step of forming a single crystal ferroelectric or high dielectric thin film by epitaxial growth .
項1又は2記載の誘電体薄膜の形成方法。3. The method for forming a dielectric thin film according to claim 1, wherein the step of the concave portion is 10 to 50 nm.
μmである請求項1、2又は3記載の誘電体薄膜の形成
方法。4. One side of the recess in the plane of the laminated thin film is 0.1 to 5
The method for forming a dielectric thin film according to claim 1, 2 or 3, wherein the thickness is μm.
有機金属を用いる化学気相成長法によって行う請求項1
〜4のいずれか1項に記載の誘電体薄膜の形成方法。5. A ferroelectric or high-dielectric thin film is formed by a chemical vapor deposition method using an organic metal.
5. The method for forming a dielectric thin film according to any one of items 4 to 4.
i3N4である請求項1〜5のいずれか1項に記載の誘電
体薄膜の形成方法。6. The main component of the dielectric thin film is SiO 2 or S
The method for forming a dielectric thin film according to claim 1, wherein the dielectric thin film is i 3 N 4 .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8167282A JP3018985B2 (en) | 1996-06-27 | 1996-06-27 | Method of forming dielectric thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8167282A JP3018985B2 (en) | 1996-06-27 | 1996-06-27 | Method of forming dielectric thin film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1017397A JPH1017397A (en) | 1998-01-20 |
| JP3018985B2 true JP3018985B2 (en) | 2000-03-13 |
Family
ID=15846869
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8167282A Expired - Lifetime JP3018985B2 (en) | 1996-06-27 | 1996-06-27 | Method of forming dielectric thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3018985B2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5330931A (en) | 1993-09-22 | 1994-07-19 | Northern Telecom Limited | Method of making a capacitor for an integrated circuit |
-
1996
- 1996-06-27 JP JP8167282A patent/JP3018985B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5330931A (en) | 1993-09-22 | 1994-07-19 | Northern Telecom Limited | Method of making a capacitor for an integrated circuit |
| US5452178A (en) | 1993-09-22 | 1995-09-19 | Northern Telecom Limited | Structure and method of making a capacitor for an intergrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1017397A (en) | 1998-01-20 |
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