JP2022039441A - Display device and control method for the same - Google Patents

Abstract

An object of the present invention is to provide a display device whose cost can be reduced. A display device includes a light emitting element and a pixel circuit having a constant current source and a PWM control circuit, the constant current source outputs a constant current when a light emission enable signal is active in a light emission mode, When the light emission enable signal is inactive, the output is set to HiZ state, and the PWM control circuit outputs the comparison result between the video signal and the sawtooth slope signal to the control node when the light emission enable signal is active in the light emission mode. is provided between the control node and the reference potential terminal, and is turned off and emits light when the light emission enable signal is active. a P-channel first switch transistor that turns on when the enable signal is inactive; a P-channel control transistor that is provided between the constant current source and the light emitting element and turns on and off according to the potential of the control node; have [Selection drawing] Fig. 1

Description

The present invention relates to a display device and a control method thereof, for example, a display device suitable for reducing costs and a control method thereof.

In recent years, the development of display devices in which self-luminous light emitting elements such as OLEDs (Organic Light Emitting Diodes) and minute LEDs (hereinafter referred to as micro LEDs) are mounted in a two-dimensional matrix has been developed. Here, when a micro LED is used as the light emitting element, the gradation expression of the light emitting element is often performed by PWM drive from the viewpoint of suppressing the color shift of light emission. For example, Patent Document 1 discloses a configuration of a drive circuit that PWM-drives a light emitting element.

Japanese Unexamined Patent Publication No. 2014-150482

However, in the configuration of Patent Document 1, there is a problem that the cost increases because the drive circuit that PWM-drives the light emitting element has the configuration of the CMOS circuit.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a display device capable of reducing costs and a control method thereof.

The display device according to one aspect of the present invention includes a light emitting element and a pixel circuit for driving the light emitting element, and the pixel circuit includes a constant current source and a PWM (Pulse Width Modulation) control circuit. The constant current source is used when, in the light emission mode among the operation modes configured by at least the initialization mode, the scan mode, and the light emission mode, the light emission permission signal that switches between active and inactive at a predetermined cycle is active. A constant current is output and the output is set to the HiZ state when the light emission permission signal is inactive. The PWM control circuit is a video signal when the light emission permission signal is active in the light emission mode. Between the amplification transistor and the control node and the reference potential terminal, which outputs the comparison result between the and sawtooth-wavy slope signal to the control node and stops the output of the comparison result when the light emission permission signal is inactive. The first switch transistor of the same conductive type as the amplification transistor, the constant current source, and the light emission, which are provided in the above and are turned off when the light emission permission signal is active and turned on when the light emission permission signal is inactive. It has a control transistor of the same conductive type as the amplification transistor, which is provided between the element and is switched on and off according to the potential of the control node. Since this display device can PWM drive the light emitting element without using a CMOS circuit, the cost can be reduced.

The control method of the display device according to one aspect of the present invention includes a light emitting element and a pixel circuit for driving the light emitting element, and the pixel circuit includes a constant current source and a PWM (Pulse Transistor) control circuit. , The PWM control circuit is provided between the amplification transistor, the first switch transistor of the same conductive type as the amplification transistor, the constant current source, and the light emitting element, and is provided according to the potential of the control node. It is a control method of a display device having a control transistor of the same conductive type as the amplification transistor which is switched on and off, and the light emission of the operation mode configured by at least the initialization mode, the scan mode, and the light emission mode. In the mode, when the light emission permission signal that switches between active and inactive in a predetermined cycle is inactive, the output of the constant current source is set to the HiZ state, and the amplification transistor is turned off, and the first switch is used. By turning on the transistor and conducting the conduction between the reference potential terminal and the control node, the control transistor is turned on, and when the emission permission signal is active, a constant current is output from the constant current source and the constant current is output. With the first switch transistor turned off, the amplification transistor outputs a comparison result between the video signal and the sawtooth-like slope signal to the control node. In this display device control method, the light emitting element can be PWM-driven without using a CMOS circuit, so that the cost can be reduced.

The display device according to one aspect of the present invention includes a light emitting element and a pixel circuit for driving the light emitting element, and the pixel circuit includes a constant current source for outputting a constant current and PWM (Pulse Width Modulation) control. The PWM control circuit comprises a circuit, and the PWM control circuit sets a comparison result between a video signal and a slope signal as a control node in the light emission mode among the operation modes configured by at least the initialization mode, the scan mode, and the light emission mode. Between the output amplification transistor, the load transistor of the same conductive type as the amplification transistor, and the source and gate of the load transistor, the source of which is connected to the control node and the gate can be set to a floating state. It has a capacitive element provided, and a control transistor of the same conductive type as the amplification transistor, which is provided between the constant current source and the light emitting element and is switched on and off according to the potential of the control node. Since this display device can PWM drive the light emitting element without using a CMOS circuit, the cost can be reduced.

The control method of the display device according to one aspect of the present invention includes a light emitting element and a pixel circuit for driving the light emitting element, and the pixel circuit includes a constant current source for outputting a constant current and a PWM (Pulse Withth). A Modulation) control circuit is provided, and the PWM control circuit compares a video signal with a slope signal in the light emission mode among the operation modes configured by at least the initialization mode, the scan mode, and the light emission mode. An amplification transistor to be output to the control node, a load transistor having the same conductive type as the amplification transistor, a source connected to the control node, and a gate configurable so that the gate can be set to a floating state, a source of the load transistor, and a load transistor. A capacitive element provided between the gates and a control transistor of the same conductive type as the amplification transistor, which is provided between the constant current source and the light emitting element and is switched on and off according to the potential of the control node. A method for controlling a display device, wherein a bias potential is applied to the gate of the load transistor, and the gate of the load transistor is set to a floating state in a state where the bias potential is applied to the gate of the load transistor. In the light emitting mode, the light emitting element is driven by the pixel circuit. In this display device control method, the light emitting element can be PWM-driven without using a CMOS circuit, so that the cost can be reduced.

INDUSTRIAL APPLICABILITY According to the present invention, it is possible to provide a display device capable of reducing costs and a control method thereof.

It is a figure which shows the structural example of the pixel provided in the display device which concerns on Embodiment 1. FIG. It is a timing chart which shows the operation of the display device which concerns on Embodiment 1. FIG. It is a figure which shows the structural example of the pixel provided in the display device which concerns on Embodiment 2. FIG. It is a timing chart which shows the operation of the display device which concerns on Embodiment 2. It is a figure which shows the structural example of the pixel provided in the display device which concerns on Embodiment 3. FIG. It is a timing chart which shows the operation of the display device which concerns on Embodiment 3. FIG.

<Embodiment 1>
FIG. 1 is a diagram showing a configuration example of a pixel 1 provided in the display device according to the first embodiment. The display device according to the first embodiment is a self-luminous and active matrix type display device such as an OLED display or a micro LED display.

For example, the display device according to the first embodiment includes at least a panel in which a plurality of pixels 1 are arranged in a two-dimensional matrix, and a control circuit composed of a data driver, a scan driver, and the like. The control circuit scans (selects) a plurality of pixels 1 arranged in a two-dimensional matrix in order for each row, and writes a video signal to the pixels 1 in the scanned row. Then, for example, when the writing of the video signal to all the pixels 1 is completed, the light emitting elements of those pixels 1 are made to emit light all at once.

As shown in FIG. 1, the pixel 1 is composed of a light emitting element D1 and a pixel circuit (driving circuit) 10 for driving the light emitting element D1 by PWM (Pulse Width Modulation).

The light emitting element D1 is a self-luminous element, such as an organic EL or a micro LED. In this embodiment, a case where the light emitting element D1 is a micro LED will be described as an example. When the light emitting element D1 is a micro LED, the gradation expression of the light emitting element D1 is often performed by PWM drive from the viewpoint of suppressing the color shift of light emission.

The pixel circuit 10 includes a constant current output circuit (constant current source) 11 and a PWM control circuit 12.

The constant current output circuit 11 is configured to be capable of outputting a constant current. Specifically, the constant current output circuit 11 includes transistors TR11 to TR13 and a capacitive element C11. In this embodiment, the case where the transistors TR11 to TR13 are all P-channel MOS transistors will be described as an example.

The transistor TR 11 is provided between the input terminal pams and the node N1 which is an output node of the constant current output circuit 11. Depending on the operation mode, the input terminal pams may be supplied with the power potential VDD from the outside, the input potential Vpam corresponding to the video signal may be supplied, or the HiZ state may be set. The HiZ state is an abbreviation for a high impedance state, and when the HiZ state is set in the input terminal (here, the input terminal pams), there is no signal supplied to the input terminal, that is, the input terminal. Is the open state.

The transistor TR13 is provided between the gate of the transistor TR11 and a reference potential terminal (hereinafter referred to as a reference potential terminal VSS) to which a reference potential (here, ground potential) VSS is supplied, and is provided as a reset signal input terminal (hereinafter referred to as a reset signal input terminal). , It is referred to as a reset signal input terminal rst), and is switched on and off based on the reset signal rst applied to the gate. For example, the transistor TR13 is turned on when the reset signal rst is L level, and turned off when the reset signal rst is H level.

The transistor TR12 is provided between the gate of the transistor TR11 and the drain of the transistor TR11, and is based on a scan signal SC applied to the gate via a scan signal input terminal (hereinafter referred to as a scan signal input terminal SC). To switch on and off. For example, the transistor TR12 is turned on when the scan signal SC is at the L level and turned off when the scan signal SC is at the H level.

The capacitive element C11 is provided between the gate of the transistor TR11 and the power supply potential terminal (hereinafter referred to as the power supply potential terminal VDD) to which the power supply potential VDD is supplied.

The PWM control circuit 12 includes transistors TR21 to TR25 and a capacitive element C21. In the present embodiment, the case where the transistors TR21 to TR25 are all P-channel MOS transistors will be described as an example.

The transistor (control transistor) TR21 is provided between the node N1 which is the output node of the constant current output circuit 11 and the anode of the light emitting element D1 and switches on / off based on the potential of the node (control node) N2. For example, the transistor TR21 is turned on when the potential of the node N2 indicates the reference potential VSS, and is turned off when the potential of the node N2 indicates the power supply potential VDD.

The transistor TR22 is an amplification transistor and is provided between the input terminal in1 and the node N2. Depending on the operation mode, the input terminal in1 is supplied with a power supply potential VDD, a video signal (potential corresponding to the video signal) Vpwm, or a HiZ state is set.

The transistor (third switch transistor) TR25 is provided between the gate of the transistor TR22 and the reference potential terminal VSS, and switches on and off based on the reset signal rst applied to the gate. For example, the transistor TR25 is turned on when the reset signal rst is L level and turned off when the reset signal rst is H level.

The transistor (second switch transistor) TR24 is provided between the gate of the transistor TR22 and the drain of the transistor TR22, and switches on and off based on the scan signal SC applied to the gate. For example, the transistor TR24 is turned on when the scan signal SC is at the L level and turned off when the scan signal SC is at the H level.

The capacitive element C21 is provided between the gate of the transistor TR22 and the input terminal in2. Depending on the operation mode, the input terminal in2 is supplied with a constant potential indicating the maximum value of the video signal from the outside, or a sawtooth-shaped slope signal is supplied.

The transistor (first switch transistor) TR23 is provided between the reference potential terminal VSS and the node N2, and switches on and off based on the light emission permission signal em applied to the gate via the input terminal em. For example, the transistor TR23 is turned on when the light emission permission signal em is L level (here, inactive), and turns off when the light emission permission signal em is H level (here, active).

An additional capacitive element may be provided between the gate and the source of the transistor TR21.

(Operation of the display device according to the first embodiment)
Subsequently, the operation (control method) of the display device according to the first embodiment will be described with reference to FIG. 2 in addition to FIG. FIG. 2 is a timing chart showing the operation of the display device according to the first embodiment. The operation mode of the display device according to the first embodiment is composed of at least an initialization mode, a scan mode, and a light emission mode.

First, in the initialization mode (time t11 to t12), the reset signal rst is set to the L level, the scan signal SC is set to the H level, and the light emission permission signal em is set to the L level. Further, the HiZ state is set to the input terminals pans and in1, and the potential Vpwm_max, which is the maximum potential of the video signal Vpwm, is supplied to the input terminal in2.

As a result, in the PWM control circuit 12, since the transistor TR25 is turned on while the transistor TR24 is turned off, the gate potential Vg22 of the transistor TR22 is initialized to the reference potential VSS (0V).

Similarly, in the constant current output circuit 11, since the transistor TR13 is turned on while the transistor TR12 is turned off, the gate potential Vg11 of the transistor TR11 is initialized to the reference potential VSS (0V).

Further, in the PWM control circuit 12, since the transistor TR23 is turned on, the potential of the node N2 indicates the reference potential VSS (0V). As a result, the transistor TR21 is turned on. However, at this time, since the input terminal pams is set to the HiZ state and the output of the constant current output circuit 11 is in the HiZ state, no current flows through the light emitting element D1. That is, the light emitting element D1 does not emit light.

After that, the operation mode is switched from the initialization mode to the scan mode (time t12).
In the scan mode (time t12 to t15), the reset signal rst first switches from the L level to the H level (time t12).

As a result, in the PWM control circuit 12, the transistor TR25 is turned off, so that the gate of the transistor TR22 is in a floating state with the reference potential VSS applied. Similarly, in the constant current output circuit 11, since the transistor TR13 is turned off, the gate of the transistor TR11 is in a floating state in a state where the reference potential VSS is applied.

After that, the scan signal SC temporarily switches from the H level to the L level, and the light emission permission signal em also temporarily switches from the L level to the H level accordingly (time t13). Further, at this time, the video signal Vpwm is supplied to the input terminal in1, and the input potential Vpam corresponding to the constant current set value is supplied to the input terminal pams. Of the scan modes, the period during which the video signal Vpwm is supplied to the input terminal in1 (time t13 to t14) is also particularly referred to as a video signal supply mode.

As a result, in the PWM control circuit 12, since the transistor TR24 is turned on, the video signal Vpwm supplied to the input terminal in1 is applied to the gate of the transistor TR22 via the transistors TR22 and TR24. At this time, the gate potential Vg22 of the transistor TR22 rises to Vpwm- | Vth22 |. Note that Vpwm represents the potential of the video signal Vpwm, and Vth22 represents the threshold voltage of the transistor TR22.

Similarly, in the constant current output circuit 11, since the transistor TR12 is turned on, the input potential Vpam supplied to the input terminal pams is applied to the gate of the transistor TR11 via the transistors TR11 and TR12. At this time, the gate potential Vg11 of the transistor TR11 becomes Vpam- | Vth11 |. Note that Vth 11 represents the threshold voltage of the transistor TR11.

Further, in the PWM control circuit 12, since the transistor TR23 is turned off, the potential Vn2 of the node N2 indicates Vpwm- | Vth22 |. On the other hand, at this time, since the input potential Vpam is supplied to the input terminal pams, the output potential (potential of the node N1) Vn1 of the constant current output circuit 11 indicates Vpam- | Vth11 |. Here, the input potential Vpam is such that the potential difference Vgs21 (= Vn2-Vn1) between the gate and the source of the transistor TR21 becomes equal to or higher than the threshold voltage Vth21 of the transistor TR21 (that is, | Vgs21 | ≦ | Vth21 |). ) It is preset. As a result, the transistor TR21 is turned off, so that no current flows through the light emitting element D1. That is, the light emitting element D1 does not emit light.

After that, the scan signal SC is switched from the L level to the H level again, and the light emission permission signal em is also switched from the H level to the L level accordingly (time t14). Further, the HiZ state is set again in the input terminals pans and in1.

As a result, in the PWM control circuit 12, the transistor TR24 is turned off, so that the gate of the transistor TR22 is in a floating state with the potential Vpwm- | Vth22 | applied (time t14 to t15). Similarly, in the constant current output circuit 11, since the transistor TR12 is turned off, the gate of the transistor TR11 is in a floating state with the potential Vpam- | Vth11 | applied (time t14 to t15).

After that, the operation mode is switched from the scan mode to the light emission mode (time t15).
In the light emission mode (time t15 to t19), the potential of the light emission permission signal em is periodically switched while the reset signal rst is fixed at the H level and the scan signal SC is fixed at the H level.

Here, during the period when the light emission permission signal em indicates the L level, the HiZ state is set to the input terminals pans and in1, and the fixed potential of the potential Vpwm_max is supplied to the input terminal in2. On the other hand, during the period when the light emission permission signal em indicates the H level, the power supply potential VDD is supplied to the input terminals pans and in1, and the slope signal falling from the potential Vpwm_max to the potential Vpwm_min is supplied to the input terminal in2. The potential Vpwm_max represents the maximum potential of the video signal Vpwm, and the potential Vpwm_min represents the minimum potential of the video signal Vpwm.

First, during the period when the light emission permission signal em is at the L level (for example, at time t15 to t16), the output of the transistor TR22 is in the HiZ state and the transistor TR23 is turned on, so that the potential of the node N2 is the reference potential VSS (0V). show. In other words, the potential of node N2 is initialized to the reference potential VSS. As a result, the transistor TR21 is turned on. However, at this time, since the input terminal pams is set to the HiZ state and the output of the constant current output circuit 11 is in the HiZ state, no current flows through the light emitting element D1. That is, in the light emitting mode, the light emitting element D1 does not emit light while the light emitting permission signal em is at the L level.

Next, while the light emission permission signal em is at the H level, the transistor TR23 is turned off, while the transistor TR22 outputs the comparison result between the video signal Vpwm and the slope signal to the node N2.

Here, assuming that the amount of change in the potential of the input terminal in2 from Vpwm_max is ΔVin2, the gate potential Vg22 of the transistor TR22 can be expressed by the following equation (1).

Vg22 = Vpwm- | Vth22 | + ΔVin2 ... (1)

The on / off of the transistor TR22 is determined by the magnitude relationship between the potential difference Vgs22 between the gate and the source of the transistor TR22 and the threshold voltage Vth22 of the transistor TR22. For example, the transistor TR22 is turned on when | Vgs22 |-| Vth22 |> 0 and turned off when | Vgs22 |-| Vth22 | ≦ 0.

Here, | Vgs22 |-| Vth22 | can be expressed by the following equation (2) from the equation (1).

｜ Vgs22 ｜ － ｜ Vth22 ｜
= VDD-Vg22- | Vth22 |
= VDD-Vpwm + | Vth22 | -ΔVin2- | Vth22 |
= VDD-Vpwm-ΔVin2 ... (2)

As can be seen from the equation (2), the transistor TR22 switches on and off independently of the threshold voltage Vth22. That is, even if the threshold voltage Vth22 has a change or characteristic variation due to aged deterioration, the transistor TR22 can accurately output the comparison result between the video signal Vpwm and the slope signal.

For example, when the potential of the slope signal is large and the gate potential Vg22 of the transistor TR22 indicates VDD- | Vth22 | or more, the transistor TR22 is turned off (for example, time t16 to t17). At this time, the transistor TR23 is also turned off, but since the potential of the node N2 maintains the reference potential VSS (initialized state), the transistor TR21 is turned on. As a result, the light emitting element D1 emits light.

When the potential of the slope signal gradually decreases and the gate potential Vg22 of the transistor TR22 becomes less than VDD- | Vth22 |, the transistor TR22 is turned on (for example, time t17 to t18). As a result, the potential of the node N2 rises to the power supply potential VDD, so that the transistor TR21 is turned off. As a result, the light emission of the light emitting element D1 is stopped.

In the light emission mode, operations such as times t15 to t18 are repeated (time t15 to t19). The ratio (duty ratio) of the light emitting period of the light emitting element D1 in the light emitting mode, that is, the brightness of the light emitting element D1 is determined based on the video signal Vpwm. As can be seen from the above description, the slope signal has a waveform gradient (here, falling) such that the amplification transistor TR22 is switched from off to on by comparison with the video signal Vpwm by the amplification transistor TR22.

As described above, in the display device according to the first embodiment, each transistor provided in the pixel circuit 10 is composed of the same conductive type MOS transistor. Thereby, the display device according to the first embodiment can reduce the cost as compared with the case where the CMOS circuit is used for the pixel circuit.

Further, since the pixel circuit 10 is controlled so that the transistors TR22 and TR23 are not turned on at the same time, the penetration current flowing through the transistors TR22 and TR23 can be suppressed to substantially zero. Since the transistor TR23 is not used as a load transistor but merely as a switch transistor, it is not necessary to increase the transistor size and the resistance value, and the circuit scale is also increased. It is suppressed.

In the present embodiment, the case where each transistor provided in the pixel circuit 10 is a P-channel MOS transistor has been described as an example, but the present invention is not limited to this. Each transistor provided in the pixel circuit 10 may be an N-channel MOS transistor.

<Embodiment 2>
FIG. 3 is a diagram showing a configuration example of pixels 2 provided in the display device according to the second embodiment. The display device according to the second embodiment includes a plurality of pixels 2 instead of the plurality of pixels 1 as compared with the case of the display device according to the first embodiment.

As shown in FIG. 3, the pixel 2 is composed of a light emitting element D1 and a pixel circuit (driving circuit) 20 for PWM driving the light emitting element D1.

The pixel circuit 20 includes a constant current output circuit (constant current source) 21 and a PWM control circuit 22. The constant current output circuit 21 and the PWM control circuit 22 provided in the pixel circuit 20 correspond to the constant current output circuit 11 and the PWM control circuit 12 provided in the pixel circuit 10, respectively.

The constant current output circuit 21 includes the transistor TR14 instead of the transistor TR13 as compared with the constant current output circuit 11. In this embodiment, the case where the transistor TR14 is a P-channel MOS transistor will be described as an example.

The transistor TR14 is connected in parallel to the light emitting element D1 and switches on and off based on the light emission permission signal em. For example, the transistor TR14 is turned on when the light emission permission signal em is L level (here, inactive), and turns off when the light emission permission signal em is H level (here, active).

Since the other configurations of the constant current output circuit 21 are the same as those of the constant current output circuit 11, the description thereof will be omitted.

The PWM control circuit 22 does not include the transistor TR25 as compared with the PWM control circuit 12. Since the other configurations of the PWM control circuit 22 are the same as those of the PWM control circuit 12, the description thereof will be omitted.

(Operation of the display device according to the second embodiment)
Subsequently, the operation (control method) of the display device according to the second embodiment will be described with reference to FIG. 4 in addition to FIG. FIG. 4 is a timing chart showing the operation of the display device according to the second embodiment. Hereinafter, operations different from those of the display device according to the first embodiment will be mainly described. The times t21 to t29 in the timing chart shown in FIG. 4 correspond to the times t11 to t19 in the timing chart shown in FIG. 2, respectively.

First, in the initialization mode (time t21 to t22), the scan signal SC is set to the L level, and the light emission permission signal em is set to the L level. Further, the HiZ state is set to the input terminals pans and in1, and the potential Vpwm_max, which is the maximum potential of the video signal Vpwm, is supplied to the input terminal in2.

As a result, in the PWM control circuit 22, the transistors TR23 and TR24 are turned on, so that the gate potential Vg22 of the transistor TR22 is initialized to the reference potential VSS (0V). That is, in the PWM control circuit 22, the gate potential Vg22 is initialized by using the transistors TR23 and TR24 instead of the transistor TR25.

Similarly, in the constant current output circuit 21, the transistors TR14 and TR12 are turned on, and the transistor TR21 is also turned on. Therefore, the gate potential Vg11 of the transistor TR11 is initialized to the reference potential VSS (0V). That is, in the constant current output circuit 21, the gate potential Vg11 is initialized by using the transistors TR12, TR14, and TR21 instead of the transistor TR13.

Since the other operations of the display device according to the second embodiment are the same as those of the display device according to the first embodiment, the description thereof will be omitted.

As described above, the display device according to the second embodiment can exert the same effect as the display device according to the first embodiment.

That is, in the display device according to the second embodiment, each transistor provided in the pixel circuit 20 is composed of the same conductive type MOS transistor. Thereby, the display device according to the second embodiment can reduce the cost as compared with the case where the CMOS circuit is used for the pixel circuit.

Further, since the pixel circuit 20 is controlled so that the transistors TR22 and TR23 are not turned on at the same time, the penetration current flowing through the transistors TR22 and TR23 can be suppressed to substantially zero. Since the transistor TR23 is not used as a load transistor but merely as a switch transistor, it is not necessary to increase the transistor size and the resistance value, and the circuit scale is also increased. It is suppressed.

Further, the pixel circuit 20 can reduce the number of transistors as compared with the case of the pixel circuit 10, and it is not necessary to use the reset signal rst.

In the present embodiment, the case where each transistor provided in each pixel circuit 10 is a P-channel MOS transistor has been described as an example, but the present invention is not limited to this. Each transistor provided in each pixel circuit 10 may be an N-channel MOS transistor.

<Embodiment 3>
FIG. 5 is a diagram showing a configuration example of pixels 3 provided in the display device according to the third embodiment. The display device according to the third embodiment includes a plurality of pixels 3 instead of the plurality of pixels 1 as compared with the case of the display device according to the first embodiment.

As shown in FIG. 5, the pixel 3 is composed of a light emitting element D1 and a pixel circuit (driving circuit) 30 for PWM driving the light emitting element D1.

The pixel circuit 30 includes a constant current output circuit 31 and a PWM control circuit 32. The constant current output circuit 31 and the PWM control circuit 32 provided in the pixel circuit 30 correspond to the constant current output circuit 11 and the PWM control circuit 12 provided in the pixel circuit 10, respectively.

Since the constant current output circuit 31 has the same circuit configuration as the constant current output circuit 11, the description thereof will be omitted.

The PWM control circuit 32 further includes transistors TR26 and TR27 and a capacitive element C22 as compared with the PWM control circuit 12. Further, in the PWM control circuit 32, the transistor TR23 is used not as a switch transistor but as a load transistor. In this embodiment, the case where the transistors TR26 and TR27 are both P-channel MOS transistors will be described as an example.

The transistor TR23 is a load transistor and is provided between the gate (node N2) of the transistor TR21 and the input terminal em.

The transistor (first switch transistor) TR26 is provided between the gate of the transistor TR23 and the bias potential input terminal (hereinafter referred to as the bias potential input terminal Vbs) to which the bias potential Vbs is supplied, and is applied to the gate. It switches on and off based on the reset signal rst. For example, the transistor TR26 is turned on when the reset signal rst is L level, and turned off when the reset signal rst is H level.

The capacitive element C22 is provided between the gate and the source of the transistor TR23.

The transistor (fourth switch transistor) TR27 is provided between the drains of the transistors TR22 and TR24 and the gate (node N2) of the transistor TR21, and is turned on and off based on the light emission permission signal em applied to the gate. Switch. For example, the transistor TR27 is turned on when the light emission permission signal em is at the L level (here, active), and is turned off when the light emission permission signal em is at the H level (here, inactive).

Since the other configurations of the PWM control circuit 32 are the same as those of the PWM control circuit 12, the description thereof will be omitted.

(Operation of the display device according to the third embodiment)
Subsequently, in addition to FIG. 5, the operation (control method) of the display device according to the third embodiment will be described with reference to FIG. FIG. 6 is a timing chart showing the operation of the display device according to the third embodiment. The operation mode of the display device according to the third embodiment is composed of at least an initialization mode, a scan mode, and a light emission mode.

First, in the initialization mode (time t31 to t32), the reset signal rst is set to the L level, the scan signal SC is set to the H level, and the light emission permission signal em is set to the H level. Further, the HiZ state is set to the input terminals pans and in1, and the potential Vpwm_min, which is the minimum potential of the video signal Vpwm, is supplied to the input terminal in2.

As a result, in the PWM control circuit 32, since the transistor TR25 is turned on while the transistor TR24 is turned off, the gate potential Vg22 of the transistor TR22 is initialized to the reference potential VSS (0V).

Similarly, in the constant current output circuit 31, since the transistor TR13 is turned on while the transistor TR12 is turned off, the gate potential Vg11 of the transistor TR11 is initialized to the reference potential VSS (0V).

Further, in the PWM control circuit 32, since the transistor TR26 is turned on, the bias potential Vbs is applied to the gate of the transistor TR23. The bias potential Vbs is set to a high value so that the transistor TR23 used as a load transistor realizes high resistance.

At this time, since the transistor TR27 is turned off, the H-level light emission permission signal em is supplied to the node N2 via the high resistance transistor TR23. As a result, the transistor TR21 is turned off, so that no current flows through the light emitting element D1. That is, the light emitting element D1 does not emit light.

After that, the operation mode is switched from the initialization mode to the scan mode (time t32).
In the scan mode (time t32 to t35), the reset signal rst first switches from the L level to the H level (time t32).

As a result, in the PWM control circuit 32, the transistor TR25 is turned off, so that the gate of the transistor TR22 is in a floating state with the reference potential VSS applied. Similarly, in the constant current output circuit 31, since the transistor TR13 is turned off, the gate of the transistor TR11 is in a floating state in a state where the reference potential VSS is applied.

Further, in the PWM control circuit 32, since the transistor TR26 is turned off, the gate of the transistor TR23 is in a floating state in a state where the bias potential Vbs is applied. As a result, the transistor TR23 can realize a load transistor having high resistance without increasing the transistor size.

After that, the scan signal SC temporarily switches from the H level to the L level (time t33). Further, at this time, the video signal Vpwm is supplied to the input terminal in1, and the input potential Vpam corresponding to the constant current set value is supplied to the input terminal pams. Of the scan modes, the period during which the video signal Vpwm is supplied to the input terminal in1 (time t33 to t34) is also particularly referred to as a video signal supply mode.

As a result, in the PWM control circuit 32, since the transistor TR24 is turned on, the video signal Vpwm supplied to the input terminal in1 is applied to the gate of the transistor TR22 via the transistors TR22 and TR24. At this time, the gate potential Vg22 of the transistor TR22 rises to Vpwm- | Vth22 |. Note that Vpwm represents the potential of the video signal Vpwm, and Vth22 represents the threshold voltage of the transistor TR22.

Similarly, in the constant current output circuit 31, since the transistor TR12 is turned on, the input potential Vpam supplied to the input terminal pams is applied to the gate of the transistor TR11 via the transistors TR11 and TR12. At this time, the gate potential Vg11 of the transistor TR11 becomes Vpam- | Vth11 |. Note that Vth 11 represents the threshold voltage of the transistor TR11.

At this time, since the transistor TR27 is turned off, the H-level light emission permission signal em continues to be supplied to the node N2 via the high-resistance transistor TR23. As a result, the transistor TR21 is turned off, so that no current flows through the light emitting element D1. That is, the light emitting element D1 does not emit light.

After that, the scan signal SC is switched from the L level to the H level again (time t34). Further, the HiZ state is set again in the input terminals pans and in1.

As a result, in the PWM control circuit 32, the transistor TR24 is turned off, so that the gate of the transistor TR22 is in a floating state with the potential Vpwm- | Vth22 | applied (time t34 to t35). Similarly, in the constant current output circuit 31, since the transistor TR12 is turned off, the gate of the transistor TR11 is in a floating state with the potential Vpam- | Vth11 | applied (time t34 to t35).

After that, the operation mode is switched from the scan mode to the light emission mode (time t35).
In the light emission mode (time t35 to t40), the light emission permission signal em becomes the L level while the reset signal rst is fixed at the H level and the scan signal SC is fixed at the H level. Further, the power supply potential VDD is supplied to the input terminals pans and in1, and a triangular wave-shaped slope signal swinging between the potential Vpwm_min and the potential Vpwm_max is supplied to the input terminal in2. The potential Vpwm_max represents the maximum potential of the video signal Vpwm, and the potential Vpwm_min represents the minimum potential of the video signal Vpwm.

As a result, the transistor TR27 is turned on, so that the transistor TR22 outputs the comparison result between the video signal Vpwm and the slope signal to the node N2. Even if the potential of the node N2 changes, the potential difference Vgs23 between the gate and the source of the transistor TR23 is maintained at a constant value by the bootstrap operation of the capacitive element C22. That is, the transistor TR23 is maintained at a high resistance. Therefore, the transistor TR21 switches on / off according to the comparison result between the video signal Vpwm and the slope signal.

Here, assuming that the amount of change in the potential of the input terminal in2 from Vpwm_min is ΔVin2, the gate potential Vg22 of the transistor TR22 can be expressed by the following equation (3).

Vg22 = Vpwm- | Vth22 | + ΔVin2 ... (3)

The on / off of the transistor TR22 is determined by the magnitude relationship between the potential difference Vgs22 between the gate and the source of the transistor TR22 and the threshold voltage Vth22 of the transistor TR22. For example, the transistor TR22 is turned on when | Vgs22 |-| Vth22 |> 0 and turned off when | Vgs22 |-| Vth22 | ≦ 0.

Here, | Vgs22 |-| Vth22 | can be expressed by the following equation (4) from the equation (3).

｜ Vgs22 ｜ － ｜ Vth22 ｜
= VDD-Vg22- | Vth22 |
= VDD-Vpwm + | Vth22 | -ΔVin2- | Vth22 |
= VDD-Vpwm-ΔVin2 ... (4)

As can be seen from the equation (4), the transistor TR22 switches on and off independently of the threshold voltage Vth22. That is, even if the threshold voltage Vth22 has a change or characteristic variation due to aged deterioration, the transistor TR22 can accurately output the comparison result between the video signal Vpwm and the slope signal.

For example, in the rising process of the slope signal, when the gate potential Vg22 of the transistor TR22 is less than VDD- | Vth22 |, the transistor TR22 is turned on (for example, time t35 to t36). As a result, the potential of the node N2 becomes the H level (power supply potential VDD), so that the transistor TR21 is turned off. Therefore, the light emitting element D1 does not emit light. After that, when the rising edge of the slope signal progresses and the gate potential Vg22 of the transistor TR22 becomes VDD- | Vth22 | or higher, the transistor TR22 is turned off until the rising edge of the slope signal is completed (for example, time t36 to t37). As a result, the potential of the node N2 becomes the L level (reference potential VSS), so that the transistor TR21 is turned on. As a result, the light emitting element D1 emits light.

After that, in the falling process of the slope signal, when the gate potential Vg22 of the transistor TR22 is VDD- | Vth22 | or more, the transistor TR22 is turned off (for example, time t37 to t38). Since the potential of the node N2 is maintained at the L level, the transistor TR21 is kept on. As a result, the light emitting element D1 emits light. After that, when the falling edge of the slope signal progresses and the gate potential Vg22 of the transistor TR22 becomes less than VDD- | Vth22 |, the transistor TR22 is turned on (for example, time t38 to t39) until the falling edge of the slope signal is completed. As a result, the potential of the node N2 becomes H level, so that the transistor TR21 is turned off. As a result, the light emission of the light emitting element D1 is stopped.

In the light emission mode, the operation such as time t35 to t39 is repeated (time t35 to t40). The ratio (duty ratio) of the light emitting period of the light emitting element D1 in the light emitting mode, that is, the brightness of the light emitting element D1 is determined based on the video signal Vpwm.

As described above, in the display device according to the third embodiment, each transistor provided in the pixel circuit 30 is composed of the same conductive type MOS transistor. Thereby, the display device according to the third embodiment can reduce the cost as compared with the case where the CMOS circuit is used for the pixel circuit.

Further, in the pixel circuit 30, the potential difference Vgs23 between the gate and the source of the transistor TR23 used as the load transistor is maintained at a constant value by the bootstrap operation of the capacitive element C22. As a result, the transistor TR23 is maintained at high resistance without increasing its size. That is, the pixel circuit 30 can suppress the through current flowing through the transistors TR22 and TR23 without increasing the circuit scale. Further, the pixel circuit 30 can secure the output amplitude (amplitude of the potential of the node N2) and can realize the constant penetration current in the entire output region.

In the present embodiment, the case where each transistor provided in the pixel circuit 10 is a P-channel MOS transistor has been described as an example, but the present invention is not limited to this. Each transistor provided in the pixel circuit 10 may be an N-channel MOS transistor.

Further, in the present embodiment, the case where the drain of the transistor TR23 is connected to the input terminal em has been described as an example, but the present invention is not limited to this. The drain of the transistor TR23 may be connected to the reference potential terminal VSS. However, in that case, the on / off of the transistor TR21 needs to be controlled by the light emission permission signal em from another path as needed.

1 pixel 2 pixels 3 pixels 10 pixel circuit 11 constant current output circuit 12 PWM control circuit 20 pixel circuit 21 constant current output circuit 22 PWM control circuit 30 pixel circuit 31 constant current output circuit 32 PWM control circuit C11 capacity element C21 capacity element C22 capacity Element D1 Light emitting element TR11 to R14 transistor TR21 to TR27 transistor

Claims (20)

Light emitting element and
The pixel circuit that drives the light emitting element and
Equipped with
The pixel circuit is
With a constant current source,
PWM (Pulse Width Modulation) control circuit,
Equipped with
The constant current source is determined when the emission permission signal that switches between active and inactive at a predetermined cycle is active in the emission mode among the operation modes configured by at least the initialization mode, the scan mode, and the emission mode. It is configured to output a current and put the output in the HiZ state when the emission permission signal is inactive.
The PWM control circuit is
In the light emission mode, when the light emission permission signal is active, the comparison result between the video signal and the sawtooth slope signal is output to the control node, and when the light emission permission signal is inactive, the comparison result is output. Amplifying transistor to stop,
A first switch of the same conductive type as the amplification transistor, which is provided between the control node and the reference potential terminal and is turned off when the light emission permission signal is active and turned on when the light emission permission signal is inactive. With a transistor
A control transistor of the same conductive type as the amplification transistor, which is provided between the constant current source and the light emitting element and is switched on and off according to the potential of the control node.
Have,
Display device. The slope signal is a sawtooth wavy signal such that the amplification transistor is switched from off to on by comparison with the video signal by the amplification transistor.
The display device according to claim 1. The PWM control circuit is
Further having a first capacitive element provided between the source and the gate of the control transistor.
The display device according to claim 1 or 2. The PMM control circuit is
A first potential input terminal connected to the source of the amplification transistor and selectively supplied with at least the video signal.
At least the second potential input terminal to which the slope signal is selectively supplied, and
A second capacitive element provided between the second potential input terminal and the gate of the amplification transistor, and
A second switch transistor of the same conductive type as the amplification transistor, which switches between conduction and non-conduction between the drain and gate of the amplification transistor,
Have more,
The display device according to any one of claims 1 to 3. The video signal is supplied to the first potential input terminal in the video signal supply mode of the scan modes, and in the light emission mode, a power supply potential is supplied when the light emission permission signal is active, and the light emission permission is performed. The HiZ state is set when the signal is inactive, and the HiZ state is set in the initialization mode and the scan mode other than the video signal supply mode.
The second switch transistor is turned on when the video signal is supplied to the first potential input terminal in the video signal supply mode of the scan mode, and is turned off in a mode other than the video signal supply mode. Is configured to
The display device according to claim 4. The PWM control circuit is
Further having a third switch transistor of the same conductive type as the amplification transistor, which switches between conduction and non-conduction between the reference potential terminal and the gate of the amplification transistor.
The display device according to claim 4 or 5. The third switch transistor is configured to be turned on in the initialization mode and turned off in a mode other than the initialization mode.
The display device according to claim 6. Light emitting element and
The pixel circuit that drives the light emitting element and
Equipped with
The pixel circuit is
With a constant current source,
PWM (Pulse Width Modulation) control circuit,
Equipped with
The PWM control circuit is
Amplifying transistor and
The first switch transistor of the same conductive type as the amplification transistor,
A control transistor of the same conductive type as the amplification transistor, which is provided between the constant current source and the light emitting element and is switched on and off according to the potential of the control node.
Have,
It is a control method of the display device.
At least in the light emission mode among the operation modes configured by the initialization mode, the scan mode, and the light emission mode.
When the emission permission signal that switches between active and inactive in a predetermined cycle is inactive, the output of the constant current source is set to the HiZ state, and the first switch transistor is turned on with the amplification transistor turned off. By conducting a conduction between the reference potential terminal and the control node, the control transistor is turned on.
When the light emission permission signal is active, the result of comparison between the video signal and the sawtooth-like slope signal from the amplification transistor is obtained with the constant current output from the constant current source and the first switch transistor turned off. Output to the control node,
Display device control method. The PMM control circuit is
A first potential input terminal connected to the source of the amplification transistor and selectively supplied with at least the video signal.
At least the second potential input terminal to which the slope signal is selectively supplied, and
A second capacitive element provided between the second potential input terminal and the gate of the amplification transistor, and
A second switch transistor of the same conductive type as the amplification transistor, which switches between conduction and non-conduction between the drain and gate of the amplification transistor,
Have more
In the initialization mode,
By turning on each of the second switch transistor and the first switch transistor to conduct conduction between the gate of the amplification transistor and the reference potential terminal, the gate potential of the amplification transistor is initialized.
The control method of the display device according to claim 8. Light emitting element and
The pixel circuit that drives the light emitting element and
Equipped with
The pixel circuit is
A constant current source that outputs a constant current,
PWM (Pulse Width Modulation) control circuit,
Equipped with
The PWM control circuit is
An amplification transistor that outputs the comparison result between the video signal and the slope signal to the control node in the light emission mode among the operation modes configured by at least the initialization mode, the scan mode, and the light emission mode.
A load transistor having the same conductive type as the amplification transistor, in which the source is connected to the control node and the gate can be set to a floating state.
Capacitive elements provided between the source and gate of the load transistor,
A control transistor of the same conductive type as the amplification transistor, which is provided between the constant current source and the light emitting element and is switched on and off according to the potential of the control node.
Have,
Display device. The PWM control circuit is
The bias potential input terminal to which the bias potential is supplied and
A first switch transistor of the same conductive type as the amplification transistor, which switches between conduction and non-conduction between the bias potential input terminal and the gate of the load transistor,
Have more,
The display device according to claim 10. The first switch transistor is configured to be turned on in the initialization mode and turned off in a mode other than the initialization mode.
The display device according to claim 11. The PMM control circuit is
A first potential input terminal connected to the source of the amplification transistor and selectively supplied with at least the video signal.
At least the second potential input terminal to which the slope signal is selectively supplied, and
A second capacitive element provided between the second potential input terminal and the gate of the amplification transistor, and
A second switch transistor of the same conductive type as the amplification transistor, which switches between conduction and non-conduction between the drain and gate of the amplification transistor,
Have more,
The display device according to any one of claims 10 to 12. The video signal is supplied to the first potential input terminal in the video signal supply mode of the scan mode, the power potential is supplied in the light emission mode, and the initialization mode and the scan mode are described. In modes other than the video signal supply mode, the HiZ state is set and
The second switch transistor is turned on when the video signal is supplied to the first potential input terminal in the video signal supply mode of the scan mode, and is turned off in a mode other than the video signal supply mode. Is configured to
The display device according to claim 13. The PWM control circuit is
The reference potential terminal to which the reference potential is supplied and
A third switch transistor of the same conductive type as the amplification transistor, which switches between conduction and non-conduction between the reference potential terminal and the gate of the amplification transistor,
Have more,
The display device according to claim 13 or 14. The third switch transistor is configured to be turned on in the initialization mode and turned off in a mode other than the initialization mode.
The display device according to claim 15. The PWM control circuit is
A fourth switch transistor of the same conductive type as the amplification transistor, which is provided between the amplification transistor and the control node and is turned on when a light emission permission signal indicating whether or not the operation mode is the light emission mode is active. With more
The display device according to any one of claims 10 to 16. The light emission permission signal is supplied to the drain of the load transistor.
When the light emission permission signal is inactive, the fourth switch transistor is controlled off, and the control transistor is controlled off by the light emission permission signal supplied via the load transistor.
The display device according to claim 17. The display device according to any one of claims 10 to 18, wherein the slope signal is a triangular wave. Light emitting element and
The pixel circuit that drives the light emitting element and
Equipped with
The pixel circuit is
A constant current source that outputs a constant current,
PWM (Pulse Width Modulation) control circuit,
Equipped with
The PWM control circuit is
An amplification transistor that outputs the comparison result between the video signal and the slope signal to the control node in the light emission mode among the operation modes configured by at least the initialization mode, the scan mode, and the light emission mode.
A load transistor having the same conductive type as the amplification transistor, in which the source is connected to the control node and the gate can be set to a floating state.
Capacitive elements provided between the source and gate of the load transistor,
A control transistor of the same conductive type as the amplification transistor, which is provided between the constant current source and the light emitting element and is switched on and off according to the potential of the control node.
Have,
It is a control method of the display device.
A bias potential is applied to the gate of the load transistor, and the bias potential is applied.
With the bias potential applied to the gate of the load transistor, the gate of the load transistor is set to a floating state.
In the light emitting mode, the light emitting element is driven by the pixel circuit.
Display device control method.

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