JP2019121765A - Printed wiring board and manufacturing method thereof - Google Patents

Abstract

To provide a highly reliable printed wiring board.SOLUTION: A printed wiring board 1 according to the present embodiment comprises: a build-up layer 10 comprising: a plurality of conductor layers having a first surface 10F and a second surface 10S, and layered on both sides with each of one or more insulation layers between them; and a veer conductor, a second surface 10S side having at least one component mounting pad 150; a reinforcement layer 5 having a first insulation layer 51, a second conductor layer 54, a second insulation layer 52, and a third conductor layer 55 and joined to the second surface 10S side of the build-up layer 10; and a cavity 7 extending through the reinforcement layer 5 and exposing the component mounting pad 150. The build-up layer 10 has a first conductor layer 15 formed so as to project from a surface of the second surface 10S and including the at least one component mounting pad 150. The reinforcement layer 5 includes a veer conductor connecting the first conductor layer 15 and the third conductor layer 55 by extending through the first insulation layer 51, the second conductor layer 54, and the second insulation layer 52.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a printed wiring board having a cavity for exposing a component mounting pad and a method of manufacturing the same.

  Patent Document 1 discloses a printed wiring board in which a first circuit board and a second circuit board are stacked. The first circuit board is formed with an opening (cavity) which penetrates the first circuit board and exposes the electronic component mounting area of the second circuit board. A through hole having a through hole conductor inside is formed in a part of the insulating substrate of the first circuit board other than the region in which the cavity is formed. In the connection between the first circuit board and the second circuit board, the bottom of the connection via conductor of the second circuit board is connected to the through hole conductor of the first circuit board.

JP, 2016-86024, A

  The printed wiring board of Patent Document 1 has a total of five conductor layers for the first circuit board and the second circuit board, and the via conductors connecting the conductor layers are formed in four layers. It is considered preferable from the viewpoint of reliability that the number of via conductors is smaller than the number of conductor layers.

  The printed wiring board of the present invention comprises a first surface and a second surface opposite to the first surface, and a plurality of conductor layers laminated on both sides of one or more insulating layers and the insulating layer. A buildup layer comprising at least one component mounting pad on the second surface side, and a first insulating layer in contact with the buildup layer, and a via conductor connecting the plurality of conductor layers to each other, A second conductor layer formed on the first insulating layer, a second insulating layer formed on the second conductor layer, and a third conductor layer formed on the second insulating layer A reinforcing layer joined to the second surface side of the buildup layer, and a cavity penetrating the reinforcing layer and exposing the component mounting pad. The buildup layer has a first conductor layer formed to protrude on the second surface and including the at least one component mounting pad, and the reinforcing layer includes the first insulating layer and the second insulating layer. A via conductor is provided which penetrates the conductor layer and the second insulating layer and electrically connects at least the first conductor layer and the third conductor layer to each other.

  The method for producing a printed wiring board according to the present invention comprises: a reinforcing layer including two or more insulating layers and two or more conductor layers; one or more insulating layers and two or more layers laminated on both sides sandwiching the insulating layer. A buildup layer including a conductor layer and having a first conductor layer formed on a surface to be joined to the reinforcing layer; and a peeling film that facilitates peeling between a part of the reinforcing layer and the buildup layer. Providing a laminate including at least, and forming a groove penetrating the reinforcing layer along the periphery of the release film around the entire periphery of the release film from the surface of the reinforcing layer opposite to the buildup layer And forming a cavity by removing a portion of the reinforcing layer surrounded by the groove together with the release film, and preparing the laminate constitutes the reinforcing layer. At least one of said insulating layers In formation, an insulating plate formed by curing an insulating resin is laminated, and any one of the insulating plate and the conductor layer in the reinforcing layer is penetrated to connect with the first conductor layer of the buildup layer. Forming a via conductor.

  According to the embodiment of the present invention, it is possible to provide a highly reliable printed wiring board in which the number of via conductors is small relative to the number of conductor layers.

Sectional drawing which shows an example of the printed wiring board of one Embodiment of this invention. The top view of the printed wiring board of FIG. Sectional drawing which shows an example of the printed wiring board of other embodiment of this invention. FIG. 4 is a plan view of the printed wiring board of FIG. 3; Sectional drawing which shows an example of the printed wiring board of other embodiment of this invention. Sectional drawing which shows an example of the printed wiring board of other embodiment of this invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. FIG. 3 is a view showing an example of a method of manufacturing a printed wiring board of an embodiment of the present invention. The figure which shows an example of the manufacturing method of the printed wiring board of other embodiment of this invention. The figure which shows an example of the manufacturing method of the printed wiring board of other embodiment of this invention.

  Next, a printed wiring board according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional view of a printed wiring board 1 which is an example of a printed wiring board according to an embodiment, and FIG. 2 shows a plan view of the printed wiring board 1 (FIG. It is sectional drawing in an II line). As shown in FIGS. 1 and 2, the printed wiring board 1 includes a buildup layer 10 including a first surface 10F and a second surface 10S opposite to the first surface 10F. The first surface 10F of the buildup layer 10 is formed of an insulating layer (the insulating layer 12 in the example of FIG. 1) and a conductor layer (the conductor layer 14 in the example of FIG. 1) exposed on one side of the buildup layer 10 in the stacking direction. It consists of a face. In the example shown in FIG. 1, the conductor layer 14 on the outermost surface on the first surface side is embedded in the insulating layer 12 that constitutes the first surface 10F of the buildup layer 10. Further, the second surface 10S of the buildup layer 10 is the insulating layer (the insulating layer 11 in the example of FIG. 1) and the conductor layer (the first conductor in the example of FIG. 1) exposed to the other side of the buildup layer 10 in the stacking direction. It consists of a surface of layer 15). The printed wiring board 1 further includes a reinforcing layer 5 joined to the second surface 10S of the buildup layer 10. The first conductor layer 15 includes at least one component mounting pad 150. The printed wiring board 1 is provided with a cavity 7 which penetrates the reinforcing layer 5 and exposes the component mounting pad 150. The cavity 7 exposes one surface 150s of the component mounting pad 150 on the bottom surface thereof. The cavity 7 accommodates an external electronic component (not shown) such as a semiconductor device mounted on the printed wiring board 1. The terminal of such an external electronic component is connected to the component mounting pad 150 directly or via a bonding material such as solder.

  The buildup layer 10 includes one or more insulating layers (the insulating layer 11 and the insulating layer 12 in the example of FIG. 1), and two or more conductor layers stacked on each of the insulating layers (FIG. 1) In the example, the conductor layer 13, the conductor layer 14, and the first conductor layer 15) are formed. The buildup layer 10 may include more than three conductor layers. When the buildup layer 10 includes more conductor layers, it is possible to form a larger scale and complex electric circuit in the printed wiring board 1 without increasing the planar size of the printed wiring board 1. .

  The conductor layer 14 of the buildup layer 10 includes the lower connection pad 14a. The lower connection pad 14a can be used, for example, for connection to a motherboard of an electronic device in which the printed wiring board 1 is used, a package substrate of a semiconductor device having a laminated structure, or the like.

  The reinforcing layer 5 includes two or more insulating layers (in the example of FIG. 1, the first insulating layer 51, the second insulating layer 52, and the third insulating layer 53) and two or more conductor layers (in the example of FIG. 1) the second conductor. It is comprised by the layer 54, the 3rd conductor layer 55, and the 4th conductor layer 56). The fourth conductor layer 56 includes an upper connection pad 56a that can be used for connection to an electronic component disposed on the second surface 10S side of the buildup layer 10 and an external wiring board (not shown). These wiring boards and electronic components connected to the upper connection pads 56 a may be disposed on the fourth conductor layer 56, for example, so as to straddle the cavity 7.

  In the example of FIG. 1, the printed wiring board 1 is further formed on the surface of the solder resist layer 6 formed on the surfaces of the insulating layer 12 and the conductor layer 14, and on the surfaces of the fourth conductor layer 56 and the third insulating layer 53. And the solder resist layer 61. The solder resist layers 6 and 61 are formed using, for example, photosensitive polyimide resin or epoxy resin. The solder resist layer 6 has an opening 6a for exposing the lower connection pad 14a, and the solder resist layer 61 has an opening 61a for exposing the upper connection pad 56a.

  The bottom surface of the cavity 7 includes one surface 150 s of the component mounting pad 150 and the exposed surface 11 s of the insulating layer 11 to the cavity 7. One surface 150 s of the component mounting pad 150 protrudes toward the cavity 7 more than the one surface 11 s of the insulating layer 11.

  In the example of FIG. 1 and FIG. 2, the cavity 7 is provided in the center part of the printed wiring board 1, and has square opening shape. In the present embodiment, the cavity 7 has a wall surface substantially perpendicular to the reinforcing layer 5. However, the wall surface of the cavity 7 may be, for example, a tapered surface in which the opening shape of the cavity 7 decreases toward the bottom surface of the cavity 7. When the wall surface of the cavity 7 is such a tapered surface, the opening area of the cavity 7 is larger on the opening side (the fourth conductor layer 56 side) than on the bottom side. Therefore, the operation of arranging the electronic components (not shown) outside the cavity 7 may be facilitated. The wall surface of the cavity 7 having such a taper can be formed by appropriately adjusting the laser light used when forming the cavity 7 as described later. In the cavity 7, the component mounting pads 150 arranged in a matrix of 3 rows and 3 columns and the exposed surface 11 s of the insulating layer 11 which is the insulating layer of the outermost layer on the cavity 7 side of the buildup layer 10 are exposed. There is. As shown in FIGS. 1 and 2, the upper connection pads 56 a are arranged in two rows all around the circumference of the cavity 7. Lower connection pads 14a (see FIG. 1) are arranged, for example, in the form of a matrix or in a circular arrangement similar to upper connection pads 56a on the lower surface opposite to the upper surface of printed wiring board 1 shown in FIG. Can be placed at

  Although not shown, a protective film may be formed on the component mounting pad 150 and the exposed surfaces of the upper and lower connection pads 56a and 14a. Such a protective film may be, for example, a plurality or single metal plating film such as Ni / Au, Ni / Pd / Au, or Sn, or may be an OSP film. The opening shape of the cavity 7, the formation position in the printed wiring board 1, and the number and arrangement pattern of the component mounting pad 150 and the upper and lower connection pads 56a and 14a are shown in FIG. 1 and FIG. The examples are not limited to the examples.

  The conductor layers 13 and 14 and the first to fourth conductor layers 15, 54, 55, 56 may be formed using any material having suitable conductivity, such as copper or nickel. Preferably, it is formed of a copper foil, an electrolytic copper plating film, an electroless copper plating film, or a combination thereof. In the example of FIG. 1, the conductor layer 14 and the 2nd conductor layer 54 are comprised by only one layer. Preferably, the conductor layer 14 is formed of an electrolytic plating film, and the second conductor layer 54 is formed of only one metal foil layer. The conductor layer 13 and the first conductor layer 15 have a two-layer structure, and each have a metal film layer and an electrolytic plating film layer. The third conductor layer 55 and the fourth conductor layer 56 have a three-layer structure, and each have a metal foil layer 141, a metal film layer 142, and an electrolytic plating film layer 143 (in FIG. 1, reference numeral 141). To 143 are applied only to the third conductor layer 55, and these reference numerals for the conductor layer 13, the first conductor layer 15, and the fourth conductor layer 56 are omitted). However, the configuration of each conductor layer is not limited to the single layer structure or the multilayer structure illustrated in FIG.

  The printed wiring board 1 may further include a conductor layer formed on the reinforcing layer 5 and the insulating layer and the insulating layer. More complex electrical circuits can be formed in the printed wiring board 1.

  The reinforcing layer 5 is formed with a via conductor connecting the conductor layers constituting the reinforcing layer 5. In the example of FIG. 1, the via conductor 58 which penetrates the third insulating layer 53 and connects the fourth conductor layer 56 and the third conductor layer 55, the first insulating layer 51, the second conductor layer 54, and the second insulating layer A via conductor 57 connecting the third conductor layer 55, the second conductor layer 54, and the first conductor layer 15 is formed through the through hole 52. The via conductor 57 may not be connected to the second conductor layer 54, and the via conductor 57 not in contact with the second conductor layer 54 may be provided. When the conductor pattern is not provided at the position where the second conductor layer 54 intersects the via conductor 57, the via conductor 57 connecting only the third conductor layer 55 and the first conductor layer 15 is formed. In the present embodiment, as in the example of FIG. 1, the first insulating layer 51, the second insulating layer 52, the third and first conductor layers 55, 15, and preferably the second conductor layer 54 are directly connected to each other. Not only are they connected, but they are also connected via via conductors 57. Therefore, it is thought that the peeling between each layer is suppressed. Since the via conductor 57 is formed by skipping the second conductor layer 54, it is referred to as a skip via conductor 57.

  Here, the skip via conductor refers to the conductor layers (the first conductor layer 15 and the third conductor layer 55 in the example of FIG. 1) on both sides of at least one conductor layer (the second conductor layer 54 in the example of FIG. 1). It says about the via conductor which is connected. The skip via conductor may not be connected to the conductor layer to be skipped (the second conductor layer 54 in the example of FIG. 1). By adopting the skip via conductor, it is considered that the connection reliability is higher than that of connecting the first, second and third conductor layers 15, 54, 55 with individual via conductors. In other words, by adopting the skip via conductor, the conductor layers constituting the printed wiring board 1 (in the case of the printed wiring board of FIG. 1, the conductor layers 13 and 14, the first to fourth conductor layers 15, 54, 55, As compared with the number 56), the number of via conductors connecting the conductor layers can be reduced. A reliable printed wiring board can be provided.

  The skip via conductor 57 and the via conductor 58 have a tapered shape whose diameter decreases toward the first conductor layer 15. In addition, although the wording "diameter reduction" is used for convenience, the opening shape of the via conductors 57 and 58 and other respective via conductors described later is not necessarily limited to a circle. The “diameter reduction” simply means that the distance between the longest two points on the outer periphery in the horizontal cross section of the via conductors 57, 58 or other respective via conductors described later becomes small.

  In the insulating layer 11 and the insulating layer 12 in the buildup layer 10, a via conductor 31 connecting the first conductor layer 15 and the conductor layer 13 and a via conductor 32 connecting the conductor layer 13 and the conductor layer 14 are provided, respectively. It is formed. Then, each via conductor in the buildup layer 10 is diameter-reduced toward the conductor layer 14, and diameter reduction is performed in the same direction as the diameter reduction of the via conductor 58 and the skip via conductor 57 in the reinforcing layer 5. It has a tapered shape.

  The via conductors 58, 31, 32 and the skip via conductor 57 are preferably formed of an electroless copper plating film and an electrolytic copper plating film. As shown in FIG. 1, the via conductor 58 and the skip via conductor 57 are integrally formed with the metal film layer and the electrolytic plating film layer which constitute the fourth and third conductor layers 56 and 55, respectively. obtain. Similarly, the via conductors 31 and 32 can also be integrally formed with the metal film and the electrolytic plating film that constitute the first conductor layer 15 and the conductor layer 13, respectively.

  The reinforcing layer 5 is formed using any insulating resin. In the example of FIG. 1, the reinforcing layer 5 is composed of three layers of a first insulating layer 51, a second insulating layer 52, and a third insulating layer 53, and the second insulating layer 52 is a first and third insulating layer 51. , 53 is formed thicker. Further, the second insulating layer 52 is formed thicker than any of the insulating layers (the insulating layers 11 and 12 in the example of FIG. 1) constituting the buildup layer 10. However, the configuration of the reinforcing layer 5 is not limited to the structure of FIG. In the example of FIG. 1, the first to third insulating layers 51, 52, 53 preferably include core materials 51c, 52c, 53c impregnated with an insulating resin. The mechanical strength of the printed wiring board 1 can be improved. Examples of the resin used for the reinforcing layer 5 include core materials such as glass fibers and aramid fibers, and insulating resins such as epoxy resin impregnated in the core material.

  Each insulating layer (the insulating layers 11 and 12 in the example of FIG. 1) in the buildup layer 10 can be formed using any insulating resin such as epoxy resin. In order to prevent peeling between the respective insulating layers, it is preferable that the respective insulating layers in the buildup layer 10 be formed using the same material. In the example shown in FIG. 1, each insulating layer in the buildup layer 10 does not contain a core material, and may contain an inorganic filler such as silica. The first to third insulating layers 51, 52, 53 constituting the reinforcing layer 5 may also contain an inorganic filler such as silica.

  Next, a printed wiring board according to another embodiment of the present invention will be described with reference to the drawings. FIG. 3 shows a cross-sectional view of a printed wiring board 1a which is an example of a printed wiring board according to another embodiment, and FIG. 4 shows a plan view of the printed wiring board 1a (FIG. 3 shows FIG. 4). III-III line of FIG. As shown in FIG. 3, in the printed wiring board 1a, a covering layer 16 is formed on the second surface 10S of the buildup layer 10 so as to cover the first conductor layer 15 and the insulating layer 11. An opening 16 a is formed in the covering layer 16, and one surface 150 s of the component mounting pad 150 is exposed from the inside of the opening 16 a to the bottom of the cavity 7. The covering layer 16 is formed using any insulating resin. The same material as the solder resist layers 6 and 61 may be used to form a solder resist layer. In the embodiment shown in FIGS. 3 and 4, the covering layer 16 is formed so as to surround the component mounting pad 150, so that the wetting and spreading of the bonding material such as solder provided on the component mounting pad 150 is suppressed. It is considered that a short circuit defect between adjacent component mounting pads 150 is suppressed. It is considered that electronic components and the like are connected on the component mounting pad 150 with good quality.

  The covering layer 16 is formed on the entire interface between the surface on the second surface 10S side of the buildup layer 10 and the reinforcing layer 5. Therefore, the reinforcing layer 5 is joined to the second surface 10S side of the buildup layer 10 via the covering layer 16. In FIG. 3, the same components as the main components shown in FIG. 1 are denoted by the same reference numerals as in FIG. 1 or omitted, and further description thereof is also omitted.

  In the printed wiring boards 1 and 1a, each insulating layer which comprises the buildup layer 10 may contain core materials, such as glass fiber and an aramid fiber, as needed. The mechanical strength of the printed wiring boards 1 and 1a may be further improved by including the core material in each insulating layer. In particular, when the insulating layer 11 constituting the second surface 10S of the buildup layer 10, which is in contact with the reinforcing layer 5 and becomes the bottom of the cavity 7, includes a core material, the mechanical strength of the printed wiring boards 1 and 1a is significantly increased. Improve. An example is described with reference to FIGS. 5 and 6.

  FIG. 5 shows a cross-sectional view of the printed wiring board 1b, and FIG. 6 shows a cross-sectional view of the printed wiring board 1c. In the printed wiring boards 1b and 1c, the outermost insulating layer 11 on the second surface 10S side of the buildup layer 10 includes a core 11c. The insulating layer 11 is formed of a core 11 c and an insulating resin impregnated in the core 11 c. As a core material 11c, glass fiber, an aramid fiber, etc. are illustrated, for example. The first conductor layer 15 formed on the insulating layer 11 including the core material 11c is the same as the third conductor layer 55 and the fourth conductor layer 56 of the reinforcing layer 5, the metal foil layer 141, the metal film layer 142, The electrolytic plating film layer 143 is formed of three layers. The other configuration of printed wiring board 1b shown in FIG. 5 is the same as that of printed wiring board 1 shown in FIG. 1, and the other configuration of printed wiring board 1c shown in FIG. 6 is the printed circuit shown in FIG. It is the same as the wiring board 1a.

  In the printed wiring board 1b shown in FIG. 5, since the insulating layer (insulation layer 11) on the outermost layer on the cavity 7 side of the buildup layer 10 constituting the bottom of the cavity 7 includes the core 11c, the rigidity of the cavity 7 is It has been improved. Even when stress is applied to the printed wiring board 1b, breakage of the printed wiring board 1b does not easily occur. For example, even if stress is concentrated on the corner portion of the bottom surface of the cavity 7, a crack or the like is less likely to occur. It is considered that the reliability of the printed wiring board 1 is improved.

  In the printed wiring board 1c shown in FIG. 6, as in the printed wiring board 1a, the covering layer 16 is formed on the second surface 10S of the buildup layer 10 so as to cover the first conductor layer 15 and the insulating layer 11; One surface 150 s of the mounting pad 150 is exposed at the bottom of the cavity 7. In the printed wiring board 1c, as in the printed wiring board 1b, since the insulating layer 11 constituting the second surface 10S of the buildup layer 10 which is the bottom of the cavity 7 includes the core 11c, the rigidity of the cavity 7 is improved. At the same time, the wetting and spreading of the bonding material such as solder provided on the component mounting pad 150 is suppressed. Electronic components and the like can be connected with good quality while short circuit defects between component mounting pads 150 adjacent to each other are suppressed.

  Next, a method of manufacturing a printed wiring board according to an embodiment will be described below with reference to FIGS. 7A to 7M, taking the printed wiring board 1 shown in FIG. 1 as an example.

  The method for manufacturing a printed wiring board of the present embodiment includes preparing a laminate 2 (see FIG. 7J) of a conductor layer and an insulating layer, including the reinforcing layer 5, the buildup layer 10, and the peeling film 8. . Further, in the method of manufacturing the printed wiring board of the present embodiment, the groove 71 penetrating the reinforcing layer 5 along the periphery of the peeling film 8 is formed on the entire periphery of the peeling film 8 included in the laminate 2 Enclosing a part of the conductor layer 54 in the groove 71 (see FIG. 7K), removing a portion of the second conductor layer 54 exposed in the groove 71 (see FIG. 7L), and surrounding the groove 71 Forming the cavity 7 by removing the portion of the reinforcing layer 5 with the release film 8 (see FIG. 7M). First, a method of forming the laminate 2 will be described.

  First, as shown in FIGS. 7A and 7B, the conductor layer 14 is formed on the base plate 90. As shown in FIG. 7A, a base plate 90 having a core material 93 and a metal foil 91 on the surface thereof is prepared. The metal foil 91 includes a carrier metal foil 92 bonded to one surface, and the carrier metal foil 92 and the core member 90 are bonded by thermocompression bonding or the like. The metal foil 91 and the carrier metal foil 92 are bonded, for example, with a separable adhesive such as a thermoplastic adhesive or fixed only at the edge. For example, a glass epoxy substrate is used for the core material 93. A double-sided copper-clad laminate may be used as core material 90 with carrier metal foil 92. The metal foil 91 and the carrier metal foil 92 are preferably copper foils. It is not intended to show the exact proportions of the thickness of each component in FIGS. 7A-7M.

  As shown in FIG. 7B, the conductor layer 14 is formed on the base plate 90. For example, a plating resist not shown is formed on metal foil 91. The plating resist is provided with an opening corresponding to the conductor pattern of the lower connection pad 14 a that the conductor layer 14 should have. Then, an electrolytic copper plating film is formed in the openings of the plating resist by electrolytic plating using the metal foil 91 as a seed layer, and then the plating resist is removed. Thereby, the conductor layer 14 including the conductor pattern of the lower connection pad 14a is formed. The conductor layer 14 may be formed by other methods such as electroless plating. 7B to 7I, only one surface of the base plate 90 may be used to form the conductor layer 14 or the like. In each of FIGS. 7C and 7D, reference numerals of components on the lower side of the base plate 90 are appropriately omitted.

As shown in FIGS. 7C to 7E, the buildup layer 10 including the insulating layer (insulating layer 12) in which the insulating layer and the conductor layer are stacked on the base plate 90 and the conductor layer 14, thereby covering the conductor layer 14 is obtained. It is formed. A common build-up wiring board manufacturing method may be used. As shown in FIG. 7C, the insulating layer 12 is formed, for example, by thermocompression bonding of a film-like epoxy resin or the like on the exposed portions of the conductor layer 14 and the metal foil 91. Thereafter, a conductive hole 32a is formed in the insulating layer 12 at a position corresponding to the formation position of the via conductor 32, for example, by irradiation with CO ₂ laser light. Then, a metal film is formed by electroless copper plating or the like in the conduction hole 32 a and on the surface of the insulating layer 12. Furthermore, using this metal film as a seed layer, an electrolytic plating film made of copper or the like is formed using a pattern plating method. Thereafter, the resist used for pattern plating is removed, and the removal removes the exposed metal film. As a result, the conductor layer 13 including the desired conductor pattern is formed. Also, the via conductor 32 is formed in the conduction hole 32a.

  As shown in FIG. 7D, the insulating layer 11, the first conductor layer 15, and the via conductor 31 are formed by the same method as the method for forming the insulating layer 12, the conductor layer 13, and the via conductor 32. As a result, the buildup layer 10 is formed on the base plate 90. Hereinafter, in the description with reference to FIGS. 7E to 7I, only the upper side of the base plate 90 will be described, and the description of the lower side of the base plate 90 will be omitted.

  Next, the peeling film 8 is provided in the formation region of the cavity 7 on the second surface 10S side of the buildup layer 10. The peeling film 8 is provided by using at least a material which does not firmly adhere to the first conductor layer 15 and the insulating layer 11 but can adhere to them. That is, the adhesion of the constituent material of the prepreg 510 (see FIG. 7F) to the interface between the peeling film 8 and the first conductor layer 15 and the insulating layer 11 is prevented by the adhesion of the peeling film 8. However, the peeling film 8 and the first conductor layer 15 and the insulating layer 11 can be easily separated by a relatively weak force. As described later, in the post-process, the reinforcing layer 5 (see FIG. 7J) is stacked on the buildup layer 10 via the peeling film 8 and thereafter, the portion of the reinforcing layer 5 in which the cavity 7 is formed is removed. (See Figure 7M). The peeling film 8 facilitates peeling of a part of the reinforcing layer 5.

  When forming the cavity 7 by peeling off a part of the reinforcing layer 5 (see FIG. 7M), when the adhesive layer 81 and the bonding layer 82 are removed together with a part of the reinforcing layer 5, the adhesive layer 81 is a component mounting pad Peel easily and satisfactorily from one side 150s of 150. The residue of the adhesive layer 81 which has been in close contact does not remain on the one surface 150s of the component mounting pad 150. By peeling off a part of the reinforcing layer 5, one surface 150 s of the clean component mounting pad 150 is exposed to the cavity 7. A connection failure in the component mounting pad 150 hardly occurs.

  In the example of FIG. 7E, the peeling film 8 includes the adhesive layer 81 on the buildup layer 10 side, and the bonding layer 82 stacked on the adhesive layer 81. As described above, the adhesive layer 81 is formed of a material that does not adhere firmly to the first conductor layer 15 and the insulating layer 11, but can adhere to these. For example, an acrylic resin is used for the adhesive layer 81. On the other hand, the bonding layer 82 is formed of a material that can exhibit sufficient adhesiveness to the second conductor layer 54 (see FIG. 7G) constituting the reinforcing layer 5. For example, a polyimide resin is used for the bonding layer 82.

  For example, the adhesive layer 81 and the bonding layer 82 are provided on the entire surfaces of the first conductor layer 15 and the insulating layer 11 on the second surface 10S side. Thereafter, by removing portions of the adhesive layer 81 and the bonding layer 82 other than the formation region of the cavity 7, the peeling film 8 having a planar shape based on the opening shape of the cavity 7 can be formed. Alternatively, the peeling film 8 formed in advance into the shape based on the opening shape of the cavity 7 is placed on the surface of the first conductor layer 15 and the insulating layer 11 on the second surface 10S side corresponding to the formation region of the cavity 7 It may be done. In the formation area of the cavity 7, the component mounting pad 150 protrudes from the surface of the insulating layer 11, and the second surface 10S has unevenness. As shown in FIG. 7E, adhesive layer 81 can be in close contact with the surface of component mounting pad 150 and insulating layer 11 along the unevenness. As a result, penetration of the prepreg 510 (see FIG. 7F) to the interface between the peeling film 8 and the component mounting pad 150 can be prevented more reliably.

  The peeling film 8 is provided so as to cover substantially the entire region where the cavity 7 is formed. In the printed wiring board 1 of the example of FIG. 1, as described above, since the cavity 7 has a rectangular opening shape, preferably, the peeling film 8 having a rectangular planar shape is provided. The thickness of the peeling film 8 may be selected based on the thickness of the prepreg 510 (see FIG. 7F) to be laminated to the buildup layer 10 in a later step. In addition, the release film 8 may be formed of, for example, a single layer of the adhesive layer 81, or may have a three-layer structure including an intermediate layer between the adhesive layer 81 and the bonding layer 82. For example, the thickness of the release film 8 may be adjusted to a desired thickness by adjusting the thickness of the intermediate layer.

  Subsequently, as shown in FIG. 7F, a prepreg 510 having an opening 511 based on the planar shape of the peeling film 8 is prepared. The prepreg 510 is mainly composed of a core 51 c such as glass fiber and aramid fiber, and an insulating resin such as epoxy resin impregnated in the core 51 c. The opening 511 may be formed by mold processing or the like.

  The thickness of the prepreg 510 is selected based on the thickness of the first insulating layer 51 formed by the prepreg 510 of the reinforcing layers 5. Further, as described above, the thickness of the peeling film 8 is selected based on the thickness of the prepreg 510.

  As shown in FIG. 7F, a first surface 52F and a second surface 52S opposite to the first surface 52F are provided, and a second conductor layer 54 is provided on the first surface 52F and a second surface 52S is provided on the second surface 52S. An insulating plate 520 including the three conductor layers 55 is prepared. The insulating plate 520 is stacked on the first insulating layer 51 to form a second insulating layer 52. For example, an insulating plate 520 formed by curing an arbitrary insulating resin such as an epoxy resin, a BT resin, or a phenol resin is prepared. Preferably, the insulating plate 52 includes a core 52 c made of glass fiber, aramid fiber or the like. The second conductor layer 54 and the third conductor layer 55 are formed in contact with the second insulating layer 52 using an arbitrary metal foil. Preferably, the second conductor layer 54 and the third conductor layer 55 are made of copper foil. A desired conductor pattern is formed on the second conductor layer 54 and the third conductor layer 55, for example, by etching. For example, by patterning the copper foils on both sides of the double-sided copper clad laminate, an insulating plate 520 provided with the second and third conductor layers 54, 55 can be prepared. In addition, the 3rd conductor layer 55 shown by FIG. 7F and FIG. 7G is comprised only by the metal foil layer 141 shown by above-mentioned FIG. In the process of FIG. 7H described later, the final third conductive layer 55 having the metal film layer 142 and the electrolytic plating film layer 143 is formed.

  The second conductor layer 54 is provided with a dummy pattern 544 formed of a solid pattern having the same size as the formation region of the cavity 7. The dummy pattern 544 can function as, for example, a stopper for laser light when forming a groove 71 (see FIG. 7K) described later. The dummy pattern 544 may be provided in a frame shape along the periphery of the formation region of the cavity 7.

  Further, when the insulating plate 520 is prepared, an opening 54a having a size based on the cross section of the skip via conductor 57 (see FIG. 7H) to be formed in a later step is formed in the second conductor layer 54. As in the example of FIG. 7F, an opening 55a having a size based on the cross section of the skip via conductor 57 may also be formed in the third conductor layer 55. The openings 54 a and 55 a are formed by removing the conductor in a portion corresponding to the formation position of the skip via conductor 57. The openings 54a, 55a facilitate the formation of the skip via conductor 57. Further, the size of the opening 54 a formed in the second conductor layer 54 may be smaller than the size of the opening 55 a formed in the third conductor layer 55. As described above, when the skip via conductor 57 having a shape tapered toward the first conductor layer 15 is formed, both the second conductor layer 54 and the third conductor layer 55 are properly brought into contact with the skip via conductor 57. be able to.

  As shown in FIG. 7F, a prepreg 510 is laminated on the surface of the buildup layer 10 on the second surface 10S side. The prepreg 510 is stacked with the opening 511 and the peeling film 8 facing each other so that the peeling film 8 fits inside the opening 511 after curing.

  Furthermore, a pre-cured insulating plate 520 is laminated on the prepreg 510 with the first surface 52 F facing the prepreg 510. Then, the prepreg 510 is cured by being heated and pressed, and the first insulating layer 51 is formed as the cured product. In addition, the buildup layer 10 and the insulating plate 520 are joined via the first insulating layer 51 to form the second insulating layer 52.

As shown in FIGS. 7G and 7H, the second insulating layer 52, the first insulating layer 51, and the second conductor layer 54 formed in contact with the second insulating layer 52 are penetrated, and the buildup layer 10 is formed. A first conductor layer 15 formed on the surface to be joined to the reinforcing layer 5 and a skip via conductor 57 for connecting the second conductor layer 54 and the third conductor layer 55 to each other are formed. First, as shown in FIG. 7G, the conduction hole 57a is formed at the formation position of the skip via conductor 57 by irradiation with CO ₂ laser light or the like from the third conductor layer 55 side. The laser light is preferably emitted toward the opening 55 a formed in the third conductor layer 55. Also in the second conductor layer 54, the opening 54a is provided immediately below the opening 55a, so that the conduction hole 57a for exposing the first conductor layer 15 can be easily formed. The conduction hole 57 a penetrates the second and third conductor layers 54 and 55, the second insulating layer 52, and the first insulating layer 51 and has a diameter reduced toward the first conductor layer 15.

  Thereafter, a metal film is formed on the entire inner wall of the conduction hole 57a and the entire surface of the third conductor layer 55 by electroless plating or sputtering. A plating resist having an opening exposing at least the conduction hole 57a is formed on the metal film, and an electrolytic plating film is formed in the conduction hole 57a using the metal film as a seed layer. Preferably, the additive to the plating solution is adjusted so that the deposition of the electrolytic plating film in the conduction holes 57a is promoted more than other portions. Thereafter, the plating resist is removed, thereby removing the exposed metal film. Furthermore, the portion of the third conductor layer 55 exposed by the removal of the metal film is removed. As shown in FIG. 7H, the inside of the conduction hole 57a is filled with the electrolytic plating film, and the skip via conductor 57 is formed in the conduction hole 57a. In addition, the skip via conductor 57 which mutually connects only the 3rd conductor layer 55 and the 1st conductor layer 15 may be formed.

  Also, through the process of FIG. 7H, the metal foil layer 141 shown as a single third conductive layer 55 in FIGS. 7F and 7G, and the two-layered film (142, 143) formed thereon. And the final form third conductor layer 55 is formed. FIG. 7H is an example of the third conductor layer 55 having a three-layer structure including the metal foil layer 141, the metal film layer 142 which is the remaining portion of the metal film used as the seed layer, and the electrolytic plating film layer 143. . The third conductor layer 55 may then be adjusted in its thickness by chemical mechanical polishing or etching, if necessary. In the example of FIG. 7H, the third conductor layer 55 in the formation region of the cavity 7 is completely removed. It is preferable not to provide the conductor pattern of the third conductor layer 55 at least near the edge of the formation region of the cavity 7. This is because the formation of the groove due to the irradiation of the laser light or the like is not inhibited when the cavity 7 is formed.

Thereafter, an optional number of insulating and conductive layers are formed as needed. When the printed wiring board 1 shown in FIG. 1 is manufactured, as shown in FIG. 7I, a third insulating layer is formed on the second surface 52S of the insulating plate (second insulating layer) 52 and the third conductor layer 55. 53 is formed, the fourth conductor layer 56 is formed on the third insulating layer 53, and the via conductor 58 is formed. The third insulating layer 53 is formed, for example, by thermocompression bonding of a film-like epoxy resin onto exposed portions of the third conductor layer 55 and the second insulating layer 52, and constitutes a part of the fourth conductor layer 56. A metal foil is laminated on the third insulating layer 53. Thereafter, a conduction hole is formed in the third insulating layer 53 at a position corresponding to the formation position of the via conductor 58, for example, by irradiation with CO ₂ laser light, and laminated in the conduction hole and on the third insulating layer 53. A metal film is formed on the surface of the metal foil by electroless copper plating or the like. Furthermore, after this metal film is used as a seed layer and an electrolytic plating film made of copper or the like is formed using a pattern plating method, the resist used for pattern plating is removed, and the metal film exposed by the removal is The metal foil is removed. As a result, the fourth conductor layer 56 including the desired conductor pattern and the via conductor 58 are formed.

  Thereafter, the base plate 90 is removed. Specifically, carrier metal foil 92 and metal foil 91 are separated, and metal foil 91 exposed thereby is removed, for example, by etching. The separation of the metal foil 91 and the carrier metal foil 92 can be performed, for example, by softening the thermoplastic adhesive bonding the two by heating or cutting the joint bonding the two at the edge. . The removal of the base plate 90 exposes the conductor layer 14 and the insulating layer 12.

  When the printed wiring board 1 shown in FIG. 1 is manufactured, as shown in FIG. 7J, the solder resist layers 6 and 61 are formed. For example, by forming a photosensitive epoxy resin or polyimide resin layer on the surfaces of the conductor layer 14 and the insulating layer 12 and on the surfaces of the fourth conductor layer 56 and the third insulating layer 53, the solder resist layers 6, 61 may be formed. Are formed respectively. Then, the openings 6a and 61a are respectively formed using a photolithographic technique. The laminated body 2 shown by FIG. 7J is formed of the above process.

  Next, as shown in FIGS. 7K and 7L, along the periphery of the peeling film 8, a groove 71 penetrating the reinforcing layer 5 is formed from the side of the reinforcing layer 5 on which the solder resist layer 61 is provided. Ru. The groove 71 has a bottom on the side of the first surface 52F of the second insulating layer 52, and exposes a part of the second conductor layer 54 on the bottom. The groove 71 opens toward the solder resist layer 61, and in the example of FIG. 7K, penetrates the solder resist layer 61, the third insulating layer 53, and the second insulating layer 52. The groove 71 is formed around the entire periphery of the peeling film 8 so as to surround the formation region of the cavity 7. For example, the second insulating layer 52 is irradiated with the laser beam B from the second surface 52S side along a locus surrounding the formation region of the cavity 7. In the example of FIG. 7K, the solder resist layer 61 is irradiated with the laser beam B. As a kind of laser beam B, although a carbon dioxide gas laser, a YAG laser, etc. are illustrated, laser beam B is not limited to these. The groove 71 may be formed by cutting such as drilling.

  The groove 71 is preferably formed so that the inner wall on the outer peripheral side of the two opposed inner walls of the groove 71 matches the outer edge of the peeling film 8. In other words, the inner wall on the outer peripheral side of the groove 71 coincides with the outer edge of the dummy pattern 544 of the second conductor layer 54. The inner wall on the outer peripheral side of the groove 71 serves as the side wall of the cavity 7 (see FIG. 7M). When the wall surface of the cavity 7 is a tapered surface such that the opening shape of the cavity 7 becomes smaller toward the bottom surface of the cavity 7, the collected laser is made such that the spot diameter of the laser light becomes smaller toward the tip side. Light is used. By forming the groove 71 by irradiating such a condensed laser beam, the groove 71 can be formed on the inner wall of a desired tapered shape.

  The dummy pattern 544 of the second conductor layer 54 can function as a stopper for laser light or a drill blade when the groove 71 is formed. It is possible to prevent the formation of the groove 71 having an unintended depth and the damage to the first insulating layer 51 and the like.

  As shown in FIG. 7L, the portion of the second conductor layer 54 exposed to the groove 71 is removed. In the example of FIG. 7L, the exposed portion of the dummy pattern 544 is removed by etching or the like. As a result, a portion surrounded by the groove 71 in the reinforcing layer 5 or the like (hereinafter, the portion surrounded by the groove 71 is also referred to as a removed portion R) is built up except for the intervening portion of the peeling film 8 It is independent of surrounding components such as the layer 10 and the reinforcing layer 5.

  As shown in FIG. 7M, the removal portion R is removed together with the peeling film 8. In the example of FIG. 7M, in addition to the reinforcing layer 5, the part surrounded by the grooves 71 in the solder resist layer 61 is also removed together with the peeling film 8. As a result, a cavity 7 is formed to expose the component mounting pad 150 to the bottom surface. As described above, the removed portion R is independent of the buildup layer 10 and the like except for the intervening portion of the peeling film 8. Further, the adhesive layer 81 of the peeling film 8 does not adhere firmly to the buildup layer 10 or the like, but merely adheres due to its adhesiveness. Therefore, the removal portion R can be easily removed by any method. For example, the removal portion R can be removed by being attracted to a tool or the like and pulled up to the opposite side to the buildup layer 10.

  After the formation of the cavity 7, preferably, residues such as the peeling film 8 and the reinforcing layer 5 which may remain in the cavity 7 are removed using oxygen plasma or a solvent. In addition, a protective film may be formed on the component mounting pad 150 and the upper and lower connection pads 56a and 14a. For example, a protective film made of Ni / Au, Ni / Pd / Au, or Sn may be formed by plating. The OSP may be formed by immersion in a liquid organic material or spraying of the organic material. The printed wiring board 1 which is an example of this embodiment shown by FIG. 1 is completed by passing through the above process.

  Next, a method of manufacturing the printed wiring board 1a shown in FIGS. 3 and 4 described above will be described with reference to FIGS. 8A and 8B. In the method of manufacturing printed wiring board 1a, second surface 10S of buildup layer 10 is formed between the step of forming buildup layer 10 (see FIG. 7D) and the step of forming release film 8 (see FIG. 7E). The method differs from the above-described method of manufacturing the printed wiring board 1 in that the covering layer 16 is formed. The other steps and components are the same as in the method of manufacturing the printed wiring board 1, so the same reference numerals are used for similar components and further description is omitted.

  A covering layer 16 is provided on the exposed surfaces of the insulating layer 11 and the first conductor layer 15 of the buildup layer 10 shown in FIG. 7D. For example, a photosensitive epoxy resin or polyimide resin layer is formed on the surfaces of the first conductor layer 15 and the insulating layer 11. An insulating resin or the like having the same composition as the material of the solder resist layers 6 and 61 described above may be selected as the material of the covering layer 16. Then, an opening 16 a is formed to cover the edge of the component mounting pad 150 and to expose the surface 150 s of the component mounting pad 150 using photolithography technology.

  In the case where the printed wiring board 1a is formed, after the covering layer 16 is formed, the covering film 16 and the part mounting pad exposed from the opening 16a are covered with the peeling film so as to cover one surface 150s of the component mounting pad. 8 are formed (see FIG. 8A). The peeling film 8 is provided in the same manner as the method for providing the peeling film 8 in the method of manufacturing the printed wiring board 1 described above. The release film 8 does not adhere firmly to the first conductor layer 15 and the covering layer 16, but is provided using at least a material capable of adhering to these.

  The covering layer 16 is formed to cover the entire second surface 10S of the buildup layer 10. Therefore, in the printed wiring board 1a (see FIG. 8B) completed after the formation of the cavity 7, the reinforcing layer 5 is joined to the second surface 10S side of the buildup layer 10 via the covering layer 16. The skip via conductor 57 formed in the reinforcing layer 5 is formed to be connected to the first conductor layer 15 through the covering layer 16 outside the formation region of the cavity 7.

  The method of manufacturing printed wiring board 1b shown in FIG. 5 is different from the method of manufacturing printed wiring board 1 described above in that insulating layer 11 is formed so as to include core material 11c, and on insulating layer 11. The second embodiment differs in that the first conductor layer 15 to be formed is formed of three layers of a metal foil layer 141, a metal film layer 142, and an electrolytic plating film layer 143. Further, the method of manufacturing the printed wiring board 1c shown in FIG. 6 is different from the above-described method of manufacturing the printed wiring board 1a in the same point.

  In the method of forming printed wiring boards 1b and 1c, glass fiber or aramid fiber impregnated with an insulating resin such as epoxy resin after the same steps as printed wiring board 1 until formation of conductor layer 13 (see FIG. 7C). And the like, and the first conductor layer 15 and the via conductor 31 are formed. Insulating layer 11, first conductor layer 15, and via conductor 31 are the same as the method for forming third insulating layer 53, fourth conductor layer 56, and via conductor 58 in reinforcing layer 5 of printed wiring board 1 described above. It can be formed.

  The printed wiring board according to the embodiment is not limited to the structure illustrated in each drawing, or the structure or material illustrated in the present specification. For example, buildup layer 10 may have any number of conductor layers and insulation layers. An arbitrary number of conductor layers and insulating layers may be stacked on the side of the reinforcing layer 5 opposite to the buildup layer 10. Moreover, the manufacturing method of the printed wiring board of embodiment is not limited to the method demonstrated with reference to each drawing, The conditions, order, etc. may be changed suitably. Depending on the structure of the printed wiring board actually manufactured, some steps may be omitted, and other steps may be added.

DESCRIPTION OF SYMBOLS 1, 1a, 1b, 1c Printed wiring board 2 Laminated body 10 Build-up layer 10F 1st surface 10S 2nd surface 11, 12 Insulating layer 13, 14 Conductor layer 15 1st conductor layer 150 Component mounting pad 150s One surface 16 Covering layer 31 , 32 via conductor 5 reinforcing layer 51 first insulating layer 510 prepreg 52 second insulating layer 520 insulating plate 53 third insulating layer 51 c, 52 c, 53 c, 11 c core material 54 second conductor layer 55 third conductor layer 56 fourth conductor Layer 57 Skip via conductor 6, 61 Solder resist layer 7 Cavity 71 Groove 8 Peeling film

Claims (8)

A plurality of conductor layers provided with a first surface and a second surface opposite to the first surface, and laminated on both sides of one or more insulating layers and the insulating layer, and the plurality of conductor layers A build-up layer comprising: at least one component mounting pad on the second surface side;
A first insulating layer in contact with the buildup layer, a second conductor layer formed on the first insulating layer, a second insulating layer formed on the second conductor layer, and the second insulating layer A reinforcing layer having a third conductor layer formed thereon and joined to the second surface side of the buildup layer;
A printed circuit board comprising: a cavity penetrating the reinforcing layer to expose the component mounting pad;
The buildup layer has a first conductor layer formed projecting on the second surface and including the at least one component mounting pad,
The reinforcing layer penetrates the first insulating layer, the second conductive layer, and the second insulating layer to electrically connect at least the first conductive layer and the third conductive layer to each other. Includes via conductors. The printed wiring board according to claim 1, wherein one of the insulating layers constituting the reinforcing layer is formed thicker than any of the insulating layers constituting the buildup layer. The printed wiring board according to claim 1, wherein the via conductor included in the reinforcing layer has a tapered shape that decreases in diameter toward the first conductor layer, and the via conductor forms the buildup layer. The via conductor also has a tapered shape whose diameter is reduced in the same direction as the diameter reduction direction of the via conductor included in the reinforcing layer. The printed wiring board according to claim 1, wherein a coating layer is formed on the second surface side of the buildup layer to cover the outermost insulating layer on the second surface side, and the coating layer is at least one of the coating layer. Has an opening that exposes one side of the two component mounting pads. The printed wiring board according to claim 4, wherein the covering layer is a solder resist layer. The printed wiring board according to claim 1, wherein the outermost insulating layer on the second surface side of the buildup layer includes a core material. The printed wiring board according to claim 1, wherein a conductor layer provided on the outermost surface of the first surface is embedded in the insulating layer constituting the first surface of the buildup layer. A method of manufacturing a printed wiring board, the manufacturing method comprising
A reinforcing layer including two or more insulating layers and two or more conductive layers, and one or more insulating layers and two or more conductive layers laminated on both sides with the insulating layer interposed therebetween and joined to the reinforcing layer Providing a laminate including at least a buildup layer on which a first conductor layer is formed, and a peeling film that facilitates peeling between a part of the reinforcing layer and the buildup layer;
Forming a groove penetrating the reinforcing layer along the periphery of the release film around the entire periphery of the release film from the surface of the reinforcing layer opposite to the built-up layer;
Forming a cavity by removing the portion surrounded by the groove in the reinforcing layer together with the release film;
In preparing the laminate, in the formation of the at least one insulating layer constituting the reinforcing layer, an insulating plate formed by curing an insulating resin is laminated, and the insulating plate and the reinforcing layer are provided. Forming a via conductor penetrating through any of the conductor layers and connecting with the first conductor layer of the buildup layer.

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