JP2019066641A - Display - Google Patents

Abstract

Provided is a display device capable of achieving high definition. A switching element SW, an organic insulating film covering the switching element, a reflecting film M in contact with the organic insulating film, a first transparent conductive film TE1 covering the reflecting film, and the first transparent conductive film A covering first capacitive insulating film, a pixel electrode disposed on the first capacitive insulating film and electrically connected to the switching element, an electrophoretic element disposed on the pixel electrode, electricity And a common electrode CE disposed on the migration element 21. [Selected figure] Figure 3

Description

  Embodiments of the present invention relate to a display device.

  In one example, an electrophoretic display device is disclosed in which an electrophoretic element in which microcapsules are arranged is sandwiched between an element substrate and an opposing substrate. Since this type of electrophoretic display has a memory property, it is not necessary to always apply a voltage to maintain the display state. On the other hand, the electrophoretic display device needs to have a pixel capacity in order to hold the voltage in each pixel for a fixed period. Such a pixel capacitor is formed of, for example, a pixel capacitor electrode made of a light shielding metal film, a protective film, and a pixel electrode.

JP, 2011-221097, A

  An object of the present embodiment is to provide a display device capable of achieving high definition.

  According to this embodiment, a switching element, an organic insulating film covering the switching element, a reflective film in contact with the organic insulating film, a first transparent conductive film covering the reflective film, and the first transparent conductive film A covering first capacitive insulating film, a pixel electrode disposed on the first capacitive insulating film and electrically connected to the switching element, an electrophoretic element disposed on the pixel electrode, and the electricity And a common electrode disposed on the migration element.

FIG. 1 is a plan view showing a configuration example of a display device of the present embodiment. FIG. 2 is a plan view showing a pixel of the display shown in FIG. FIG. 3 is a cross-sectional view of the pixel shown in FIG. 2 taken along the line A-A '. FIG. 4 is a cross-sectional view taken along the line B-B 'intersecting the source line of the pixel shown in FIG. FIG. 5 is a cross-sectional view taken along the line C-C 'intersecting the gate line of the pixel shown in FIG. FIG. 6 is a plan view showing a modification of the pixel of the display shown in FIG. FIG. 7 is a cross-sectional view taken along the line D-D 'intersecting the gate line of the pixel shown in FIG. FIG. 8 is a plan view showing a modification of the pixel of the display shown in FIG. FIG. 9 is a cross-sectional view taken along the line E-E 'intersecting the gate line of the pixel shown in FIG. FIG. 10 is a plan view showing a modification of the pixel of the display shown in FIG. FIG. 11 is a cross-sectional view of the pixel shown in FIG. 10 taken along the line A-A '.

  Hereinafter, the present embodiment will be described with reference to the drawings. The disclosure is merely an example, and it is naturally included within the scope of the present invention as to what can be easily conceived of by those skilled in the art as to appropriate changes while maintaining the gist of the invention. In addition, the drawings may be schematically represented as to the width, thickness, shape, etc. of each portion as compared with the actual embodiment in order to clarify the description, but this is merely an example, and the present invention It does not limit the interpretation. In the specification and the drawings, components having the same or similar functions as those described above with reference to the drawings already described may be denoted by the same reference symbols, and overlapping detailed descriptions may be omitted as appropriate. .

FIG. 1 is a plan view showing a configuration example of a display device DSP of the present embodiment.
In the drawing, the first direction X and the second direction Y are directions intersecting each other, and the third direction Z is a direction intersecting the first direction X and the second direction Y. In one example, the first direction X, the second direction Y, and the third direction Z are orthogonal to each other, but may intersect each other at an angle other than 90 degrees. In the present specification, the direction toward the tip of the arrow indicating the third direction Z is referred to as upper (or simply upward), and the direction from the tip of the arrow to the reverse is referred to as downward (or simply downward). In addition, it is assumed that there is an observation position for observing the display device DSP on the tip end side of the arrow indicating the third direction Z, and from this observation position toward the XY plane defined in the first direction X and the second direction Y. It is called a plan view to look at.

  The display device DSP includes a first substrate SUB1 and a second substrate SUB2. The display device DSP includes a display unit DA for displaying an image, and a non-display unit NDA around the display unit DA. The non-display portion NDA is formed in a frame shape. The display unit DA is located in a region where the first substrate SUB1 and the second substrate SUB2 overlap in plan view. The display unit DA includes a plurality of pixels PX arranged in a matrix.

FIG. 2 is a plan view showing the pixel PX of the display device DSP shown in FIG.
Here, among the pixels PX, only main elements included in the first substrate SUB1 shown in FIG. 1 are illustrated. The pixel PX includes a switching element SW, a reflective film M, a pixel electrode PE, and a first transparent conductive film TE1.

  The switching element SW includes gate electrodes GE1 and GE2, a semiconductor layer SC, a source electrode SE, and a drain electrode DE. The illustrated switching element SW has a double gate structure, but may have a single gate structure. The switching element SW may have a top gate structure in which the gate electrodes GE1 and GE2 are disposed on the semiconductor layer SC, or a bottom gate structure in which the gate electrodes GE1 and GE2 are disposed below the semiconductor layer SC. It may be

  The semiconductor layer SC is electrically connected to the source line S1 through the contact hole CH1 at one end portion SCA, and is electrically connected to the drain electrode DE through the contact hole CH2 at the other end portion SCB. The semiconductor layer SC intersects with the gate line G1 between the one end portion SCA and the other end portion SCB.

  The gate electrodes GE1 and GE2 correspond to regions overlapping the semiconductor layer SC in the gate line G1. In the illustrated example, the gate line G1 extends along the first direction X and crosses the central portion of the pixel PX. Source electrode SE includes a region of source line S1 in contact with semiconductor layer SC. In the illustrated example, the source line S1 extends along the second direction Y and is located at the left end of the pixel PX. The drain electrode DE is formed in an island shape and is disposed between the source lines S1 and S2.

  The reflective film M overlaps the pixel electrode PE, the first transparent conductive film TE1, the switching element SW, the gate line G1, and the source line S1 in the pixel PX. The reflective film M is formed in an island shape in each pixel PX. The reflective film M further includes side surfaces ME1 and ME2 extending in the second direction Y, and side surfaces ME3 and ME4 extending in the first direction X. In the illustrated example, the reflective film M has a square shape in which the lengths of the side surfaces ME1 and ME2 in the second direction Y are equal to the lengths of the side surfaces ME3 and ME4 in the first direction X. The reflective film M may have a rectangular shape extending in the first direction X or the second direction Y, or may have another polygonal shape. Further, although described later, these side surfaces ME1 to ME4 are covered with the first transparent conductive film TE1.

  The first transparent conductive film TE1 overlaps with the plurality of pixels PX aligned in the first direction X and the second direction Y, and overlaps with both the gate line G1 and the source line S1. The first transparent conductive film TE1 is formed over substantially the entire area of the display portion DA shown in FIG. For example, a common potential is supplied to the first transparent conductive film TE1 in the non-display area NDA. The first transparent conductive film TE1 and the reflective film M have a first opening OP1 at a position overlapping the drain electrode DE in each pixel PX. The first opening OP1 is connected to the switching element SW.

  The pixel electrode PE overlaps the first transparent conductive film TE1, the reflective film M, the switching element SW, the gate line G1, and the source line S1 in the pixel PX. The pixel electrode PE is electrically connected to the drain electrode DE through the contact hole CH3 and the first opening OP1. In the illustrated example, the pixel electrode PE is formed in a square shape in which the length along the first direction X and the length along the second direction Y are equal, but the invention is not limited to this example. The pixel electrode PE may have a rectangular shape extending in the first direction X or the second direction Y, or may have another polygonal shape. In the illustrated example, the pixel electrode PE and the reflective film M have substantially the same area and the same shape, but the area of the pixel electrode PE and the area of the reflective film M may be different from each other.

  The portion where the pixel electrode PE and the first transparent conductive film TE1 overlap in plan view corresponds to the pixel capacitance of each pixel PX. In the illustrated example, since the first transparent conductive film TE1 is formed over substantially the entire surface of the pixel PX, substantially the entire region where the pixel electrode PE is formed overlaps the first transparent conductive film TE1, and the pixel capacitance Form.

FIG. 3 is a cross-sectional view of the pixel PX shown in FIG. 2 along the line AA '.
The first substrate SUB1 and the second substrate SUB2 are bonded by an adhesive layer 40. In the illustrated cross section, the observation position of the display device DSP is assumed to be above the second substrate SUB2. The first substrate SUB1 includes the base material 10, the insulating films 11 to 13, the switching element SW, the reflective film M, the first transparent conductive film TE1, the first capacitance insulating film 14, and the pixel electrode PE. Have.

  The base 10 is formed of insulating glass, resin or the like. The substrate 10 may be opaque because it is located on the opposite side of the observation position. The gate electrodes GE1 and GE2 integrated with the gate line G1 are located on the base 10 and covered with the insulating film 11. The gate line G1 and the gate electrodes GE1 and GE2 are metal materials such as aluminum (Al), titanium (Ti), silver (Ag), molybdenum (Mo), tungsten (W), copper (Cu), chromium (Cr) or the like A single layer structure may be formed by an alloy or the like in which these metal materials are combined, and may be a laminated structure.

  The semiconductor layer SC is located on the insulating film 11 and covered with the insulating film 12. The semiconductor layer SC is formed of, for example, polycrystalline silicon, but may be formed of amorphous silicon or an oxide semiconductor. The source electrode SE and the drain electrode DE which are integrated with the source line S1 are located on the insulating film 12 and covered with the insulating film 13. That is, the switching element SW is covered by the insulating film 13. The source line S1, the source electrode SE, and the drain electrode DE are formed of the same material, and are formed of, for example, the above-described metal material. The source electrode SE is in contact with the semiconductor layer SC through the contact hole CH1 penetrating the insulating film 12. The drain electrode DE is in contact with the semiconductor layer SC through the contact hole CH2 penetrating the insulating film 12.

  The reflective film M is located on the insulating film 13 and in contact with the insulating film 13. The reflective film M functions as, for example, a reflective film that reflects incident light from the second substrate SUB2 side, and also functions as a light shielding film that blocks light traveling from the second substrate SUB2 side to the switching element SW. The reflective film M is formed of, for example, a metal material such as aluminum. As a specific example, the reflective film M is formed of a stacked body of aluminum and titanium, a stacked body of aluminum and molybdenum, or the like. The reflective film M is supplied with, for example, a common potential by being in contact with the first transparent conductive film TE1.

  The first transparent conductive film TE1 covers the reflective film M. The first transparent conductive film TE1 functions as a capacitance electrode for securing a pixel capacitance. The first transparent conductive film TE1 is formed of, for example, a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The first transparent conductive film TE1 is covered by the first capacitance insulating film. In addition, the first transparent conductive film TE1 covers the side surface ME5 of the reflective film M in the first opening OP1. As illustrated, since the first transparent conductive film TE1 is in contact with the reflective film M, the first transparent conductive film TE1 and the reflective film M are electrically connected.

  The pixel electrode PE is located on the first capacitance insulating film 14. The pixel electrode PE is formed of, for example, a transparent conductive material such as ITO or IZO. The pixel electrode PE is opposed to the first transparent conductive film TE1 via the first capacitance insulating film 14. The pixel electrode PE is electrically connected to the switching element SW through a contact hole CH3 penetrating the insulating film 13 and the first capacitance insulating film 14 at a position overlapping the first opening OP1. When forming the contact hole CH3, the insulating film 13 and the first capacitance insulating film 14 may be etched at once or may be etched to the first capacitance insulating film 14 after the insulating film 13 is etched. . When the insulating film 13 and the first capacitance insulating film 14 are collectively etched, as illustrated, the first capacitance insulating film 14 does not cover the end of the insulating film 13, and the insulating film 13 and the first capacitance insulation The end of the membrane 14 has a substantially even cross section.

  In the present embodiment, each of the insulating films 11 and 12 and the first capacitance insulating film 14 is made of an inorganic insulating material such as silicon oxide (SiO), silicon nitride (SiN) or silicon oxynitride (SiON). It is formed. Each of the insulating films 11 and 12 and the first capacitance insulating film 14 may have a single-layer structure or a stacked structure. The first capacitive insulating film 14 corresponds to a capacitive insulating film interposed between the first transparent conductive film TE1 and the pixel electrode PE. In one example, the first capacitive insulating film 14 is formed of silicon nitride. The insulating film 13 is formed of an organic insulating material.

  The second substrate SUB2 includes a base 20, a common electrode CE, and the electrophoretic element 21. The base 20 is formed of insulating glass, resin or the like. The substrate 20 is transparent because it is located on the observation position side. The common electrode CE is disposed on the electrophoretic element 21. The common electrode CE is a transparent electrode formed of a transparent conductive material such as ITO or IZO. The common electrode CE is formed over substantially the entire area of the display unit DA shown in FIG. The common electrode CE is supplied with a common potential, for example, in the non-display area NDA. The electrophoretic element 21 is disposed on the pixel electrode PE. The electrophoretic element 21 is formed of a plurality of microcapsules 30 arranged almost without gaps. The adhesive layer 40 is located between the pixel electrode PE and the electrophoretic element 21.

  The microcapsules 30 are spherical bodies having a particle diameter of, for example, about 50 μm to 100 μm. In the illustrated example, a large number of microcapsules 30 are disposed between one pixel electrode PE and the common electrode CE due to the scale, but a square shape having a side length of about several hundred μm About one to ten microcapsules 30 are disposed in the pixel PX.

  The microcapsules 30 include a dispersion medium 31, a plurality of black particles 32, and a plurality of white particles 33. The black particles 32 and the white particles 33 may be referred to as electrophoretic particles. The outer shell (wall film) 34 of the microcapsule 30 is formed using, for example, a transparent resin such as an acrylic resin. The dispersion medium 31 is a liquid in which the black particles 32 and the white particles 33 are dispersed in the microcapsules 30. The black particles 32 are, for example, particles (polymer or colloid) made of a black pigment such as aniline black, and are, for example, positively charged. The white particles 33 are, for example, particles (polymer or colloid) made of a white pigment such as titanium dioxide, and are negatively charged, for example. Various additives can be added to these pigments as required. Further, instead of the black particles 32 and the white particles 33, for example, pigments such as red, green, blue, yellow, cyan and magenta may be used.

  In the electrophoretic element 21 configured as described above, when displaying the pixel PX in black, the pixel electrode PE is held at a relatively higher potential than the common electrode CE. That is, when the potential of the common electrode CE is set to the reference potential, the pixel electrode PE is held at the positive polarity. Thus, the positively charged black particles 32 are attracted to the common electrode CE, while the negatively charged white particles 33 are attracted to the pixel electrode PE. As a result, when the pixel PX is observed from the common electrode CE side, black is visually recognized. On the other hand, in the case of displaying the pixel PX in white, the pixel electrode PE is held in the negative polarity when the potential of the common electrode CE is set to the reference potential. As a result, the negatively charged white particles 33 are attracted to the common electrode CE side, while the positively charged black particles 32 are attracted to the pixel electrode PE. As a result, when the pixel PX is observed, white is visually recognized.

FIG. 4 is a cross-sectional view taken along the line BB ′ intersecting the source line S1 of the pixel PX shown in FIG.
The ends ME1 and ME2 of the reflective film M are covered by the first transparent conductive film TE1. The reflective film M is disposed at a position overlapping the pixel electrode PE in the third direction Z. In the illustrated example, the width along the first direction X of the reflective film M is equal to the width along the first direction X of the pixel electrode PE, but the width along the first direction X of the reflective film M Can be set independently of the width along the first direction X of the pixel electrode PE in consideration of the reflectance and the like. Therefore, the width of the reflective film M may be smaller or larger than the width of the pixel electrode PE.

FIG. 5 is a cross-sectional view taken along the line CC ′ intersecting the gate line G1 of the pixel PX shown in FIG.
The ends ME3 and ME4 of the reflective film M are covered by the first transparent conductive film TE1. The reflective film M is disposed at a position overlapping the pixel electrode PE in the third direction Z. In the illustrated example, the width along the second direction Y of the reflective film M is equal to the width along the second direction Y of the pixel electrode PE, but the width along the second direction Y of the reflective film M May be smaller than the width along the second direction Y of the pixel electrode PE.

  According to the present embodiment, the first transparent conductive film TE1 is disposed on the reflective film M and covers the side surfaces ME1 to ME5 of the reflective film M. When the reflective film M is formed on the insulating film 13, for example, the shapes of the side surfaces ME1 to ME5 are reduced by the decrease in adhesion due to the material of the reflective film M that is a metal film and the insulating film 13 that is an organic insulating film May be disturbed. However, in the present embodiment, since the first transparent conductive film TE1 covers the side surfaces ME1 to ME5, the coverage of the first capacitance insulating film 14 can be improved. Therefore, even if the film thickness of the first capacitance insulating film 14 is reduced, the occurrence of film breakage of the first capacitance insulating film 14 can be suppressed, and between the pixel electrode PE and the first transparent conductive film TE1. Short circuit can be suppressed. In addition, by reducing the film thickness of the first capacitor insulating film 14, the pixel electrode PE and the first transparent conductive film TE1 are formed without changing the overlapping area of the pixel electrode PE and the first transparent conductive film TE1. Pixel capacitance can be increased. Therefore, high definition can be achieved.

  Also, for example, when the pixel capacitance is formed by the pixel electrode PE and the reflective film M, if the area of the reflective film M is changed, the pixel capacitance is also changed. Was difficult. In the present embodiment, since the pixel capacitance is formed between the pixel electrode PE and the first transparent conductive film TE1, even if the reflectance is adjusted by changing the area of the reflective film M, the pixel capacitance is affected. Desired reflectance and pixel capacitance can be obtained without doing so.

FIG. 6 is a plan view showing a modification of the pixel PX of the display device DSP shown in FIG. 6 is different from the configuration shown in FIG. 2 in that the area of the reflective film M is different from the area of the pixel electrode PE in a plan view.
That is, the width along the first direction X of the reflective film M is smaller than the width along the first direction X of the pixel electrode PE. The width of the reflective film M in the second direction Y is smaller than the width of the pixel electrode PE in the second direction Y. The entire area of the reflective film M overlaps the pixel electrode PE in plan view.

FIG. 7 is a cross-sectional view taken along the line DD 'intersecting the gate line G1 of the pixel PX shown in FIG.
The first transparent conductive film TE1 is in contact with the insulating film 13 at a position overlapping the pixel electrode PE. Thus, by changing the area of the reflective film M, it is possible to adjust the reflectance. Further, as described above, since the pixel capacitance is formed by the first transparent conductive film TE1 and the pixel electrode PE, changing the area of the reflective film M does not affect the pixel capacitance. Therefore, the area of the reflective film M can be freely changed.
Also in such a modification, the same effect as described above can be obtained.

FIG. 8 is a plan view showing a modification of the pixel PX of the display device DSP shown in FIG. FIG. 8 is different from the configuration shown in FIG. 6 in that the first transparent conductive film TE1 has a second opening OP2. The first transparent conductive film TE1 is disposed in the hatched area.
The second opening OP2 is formed at a position overlapping the pixel electrode PE. The second opening OP2 does not overlap the source line S1 and the gate line G1 in order to prevent electric field leakage from the source line S1 and the gate line G1 to the pixel electrode PE. Further, the second opening OP2 does not overlap the reflective film M in order to prevent formation of a pixel capacitance by the reflective film M and the pixel electrode PE. The second opening OP2 is formed at a position different from the first opening OP1.
In addition, in order to suppress that 1st transparent conductive film TE1 becomes thin and resistance value rises, it is so preferable that 2nd opening part OP2 comrades in adjacent pixels are separated. For example, in the illustrated example, the second opening OP2 is formed on the left side with respect to the gate line G1, and the second opening OP2 is similarly formed on the left side of the gate line G in the adjacent pixel PX. desirable. The same applies to the case where the second opening OP2 is formed on the right side of the gate line G1.

FIG. 9 is a cross-sectional view taken along the line EE ′ intersecting the gate line G1 of the pixel PX shown in FIG.
The capacitive insulating film 14 is in contact with the insulating film 13 in the second opening OP2. In other words, the capacitive insulating film 14 is in contact with the insulating film 13 at a position overlapping with the pixel electrode PE. Thus, the pixel capacitance can be adjusted by providing the second opening OP2 at a position where the first transparent conductive film TE1 overlaps the pixel electrode PE.
Also in such a modification, the same effect as described above can be obtained.

FIG. 10 is a plan view showing a modification of the pixel PX of the display device DSP shown in FIG. FIG. 10 is different from the configuration shown in FIG. 2 in that the first substrate SUB1 includes the second transparent conductive film TE2.
The second transparent conductive film TE2 overlaps with the plurality of pixels PX aligned in the first direction X and the second direction Y, and overlaps with both the gate line G1 and the source line S1. The second transparent conductive film TE2 has a third opening OP3 at a position overlapping the drain electrode DE in each pixel PX. The second transparent conductive film TE2 is formed over substantially the entire area of the display portion DA shown in FIG.

  The first transparent conductive film TE1 is formed in an island shape in each pixel PX, and is formed larger than the pixel electrode PE. The width along the first direction X of the first transparent conductive film TE1 is larger than the width along the first direction X of the reflective film M, and the width along the second direction Y of the first transparent conductive film TE1 is a reflection It is larger than the width along the second direction Y of the film M. The reflective film M overlaps the first transparent conductive film TE1 in the entire region. The ends ME1 to ME4 of the reflective film M are covered with the first transparent conductive film TE1.

FIG. 11 is a cross-sectional view of the pixel PX shown in FIG. 10 along the line AA '.
The first substrate SUB1 includes a second transparent conductive film TE2 disposed on the first capacitance insulating film 14 and a second capacitance insulating film 15 covering the second transparent conductive film TE2. The pixel electrode PE is disposed on the second capacitance insulating film 15.

  The first transparent conductive film TE1 is in contact with the pixel electrode PE in the contact hole CH3. Therefore, the pixel potential is supplied to the first transparent conductive film TE1. The second transparent conductive film TE2 is supplied with a common potential, for example, in the non-display area NDA. The reflective film M is supplied with, for example, a pixel potential by being in contact with the first transparent conductive film TE1. Note that the reflective film M and the first transparent conductive film TE1 shown in FIG. 3 are at a common potential, so they are different from the example shown in FIG.

That is, in the illustrated example, a pixel capacitance is formed between the first transparent conductive film TE1 and the second transparent conductive film TE, and between the second transparent conductive film TE2 and the pixel electrode PE. By disposing the second transparent conductive film TE2 between the first transparent conductive film TE1 and the pixel electrode PE as described above, it is possible to increase the pixel capacitance. Therefore, the pixel capacitance can be increased without increasing the area of the pixel electrode PE and the first transparent conductive film TE1 along the first direction X and the second direction Y. Therefore, it is possible to further increase the definition.
Also in such a modification, the same effect as described above can be obtained.

  As described above, according to the present embodiment, it is possible to obtain a display device capable of achieving high definition.

  While certain embodiments of the present invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and the gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

DSP: display device, SW: switching element, 13: insulating film, M: reflective film,
TE1 ... first transparent conductive film, TE2 ... second transparent conductive film,
14, 15: capacitance insulating film, PE: pixel electrode, 21: electrophoretic element, CE: common electrode,
ME1 to ME5: side surface, OP1: first opening, OP2: second opening,
S: Source line, G: Gate line.

Claims (7)

A switching element,
An organic insulating film covering the switching element;
A reflective film in contact with the organic insulating film;
A first transparent conductive film covering the reflective film;
A first capacitive insulating film covering the first transparent conductive film;
A pixel electrode disposed on the first capacitive insulating film and electrically connected to the switching element;
An electrophoretic element disposed on the pixel electrode;
A common electrode disposed on the electrophoretic element.   The display device according to claim 1, wherein the first transparent conductive film covers a side surface of the reflective film.   The display device according to claim 1, wherein an area of the reflective film is different from an area of the pixel electrode in a plan view.   The display according to any one of claims 1 to 3, wherein the first transparent conductive film has a first opening connected to the switching element, and a second opening different from the first opening. apparatus. And a source line and a gate line electrically connected to the switching element,
The display device according to claim 4, wherein the second opening does not overlap the source line and the gate line.   The display device according to claim 4, wherein the second opening does not overlap with the reflective film. Furthermore, a second transparent conductive film disposed on the first capacitance insulating film,
A second capacitance insulating film covering the second transparent conductive film;
The display device according to any one of claims 1 to 6, wherein the pixel electrode is disposed on the second capacitance insulating film.

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