JP2019046931A - Semiconductor device, light-emitting device and method for manufacturing the semiconductor device - Google Patents
Semiconductor device, light-emitting device and method for manufacturing the semiconductor device Download PDFInfo
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Abstract
【課題】 貫通導体の発熱により貫通導体に重なる絶縁層の部位にクラックが発生したり、貫通導体と配線との接続部に断線が発生することを抑えること、また貫通導体に接続される配線における信号の電圧降下をより小さくすること、また貫通導体を構成する導体がＴＦＴの半導体層を汚染することを抑えること。【解決手段】 半導体装置は、ガラス基板等から成る絶縁基板１と、絶縁基板１を貫通する貫通導体１６ｋ１と、絶縁基板１上に配置された複数の絶縁層３１と、複数の絶縁層３１の層間に配置されるとともに貫通導体１６ｋ１に電気的に接続されているＴＦＴ１３と、を有している半導体装置であって、複数の絶縁層３１における貫通導体１６ｋ１と重なる部位に、貫通孔６０が配置されており、貫通孔６０の開口の径が貫通導体１６ｋ１の径よりも大きく、かつ貫通孔６０の開口の内側に貫通導体１６ｋ１が位置している。【選択図】 図１[PROBLEMS] To prevent cracks from occurring in a portion of an insulating layer that overlaps a through conductor due to heat generation of the through conductor, or to prevent disconnection from occurring at a connection portion between the through conductor and wiring, and to prevent the wiring connected to the through conductor from being broken. To reduce the voltage drop of the signal, and to suppress the contamination of the semiconductor layer of the TFT by the conductor that constitutes the through conductor. SOLUTION: A semiconductor device includes an insulating substrate 1 made of a glass substrate or the like, a through conductor 16k1 passing through the insulating substrate 1, a plurality of insulating layers 31 arranged on the insulating substrate 1, and a plurality of insulating layers 31. a TFT 13 disposed between layers and electrically connected to a through conductor 16k1, and a through hole 60 is disposed at a portion of a plurality of insulating layers 31 overlapping the through conductor 16k1. The diameter of the opening of the through-hole 60 is larger than the diameter of the through-conductor 16k1, and the through-conductor 16k1 is positioned inside the opening of the through-hole 60. As shown in FIG. [Selection diagram] Fig. 1
Description
本発明は、半導体層を含んで構成される薄膜トランジスタ（Thin Film Transistor：ＴＦＴ）を有する半導体装置、その半導体装置に発光ダイオード（Light Emitting Diode：ＬＥＤ）等の発光素子を実装して構成される発光装置、及び半導体装置の製造方法に関するものである。 The present invention relates to a semiconductor device having a thin film transistor (Thin Film Transistor: TFT) configured to include a semiconductor layer, and light emission configured by mounting a light emitting element such as a light emitting diode (LED) on the semiconductor device. The present invention relates to an apparatus and a method of manufacturing a semiconductor device.
従来、発光装置の一種として、ＬＥＤ等の発光素子を複数有する、バックライト装置が不要な自発光型の表示装置が知られている。そのような表示装置の基本構成のブロック回路図を図５（ａ）に示す。また、図５（ａ）の構成の表示装置の下面図を図５（ｂ）に示し、図５（ａ）のＡ１−Ａ２線における断面図を図６（ａ）に示し、図５（ａ）における一つの発光素子１４と発光制御部の回路図を図６（ｂ）に示す。表示装置は、ガラス基板等から成る絶縁基板１と、絶縁基板１上の所定の方向（例えば、行方向）に配置された走査信号線２と、走査信号線２と交差させて所定の方向と交差する方向（例えば、列方向）に配置された発光制御信号線３と、走査信号線２と発光制御信号線３によって区分けされた画素部（Ｐｍｎ）の複数から構成された表示部１１と、表示部１１を覆う絶縁層上に配置された複数の発光領域（Ｌｍｎ）と、を有する構成である。走査信号線２および発光制御信号線３は、絶縁基板１の側面に配置された側面配線１ｓを介して絶縁基板１の裏面にある裏面配線９に接続される。裏面配線９は、絶縁基板１の裏面に設置されたＩＣ，ＬＳＩ等の駆動素子６に接続される。即ち、表示装置は絶縁基板１の裏面にある駆動素子６によって表示が駆動制御される。駆動素子６は、例えば、絶縁基板１の裏面側にＣＯＧ（Chip On Glass）方式等の手段によって搭載される。また、絶縁基板１の裏面側には、駆動素子６との間で引き出し線を介して駆動信号、制御信号等を入出力するためのＦＰＣが設置される場合がある。また側面配線１ｓに替えてスルーホール等の貫通導体を用いる場合がある。 2. Description of the Related Art Conventionally, as one type of light emitting device, a self-light emitting display device having a plurality of light emitting elements such as LEDs and which does not require a backlight device is known. The block circuit diagram of the basic composition of such a display apparatus is shown to Fig.5 (a). 5 (b) shows a bottom view of the display device having the configuration of FIG. 5 (a), and FIG. 6 (a) shows a cross-sectional view taken along line A1-A2 of FIG. 5 (a). FIG. 6 (b) shows a circuit diagram of one light emitting element 14 and the light emission control unit in FIG. The display device includes an insulating substrate 1 formed of a glass substrate or the like, a scanning signal line 2 disposed in a predetermined direction (for example, a row direction) on the insulating substrate 1, and a scanning direction and a scanning direction. A light emission control signal line 3 disposed in a crossing direction (for example, a column direction), and a display unit 11 configured of a plurality of pixel units (Pmn) divided by the scanning signal line 2 and the light emission control signal line 3; And a plurality of light emitting regions (Lmn) disposed on the insulating layer covering the display unit 11. The scanning signal line 2 and the light emission control signal line 3 are connected to the back surface wiring 9 on the back surface of the insulating substrate 1 via the side surface wiring 1 s disposed on the side surface of the insulating substrate 1. The back surface wiring 9 is connected to a drive element 6 such as an IC or LSI installed on the back surface of the insulating substrate 1. That is, in the display device, the display is driven and controlled by the driving element 6 on the back surface of the insulating substrate 1. The driving element 6 is mounted, for example, on the back side of the insulating substrate 1 by means of a COG (Chip On Glass) method or the like. In addition, an FPC may be provided on the back surface side of the insulating substrate 1 to input and output a drive signal, a control signal, and the like via the lead wire with the drive element 6. Moreover, it may change to side-surface wiring 1s, and may use penetration conductors, such as a through hole.
それぞれの画素部１５（Ｐｍｎ）には、発光領域（Ｌｍｎ）にある発光素子１４（ＬＤｍｎ）の発光、非発光、発光強度等を制御するための発光制御部２２が配置されている。この発光制御部２２は、発光素子１４のそれぞれに発光信号を入力するためのスイッチ素子としての薄膜トランジスタ（Thin Film Transistor：ＴＦＴ）１２（図６（ｂ）に示す）と、発光制御信号（発光制御信号線３を伝達する信号）のレベル（電圧）に応じた、正電圧（アノード電圧：３〜５Ｖ程度）と負電圧（カソード電圧：−３Ｖ〜０Ｖ程度）の電位差（発光信号）から発光素子１４を電流駆動するための駆動素子としてのＴＦＴ１３（図６（ｂ）に示す）と、を含む。ＴＦＴ１３のゲート電極とソース電極とを接続する接続線上には容量素子４３（図６（ｂ）に示す）が配置されており、容量素子４３はＴＦＴ１３のゲート電極に入力された発光制御信号の電圧を次の書き換えまでの期間（１フレームの期間）保持する保持容量として機能する。 In each pixel unit 15 (Pmn), a light emission control unit 22 for controlling light emission, non-light emission, light emission intensity and the like of the light emitting element 14 (LDmn) in the light emitting region (Lmn) is disposed. The light emission control unit 22 includes a thin film transistor (TFT) 12 (shown in FIG. 6B) as a switch element for inputting a light emission signal to each of the light emitting elements 14, and a light emission control signal (light emission control). Light emitting element from the potential difference (light emission signal) between positive voltage (anode voltage: about 3 to 5 V) and negative voltage (cathode voltage: about -3 V to 0 V) according to the level (voltage) of the signal transmitted through signal line 3 And a TFT 13 (shown in FIG. 6 (b)) as a drive element for driving the current 14. A capacitive element 43 (shown in FIG. 6B) is disposed on a connection line connecting the gate electrode and the source electrode of the TFT 13, and the capacitive element 43 has a voltage of the light emission control signal input to the gate electrode of the TFT 13. Functions as a holding capacity for holding a period until the next rewriting (a period of one frame).
発光素子１４は、表示部１１を覆う絶縁層３１（図６（ａ）に示す）を貫通するスルーホール等の貫通導体２３ａ，２３ｂを介して、発光制御部２２、正電圧入力線１６、負電圧入力線１７に電気的に接続されている。即ち、発光素子１４の正電極は、貫通導体２３ａ及び発光制御部２２を介して正電圧入力線１６に接続されており、発光素子１４の負電極は、貫通導体２３ｂを介して負電圧入力線１７に接続されている。また表示装置は、平面視において、表示部１１と絶縁基板１の端１ｔとの間に額縁部１ｇがある。 The light emitting element 14 includes a light emission control unit 22, a positive voltage input line 16, and a negative voltage through through conductors 23a and 23b such as through holes penetrating the insulating layer 31 (shown in FIG. 6A) covering the display unit 11. It is electrically connected to the voltage input line 17. That is, the positive electrode of the light emitting element 14 is connected to the positive voltage input line 16 via the through conductor 23 a and the light emission control unit 22, and the negative electrode of the light emitting element 14 is a negative voltage input line via the through conductor 23 b Connected to 17. Further, the display device has a frame portion 1 g between the display portion 11 and the end 1 t of the insulating substrate 1 in a plan view.
なお、画素部１５は、それぞれが赤色発光用の副画素部、緑色発光用の副画素部、青色発光用の副画素部から成る場合がある。赤色発光用の副画素部は赤色ＬＥＤ等から成る赤色発光素子を有し、緑色発光用の副画素部は緑色ＬＥＤ等から成る緑色発光素子を有し、青色発光用の副画素部は青色ＬＥＤ等から成る青色発光素子を有している。例えば、これらの副画素部は、行方向あるいは列方向に並んでいる。 Each pixel unit 15 may be formed of a subpixel for red light emission, a subpixel for green light emission, and a subpixel for blue light emission. The sub-pixel part for red light emission has a red light-emitting element consisting of red LED etc., the sub-pixel part for green light emission has a green light-emitting element consisting of green LED etc, and the sub-pixel part for blue light emission is a blue LED Etc. are included. For example, the sub-pixel units are arranged in the row direction or the column direction.
図７（ａ），（ｂ）は、正電圧入力線１６と負電圧入力線１７のそれぞれに貫通導体１６ｋ，１７ｋが接続された構成を示すブロック回路図である。図７（ａ）は、額縁部１ｇに貫通導体１６ｋ，１７ｋが配置されている構成を示し、図７（ｂ）は、表示部１１に貫通導体１６ｋ，１７ｋが配置されている構成を示している。これらの貫通導体１６ｋ，１７ｋは、側面配線１ｓと比較して低抵抗であるために、正電圧入力線１６及び負電圧入力線１７における電源電圧の電圧降下を小さくする目的で設けられる。表示部１１に貫通導体１６ｋ，１７ｋが配置されている場合、正電圧入力線１６及び負電圧入力線１７における電源電圧の電圧降下をより小さくすることができる。貫通導体１６ｋ，１７ｋは、絶縁基板１の裏面配線９に接続されており、さらに駆動素子６、他の駆動素子または外部装置に接続されるフレキシブルプリント回路基板（Flexible Printed Circuit：ＦＰＣ）の回路配線等に、電気的に接続される。 FIGS. 7A and 7B are block circuit diagrams showing a configuration in which the through conductors 16k and 17k are connected to the positive voltage input line 16 and the negative voltage input line 17, respectively. 7A shows a configuration in which the through conductors 16k and 17k are disposed in the frame portion 1g, and FIG. 7B shows a configuration in which the through conductors 16k and 17k are disposed in the display portion 11. There is. These through conductors 16k and 17k are provided for the purpose of reducing the voltage drop of the power supply voltage in the positive voltage input line 16 and the negative voltage input line 17 because they have low resistance compared to the side wiring 1s. When the through conductors 16k and 17k are disposed in the display portion 11, the voltage drop of the power supply voltage in the positive voltage input line 16 and the negative voltage input line 17 can be further reduced. The through conductors 16 k and 17 k are connected to the back surface wiring 9 of the insulating substrate 1 and are further connected to the drive element 6, another drive element or an external device, and a circuit wiring of a flexible printed circuit (FPC). Etc. are electrically connected.
図８は、図７（ｂ）のＢ１−Ｂ２線における断面図であって、ＴＦＴ１３及び発光素子１４の部位を透視した断面図である。図８に示すように、絶縁基板１は貫通導体１６ｋを有しており、絶縁基板１上には複数の絶縁層３１が配置され、複数の絶縁層３１の層間には貫通導体１６ｋに電気的に接続されているＴＦＴ１３がある。貫通導体１６ｋを構成する導体は、Ｃｕ，Ｎｉ，Ｃｒ，Ａｌ，Ａｇ，Ｍｏ等の金属またはそれらの１種以上を含む合金から成る。複数の絶縁層３１は、絶縁基板１側から順に第１絶縁層３１ａ、第２絶縁層３１ｂ、第３絶縁層３１ｃ、第４絶縁層３１ｄが積層されており、第１絶縁層３１ａ、第２絶縁層３１ｂ、第３絶縁層３１ｃは、それぞれ酸化珪素（ＳｉＯ2），窒化珪素（ＳｉＮx）等から成り、第４絶縁層３１ｄはアクリル系樹脂，ポリカーボネート等から成る。貫通導体１６ｋは、絶縁基板１上にある、Ｍｏ層／Ａｌ層／Ｍｏ層（Ｍｏ層上にＡｌ層、Ｍｏ層が順次積層された積層構造を示す）等から成る正電圧入力線１６に接続されており、正電圧入力線１６はＴＦＴ１３のソース電極１３ｓにスルーホール５２を介して接続されている。 FIG. 8 is a cross-sectional view taken along line B1-B2 of FIG. 7B and is a cross-sectional view seen through the portions of the TFT 13 and the light emitting element 14. As shown in FIG. As shown in FIG. 8, the insulating substrate 1 has a through conductor 16 k, a plurality of insulating layers 31 are disposed on the insulating substrate 1, and the through conductor 16 k is electrically connected between the plurality of insulating layers 31. There is a TFT 13 connected to. The conductor constituting the through conductor 16k is made of a metal such as Cu, Ni, Cr, Al, Ag, Mo or an alloy containing one or more of them. In the plurality of insulating layers 31, a first insulating layer 31a, a second insulating layer 31b, a third insulating layer 31c, and a fourth insulating layer 31d are sequentially stacked from the insulating substrate 1 side, and the first insulating layer 31a, the second The insulating layer 31 b and the third insulating layer 31 c are each made of silicon oxide (SiO 2 ), silicon nitride (SiN x ) or the like, and the fourth insulating layer 31 d is made of an acrylic resin, polycarbonate or the like. Through conductor 16k is connected to positive voltage input line 16 formed of Mo layer / Al layer / Mo layer (showing a laminated structure in which Al layer and Mo layer are sequentially laminated on Mo layer) on insulating substrate 1 and the like. The positive voltage input line 16 is connected to the source electrode 13 s of the TFT 13 through the through hole 52.
ＴＦＴ１３のゲート電極１３ｇは、第１絶縁層３１ａと第２絶縁層３１ｂとの層間に配置され、ＴＦＴ１３の半導体層１３ａは、第２絶縁層３２ｂと第３絶縁層３１ｃとの層間に配置され、ＴＦＴ１３のソース電極１３ｓとドレイン電極１３ｄは、第３絶縁層３２ｃと第４絶縁層３１ｄとの層間に配置されている。ソース電極１３ｓは半導体層１３ａにスルーホール５３を介して接続され、ドレイン電極１３ｄは半導体層１３ａにスルーホール５４を介して接続され、またドレイン電極１３ｄは、正電極４４ａを構成する電極層４２ａにスルーホール５５を介して接続されている。 The gate electrode 13g of the TFT 13 is disposed between the first insulating layer 31a and the second insulating layer 31b, and the semiconductor layer 13a of the TFT 13 is disposed between the second insulating layer 32b and the third insulating layer 31c. The source electrode 13s and the drain electrode 13d of the TFT 13 are disposed between the third insulating layer 32c and the fourth insulating layer 31d. The source electrode 13s is connected to the semiconductor layer 13a via the through hole 53, the drain electrode 13d is connected to the semiconductor layer 13a via the through hole 54, and the drain electrode 13d is connected to the electrode layer 42a constituting the positive electrode 44a. The through holes 55 are connected.
発光素子１４は、絶縁層３１上に配置された正電極４４ａと負電極４４ｂにハンダ等の導電性接続部材を介して電気的に接続されて、絶縁層３１上に実装される。正電極４４ａは、Ｍｏ層／Ａｌ層／Ｍｏ層等から成る電極層４２ａと、それを覆う酸化インジウム錫（Indium Tin Oxide：ＩＴＯ）等から成る透明電極４３ａと、から成る。負電極４４ｂも同様の構成であり、Ｍｏ層／Ａｌ層／Ｍｏ層等から成る電極層４２ｂと、それを覆うＩＴＯ等から成る透明電極４３ｂと、から成る。絶縁層３１と、透明電極４３ａ，４３ｂのそれぞれの一部（発光素子１４が重ならない部位）と、を覆って、絶縁層４５が配置されており、この絶縁層４５は酸化珪素（ＳｉＯ2），窒化珪素（ＳｉＮx）等から成る（例えば、特許文献１を参照）。 The light emitting element 14 is electrically connected to the positive electrode 44 a and the negative electrode 44 b disposed on the insulating layer 31 via a conductive connecting member such as solder, and mounted on the insulating layer 31. The positive electrode 44a includes an electrode layer 42a formed of Mo layer / Al layer / Mo layer or the like, and a transparent electrode 43a formed of indium tin oxide (ITO) or the like covering the electrode layer 42a. The negative electrode 44b also has a similar configuration, and includes an electrode layer 42b made of Mo layer / Al layer / Mo layer or the like, and a transparent electrode 43b made of ITO or the like covering the electrode layer 42b. An insulating layer 45 is disposed to cover the insulating layer 31 and a part of each of the transparent electrodes 43a and 43b (a portion where the light emitting element 14 does not overlap), and the insulating layer 45 is made of silicon oxide (SiO 2 ) And silicon nitride (SiN x ) and the like (see, for example, Patent Document 1).
しかしながら、図８に示す構成の上記従来の表示装置においては、以下の問題点があった。貫通導体１６ｋを構成する導体は、高い導電性の点でＣｕから成る場合が多く、ＣｕはＴＦＴ１３の半導体層１３ａに対して汚染物質となるという問題点があった。また、貫通導体１６ｋには電源電流等の大電流を流すことが多く、その場合貫通導体１６ｋに電流集中が生じて貫通導体１６ｋが発熱し、その結果、貫通導体１６ｋに重なる絶縁層３１の部位にクラックが発生したり、貫通導体１６ｋと正電圧入力線１６との接続部に断線が発生するという問題点があった。また、絶縁基板１に貫通導体１６ｋを設けることによって、貫通導体１６ｋに接続される電源配線等の配線における信号の電圧降下を小さくすることができるが、多数の発光素子１４が配置される発光装置においては配線の長さが長くなるために、信号の電圧降下を小さくすることが難しくなるという問題点があった。また、一般に貫通導体を形成した絶縁基板１にＴＦＴ等を形成するため、貫通導体はその位置やサイズのばらつき、精度が悪く、ＴＦＴの微細化による位置ずれなどが生じる結果として、高密度の半導体装置の実現が難しいと言う問題点があった。 However, the above-described conventional display device having the configuration shown in FIG. 8 has the following problems. The conductor constituting the through conductor 16 k is often made of Cu in terms of high conductivity, and Cu has a problem of becoming a contaminant with respect to the semiconductor layer 13 a of the TFT 13. In addition, a large current such as a power supply current often flows through through conductor 16k, in which case current concentration occurs in through conductor 16k and through conductor 16k generates heat, as a result, a portion of insulating layer 31 overlapping with through conductor 16k There is a problem that a crack is generated or a disconnection occurs at the connection between the through conductor 16k and the positive voltage input line 16. Further, by providing the through conductor 16k in the insulating substrate 1, the voltage drop of the signal in the wiring such as the power supply wiring connected to the through conductor 16k can be reduced, but a light emitting device in which a large number of light emitting elements 14 are arranged. In the above, there is a problem that it becomes difficult to reduce the voltage drop of the signal because the length of the wiring becomes long. Further, since the TFTs and the like are generally formed on the insulating substrate 1 on which the through conductors are formed, the through conductors are uneven in their positions and sizes, the accuracy is poor, and as a result of positional deviation due to the miniaturization of the TFTs There is a problem that the realization of the device is difficult.
本発明は、上記の問題点に鑑みて完成されたものであり、その目的は、貫通導体の発熱によって貫通導体に重なる絶縁層の部位にクラックが発生したり、貫通導体とそれに接続される配線との接続部に断線が発生することを効果的に抑えることができる、半導体装置及び発光装置を提供することである。また、貫通導体に接続される配線における信号の電圧降下をより小さくすることができる、半導体装置及び発光装置を提供することである。また、高密度なＴＦＴを形成した後に精度の劣る貫通導体を作成することにより、結果として高密度の半導体装置の実現を可能とすることである。また、貫通導体を構成する導体がＴＦＴの半導体層を汚染することを抑えることができるとともに、貫通導体の発熱による上記問題点の発生を抑えることができる結果、信頼性が高く長寿命の半導体装置を製造できる半導体装置の製造方法を提供することである。 The present invention has been completed in view of the above problems, and its object is to generate a crack in the portion of the insulating layer overlapping the through conductor due to the heat generation of the through conductor, or to the through conductor and the wiring connected thereto It is an object of the present invention to provide a semiconductor device and a light emitting device capable of effectively suppressing the occurrence of disconnection at the connection portion with the semiconductor device. Another object of the present invention is to provide a semiconductor device and a light emitting device which can further reduce a voltage drop of a signal in a wiring connected to a through conductor. In addition, it is possible to realize a high density semiconductor device as a result by forming a low-precision through conductor after forming a high density TFT. In addition, the conductor forming the through conductor can be prevented from contaminating the semiconductor layer of the TFT, and the occurrence of the above-mentioned problems due to the heat generation of the through conductor can be suppressed. As a result, a semiconductor device with high reliability and long life. It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of manufacturing a semiconductor device.
本発明の半導体装置は、絶縁基板と、前記絶縁基板を貫通する貫通導体と、前記絶縁基板上に配置された複数の絶縁層と、前記複数の絶縁層の層間に配置されるとともに前記貫通導体に電気的に接続されている薄膜トランジスタと、を有している半導体装置であって、前記複数の絶縁層における前記貫通導体と重なる部位に、貫通孔が配置されており、前記貫通孔の開口の径が前記貫通導体の径よりも大きく、かつ前記貫通孔の開口の内側に前記貫通導体が位置している構成である。 A semiconductor device according to the present invention includes: an insulating substrate; a through conductor penetrating the insulating substrate; a plurality of insulating layers disposed on the insulating substrate; A semiconductor device having a thin film transistor electrically connected to the semiconductor device, and a through hole is disposed in a portion of the plurality of insulating layers overlapping the through conductor; The diameter is larger than the diameter of the through conductor, and the through conductor is located inside the opening of the through hole.
本発明の半導体装置は、好ましくは、前記貫通導体は、複数個が前記絶縁基板に均等に配置されている。 In the semiconductor device of the present invention, preferably, a plurality of the through conductors are evenly arranged on the insulating substrate.
また本発明の半導体装置は、好ましくは、前記貫通導体は前記絶縁基板に複数配置されているとともに、それらは前記絶縁基板の端との距離が互いに異なるものを含んでおり、前記絶縁基板の端に最も近い前記貫通導体の平面視での面積が他の前記貫通導体の平面視での面積よりも大きい。 In the semiconductor device according to the present invention, preferably, a plurality of the through conductors are arranged on the insulating substrate, and the through conductors include those having different distances from the end of the insulating substrate, and the end of the insulating substrate The area in plan view of the through conductor closest to is larger than the area in plan view of the other through conductors.
また本発明の半導体装置は、好ましくは、前記絶縁基板の端に最も近い前記貫通導体を流れる電流が、他の前記貫通導体を流れる電流よりも大きい。 In the semiconductor device of the present invention, preferably, the current flowing through the through conductor closest to the end of the insulating substrate is larger than the current flowing through the other through conductors.
また本発明の半導体装置は、好ましくは、前記絶縁基板は、側面に配置された側面導体を有しており、前記貫通導体は、前記側面導体に電気的に接続されている。 In the semiconductor device of the present invention, preferably, the insulating substrate has a side conductor disposed on a side surface, and the through conductor is electrically connected to the side conductor.
また本発明の半導体装置は、好ましくは、前記絶縁基板は、側面に前記側面導体と電気的に独立している側面配線が配置されている。 In the semiconductor device according to the present invention, preferably, the insulating substrate is provided with side wiring electrically independent of the side conductor on the side surface.
本発明の発光装置は、上記本発明の構成の半導体装置を有する発光装置であって、前記複数の絶縁層の上に前記薄膜トランジスタと電気的に接続される電極が配置されており、前記電極に接続された発光素子を有している構成である。 A light emitting device according to the present invention is a light emitting device including the semiconductor device having the above configuration according to the present invention, and an electrode electrically connected to the thin film transistor is disposed on the plurality of insulating layers. It is the structure which has the light emitting element connected.
本発明の半導体装置の製造方法は、前記絶縁基板上に前記複数の絶縁層を積層するとともにそれらの層間に前記薄膜トランジスタを形成し、次に、前記複数の絶縁層を貫通する前記貫通孔を形成し、次に、前記貫通孔の開口の内側に露出した前記絶縁基板の部位に、前記絶縁基板を貫通する孔を形成し、前記孔に導体柱を配置することによって前記貫通導体を形成する構成である。 In the method of manufacturing a semiconductor device according to the present invention, the plurality of insulating layers are stacked on the insulating substrate, the thin film transistor is formed between the layers, and then the through holes penetrating the plurality of insulating layers are formed. Then, a hole penetrating the insulating substrate is formed in the portion of the insulating substrate exposed inside the opening of the through hole, and the conductive conductor is disposed in the hole to form the through conductor. It is.
本発明の半導体装置の製造方法は、好ましくは、前記貫通孔をエッチング法によって形成し、前記絶縁基板を貫通する孔をレーザ光照射法によって形成する。 In the method of manufacturing a semiconductor device of the present invention, preferably, the through hole is formed by an etching method, and the hole penetrating the insulating substrate is formed by a laser beam irradiation method.
また本発明の半導体装置の製造方法は、好ましくは、前記導体柱は銅柱である。 In the method of manufacturing a semiconductor device according to the present invention, preferably, the conductor post is a copper pole.
また本発明の半導体装置の製造方法は、好ましくは、前記貫通孔は、前記貫通導体の側の径よりも反対側の径が大きい。 In the method of manufacturing a semiconductor device according to the present invention, preferably, the diameter of the through hole is larger on the opposite side than the diameter on the side of the through conductor.
本発明の半導体装置は、絶縁基板と、前記絶縁基板を貫通する貫通導体と、前記絶縁基板上に配置された複数の絶縁層と、前記複数の絶縁層の層間に配置されるとともに前記貫通導体に電気的に接続されている薄膜トランジスタと、を有している半導体装置であって、前記複数の絶縁層における前記貫通導体と重なる部位に、貫通孔が配置されており、前記貫通孔の開口の径が前記貫通導体の径よりも大きく、かつ前記貫通孔の開口の内側に前記貫通導体が位置している構成であることから、以下の効果を奏する。複数の絶縁層における貫通導体と重なる部位に貫通孔が配置されていることから、貫通導体の放熱性が向上し、
貫通導体に電源電流等の大きな電流を流したとしても、貫通導体の発熱によって貫通導体に重なる絶縁層の部位にクラックが発生したり、貫通導体とそれに接続される配線との接続部に断線が発生することを効果的に抑えることができる。
A semiconductor device according to the present invention includes: an insulating substrate; a through conductor penetrating the insulating substrate; a plurality of insulating layers disposed on the insulating substrate; A semiconductor device having a thin film transistor electrically connected to the semiconductor device, and a through hole is disposed in a portion of the plurality of insulating layers overlapping the through conductor; Since the diameter is larger than the diameter of the through conductor and the through conductor is located inside the opening of the through hole, the following effects can be obtained. Since the through holes are disposed in the portions of the plurality of insulating layers overlapping the through conductors, the heat dissipation of the through conductors is improved,
Even if a large current such as a power supply current flows in the through conductor, the heat generation of the through conductor causes a crack in the portion of the insulating layer overlapping the through conductor, or a break in the connecting portion between the through conductor and the wiring connected thereto. The occurrence can be effectively suppressed.
本発明の半導体装置は、前記貫通導体は、複数個が前記絶縁基板に均等に配置されている場合、絶縁基板において複数個の貫通導体の発熱による熱集中を抑えることができる。その結果、絶縁層の部位にクラックが発生したり、貫通導体とそれに接続される配線との接続部に断線が発生することをより効果的に抑えることができる。また、複数個の貫通導体を均等に配置することにより絶縁基板の面内での電圧降下を最小で均一なものとすることが可能となり、電圧降下に伴う発光輝度の不均一などが無い発光装置等の実現が可能となる。 In the semiconductor device of the present invention, when a plurality of the through conductors are evenly arranged on the insulating substrate, heat concentration due to heat generation of the plurality of through conductors can be suppressed in the insulating substrate. As a result, it is possible to more effectively suppress the occurrence of a crack in the portion of the insulating layer and the occurrence of a break in the connection portion between the through conductor and the wiring connected thereto. Further, by arranging the plurality of through conductors evenly, the voltage drop in the surface of the insulating substrate can be minimized and made uniform, and the light emitting device does not have uneven light emission luminance due to the voltage drop. Etc. can be realized.
また本発明の半導体装置は、前記貫通導体は前記絶縁基板に複数配置されているとともに、それらは前記絶縁基板の端との距離が互いに異なるものを含んでおり、前記絶縁基板の端に最も近い前記貫通導体の平面視での面積が他の前記貫通導体の平面視での面積よりも大きい場合、絶縁基板の端に最も近い貫通導体の抵抗を、他の貫通導体の抵抗よりも小さくすることができる。従って、それらの貫通導体に電源電流等の大きな電流を流したとしても、貫通導体に接続される配線における電圧降下のばらつきを小さくすることができる。また、それらの貫通導体の放熱性のばらつきも小さくすることができる。貫通導体の発熱による上記諸問題点の発生をより効果的に抑えることができる。 Further, in the semiconductor device according to the present invention, the through conductors are arranged in a plurality on the insulating substrate, and they include those different in distance from the end of the insulating substrate, and are closest to the end of the insulating substrate When the area of the through conductor in plan view is larger than the area of the other through conductor in plan view, the resistance of the through conductor closest to the end of the insulating substrate is smaller than the resistance of the other through conductors. Can. Therefore, even if a large current such as a power supply current flows in the through conductors, the variation in voltage drop in the wiring connected to the through conductors can be reduced. Moreover, the dispersion | variation in the heat dissipation of those penetration conductors can also be made small. It is possible to more effectively suppress the occurrence of the above-mentioned problems due to the heat generation of the through conductor.
また本発明の半導体装置は、前記絶縁基板の端に最も近い前記貫通導体を流れる電流が、他の前記貫通導体を流れる電流よりも大きい場合、絶縁基板の端に最も近い貫通導体の抵抗を、他の貫通導体の抵抗よりも小さくしているので、絶縁基板の端に最も近い貫通導体に電源電流等の大電流を流すことができる。 Further, in the semiconductor device according to the present invention, when a current flowing through the through conductor closest to the end of the insulating substrate is larger than a current flowing through the other through conductor, the resistance of the through conductor closest to the end of the insulating substrate is Since the resistance is smaller than the resistances of the other through conductors, a large current such as a power supply current can flow through the through conductor closest to the end of the insulating substrate.
また本発明の半導体装置において、前記絶縁基板は、側面に配置された側面導体を有しており、前記貫通導体は、前記側面導体に電気的に接続されている場合、貫通導体及び側面導体のそれぞれに電流が分配されるので、貫通導体を流れる電流が小さくなる。その結果、貫通導体の発熱による上記諸問題点の発生をより効果的に抑えることができる。また、複数の貫通導体がある場合、貫通導体に接続された配線における信号の電圧降下のばらつきを小さくすることができる。また、それらの貫通導体の放熱性のばらつきも小さくすることができる。また、一般に側面導体は貫通導体より低抵抗化が難しく、大電流を流した場合はマイグレーションなど信頼性の低下も懸念されていたが、貫通導体で冗長接続する事により、側面導体の高信頼性化が可能になる。 Further, in the semiconductor device according to the present invention, the insulating substrate has a side conductor disposed on a side surface, and the through conductor is a through conductor and a side conductor when electrically connected to the side conductor. Since the current is distributed to each, the current flowing through the through conductor is reduced. As a result, it is possible to more effectively suppress the occurrence of the above-mentioned problems due to the heat generation of the through conductor. Further, when there are a plurality of through conductors, variations in voltage drop of signals in the wirings connected to the through conductors can be reduced. Moreover, the dispersion | variation in the heat dissipation of those penetration conductors can also be made small. Generally, it is more difficult to lower the resistance of the side conductor than through conductors, and there is concern about the decrease in reliability such as migration when a large current flows, however, high reliability of the side conductors can be achieved by making redundant connections with the through conductors. Can be
また本発明の半導体装置は、前記絶縁基板は、側面に前記側面導体と電気的に独立している側面配線が配置されている場合、薄膜トランジスタのゲート電極に入力する走査信号等を側面配線を介して供給することができるので、貫通導体の数が増加することを抑えることができる。また、大電流の接続を側面配線だけでは無く貫通導体でも実施することで、大電流用に大面積の側面導体の形成が不要となり、側面配線領域の縮小や形成する辺をより少なくすることができるなど狭額縁化に大いに寄与する。また、貫通導体の発熱による上記諸問題点の発生をより効果的に抑えることができる。 In the semiconductor device according to the present invention, when the side surface wiring electrically isolated from the side surface conductor is disposed on the side surface of the insulating substrate, a scanning signal or the like input to the gate electrode of the thin film transistor is through the side surface wiring. Since it can be supplied, it is possible to suppress an increase in the number of through conductors. Further, by performing the connection of a large current not only to the side wiring but also to the through conductor, it becomes unnecessary to form a side conductor of a large area for a large current, and the side wiring region can be reduced and the side to be formed can be reduced. It greatly contributes to narrowing the frame, such as being able to. Further, the occurrence of the above-mentioned problems due to the heat generation of the through conductor can be suppressed more effectively.
本発明の発光装置は、上記本発明の構成の半導体装置を有する発光装置であって、前記複数の絶縁層の上に前記薄膜トランジスタと電気的に接続される電極が配置されており、前記電極に接続された発光素子を有している構成であることから、貫通導体の発熱による上記諸問題点の発生を効果的に抑えることができる結果、信頼性が高く長寿命の発光装置となる。 A light emitting device according to the present invention is a light emitting device including the semiconductor device having the above configuration according to the present invention, and an electrode electrically connected to the thin film transistor is disposed on the plurality of insulating layers. Since the light emitting element connected is provided, generation of the above-mentioned problems due to heat generation of the through conductor can be effectively suppressed, resulting in a light emitting device with high reliability and long life.
本発明の半導体装置の製造方法は、前記絶縁基板上に前記複数の絶縁層を積層するとともにそれらの層間に前記薄膜トランジスタを形成し、次に、前記複数の絶縁層を貫通する前記貫通孔を形成し、次に、前記貫通孔の開口の内側に露出した前記絶縁基板の部位に、前記絶縁基板を貫通する孔を形成し、前記孔に導体柱を配置することによって前記貫通導体を形成する構成であることから、以下の効果を奏する。薄膜トランジスタを形成した後に、貫通導体を形成することができるので、貫通導体を構成する導体がＴＦＴの半導体層を汚染することを抑えることができる。また、貫通導体の発熱による上記諸問題点の発生を抑えることができる結果、信頼性が高く長寿命の半導体装置を製造できる。また、高密度、高精度にＴＦＴを絶縁基板に形成した後に、位置精度、サイズの精度の劣る貫通導体を絶縁基板に形成することにより、ＴＦＴと貫通導体との配線を介しての接続が容易になる結果として、高密度の半導体装置の実現が可能となる。 In the method of manufacturing a semiconductor device according to the present invention, the plurality of insulating layers are stacked on the insulating substrate, the thin film transistor is formed between the layers, and then the through holes penetrating the plurality of insulating layers are formed. Then, a hole penetrating the insulating substrate is formed in the portion of the insulating substrate exposed inside the opening of the through hole, and the conductive conductor is disposed in the hole to form the through conductor. Therefore, the following effects can be obtained. Since the through conductor can be formed after forming the thin film transistor, it is possible to suppress that the conductor forming the through conductor contaminates the semiconductor layer of the TFT. Moreover, as a result of being able to suppress generation | occurrence | production of the said problems by heat_generation | fever of a penetration conductor, a highly reliable and long life semiconductor device can be manufactured. In addition, after forming the TFT on the insulating substrate with high density and high accuracy, by forming the through conductor with poor positional accuracy and size accuracy on the insulating substrate, connection via the wiring between the TFT and the through conductor is easy. As a result, it becomes possible to realize a high density semiconductor device.
本発明の半導体装置の製造方法は、前記貫通孔をエッチング法によって形成し、前記絶縁基板を貫通する孔をレーザ光照射法によって形成する場合、絶縁基板を貫通する孔の位置及び大きさを正確なものとして形成できる。その結果、放熱性に優れた貫通導体を形成することが容易になる。 In the method of manufacturing a semiconductor device according to the present invention, when the through holes are formed by etching and the holes penetrating the insulating substrate are formed by laser beam irradiation, the position and size of the holes penetrating the insulating substrate are accurate. It can be formed as As a result, it becomes easy to form a through conductor excellent in heat dissipation.
また本発明の半導体装置の製造方法は、前記導体柱は銅柱である場合、高い導電性を有する貫通導体を形成できる。従って、貫通導体の発熱による上記諸問題点の発生をより抑えることができるとともに、貫通導体を構成する銅がＴＦＴの半導体層を汚染することを抑えることができ、長寿命の半導体装置を製造できる。 Further, in the method of manufacturing a semiconductor device according to the present invention, in the case where the conductor post is a copper post, a through conductor having high conductivity can be formed. Therefore, while being able to suppress generation | occurrence | production of the said problems by heat_generation | fever of a penetration conductor more, it can suppress that copper which comprises a penetration conductor pollutes the semiconductor layer of TFT, and can manufacture a long life semiconductor device. .
また本発明の半導体装置の製造方法は、前記貫通孔は、前記貫通導体の側の径よりも反対側の径が大きい場合、貫通導体の放熱性が向上する。その結果、貫通導体の発熱による上記諸問題点の発生をより抑えることができる。 Further, in the method of manufacturing a semiconductor device according to the present invention, when the diameter of the through hole on the opposite side is larger than the diameter on the side of the through conductor, the heat dissipation of the through conductor is improved. As a result, the occurrence of the above-mentioned problems due to the heat generation of the through conductor can be further suppressed.
以下、本発明の半導体装置、発光装置及び半導体装置の製造方法の実施の形態について、図面を参照しながら説明する。但し、以下で参照する各図は、本発明の半導体装置及び発光装置の実施の形態における構成部材のうち、半導体装置及び発光装置を説明するための主要部を示している。従って、本発明に係る半導体装置及び発光装置は、図に示されていない配線導体、制御ＩＣ，ＬＳＩ等の周知の構成部材を備えていてもよい。なお、本発明の半導体装置、発光装置及び半導体装置の製造方法の実施の形態を示す図１〜図４において、図５〜図８と同じ部位には同じ符号を付しており、それらの詳細な説明は省く。 Hereinafter, embodiments of a semiconductor device, a light emitting device, and a method of manufacturing the semiconductor device of the present invention will be described with reference to the drawings. However, each drawing referred to below shows main parts for explaining the semiconductor device and the light emitting device among the constituent members in the embodiment of the semiconductor device and the light emitting device of the present invention. Therefore, the semiconductor device and the light emitting device according to the present invention may be provided with known components such as a wiring conductor, a control IC, an LSI and the like which are not shown in the drawings. In FIGS. 1 to 4 showing the embodiment of the semiconductor device, the light emitting device and the semiconductor device according to the present invention, the same parts as those in FIGS. I omit the explanation.
本発明の半導体装置は、ＴＦＴに接続されて動作が制御される種々の電子素子が搭載されることによって、種々の電子装置を構成し得る。電子素子としては、ＬＥＤ等の発光素子、有機ＥＬ素子、無機ＥＬ素子、微小電気機械システム（Micro Electro Mechanical Systems）素子等がある。図１〜図４は、本発明の半導体装置を用いた発光装置について実施の形態の各種例を示す図であり、以下、発光装置用の半導体装置及び発光装置について説明する。 The semiconductor device of the present invention can constitute various electronic devices by mounting various electronic elements connected to the TFT and whose operation is controlled. As an electronic element, there are a light emitting element such as LED, an organic EL element, an inorganic EL element, a micro electro mechanical system (Micro Electro Mechanical Systems) element, and the like. FIGS. 1 to 4 are diagrams showing various examples of the light emitting device using the semiconductor device of the present invention. Hereinafter, the semiconductor device and the light emitting device for the light emitting device will be described.
図１に示すように、本発明の半導体装置は、ガラス基板等から成る絶縁基板１と、絶縁基板１を貫通する貫通導体１６ｋ１と、絶縁基板１上に配置された複数の絶縁層３１と、複数の絶縁層３１の層間に配置されるとともに貫通導体１６ｋ１に電気的に接続されているＴＦＴ１３と、を有している半導体装置であって、複数の絶縁層３１における貫通導体１６ｋ１と重なる部位に、貫通孔６０が配置されており、貫通孔６０の開口の径が貫通導体１６ｋ１の径よりも大きく、かつ貫通孔６０の開口の内側に貫通導体１６ｋ１が位置している構成である。この構成により、貫通導体１６ｋ１の放熱性が向上し、貫通導体１６ｋ１に電源電流（数μＡ〜数１０μＡ程度）等の大きな電流を流したとしても、貫通導体１６ｋ１の発熱によって貫通導体１６ｋ１に重なる絶縁層３１の部位にクラックが発生したり、貫通導体１６ｋ１とそれに接続される正電圧入力線１６との接続部に断線が発生することを効果的に抑えることができる。 As shown in FIG. 1, the semiconductor device of the present invention comprises an insulating substrate 1 made of a glass substrate or the like, a through conductor 16k1 penetrating the insulating substrate 1, and a plurality of insulating layers 31 disposed on the insulating substrate 1. A semiconductor device including a TFT 13 disposed between layers of a plurality of insulating layers 31 and electrically connected to the through conductor 16 k 1, in a portion overlapping with the through conductors 16 k 1 in the plurality of insulating layers 31. The through hole 60 is disposed, the diameter of the opening of the through hole 60 is larger than the diameter of the through conductor 16k1, and the through conductor 16k1 is located inside the opening of the through hole 60. With this configuration, the heat dissipation of the through conductor 16k1 is improved, and even if a large current such as a power supply current (about several μA to several 10 μA) flows through the through conductor 16k1, the insulation of the through conductor 16k1 overlaps the through conductor 16k1. It is possible to effectively suppress the occurrence of a crack in the portion of the layer 31 and the occurrence of disconnection at the connection portion between the through conductor 16k1 and the positive voltage input line 16 connected thereto.
本発明の半導体装置において、絶縁基板１は、ガラス基板、プラスチック基板、セラミック基板等の電気的に絶縁性の基板であるが、絶縁性の基板に金属基板等の放熱性が高い基板が付加されていてもよい。また、絶縁基板１は透明なガラス基板であってもよいが、不透明なものであってもよい。絶縁基板１が不透明なものである場合、絶縁基板１は着色されたガラス基板、摺りガラスから成るガラス基板、プラスチック基板、セラミック基板、あるいはそれらの基板を積層した複合基板であってもよい。 In the semiconductor device of the present invention, the insulating substrate 1 is an electrically insulating substrate such as a glass substrate, a plastic substrate, or a ceramic substrate, but a substrate having high heat dissipation such as a metal substrate is added to the insulating substrate. It may be The insulating substrate 1 may be a transparent glass substrate, but may be opaque. When the insulating substrate 1 is opaque, the insulating substrate 1 may be a colored glass substrate, a glass substrate made of ground glass, a plastic substrate, a ceramic substrate, or a composite substrate obtained by laminating those substrates.
貫通導体１６ｋ１の径、貫通孔６０の径は、円柱状の貫通導体１６ｋ１、円筒状の貫通孔６０である場合、横断面における直径を意味する。貫通導体１６ｋ１が楕円柱状、貫通孔６０が楕円筒状である場合、横断面における長径（最大径）または平均径である。貫通導体１６ｋ１がその他の四角柱状等の柱状、貫通孔６０がその他の四角筒状等の筒状である場合、横断面における最大幅または平均幅である。いすれにしても、平面視において、貫通孔６０の開口の内側に貫通導体１６ｋ１が位置している構成である。 The diameter of the through conductor 16k1 and the diameter of the through hole 60 mean the diameter in the cross section in the case of the cylindrical through conductor 16k1 and the cylindrical through hole 60. In the case where the through conductor 16k1 has an elliptic cylindrical shape and the through hole 60 has an elliptic cylindrical shape, it is the major axis (maximum diameter) or the average diameter in the cross section. In the case where the through conductor 16k1 has a columnar shape such as another square column, and the through hole 60 has a cylindrical shape such as another square cylindrical shape, the width is the maximum width or the average width in the cross section. In any case, the through conductor 16k1 is located inside the opening of the through hole 60 in plan view.
貫通孔６０の径は貫通導体１６ｋ１の径よりも１０μｍ〜５０μｍ程度外側に位置し、例えば、貫通導体１６ｋ１の径は、円柱状の貫通導体１６ｋ１であれば１０μｍ〜５００μｍ程度の長さの直径である。貫通孔６０の径は、円筒状の貫通孔６０であれば３０μｍ〜６００μｍ程度の長さの直径である。 The diameter of the through hole 60 is located about 10 μm to 50 μm outside of the diameter of the through conductor 16k1, and for example, the diameter of the through conductor 16k1 is a diameter of about 10 μm to 500 μm for a cylindrical through conductor 16k1. is there. The diameter of the through hole 60 is a diameter of about 30 μm to 600 μm in the case of the cylindrical through hole 60.
貫通孔６０は、貫通導体１６ｋ１の側の径（図１では下端側の径）よりも反対側の径（図１では上端側の径）が大きいことが好ましい。この場合、貫通孔６０が上側に向かって大きく開いた構成となるために、貫通導体１６ｋ１で発生した熱が空間に放散されやすくなり、貫通導体１６ｋ１の放熱性が向上する。その結果、貫通導体１６ｋ１の発熱による上述の諸問題点の発生をより抑えることができる。図２（ａ）は、貫通導体１６ｋ１の側の径よりも反対側の径を大きくする場合に、段階的に大きくした構成を示すものである。この場合、貫通導体１６ｋ１で発生した熱が空間により放散されやすくなり、貫通導体１６ｋ１の放熱性がより向上する。貫通孔６０の上端側の径と下端側の径の比は、例えば１．１倍〜２倍程度であればよい。また、貫通導体１６ｋ１上方の空間を構成する窪みには黒色絶縁膜などの透明絶縁膜よりも熱伝導性、放熱性に優れた保護膜や加飾膜を設けてもよい。 The diameter of the through hole 60 on the opposite side (the diameter on the upper end in FIG. 1) is preferably larger than the diameter on the side of the through conductor 16k1 (the diameter on the lower end in FIG. 1). In this case, since the through holes 60 are widely opened upward, the heat generated in the through conductors 16k1 is easily dissipated into space, and the heat dissipation of the through conductors 16k1 is improved. As a result, the occurrence of the above-mentioned problems due to the heat generation of the through conductor 16k1 can be further suppressed. FIG. 2A shows a configuration in which the diameter on the opposite side is made larger than the diameter on the side of the through conductor 16k1 in a stepwise manner. In this case, the heat generated in the through conductor 16k1 is easily dissipated by the space, and the heat dissipation of the through conductor 16k1 is further improved. The ratio of the diameter on the upper end side to the diameter on the lower end side of the through hole 60 may be, for example, about 1.1 times to 2 times. In addition, a protective film or a decorative film that is more excellent in thermal conductivity and heat dissipation than a transparent insulating film such as a black insulating film may be provided in a recess that constitutes a space above the through conductor 16k1.
図２（ｂ）は、貫通導体１６ｋ１について、絶縁基板１の第１主面（発光素子搭載主面）側の径が、絶縁基板１の第２主面（発光素子搭載主面と反対側の主面）側の径よりも小さい、好適な構成を示すものである。即ち、貫通導体１６ｋ１の第２主面側（下端側）の径が第１主面側（上端側）の径より大きい構成である。この場合、貫通導体１６ｋ１で発生した熱が絶縁基板１の第２主面の側に放散されやすくなり、絶縁層３１への熱の影響を小さくすることができる。従って、貫通導体１６ｋ１の発熱による上述の諸問題点の発生をより抑えることができる。 In FIG. 2B, the diameter of the through conductor 16k1 on the first main surface (light emitting element mounting main surface) side of the insulating substrate 1 is opposite to the second main surface (light emitting element mounting main surface) of the insulating substrate 1 A preferred configuration smaller than the diameter on the main surface side) is shown. That is, the diameter of the second main surface side (lower end side) of the through conductor 16k1 is larger than the diameter of the first main surface side (upper end side). In this case, the heat generated in the through conductor 16k1 is easily dissipated to the side of the second main surface of the insulating substrate 1, and the influence of the heat on the insulating layer 31 can be reduced. Therefore, the generation of the above-mentioned problems due to the heat generation of the through conductor 16k1 can be further suppressed.
図３（ａ）は、複数の貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎが表示部１１に配置されている構成を示すものである。この場合、複数の貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎのそれぞれが、それが接続される配線である、正電圧入力線１６、負電圧入力線１７の中央部に接続されていることが良い。この構成の場合、正電圧入力線１６、負電圧入力線１７における電圧降下がより小さくなる。正電圧入力線１６、負電圧入力線１７の中央部は、例えば、それらの線の中心から−１５％〜＋１５％の長さの範囲、即ち線の中心を含む３０％程度の長さの範囲である。 FIG. 3A shows a configuration in which the plurality of through conductors 16k1 to 16kn and 17k1 to 17kn are disposed in the display unit 11. FIG. In this case, it is preferable that each of the plurality of through conductors 16k1 to 16kn and 17k1 to 17kn be connected to central portions of the positive voltage input line 16 and the negative voltage input line 17, which are the wirings to which they are connected. In this configuration, the voltage drop on the positive voltage input line 16 and the negative voltage input line 17 is smaller. The central portions of the positive voltage input line 16 and the negative voltage input line 17 are, for example, in the range of -15% to + 15% in length from the centers of the lines, ie, about 30% in length including the centers of the lines. It is.
図３（ｂ）は、複数の貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎが表示部１１に配置されており、それらの隣接間の間隔がほぼ同じである、好適な構成を示すものである。この場合、絶縁基板１において、複数の貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎで発生した熱が局所的に集中することを抑えることができる。複数の貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎの隣接間の間隔は、全く同じである必要はなく、間隔の比を１倍〜１．５倍程度の範囲内として調整し得る。その範囲を外れると、絶縁基板１に局所的な熱集中が発生しやすくなる傾向がある。 FIG. 3B shows a preferable configuration in which a plurality of through conductors 16k1 to 16kn and 17k1 to 17kn are disposed in the display unit 11 and the intervals between adjacent ones are substantially the same. In this case, in the insulating substrate 1, local concentration of heat generated by the plurality of through conductors 16 k 1 to 16 kn and 17 k 1 to 17 kn can be suppressed. The intervals between adjacent ones of the plurality of through conductors 16k1 to 16kn and 17k1 to 17kn do not have to be exactly the same, and the ratio of the intervals can be adjusted within the range of approximately 1 to 1.5 times. Outside the range, local heat concentration tends to easily occur in the insulating substrate 1.
本発明の半導体装置は、貫通導体は、複数個が絶縁基板１に均等に配置されていることが好ましい。この場合、絶縁基板１内での抵抗分布や電圧降下が均一となり、また絶縁基板１において複数個の貫通導体の発熱による熱集中を抑えることができる。その結果、絶縁層３１の部位にクラックが発生したり、貫通導体とそれに接続される配線との接続部に断線が発生することをより効果的に抑えることができる。複数個の貫通導体が絶縁基板１に均等に配置されている構成は、複数個の貫通導体が発熱したときに絶縁基板１の熱分布が均等になるような構成である。例えば、矩形状の絶縁基板１の主面を行列状に均等の面積でもって区分するに際して、貫通導体の数と区分された部位の数が同じになるようにする。そして、それぞれの区分された部位の中心部に貫通導体を配置する構成である。図３においては、各入力線毎に貫通導体を設けているが、複数本毎に束ね、束ねた毎に貫通導体を設けても良い。それらの貫通導体間は上下千鳥配置なども含め均等に配置されている構成であることが良い。 In the semiconductor device of the present invention, it is preferable that a plurality of through conductors be evenly arranged on the insulating substrate 1. In this case, the resistance distribution and the voltage drop in the insulating substrate 1 become uniform, and heat concentration due to the heat generation of the plurality of through conductors in the insulating substrate 1 can be suppressed. As a result, it is possible to more effectively suppress the occurrence of a crack in the portion of the insulating layer 31 and the occurrence of a break in the connection portion between the through conductor and the wiring connected thereto. The configuration in which the plurality of through conductors are evenly arranged on the insulating substrate 1 is such that the heat distribution of the insulating substrate 1 becomes uniform when the plurality of through conductors generate heat. For example, when dividing the main surface of the rectangular insulating substrate 1 with a uniform area in a matrix, the number of through conductors and the number of divided portions are made to be the same. And a penetration conductor is arranged at the central part of each divided part. Although in FIG. 3 the through conductor is provided for each input line, it may be bundled for every plural wires, and may be provided for every bundle. It is preferable that the through conductors be evenly arranged including the upper and lower staggered arrangement.
図４（ａ）は、貫通導体は絶縁基板１に複数配置されているとともに、それらの貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎは、絶縁基板１の端１ｔとの距離が互いに異なるものを含んでおり、絶縁基板１の端１ｔに最も近い貫通導体１６ｋ１〜１６ｋｎの平面視での各面積が、他の貫通導体１７ｋ１〜１７ｋｎの平面視での各面積よりも大きい、好適な構成を示すものである。この場合、絶縁基板１の端１ｔに最も近い貫通導体１６ｋ１〜１６ｋｎの抵抗を、他の貫通導体１７ｋ１〜１７ｋｎの抵抗よりも小さくすることができる。従って、それらの貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎに電源電流等の大きな電流を流したとしても、貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎに接続される正電圧入力線１６、負電圧入力線１７における電圧降下のばらつきを小さくすることができる。即ち、貫通導体１６ｋ１〜１６ｋｎは正電圧入力線１６の端部において接続されているが、貫通導体１６ｋ１〜１６ｋｎの抵抗が小さいために、正電圧入力線１６における信号の電圧降下を小さくすることができる。従って、負電圧入力線１７における信号の電圧降下と、正電圧入力線１６における信号の電圧降下と、を同程度とすることができる。また、それらの貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎの放熱性のばらつきも小さくすることができる。従って、貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎの発熱による上記諸問題点の発生をより効果的に抑えることができる。 In FIG. 4A, a plurality of through conductors are arranged on the insulating substrate 1, and those through conductors 16k1 to 16kn and 17k1 to 17kn have different distances from the end 1t of the insulating substrate 1 from each other. In a preferred configuration, the area of the through conductor 16k1 to 16kn closest to the end 1t of the insulating substrate 1 in plan view is larger than the area of the other through conductors 17k1 to 17kn in plan view. is there. In this case, the resistance of the through conductors 16k1 to 16kn closest to the end 1t of the insulating substrate 1 can be smaller than the resistances of the other through conductors 17k1 to 17kn. Therefore, even if a large current such as a power supply current flows in the through conductors 16k1 to 16kn and 17k1 to 17kn, the positive voltage input line 16 and the negative voltage input line 17 connected to the through conductors 16k1 to 16kn and 17k1 to 17kn Variation of the voltage drop in the That is, although the through conductors 16k1 to 16kn are connected at the end of the positive voltage input line 16, the resistance of the through conductors 16k1 to 16kn is small, so that the voltage drop of the signal on the positive voltage input line 16 can be reduced. it can. Therefore, the voltage drop of the signal on the negative voltage input line 17 and the voltage drop of the signal on the positive voltage input line 16 can be made approximately the same. Further, the variation of the heat dissipation of the through conductors 16k1 to 16kn and 17k1 to 17kn can also be reduced. Therefore, the generation of the above-mentioned problems due to the heat generation of the through conductors 16k1 to 16kn and 17k1 to 17kn can be suppressed more effectively.
貫通導体１６ｋ１〜１６ｋｎの平面視での各面積と、他の貫通導体１７ｋ１〜１７ｋｎの平面視での各面積と、の比は、１．１倍〜５倍程度の範囲内で調整することができる。１．１倍未満では、上記の電圧降下のばらつきを小さくする効果、放熱性のばらつきも小さくする効果が得られにくい傾向がある。５倍を超えると、貫通導体１６ｋ１〜１６ｋｎを配置するスペースが得られにくい傾向がある。好ましくは、１．５倍〜３倍程度の範囲内で調整することができる。 The ratio of each area of the through conductors 16k1 to 16kn in a plan view and each area of the other through conductors 17k1 to 17kn in a plan view may be adjusted within a range of about 1.1 times to 5 times. it can. If it is less than 1.1 times, the effect of reducing the variation of the voltage drop and the effect of reducing the variation of the heat dissipation tend to be hardly obtained. If it exceeds 5 times, the space for arranging the through conductors 16k1 to 16kn tends to be difficult to obtain. Preferably, it can be adjusted within the range of about 1.5 times to 3 times.
図４（ａ）の構成において、絶縁基板１の端１ｔに最も近い貫通導体１６ｋ１〜１６ｋｎを流れる電流が、他の貫通導体１７ｋ１〜１７ｋｎを流れる電流よりも大きいことが好ましい。この場合、絶縁基板１の端１ｔに最も近い貫通導体１６ｋ１〜１６ｋｎの抵抗を、他の貫通導体１７ｋ１〜１７ｋｎの抵抗よりも小さくしているので、絶縁基板１の端１ｔに最も近い貫通導体１６ｋ１〜１６ｋｎに電源電流等の大きな電流を流すことができる。 In the configuration of FIG. 4A, the current flowing through the through conductors 16k1 to 16kn closest to the end 1t of the insulating substrate 1 is preferably larger than the current flowing through the other through conductors 17k1 to 17kn. In this case, since the resistance of the through conductor 16k1 to 16kn closest to the end 1t of the insulating substrate 1 is smaller than the resistance of the other through conductors 17k1 to 17kn, the through conductor 16k1 closest to the end 1t of the insulating substrate 1 A large current such as a power supply current can be supplied to ~ 16 kn.
図４（ｂ）は、絶縁基板１が、側面に配置された側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎを有しており、貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎのそれぞれは、側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎのそれぞれに電気的に接続されている、好適な構成を示すものである。この場合、貫通導体１６ｋ１と側面導体１６ｓ１についてみたとき、貫通導体１６ｋ１と側面導体１６ｓ１のそれぞれに電流が分配されるので、貫通導体１６ｋ１を流れる電流が小さくなる。その結果、貫通導体１６ｋ１の発熱による上記諸問題点の発生をより効果的に抑えることができる。また、複数の貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎがある場合、貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎに接続された、正電圧入力線１６及び負電圧入力線１７のそれぞれにおける信号の電圧降下のばらつきを小さくすることができる。また、それらの貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎの放熱性のばらつきも小さくすることができる。 In FIG. 4B, the insulating substrate 1 has side conductors 16s1 to 16sn and 17s1 to 17sn arranged on the side surface, and the through conductors 16k1 to 16kn and 17k1 to 17kn respectively have side conductors 16s1 to 16sn , 17s1 to 17sn are shown to be electrically connected to each other. In this case, when the through conductor 16k1 and the side surface conductor 16s1 are viewed, the current is distributed to the through conductor 16k1 and the side surface conductor 16s1, respectively, so the current flowing through the through conductor 16k1 decreases. As a result, the occurrence of the above-mentioned problems due to the heat generation of the through conductor 16k1 can be suppressed more effectively. When there are a plurality of through conductors 16k1-16kn and 17k1-17kn, the voltage drop of the signal on each of positive voltage input line 16 and negative voltage input line 17 connected to through conductors 16k1-16kn and 17k1-17kn Variation can be reduced. Further, the variation of the heat dissipation of the through conductors 16k1 to 16kn and 17k1 to 17kn can also be reduced.
側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎは、それぞれ絶縁基板１の側面の所定部位に、メッキ法、蒸着法、ＣＶＤ法等の薄膜形成法等によって導体層を成膜する方法で形成される。あるいは、側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎは、それぞれ絶縁基板１の側面の所定部位にエッチング法等によって溝を形成し、次にその溝に、メッキ法、蒸着法、ＣＶＤ法等の薄膜形成法等によって導体層を成膜する方法で形成される。あるいは、側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎは、それぞれ絶縁基板１の側面の所定部位に、銀（Ａｇ）等の導電性粒子，樹脂成分，アルコール等を含む導体ペーストを塗布し焼成して導体層を作製する厚膜形成法等によって形成される。あるいは、側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎは、それぞれ絶縁基板１の側面の所定部位にエッチング法等によって溝を形成し、次にその溝に導体ペーストを塗布し焼成して導体層を作製する厚膜形成法等によって形成される。 The side conductors 16s1 to 16sn and 17s1 to 17sn are formed on predetermined portions of the side surface of the insulating substrate 1 by a method of forming a conductor layer by a thin film forming method such as a plating method, a vapor deposition method or a CVD method. Alternatively, the side conductors 16s1 to 16sn and 17s1 to 17sn respectively form grooves in predetermined portions of the side surface of the insulating substrate 1 by etching or the like, and then form thin films such as plating, evaporation or CVD in the grooves The conductive layer is formed by a method such as a method. Alternatively, the side conductors 16s1 to 16sn and 17s1 to 17sn are formed by applying and baking a conductor paste containing silver (Ag) or other conductive particles, a resin component, alcohol or the like on predetermined portions of the side surface of the insulating substrate 1 respectively. It is formed by the thick film formation method etc. which produce a layer. Alternatively, the side conductors 16s1 to 16sn and 17s1 to 17sn respectively form a groove on a predetermined portion of the side surface of the insulating substrate 1 by an etching method or the like, and then apply a conductive paste to the groove and bake to form a conductive layer. It is formed by a thick film formation method or the like.
また側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎは、銀（Ａｇ），銅（Ｃｕ），アルミニウム（Ａｌ），モリブデン（Ｍｏ）等の導体材料から成る。さらに側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎは、それぞれの幅が１０μｍ〜１０００μｍ程度である。 The side conductors 16s1 to 16sn and 17s1 to 17sn are made of a conductor material such as silver (Ag), copper (Cu), aluminum (Al), molybdenum (Mo) or the like. Furthermore, the width of each of the side conductors 16s1 to 16sn and 17s1 to 17sn is about 10 μm to 1000 μm.
また本発明の半導体装置は、絶縁基板１は、側面に側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎと電気的に独立している側面配線１ｓが配置されていることが好ましい。この場合、ＴＦＴ１３のゲート電極に入力する走査信号等を側面配線１ｓを介して供給することができるので、貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎの数が増加することを抑えることができる。その結果、貫通導体１６ｋ１〜１６ｋｎ，１７ｋ１〜１７ｋｎの発熱による上記諸問題点の発生をより効果的に抑えることができる。勿論、ＴＦＴ１３のドレイン電極に入力する発光制御信号を側面配線１ｓを介して供給することもできる。側面配線１ｓは、上記の側面導体１６ｓ１〜１６ｓｎ，１７ｓ１〜１７ｓｎと同様の形成方法によって形成し得る。 In the semiconductor device of the present invention, preferably, the insulating substrate 1 is provided with the side wiring 1s electrically independent of the side conductors 16s1 to 16sn and 17s1 to 17sn on the side surface. In this case, since a scanning signal or the like input to the gate electrode of the TFT 13 can be supplied via the side wiring 1s, an increase in the number of through conductors 16k1 to 16kn and 17k1 to 17kn can be suppressed. As a result, it is possible to more effectively suppress the occurrence of the above-mentioned problems due to the heat generation of the through conductors 16k1 to 16kn and 17k1 to 17kn. Of course, a light emission control signal input to the drain electrode of the TFT 13 can also be supplied through the side wiring 1s. The side wiring 1s can be formed by the same formation method as the side conductors 16s1 to 16sn and 17s1 to 17sn described above.
本発明の発光装置は、図１、図２に示すように、上記本発明の構成の半導体装置を有する発光装置であって、複数の絶縁層３１の上にＴＦＴ１３と電気的に接続される、正電極４４ａ及び負電極４４ｂが配置されており、正電極４４ａ及び負電極４４ｂにアノード電極及びカソード電極が接続された発光素子１４を有している構成である。この構成により、貫通導体１６ｋ１の発熱による上記諸問題点の発生を効果的に抑えることができる結果、信頼性が高く長寿命の発光装置となる。 The light emitting device of the present invention, as shown in FIGS. 1 and 2, is a light emitting device having the semiconductor device having the above-described structure of the present invention, and is electrically connected to the TFT 13 on a plurality of insulating layers 31. The positive electrode 44 a and the negative electrode 44 b are disposed, and the light emitting element 14 in which the anode electrode and the cathode electrode are connected to the positive electrode 44 a and the negative electrode 44 b is provided. With this configuration, the occurrence of the above-mentioned problems due to the heat generation of the through conductor 16k1 can be effectively suppressed. As a result, a light emitting device with high reliability and a long life can be obtained.
本発明の発光装置において、発光素子１４としては、マイクロチップ型の発光ダイオード（ＬＥＤ）、モノリシック型の発光ダイオード、有機ＥＬ、無機ＥＬ、半導体レーザ素子等の自発光型のものであれば採用し得る。 In the light emitting device of the present invention, any light emitting element such as a microchip light emitting diode (LED), a monolithic light emitting diode, an organic EL, an inorganic EL, a semiconductor laser element or the like may be used as the light emitting element 14. obtain.
本発明の発光装置は表示装置等に適用できる。本発明の発光装置が適用された表示装置は、一つの画素部１５に、異なる発光波長（発光色）の発光素子１４が複数配置されており、それぞれに接続される発光制御部がある構成であってもよい。例えば、一つの画素部１５に、赤色ＬＥＤ（ＲＬＥＤ）等から成る赤色発光素子と緑色ＬＥＤ（ＧＬＥＤ）等から成る緑色発光素子と青色ＬＥＤ（ＢＬＥＤ）等から成る青色発光素子と、が配置されており、それぞれに接続される発光制御部（Ｒドライバ、Ｇドライバ、Ｂドライバ）がある構成であってもよい。この場合、例えば、画素部１５の中心部にＲＬＥＤ、ＧＬＥＤ、ＢＬＥＤが集約的に正三角形の各頂点に位置するように配置されており、ＲドライバとＧドライバとＢドライバが、ＲＬＥＤとＧＬＥＤとＢＬＥＤよりも絶縁基板１の内側に配置される構成とし得る。また、画素部１５の中心部にＲＬＥＤ、ＧＬＥＤ、ＢＬＥＤが、走査信号線２または発光制御信号線３に平行な一直線上、すなわち行方向または列方向に平行な一直線上、に配列された構成とすることもできる。 The light emitting device of the present invention can be applied to a display device and the like. In the display device to which the light emitting device of the present invention is applied, a plurality of light emitting elements 14 of different emission wavelengths (emission colors) are disposed in one pixel section 15, and there is an emission control unit connected to each of them. It may be. For example, in one pixel portion 15, a red light emitting element composed of a red LED (RLED) or the like, a green light emitting element composed of a green LED (GLED) or the like, and a blue light emitting element composed of blue LED (BLED) or the like are arranged The light emission control unit (R driver, G driver, B driver) connected to each may be included. In this case, for example, RLED, GLED, and BLED are collectively arranged at the center of the pixel unit 15 so as to be collectively located at each vertex of an equilateral triangle, and the R driver, the G driver, and the B driver include the RLED and the GLED. It can be set as the structure arrange | positioned inside the insulated substrate 1 rather than BLED. Further, RLED, GLED, and BLED are arranged at a central portion of the pixel portion 15 on a straight line parallel to the scanning signal line 2 or the light emission control signal line 3, that is, on a straight line parallel to the row direction or the column direction. You can also
また、隣接する３つの画素部１５のそれぞれに、互いに異なる発光波長（発光色）の発光素子１４が配置されており、それぞれに接続される発光制御部がある構成であってもよい。例えば、第１の画素部１５に赤色ＬＥＤ（ＲＬＥＤ）等から成る赤色発光素子が配置され、第２の画素部１５に緑色ＬＥＤ（ＧＬＥＤ）等から成る緑色発光素子が配置され、第３の画素部１５に青色ＬＥＤ（ＢＬＥＤ）等から成る青色発光素子が配置されており、それぞれに接続される発光制御部（Ｒドライバ、Ｇドライバ、Ｂドライバ）が各画素部１５にある構成であってもよい。第１の画素部１５と第２の画素部１５と第３の画素部１５は、行方向に並んでいてもよく、列方向に並んでいてもよい。 In addition, light emitting elements 14 of different emission wavelengths (emission colors) may be disposed in each of the three adjacent pixel units 15, and a light emission control unit connected to each other may be provided. For example, a red light emitting element including a red LED (RLED) or the like is disposed in the first pixel unit 15, a green light emitting element including a green LED (GLED) or the like is disposed in the second pixel unit 15, and a third pixel A blue light emitting element formed of a blue LED (BLED) or the like is disposed in the portion 15, and each pixel portion 15 has a light emission control portion (R driver, G driver, B driver) connected thereto. Good. The first pixel portion 15, the second pixel portion 15, and the third pixel portion 15 may be arranged in the row direction or in the column direction.
本発明の半導体装置の製造方法は、絶縁基板１上に複数の絶縁層３１を積層するとともにそれらの層間にＴＦＴ１３を形成し、次に、複数の絶縁層３１を貫通する貫通孔６０を形成し、次に、貫通孔６０の開口の内側に露出した絶縁基板１の部位に、絶縁基板１を貫通する孔を形成し、その孔に導体柱を配置することによって貫通導体１６ｋ１を形成する構成である。この構成により以下の効果を奏する。ＴＦＴ１３を形成した後に、貫通導体１６ｋ１を形成することができるので、貫通導体１６ｋ１を構成する導体がＴＦＴ１３の半導体層１３ａを汚染することを抑えることができる。また、貫通導体１６ｋ１の発熱による上記諸問題点の発生を抑えることができる結果、信頼性が高く長寿命の半導体装置を製造できる。従来、貫通導体１６ｋ１を形成した後にＴＦＴ１３を形成した場合、ＴＦＴ１３を形成するための加熱工程等において、貫通導体１６ｋ１を構成する銅（Ｃｕ）等の導体がＴＦＴ１３の半導体層１３ａに拡散し汚染するという問題点があったが、本発明においてはこの問題点は解消される。なお、半導体層１３ａは、低温焼成ポリシリコン（Low-Temperature Poly Silicon：ＬＴＰＳ），アモルファスシリコン等から成る。 In the method of manufacturing a semiconductor device according to the present invention, a plurality of insulating layers 31 are stacked on the insulating substrate 1 and the TFTs 13 are formed between them, and then the through holes 60 penetrating the plurality of insulating layers 31 are formed. Next, a hole penetrating through the insulating substrate 1 is formed in the portion of the insulating substrate 1 exposed to the inside of the opening of the through hole 60, and the conductor post is disposed in the hole to form the through conductor 16k1. is there. This configuration produces the following effects. Since the through conductor 16k1 can be formed after the TFT 13 is formed, it is possible to suppress that the conductor constituting the through conductor 16k1 contaminate the semiconductor layer 13a of the TFT 13. Moreover, as a result of being able to suppress the occurrence of the various problems due to the heat generation of the through conductor 16k1, it is possible to manufacture a semiconductor device with high reliability and a long life. Conventionally, when the TFT 13 is formed after forming the through conductor 16k1, a conductor such as copper (Cu) constituting the through conductor 16k1 diffuses and contaminates the semiconductor layer 13a of the TFT 13 in a heating step or the like for forming the TFT 13. Although there was a problem of this, this problem is solved in the present invention. The semiconductor layer 13a is made of low-temperature polysilicon (LTPS), amorphous silicon or the like.
貫通導体１６ｋ１は、レーザ加工法、エッチング法等によって絶縁基板１を貫通する孔を形成し、次に孔に導体柱を配置することによって形成される。導体柱は、孔に導体ペーストを充填し焼成して導体柱を作製する厚膜形成法等によって形成される。あるいは、別途作製した導体柱を孔に挿入し、導電性接着材等によって孔に導体柱を接着することによって形成される。貫通導体１６ｋ１は、銅（Ｃｕ），アルミニウム（Ａｌ），銀（Ａｇ），モリブデン（Ｍｏ），ニッケル（Ｎｉ），クロム（Ｃｒ）等の金属またはそれらの１種以上を含む合金から成る。 The through conductor 16k1 is formed by forming a hole penetrating the insulating substrate 1 by a laser processing method, an etching method or the like, and then arranging a conductor post in the hole. The conductor posts are formed by a thick film forming method or the like in which holes are filled with a conductor paste and fired to produce the conductor posts. Alternatively, it is formed by inserting a separately prepared conductor post into the hole and bonding the conductor post to the hole with a conductive adhesive or the like. The through conductor 16k1 is made of a metal such as copper (Cu), aluminum (Al), silver (Ag), molybdenum (Mo), nickel (Ni), chromium (Cr) or an alloy containing one or more of them.
複数の絶縁層３１は、無機材料又は有機材料から構成される。無機材料としては、酸化珪素（ＳｉＯ2），窒化珪素（ＳｉＮx）等を用いることができる。有機材料としては、アクリル樹脂，ポリイミド，ポリアミド，ポリイミドアミド，ベンゾシクロブテン，ポリシロキサン，ポリシラザン等を用いることができる。複数の絶縁層３１は、ＣＶＤ（Chemical Vapor Deposition）法等によって形成される。 The plurality of insulating layers 31 are made of an inorganic material or an organic material. As the inorganic material, silicon oxide (SiO 2 ), silicon nitride (SiN x ) or the like can be used. As the organic material, acrylic resin, polyimide, polyamide, polyimideamide, benzocyclobutene, polysiloxane, polysilazane or the like can be used. The plurality of insulating layers 31 are formed by a CVD (Chemical Vapor Deposition) method or the like.
貫通導体１６ｋ１とＴＦＴ１３を電気的に接続する正電圧入力線１６、負電圧入力線１７等の配線は、アルミニウム（Ａｌ），チタン（Ｔｉ），モリブデン（Ｍｏ），タンタル（Ｔａ），タングステン（Ｗ），クロム（Ｃｒ），銀（Ａｇ），銅（Ｃｕ），ネオジウム（Ｎｄ），金（Ａｕ）等から選ばれた元素から成る金属材料、これらの元素を主成分とする合金材料を用いて形成される。また配線は、透光性が必要な場合、インジウム錫酸化物（ＩＴＯ），インジウム亜鉛酸化物（ＩＺＯ），酸化珪素を添加したインジウム錫酸化物（ＩＴＳＯ），酸化亜鉛（ＺｎＯ）等の酸化物から成る透明導電性材料、またはリン，ボロンを含むシリコン（Ｓｉ）等の導電性材料であって透光性を有する材料を用いて形成される。また配線は、メッキ法、蒸着法、スパッタリング法、ＣＶＤ法等によって形成される。 Wirings such as the positive voltage input line 16 and the negative voltage input line 17 electrically connecting the through conductor 16k1 and the TFT 13 are aluminum (Al), titanium (Ti), molybdenum (Mo), tantalum (Ta), tungsten (W) Metal materials consisting of elements selected from: chromium (Cr), silver (Ag), copper (Cu), neodymium (Nd), gold (Au), etc., using alloy materials containing these elements as main components It is formed. In addition, when light transmission is required, the wiring is an oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), indium tin oxide added with silicon oxide (ITSO), zinc oxide (ZnO), etc. And a conductive material such as silicon (Si) containing phosphorus or boron and having a light transmitting property. The wiring is formed by a plating method, an evaporation method, a sputtering method, a CVD method, or the like.
本発明の半導体装置の製造方法は、貫通孔１６ｋ１をエッチング法によって形成し、絶縁基板１を貫通する孔をレーザ光照射法によって形成することが好ましい。この場合、絶縁基板１を貫通する孔の位置及び大きさを正確なものとして形成できる。その結果、放熱性に優れた貫通導体１６ｋ１を形成することが容易になる。 In the method of manufacturing a semiconductor device according to the present invention, it is preferable that the through holes 16k1 be formed by an etching method, and the holes penetrating the insulating substrate 1 be formed by a laser beam irradiation method. In this case, the position and size of the hole penetrating the insulating substrate 1 can be formed accurately. As a result, it becomes easy to form the through conductor 16k1 excellent in heat dissipation.
貫通孔１６ｋ１をエッチング法によって形成するには、絶縁層３１上にフォトレジストを塗布して貫通孔１６ｋ１を形成するためのパターンを露光した後に、エッチング法により不要な絶縁層３１の部位を除去することによって、形成し得る。エッチング法としては、弗酸等のエッチング液を用いるウェットエッチング法、四フッ化炭素ガス等のエッチングガスを用いるドライエッチング法等の公知のエッチング法を採用し得る。 In order to form the through holes 16k1 by etching, after applying a photoresist on the insulating layer 31 and exposing a pattern for forming the through holes 16k1, unnecessary portions of the insulating layer 31 are removed by etching. It can be formed by As an etching method, a known etching method such as a wet etching method using an etching solution such as hydrofluoric acid or a dry etching method using an etching gas such as carbon tetrafluoride gas can be employed.
絶縁基板１を貫通する孔をレーザ光照射法によって形成するには、光波長７８０ｎｍ〜１４００ｎｍ程度の赤外線を発振する赤外線レーザ（Infrared Laser：ＩＲ）装置等を用いて形成し得る。赤外線は熱作用が大きく、ＩＲレーザ光を用いると、鋼板、ガラス基板等の被照射部材の溶断、穴あけ等の加工が容易である。ＩＲレーザ装置としては、炭酸ガス（ＣＯ2）レーザ装置、Ｎｄ：ＹＡＧ（ＮｄドープＹＡＧ）レーザ装置等のＹＡＧ（イットリウム・アルミニウム・ガーネット）レーザ装置等がある。ＹＡＧレーザ装置のレーザ光は、炭酸ガス（ＣＯ2）レーザ装置のレーザ光よりも短波長であり、加熱効率が高いために好適である。ＹＡＧレーザ装置のメリットとしては、熱が集中し、被照射部材への入熱が少ないために被照射部材の歪が少なくなること、パルス制御によって仕上がりが良好な孔の形状が得られること、光の焦点の大きさを変えることによって孔の大きさを制御できること、被照射部材の材料に対する依存性が小さく種々の材料の被照射部材を選択できること、がある。 In order to form the hole penetrating the insulating substrate 1 by a laser beam irradiation method, the hole may be formed using an infrared laser (IR) device or the like that oscillates an infrared ray with a light wavelength of about 780 nm to 1400 nm. Infrared rays have a large heat action, and when IR laser light is used, it is easy to process the members to be irradiated such as steel plates and glass substrates by melting, drilling and the like. Examples of the IR laser device include a carbon dioxide gas (CO 2 ) laser device, a YAG (yttrium aluminum garnet) laser device such as a Nd: YAG (Nd-doped YAG) laser device, and the like. The laser beam of the YAG laser device has a shorter wavelength than the laser beam of the carbon dioxide gas (CO 2 ) laser device, and is preferable because the heating efficiency is high. The merits of the YAG laser device are that heat is concentrated and the distortion of the irradiated member is reduced because the heat input to the irradiated member is small, and the shape of the hole with a good finish is obtained by pulse control, light The size of the hole can be controlled by changing the size of the focal point, and the dependence on the material of the irradiated member is small and the irradiated member of various materials can be selected.
また本発明の半導体装置の製造方法は、導体柱は銅柱であることが好ましい。この場合、高い導電性を有する貫通導体１６ｋ１を形成できる。従って、貫通導体１６ｋ１の発熱による上記諸問題点の発生をより抑えることができるとともに、貫通導体１６ｋ１を構成する銅（Ｃｕ）がＴＦＴの半導体層を汚染することを抑えることができ、長寿命の半導体装置を製造できる。 Further, in the method of manufacturing a semiconductor device according to the present invention, the conductor posts are preferably copper posts. In this case, it is possible to form the through conductor 16k1 having high conductivity. Therefore, while being able to suppress generation | occurrence | production of the said problems by heat generation of penetration conductor 16k1 more, it can suppress that copper (Cu) which comprises penetration conductor 16k1 contaminates the semiconductor layer of TFT, and has a long life. Semiconductor devices can be manufactured.
なお、本発明の半導体装置、発光装置、半導体装置の製造方法は、上記実施の形態に限定されるものではなく、適宜の変更、改良を含んでいてもよい。 The semiconductor device, the light emitting device, and the method of manufacturing the semiconductor device according to the present invention are not limited to the above embodiments, and may include appropriate modifications and improvements.
本発明の半導体装置を有する発光装置は、ＬＥＤ表示装置、有機ＥＬ表示装置等の表示装置に適用し得、またその表示装置は、各種の電子機器に適用できる。その電子機器としては、複合型かつ大型の表示装置（マルチディスプレイ）、自動車経路誘導システム（カーナビゲーションシステム）、船舶経路誘導システム、航空機経路誘導システム、スマートフォン端末、携帯電話、タブレット端末、パーソナルデジタルアシスタント（ＰＤＡ）、ビデオカメラ、デジタルスチルカメラ、電子手帳、電子書籍、電子辞書、パーソナルコンピュータ、複写機、ゲーム機器の端末装置、テレビジョン、商品表示タグ、価格表示タグ、産業用のプログラマブル表示装置、カーオーディオ、デジタルオーディオプレイヤー、ファクシミリ、プリンター、現金自動預け入れ払い機（ＡＴＭ）、自動販売機、ヘッドマウントディスプレイ（ＨＭＤ）、デジタル表示式腕時計、スマートウォッチなどがある。 The light emitting device having the semiconductor device of the present invention can be applied to a display device such as an LED display device or an organic EL display device, and the display device can be applied to various electronic devices. The electronic devices include complex and large display devices (multi-display), car route guidance system (car navigation system), ship route guidance system, aircraft route guidance system, smartphone terminal, mobile phone, tablet terminal, personal digital assistant (PDA), video camera, digital still camera, electronic notebook, electronic book, electronic dictionary, personal computer, copier, terminal device of game machine, television, commodity display tag, price display tag, industrial programmable display device, There are car audio, digital audio player, facsimile, printer, automated teller machine (ATM), vending machine, head mounted display (HMD), digital display watch, smart watch and so on.
１ 絶縁基板
２ 走査信号線
３ 発光制御信号線
１３ ＴＦＴ
１４ 発光素子
１６ 正電圧入力線
１６ｋ１ 貫通導体
１７ 負電圧入力線
３１ 絶縁層
６０ 貫通孔
1 insulating substrate 2 scanning signal line 3 light emission control signal line 13 TFT
14 light emitting element 16 positive voltage input line 16k1 through conductor 17 negative voltage input line 31 insulating layer 60 through hole
Claims (11)
前記絶縁基板を貫通する貫通導体と、
前記絶縁基板上に配置された複数の絶縁層と、
前記複数の絶縁層の層間に配置されるとともに前記貫通導体に電気的に接続されている薄膜トランジスタと、を有している半導体装置であって、
前記複数の絶縁層における前記貫通導体と重なる部位に、貫通孔が配置されており、
前記貫通孔の開口の径が前記貫通導体の径よりも大きく、かつ前記貫通孔の開口の内側に前記貫通導体が位置している半導体装置。 An insulating substrate,
A through conductor penetrating the insulating substrate;
A plurality of insulating layers disposed on the insulating substrate;
A semiconductor device comprising: a thin film transistor disposed between layers of the plurality of insulating layers and electrically connected to the through conductor;
Through holes are disposed in portions of the plurality of insulating layers overlapping the through conductors,
The semiconductor device in which the diameter of the opening of the through hole is larger than the diameter of the through conductor, and the through conductor is located inside the opening of the through hole.
前記絶縁基板の端に最も近い前記貫通導体の平面視での面積が他の前記貫通導体の平面視での面積よりも大きい請求項１に記載の半導体装置。 A plurality of the through conductors are arranged on the insulating substrate, and they include those having different distances from the end of the insulating substrate,
The semiconductor device according to claim 1, wherein an area in plan view of the through conductor closest to an end of the insulating substrate is larger than an area in plan view of the other through conductors.
前記貫通導体は、前記側面導体に電気的に接続されている請求項１乃至請求項４のいずれか１項に記載の半導体装置。 The insulating substrate has side conductors arranged on the side,
The semiconductor device according to any one of claims 1 to 4, wherein the through conductor is electrically connected to the side conductor.
前記複数の絶縁層の上に前記薄膜トランジスタと電気的に接続される電極が配置されており、
前記電極に接続された発光素子を有している発光装置。 A light emitting device comprising the semiconductor device according to any one of claims 1 to 6,
An electrode electrically connected to the thin film transistor is disposed on the plurality of insulating layers,
A light emitting device comprising a light emitting element connected to the electrode.
前記絶縁基板上に前記複数の絶縁層を積層するとともにそれらの層間に前記薄膜トランジスタを形成し、
次に、前記複数の絶縁層を貫通する前記貫通孔を形成し、
次に、前記貫通孔の開口の内側に露出した前記絶縁基板の部位に、前記絶縁基板を貫通する孔を形成し、前記孔に導体柱を配置することによって前記貫通導体を形成する半導体装置の製造方法。 A method of manufacturing a semiconductor device according to any one of claims 1 to 6.
Laminating the plurality of insulating layers on the insulating substrate and forming the thin film transistor between the layers;
Next, the through holes penetrating the plurality of insulating layers are formed,
Next, a hole penetrating the insulating substrate is formed in a portion of the insulating substrate exposed inside the opening of the through hole, and a conductor post is disposed in the hole to form the through conductor. Production method.
前記絶縁基板を貫通する孔をレーザ光照射法によって形成する請求項８に記載の半導体装置の製造方法。 Forming the through holes by etching;
The method according to claim 8, wherein the hole penetrating the insulating substrate is formed by a laser beam irradiation method.
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| WO2020217959A1 (en) * | 2019-04-23 | 2020-10-29 | 京セラ株式会社 | Micro led element substrate and display device |
| JPWO2021149565A1 (en) * | 2020-01-24 | 2021-07-29 | ||
| US11476308B2 (en) | 2019-03-22 | 2022-10-18 | Nichia Corporation | Method for manufacturing image display device and image display device |
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