JP2018131350A - Semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a SiC laminated substrate, capable of preparing defect data.SOLUTION: The method for manufacturing a SiC laminated substrate comprises: a surface defect data preparation step of preparing surface defect data specifying defect positions on the surface of a SiC single crystal substrate; a bonding step of bonding the surface of the SiC single crystal substrate to a supporting substrate; a peeling step of forming a SiC single crystal thin film on the surface of the supporting substrate by peeling the SiC single crystal substrate at a prescribed depth from the surface of the SiC single crystal substrate; and a flatting step of flattening the surface of the SiC single crystal substrate after performing the peeling step. After performing the surface defect preparation step, the bonding step, the peeling step and the flatting step are repeated.SELECTED DRAWING: Figure 3A

Description

  In this specification, the technique regarding the manufacturing method of a SiC bonded substrate which can produce a defect map is disclosed.

  A SiC single crystal is likely to have a plurality of types of defects (stacking defects, spiral defects, edge defects, stacking faults, basal plane dislocations, etc.). A device including a defect is less reliable. Therefore, it is important not to include defects particularly in SiC for in-vehicle devices. If there is a defect map indicating what kind of defect exists at what position on the surface of the SiC wafer and how large, various devices can be manufactured while avoiding the defect. In addition, the technique of patent documents 1-3 is known as a technique relevant to a defect map.

JP 2004-193529 JP 2004-349420 A Japanese Patent Laid-Open No. 2005-056883

  When a defect map is created for each single crystal SiC wafer, it is very costly and time consuming. This is because it is necessary to enlarge the defects by etching the wafer surface, perform defect inspection, and then polish the surface to return it to a flat state. Then, the distribution of crystal defects in the entire ingot having a thickness of several centimeters is specified using one defect map. In other words, one defect map is used as an index for knowing the approximate number of defects that each wafer produced from one ingot has. The reason is that defects extending in the growth direction of an ingot bend, disappear, or newly occur in the middle within a range of several cm width in the ingot. This is because it is difficult to grasp the position of the accurate defect over a wide range for each wafer.

  In this specification, the manufacturing method of a SiC bonded substrate is disclosed. The manufacturing method includes a surface defect data creating step for creating surface defect data for specifying a position of a defect on the surface of the SiC single crystal substrate, a bonding step for joining the surface of the SiC single crystal substrate to a support substrate, and the SiC A peeling step of forming a SiC single crystal thin film on the surface of the support substrate by peeling from the surface of the single crystal substrate at a predetermined depth, and a flattening of the surface of the SiC single crystal substrate after the peeling step And after the surface defect data creation step is performed, the joining step, the peeling step, and the planarization step are repeated.

  In the technique of this specification, the distribution of crystal defects of each of a large number of thin films formed from the SiC single crystal substrate 13 can be specified by using one surface defect data. Since the thickness of the SiC single crystal substrate is sufficiently thinner than that of the ingot, it is possible to ignore the influence that the defects extending in the crystal growth direction bend or disappear in the middle. Therefore, it becomes possible to grasp the exact position of the defect for each of a large number of thin films using one surface defect data.

It is a perspective view of a bonded substrate. It is a creation flow figure of a surface defect map. It is a creation flowchart of a back surface defect map. It is a creation flowchart of the defect map of a joining board | substrate. It is a manufacturing flowchart of a bonded substrate. It is explanatory drawing of the kind of crystal defect. It is a figure which shows an example of a surface defect map. It is a figure which shows an example of a back surface defect map. It is a schematic diagram of a bonded substrate. It is a schematic diagram of a bonded substrate. It is a schematic diagram of a bonded substrate. It is explanatory drawing of a corresponding | compatible specific process. FIG. 10 is an explanatory diagram of a flow of Example 2.

  Hereinafter, some technical features of the embodiments disclosed in this specification will be described. The items described below have technical usefulness independently.

(Feature 1) Back surface defect data creating step for creating back surface defect data for specifying a position of a defect on the back surface of the SiC single crystal substrate, a defect included in the surface defect data, and the back surface defect data. A correspondence identification step for identifying a correspondence with a defect, an imaginary line identification step for identifying an imaginary line connecting a defect in the front surface defect data and a defect in the back surface defect data corresponding to each other, and the peeling step Thin film defect data creation that identifies the position of a defect on the surface of the SiC single crystal thin film by specifying the intersection of the surface of the SiC single crystal thin film formed by the imaginary line And a process.

(Feature 2) The correspondence specifying step includes a step of selecting one specific defect from a plurality of defects in the surface defect data, a corresponding line passing through the specific defect, and a base surface of the SiC single crystal substrate A corresponding line extending in a direction substantially perpendicular to the SiC single crystal growth axis and a back surface of the SiC single crystal substrate is identified as a corresponding point, and the closest point of the corresponding point And a step of specifying a defect of the same type as the specific defect as a defect corresponding to the specific defect.

(Feature 3) The type of the specific defect is any one of a micropipe, a spiral defect, an edge defect, a stacking fault, and a basal plane dislocation that is a defect extending in a direction parallel to the growth axis of the SiC single crystal. Also good.

(Characteristic 4) The planarization step is performed by chemical mechanical polishing (CMP), and the planarization step is performed in accordance with the polishing amount of the surface of the SiC single crystal substrate reaching a predetermined polishing amount. The method further includes a surface defect data update step of temporarily stopping and specifying the position of a surface defect to update the surface defect data, and the correspondence specifying step is performed using the updated surface defect data. Also good.

(Feature 5) The planarization step includes a first polishing step of polishing the surface of the SiC single crystal substrate under a first polishing condition until the polishing amount of the surface of the SiC single crystal substrate reaches the predetermined polishing amount. Secondly, after the polishing amount of the surface of the SiC single crystal substrate reaches the predetermined polishing amount, the surface of the SiC single crystal substrate is polished under a second polishing condition having a chemical action smaller than that of the first polishing condition. And a polishing step.

(Feature 6) The SiC single crystal substrate may be 4H-SiC.

(Feature 7) A thickness of the SiC single crystal thin film formed by the peeling step may be 1.0 micrometers or less.

<Composition of bonded substrate>
FIG. 1 is a perspective view of a bonding substrate 10 according to the first embodiment. The bonding substrate 10 is formed in a substantially disk shape. The bonding substrate 10 includes a support substrate 11 disposed on the lower side, and an SiC single crystal thin film 13t bonded to the upper surface of the support substrate 11.

  Various materials can be used for the support substrate 11. Support substrate 11 preferably has resistance to various thermal processes applied to SiC single crystal thin film 13t. Support substrate 11 is preferably made of a material having a small difference in thermal expansion coefficient from SiC single crystal thin film 13t. For example, the support substrate 11 can be made of single crystal SiC, polycrystal SiC, single crystal Si, polycrystal Si, sapphire, quartz, GaN, carbon, or the like. Polycrystalline SiC may contain SiC crystals of various polytypes and plane orientations. The thickness TT1 of the support substrate 11 may be determined so as to obtain a mechanical strength that can withstand post-processing. For example, when the diameter of the support substrate 11 is 150 (mm), the thickness TT1 may be about 350 (μm).

<Method for manufacturing bonded substrate>
A method for manufacturing the bonded substrate 10 according to the first embodiment will be described. In Example 1, the case where the support substrate 11 is polycrystalline 3C-SiC and the SiC single crystal substrate 13 is single crystal 4H-SiC will be described as an example. In addition, a case will be described in which the manufacturing flow described in this specification is performed using a separation technique based on hydrogen atom ablation.

  A method for manufacturing the bonded substrate 10 according to the first embodiment will be described with reference to FIGS. 2A, 2B, 3A, and 3B. In the following description, step is abbreviated as “S”. The flow in FIG. 2A is a flow for generating a surface defect map which is surface defect data of the SiC single crystal substrate 13. The flow in FIG. 2B is a flow for generating a defect map on the back surface, which is back surface defect data of the SiC single crystal substrate 13. The flow in FIG. 3A is a flow for generating a defect map that is defect data of the bonded substrate 10. The flow in FIG. 3B is a flow for forming the bonded substrate 10.

  The defect map generation flow on the surface of SiC single crystal substrate 13 in FIG. 2A will be described. In S110, defect selective etching is performed on the surface of the SiC single crystal substrate 13. In the defect selective etching, etch pits can be selectively formed in portions where crystal defects are exposed by etching the crystal surface. The shape of the etch pit is determined by the type of dislocation defect, the direction of the dislocation line, and the symmetry of the crystal. Therefore, the type of crystal defect can be determined from the shape of the etch pit. As an etchant, for example, potassium hydroxide (KOH) melt can be used.

  The types of crystal defects will be described with reference to FIG. The crystal defects are roughly classified into penetration defects and defects extending in the basal plane direction. The penetrating defect is a crystal defect extending in a direction parallel to the crystal growth axis AX1 (also referred to as c-axis). Examples of penetration defects include micropipes (MP), helical defects (TSD), and edge defects (TED). Examples of crystal defects extending in the direction of the SiC (0001) plane, which is the basal plane, include stacking faults (SF) and basal plane defects (BPD). In the present embodiment, in FIG. 4, the surface of the SiC single crystal substrate 13 has an off angle of about 4 degrees from the (0001) plane. In other words, the growth axis AX1 has an off angle of about 4 degrees from the direction perpendicular to the SiC single crystal substrate 13.

  If micropipes, spiral defects, stacking faults, basal plane defects, edge defects, etc. are included in the power device, it may cause problems such as poor pressure resistance, reduced yield, reduced reliability, and reduced device life. There is.

  In S120, the surface of SiC single crystal substrate 13 is inspected for defects. For example, it can be performed by a surface inspection apparatus using laser light. In the defect inspection, the type of defect can be specified by measuring the shape and size of the etch pit.

  In S130, a surface defect map of SiC single crystal substrate 13 is created. The surface defect map may be created by a surface inspection apparatus, or may be created by a PC or the like that has received inspection data from the surface inspection apparatus. The surface defect map is a visual display of the position, type, size, etc. of a plurality of crystal defects existing on the surface of the SiC single crystal substrate 13. FIG. 5 shows an example of the surface defect map FM1 of the SiC single crystal substrate 13. FIG. 5 shows an example in which the defects Da1 to Da3, which are penetration defects, are displayed.

  A defect map generation flow of the back surface of SiC single crystal substrate 13 in FIG. 2B will be described. In S210, defect selective etching is performed on the back surface of the SiC single crystal substrate 13. The contents of the defect selective etching are the same as in S110. In S220, a defect on the back surface of SiC single crystal substrate 13 is inspected. The content of the defect inspection is the same as S120. In S230, a back surface defect map of SiC single crystal substrate 13 is created. The back surface defect map is a visual display of the position, type, size, etc. of a plurality of crystal defects existing on the back surface of the SiC single crystal substrate 13. The content of the back surface defect map is the same as the surface defect map described in S130.

  FIG. 6 shows an example of the back surface defect map BM1 of the SiC single crystal substrate 13. The defects Db1 to Db3 in FIG. 6 correspond to the defects Da1 to Da3 in FIG. That is, the defects extending from the defects Da1 to Da3 in FIG. 5 in the back direction in parallel with the growth axis AX1 are exposed as the defects Db1 to Db3 in FIG.

  The defect map generation flow of the bonded substrate in FIG. 3A will be described. The bonded substrate defect map generation flow may be performed by the surface inspection apparatus, or may be performed by the PC that has received the inspection data from the surface inspection apparatus.

  In S410 to S430, a correspondence specifying step for specifying the correspondence between the defects included in the front surface defect map and the defects included in the back surface defect map is performed. The correspondence identifying step is performed using the front surface defect map created in S130 and the back surface defect map created in S230.

  The detailed contents of the correspondence specifying process of S410 to S430 will be described using FIG. 3A and FIG. In S410, a step of selecting one specific defect from a plurality of defects included in the surface defect map is performed. In the example of FIG. 10, the specific defect D1 is selected from the surface defect map FM1. A case where the type of the specific defect D1 is edge dislocation (TED) will be described.

  In S420, a corresponding line passing through the specific defect and extending in a direction parallel to the growth axis AX1 of the SiC single crystal substrate 13 is created. And the intersection of a corresponding line and the back surface of SiC single crystal substrate 13 is specified as a corresponding point. In the example of FIG. 10, the corresponding line L1 is created. And the intersection of the corresponding line L1 and the back surface 13b of the SiC single crystal substrate 13 is specified as the corresponding point P1.

  In S430, the defect located in the vicinity of the corresponding point among the plurality of defects included in the back surface defect map is searched for the same type of defect as the specific defect. Then, the found defect is identified as a corresponding defect corresponding to the specific defect. Thereby, even when the defect extending in parallel with the growth axis AX1 in the back surface direction starting from the specific defect is bent in the middle, the corresponding defect corresponding to the specific defect can be specified.

  In the example of FIG. 10, the corresponding defect D2 of the blade-like defect located closest to the corresponding point P1 is identified from among the plurality of defects included in the back surface defect map BM1. In addition, when there is no defect of the same type as the specific defect within a predetermined range (for example, a circle with a radius of 0.1 μm), it can be determined that there is no corresponding defect. As an example in the case where no corresponding defect exists, there is a case where a defect extending in the rear surface direction starting from the specific defect has disappeared inside the SiC single crystal substrate 13. Conversely, a specific defect may be selected from the defects included in the back surface defect map, and the corresponding defect may be specified using the intersection of the corresponding line and the surface of SiC single crystal substrate 13 as the corresponding point. As an example of the case where there is no corresponding defect at this time, there is a case where a defect is newly generated inside the SiC single crystal substrate 13 toward the specific defect. The defect may be grown from the seed substrate for growth, or may be generated from the periphery during ingot growth and grow inward. In particular, a defect growing from the periphery of the crystal during ingot growth becomes a newly generated defect, which is a problem. Further, newly generated defects become more prominent as the thickness of the substrate increases. Therefore, according to the technique of this specification, it is possible to capture defects growing from the periphery of the crystal by forming a three-dimensional defect map by acquiring the defect map a plurality of times in the thickness direction.

  In S460, an imaginary line connecting the specific defect in the front surface defect map FM1 and the corresponding defect in the back surface defect map BM1 is specified. This imaginary line is a line obtained by modeling the propagation path of the defect propagating through the substrate from the specific defect on the surface of the SiC single crystal substrate 13 to the corresponding defect on the back surface. In other words, a three-dimensional defect map can be formed by forming an imaginary line. In the embodiment of FIG. 10, an imaginary line L2 connecting the specific defect D1 and the corresponding defect D2 is specified.

  In S470, the intersection of the surface of the SiC single crystal thin film formed by the peeling process of S320 and the polishing process of S330 and the imaginary line is specified. The contents of S320 and S330 will be described later. Then, the specified intersection is specified as the position of the defect on the surface of the SiC single crystal thin film. Thereby, a thin film defect map can be created. In the example of FIG. 10, the intersection of the surface 13ta of the SiC single crystal thin film 13t (that is, the fracture surface after planarization) and the imaginary line L2 is specified. Then, the specified intersection is specified as the position of the defect D3 on the surface 13ta of the SiC single crystal thin film 13t. Thereby, the thin film defect map TM1 can be created. The thin film defect map is information for specifying the position, type, size, etc. of the defect on the surface 13ta of the SiC single crystal thin film 13t.

  In S480, it is determined whether or not the correspondence with the back surface defect map has been determined for all the defects included in the front surface defect map FM1. When a negative determination is made (S480: NO), the process returns to S410, and a defect that has not yet been selected as the specific defect is newly selected as the specific defect. On the other hand, when a positive determination is made in S480 (S480: YES), the flow ends.

  The formation flow of the bonded substrate in FIG. 3B will be described. In S301, the back surface of the SiC single crystal substrate 13 etched in S210 is polished to remove etch pits. Thereby, the back surface of SiC single crystal substrate 13 can be returned flat. The polishing amount for removing the etch pit is, for example, 10 μm. In S <b> 302, the reinforcing substrate 14 is bonded to the back surface of the SiC single crystal substrate 13. The reinforcing substrate 14 may be joined by any method as long as it can withstand the annealing of S320 described later. Further, S302 may be omitted if possible.

  In S303, the surface of the SiC single crystal substrate 13 etched in S110 is polished to remove etch pits. The content of the surface polishing is the same as S301. Note that the back surface polishing in S301 and the surface polishing in S303 may be performed simultaneously. Further, the back surface polishing in S301 may be omitted. This is because it is sufficient that only the surface to be attached to the reinforcing substrate 14 is exposed. Moreover, when not reinforcing, S302 may be omitted. In this case, the back surface of the SiC single crystal substrate 13 is exposed.

  In S305, a hydrogen ion implantation step is performed in which hydrogen ions are implanted from the surface 13a of the SiC single crystal substrate 13. When hydrogen ions are implanted into the SiC single crystal substrate 13, the hydrogen ions reach a depth corresponding to the incident energy and are distributed at a high concentration. Thereby, as shown in the schematic diagram of FIG. 7, the hydrogen injection layer 15 is formed at a predetermined depth from the surface 13a. In Example 1, a case where the hydrogen injection layer 15 is formed at a position of about 0.5 μm from the surface will be described.

  In S <b> 310, a bonding step for bonding the surface of the SiC single crystal substrate 13 to the support substrate 11 is performed. The case where a joining process is performed by normal temperature joining is demonstrated. The SiC single crystal substrate 13 and the support substrate 11 are set in a chamber (not shown), and the inside of the chamber is evacuated. The surface of the support substrate 11 and the surface of the SiC single crystal substrate 13 are irradiated with a neutral atom beam of argon using a FAB (Fast Atom Beam) gun. Thereby, the surface can be activated. Note that other beams such as an atomic beam can be irradiated. Then, the surface of support substrate 11 and the surface of SiC single crystal substrate 13 are brought into contact in a vacuum in a chamber. Thereby, the bonds existing on the surface in the active state are connected to each other, and the support substrate 11 and the SiC single crystal substrate 13 can be joined. Thereby, as shown in the schematic diagram of FIG. 8, a structure in which support substrate 11 and SiC single crystal substrate 13 are joined is formed. When S302 is omitted, there is no reinforcing substrate 14.

  In S320, a peeling process is performed. Specifically, support substrate 11 and SiC single crystal substrate 13 bonded to each other are heated to about 1000 ° C. Thereby, the SiC single crystal substrate 13 can be separated by the hydrogen injection layer 15. Therefore, as shown in the schematic diagram of FIG. 9, the bonded substrate 10 can be formed on the support substrate 11 by bonding the SiC single crystal thin film 13 t having a thickness of 0.5 μm.

  In S330, the fracture surface is flattened by polishing the surface of the SiC single crystal thin film 13t. Thereby, the bonded substrate 10 is completed. In S340, the fractured surface is flattened by polishing the surface of the SiC single crystal substrate 13. And it returns to S305 and manufacture of the following joining board | substrate is started.

<Effect of Example 1>
Conventionally, since one SiC single crystal wafer has a thickness of about 350 μm, a maximum of about 40 SiC single crystal wafers can be obtained from a SiC ingot. Since defect inspection takes time, man-hours, and costs, it is not practical to perform a complete inspection, and it is only possible to sample a single wafer and perform a defect inspection. Then, the distribution of crystal defects in the entire ingot having a thickness of several centimeters is specified using one defect map. Therefore, the exact defect position cannot be grasped for each wafer. The defect extending in the growth direction of the ingot is because it bends, disappears, or newly occurs in the middle. With the technique described in this specification, a surface defect map of the SiC single crystal substrate 13 having a thickness of about 1.1 mm can be created (S120). Note that the accuracy of the three-dimensional defect map can be increased as the thickness of the SiC single crystal substrate 13 is reduced. Then, a step of bonding the 0.5 μm SiC single crystal thin film 13t to the support substrate (S305 to S320), and a step of polishing and planarizing the surface of the SiC single crystal substrate 13 after the peeling step, for example, by about 1.0 μm ( S340) can be repeated. Thereby, 500 or more bonded substrates 10 can be produced from one SiC single crystal substrate 13 having a thickness of 1.1 mm. That is, in the technique described in this specification, the distribution of crystal defects of each of the 500 or more bonded substrates 10 created from the SiC single crystal substrate 13 is specified using one defect map. Since the thickness of the SiC single crystal substrate 13 is sufficiently smaller than that of the ingot, it is possible to substantially eliminate the influence that the defect extending in the crystal growth direction is bent or disappeared in the middle. Therefore, it becomes possible to grasp the position of an accurate defect for every 500 or more bonded substrates 10 using one defect map.

  When the surface of SiC single crystal substrate 13 has an off-angle, penetrating defects such as micropipes, spiral defects, and blade-like defects are shifted in a direction off-angle from the direction perpendicular to SiC single crystal substrate 13. It grows. Therefore, if a defect on the surface 13ta of the SiC single crystal thin film 13t is specified using the surface defect map, a deviation occurs between the defect position on the map and the actual defect position. In the technique described in this specification, a three-dimensional defect map can be formed by forming an imaginary line that connects a specific defect in the front surface defect map FM1 and a corresponding defect in the back surface defect map BM1. (S460). And the thin film defect map TM1 which specifies the position and magnitude | size of the defect of the surface 13ta of the SiC single crystal thin film 13t by specifying the intersection of the peeling surface of the SiC single crystal thin film 13t and an imaginary line is created. Yes (S470). Thereby, the position of the defect on the surface 13ta of the SiC single crystal thin film 13t can be accurately known.

  Example 2 will be described with reference to FIG. Example 2 is an example relating to the step of polishing the fracture surface of SiC single crystal substrate 13 (S340 in FIG. 3B). Unless otherwise stated, each step described in the first embodiment can also be used in the second embodiment. In the second embodiment, the flow for generating the defect map on the back surface (FIG. 2B) and the flow for generating the three-dimensional defect map (FIG. 3A) can be omitted.

  The detailed contents of the step of polishing the fracture surface of the SiC single crystal substrate 13 will be described with reference to FIG. In S510, a first polishing step is performed in which the surface of the SiC single crystal substrate 13 after the peeling step is planarized by CMP (Chemical Mechanical Polishing). In the first polishing step, the surface of SiC single crystal substrate 13 is polished under a first polishing condition. The first polishing condition is a condition that allows the polishing liquid to have an etching action. In other words, the first polishing condition is a condition for strengthening the chemical polishing action among the mechanical polishing action and the chemical polishing action of CMP. Therefore, crystal defects can be enlarged and etch pits can be formed. That is, the CMP process can be used as an etching process for conspicuous defects. In S520, it is determined whether or not the polishing amount of the surface of SiC single crystal substrate 13 has reached a predetermined polishing amount. The predetermined polishing amount is a polishing amount for performing etching so as to obtain a pit depth necessary for determining crystal defects. The determination of whether the predetermined polishing amount has been reached may be defined by the etching time. If a negative determination is made (S520: NO), the process returns to S510, and if an affirmative determination is made (S520: YES), the process proceeds to S530.

  In S530, the polishing is temporarily stopped. Then, a defect on the surface of SiC single crystal substrate 13 is inspected. The specific contents are the same as S120 described above. In S540, the surface defect map of SiC single crystal substrate 13 is updated. The specific contents are the same as S130 described above. When the surface defect map of the SiC single crystal substrate 13 is updated in S540, the defect map generation flow (FIG. 3A) of the bonded substrate may be performed again.

  In S550, a second polishing process is performed. In the second polishing step, the surface of the SiC single crystal substrate is polished under a second polishing condition that has a smaller chemical action than the first polishing condition. The second polishing condition is a condition suitable for planarizing the SiC single crystal substrate. In other words, the second polishing condition is a condition in which the mechanical polishing action and the chemical polishing action of CMP are balanced. Therefore, etch pits can be removed. Note that the combined polishing amount of the first and second polishing steps is, for example, 1 μm or less. And it returns to S305 of FIG. 3B. Various conditions can be used for the second polishing step. In the first half of the second polishing step, polishing can be performed to a certain extent in order to erase the etching pits formed in the first polishing step, and therefore, conditions that emphasize the mechanical polishing action of CMP may be used. In the second half of the second polishing step, which is the period after the etching pits disappear, conditions that balance the mechanical polishing action and the chemical polishing action may be used.

<Effect of Example 2>
The position of the defect existing on the surface of the SiC single crystal substrate 13 may be shifted each time the peeling process is repeated. In addition, the number and type of defects may increase or decrease by repeating the peeling process. This is because stacking faults or basal plane defects hidden inside the SiC single crystal substrate 13 appear on the front surface, or defects extending in the rear surface direction disappear on the way. Moreover, it is because the position of a defect changes according to an off angle as the SiC single crystal substrate 13 becomes thin by repeating the peeling process. In the technique of Example 2, the surface defect map of the SiC single crystal substrate 13 can be updated every time the peeling process is performed (S540). Therefore, it is possible to reliably reflect changes in the position, number, and type of defects in the surface defect map.

  When the amount of CMP polishing on the surface of SiC single crystal substrate 13 reaches a predetermined polishing amount (S520: YES), inspection of defects on the surface of SiC single crystal substrate 13 can be performed (S530). In CMP in which the chemical polishing action is strengthened rather than the mechanical polishing action, the polishing rate is different between a portion having a defect and a portion having no defect. Therefore, unevenness and scratches are flattened at the beginning of polishing, and defects are flattened at the end of polishing. Therefore, when the polishing is stopped when the polishing amount reaches the predetermined polishing amount, it is possible to create a state in which the surface unevenness is flattened while the defect is not flattened. That is, the CMP process in which the chemical polishing action is stronger than the mechanical polishing action can be used as an etching process for conspicuous defects. Therefore, by adjusting the polishing conditions for CMP, it is possible to inspect defects on the surface of the SiC single crystal substrate 13 after the peeling step without introducing a dedicated apparatus for inspection. Cost and inspection time can be reduced.

  In the technique of the second embodiment, a flow for generating a defect map on the back surface (FIG. 2B) and a flow for generating a three-dimensional defect map (FIG. 3A) can be omitted. This is because the surface defect map of the SiC single crystal substrate 13 can be updated. In other words, since the change in the position, number, and type of defects can be reflected in the surface defect map, it is not necessary to form the three-dimensional defect map in S460.

<Modification>
As mentioned above, although the Example of this invention was described in detail, these are only illustrations and do not limit a claim. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.

  The SiC single crystal substrate 13 may be formed of, for example, a single crystal of another compound semiconductor (eg, GaN, GaO, AlN). The technique of this specification is also effective for other compound semiconductors. This is because the compound semiconductor causes crystal defects during crystal growth. In particular, in the case of a crystal structure in which a polytype crystal is present, it is difficult to control the generation of defects, so the technique of this specification is effective.

  The SiC single crystal substrate 13 is not limited to 4H—SiC single crystal. Various polytype single crystal SiC such as 3C—SiC and 6H—SiC can be used as the SiC single crystal substrate 13. The support substrate 11 is not limited to 3C—SiC polycrystal. Various polytypes of polycrystalline SiC can be used.

  The material used for the support substrate 11 is not limited to polycrystalline SiC. Any material may be used as long as it is resistant to various thermal processes applied to the SiC single crystal substrate 13.

  The thickness of the SiC single crystal substrate 13, the thickness of the SiC single crystal thin film 13t, the polishing amount of S340, etc. described in the present embodiment are all examples, and other values can be used. In this embodiment, the defect map is used as the defect data, and visually displayed data is created. However, the defect data may not be visual data. Although the FAB gun is used in this embodiment, an ion gun may be used. In this embodiment, the surface of the SiC single crystal substrate is planarized using CMP, but the present invention is not limited to this mode, and various planarization methods may be combined. For example, after flattening roughly by cutting or lapping, finishing flattening may be performed by CMP.

  The surface defect map update process described with reference to FIG. 11 may be executed every time a predetermined number (for example, 10) of SiC single crystal thin films 13t are peeled off. This makes it possible to reduce the processing time and processing time required for updating the surface defect map.

  In S510, the etch pit is formed using the CMP polishing liquid, but the present invention is not limited to this. An etching-dedicated solution such as KOH may be used.

  The flow (FIG. 2B) for generating the defect map on the back surface of the SiC single crystal substrate 13 can be omitted. The inspection step of S530 and the step of updating the surface defect map of S540 can be omitted. From the above, generally speaking, the manufacturing method of the SiC bonded substrate is performed after performing the “surface defect map creating process (surface defect data creating process)”, followed by the “joining process”, the “peeling process”, and “ It suffices to include at least repeating the “planarization step”. As a specific example, in the method for manufacturing an SiC bonded substrate, after performing S130 or S540, it is sufficient to at least execute S310, S320, S510, and S550.

  The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

10: bonding substrate, 11: support substrate, 13: SiC single crystal substrate, 13t: SiC single crystal thin film, 14: reinforcing substrate, 15: hydrogen injection layer, AX1: growth axis, D1: specific defect, D2: corresponding defect, L1: corresponding line, L2: imaginary line, FM1: surface defect map, BM1: back surface defect map

Claims (8)

A method for manufacturing a SiC bonded substrate,
A surface defect data creating step for creating surface defect data for specifying the position of defects on the surface of the SiC single crystal substrate;
A bonding step of bonding the surface of the SiC single crystal substrate to a support substrate;
A peeling step of forming a SiC single crystal thin film on the surface of the support substrate by peeling at a predetermined depth from the surface of the SiC single crystal substrate;
A flattening step of flattening the surface of the SiC single crystal substrate after the peeling step;
With
After performing the said surface defect data preparation process, the said bonding process, the said peeling process, and the said planarization process are repeated, The manufacturing method of the SiC bonded substrate characterized by the above-mentioned. Back surface defect data creating step for creating back surface defect data for specifying the position of the defect on the back surface of the SiC single crystal substrate;
A correspondence identifying step for identifying correspondence between defects included in the surface defect data and defects included in the back surface defect data;
An imaginary line specifying step for specifying an imaginary line connecting a defect in the front surface defect data and a defect in the back surface defect data corresponding to each other;
A thin film for creating thin film defect data for specifying the position of a defect on the surface of the SiC single crystal thin film by specifying the intersection of the surface of the SiC single crystal thin film formed by the peeling step and the imaginary line Defect data creation process,
The method for producing a SiC bonded substrate according to claim 1, further comprising: The correspondence specifying step includes
Selecting one specific defect from a plurality of defects in the surface defect data;
A corresponding line passing through the specific defect and extending in a direction parallel to a growth axis of the SiC single crystal, which is a direction substantially perpendicular to the base surface of the SiC single crystal substrate, and a back surface of the SiC single crystal substrate Identifying the intersection as a corresponding point;
A defect located closest to the corresponding point, the step of identifying a defect of the same type as the specific defect as a defect corresponding to the specific defect;
The method for producing a SiC bonded substrate according to claim 2, comprising:   The type of the specific defect is any one of a micropipe, a spiral defect, an edge defect, a stacking fault, and a basal plane dislocation, which is a defect extending in a direction parallel to the growth axis of the SiC single crystal. The manufacturing method of the SiC bonded substrate according to claim 3. The planarization process is performed by chemical mechanical polishing (CMP),
In the planarization step, the polishing is temporarily stopped when the polishing amount of the surface of the SiC single crystal substrate reaches a predetermined polishing amount, and the surface defect data is updated by specifying the position of the surface defect. A defect data update process,
5. The method for manufacturing a SiC bonded substrate according to claim 2, wherein the correspondence specifying step is performed using the updated surface defect data. 6. The planarization step includes
A first polishing step of polishing the surface of the SiC single crystal substrate under a first polishing condition until the polishing amount of the surface of the SiC single crystal substrate reaches the predetermined polishing amount;
Second polishing for polishing the surface of the SiC single crystal substrate under a second polishing condition having a chemical action smaller than that of the first polishing condition after the polishing amount of the surface of the SiC single crystal substrate reaches the predetermined polishing amount. Process,
The method for producing a SiC bonded substrate according to claim 5, further comprising:   The method for producing a SiC bonded substrate according to any one of claims 1 to 6, wherein the SiC single crystal substrate is 4H-SiC. The method for producing a SiC bonded substrate according to any one of claims 1 to 7, wherein a thickness of the thin film of the SiC single crystal formed by the peeling step is 1.0 micrometer or less. .

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