JP2018181880A - Semiconductor package and semiconductor device - Google Patents

Abstract

The present invention provides a semiconductor package in which a soft error of a semiconductor element due to the ionizing action of alpha rays is less likely to occur.
A semiconductor package 1 for mounting and sealing a semiconductor element 7 has a bottom 3 on which the semiconductor element 7 is mounted and a frame-shaped side wall 4 disposed on the bottom 3. The container 2 is disposed above the side wall 4 of the container 2 and is disposed between the glass lid 5 for sealing the inside of the container 2 and the sidewall 4 of the container 2 and the glass lid 5 Between the upper end portion 6a of the sealing material layer 6 on the side of the semiconductor element 7 and the outer peripheral edge 7b of the upper surface 7a of the semiconductor element 7 It is characterized in that a side wall portion 4 is provided to do so.
[Selected figure] Figure 1

Description

  The present invention relates to a semiconductor package for mounting and sealing a semiconductor element and a semiconductor device using the semiconductor package.

  Conventionally, a package is used to mount and seal the device. Such a package is constituted of, for example, a container on which the element can be mounted and a cover member for sealing the inside of the container. As an element accommodated in a package, solid-state image sensors, such as CCD and CMOS, a light emitting element, or MEMS etc. are known, for example.

  Patent Document 1 below discloses a package for housing an electronic device. The package of Patent Document 1 includes a package substrate having a recess and a step portion disposed around the recess, and a lid. The stepped portion of the package substrate and the lid are bonded via a bonding layer provided therebetween. Patent Document 1 describes that the bonding layer is preferably made of a sealing material made of low melting glass such as bismuth-based glass. In Patent Document 1, a laser is irradiated to such a sealing material through a lid to melt and solidify the sealing material, thereby joining the stepped portion of the package substrate and the lid.

JP, 2016-27610, A

  However, when a semiconductor element such as a solid-state imaging element is accommodated in the package of Patent Document 1, there has been a case where a soft error of the semiconductor element occurs due to the ionizing action of α rays derived from the constituent members of the package.

  An object of the present invention is to provide a semiconductor package and a semiconductor device using the semiconductor package, in which a soft error of the semiconductor element due to the ionizing action of alpha rays is unlikely to occur.

  A semiconductor package according to the present invention is a semiconductor package for mounting and sealing a semiconductor element, and has a bottom portion on which the semiconductor element is mounted and a frame-shaped side wall portion disposed on the bottom portion. A sealing material disposed between a container, a glass lid disposed above the sidewall of the container, and a glass lid for sealing the interior of the container, and the sidewall of the container and the glass lid A side wall portion is provided between the upper end portion on the semiconductor element side of the sealing material layer and the outer peripheral edge of the top surface of the semiconductor element, such that a part of the side wall portion is present It is characterized by

  In the semiconductor package according to the present invention, the thickness of the sealing material layer is A, and the distance in plan view between the upper end portion of the sealing material layer on the semiconductor element side and the upper end portion of the sidewall portion on the semiconductor element side Where C is the ratio A / B where B is the difference in height between the upper surface of the side wall and the upper surface of the semiconductor element as C, and the upper end of the side wall on the side of the semiconductor element and the semiconductor device It is preferable that the ratio C / D when the distance in plan view to the upper end portion on the opposite side to the sealing material layer be D be A / B <C / D.

  In the semiconductor package according to the present invention, the sealing material layer is preferably made of glass frit.

  In the semiconductor package according to the present invention, the glass frit preferably contains bismuth-based glass.

  A semiconductor device according to the present invention is characterized by comprising a semiconductor package configured according to the present invention, and a semiconductor element housed inside the semiconductor package.

  In the semiconductor device according to the present invention, the semiconductor element is preferably a solid-state imaging element.

  According to the present invention, it is possible to provide a semiconductor package in which a soft error of the semiconductor element due to the ionizing action of α rays is unlikely to occur.

FIG. 1 is a schematic cross-sectional view showing a semiconductor package and a semiconductor device according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view showing, in an enlarged manner, a portion provided with a sealing material layer in a semiconductor package and a semiconductor device according to an embodiment of the present invention. FIGS. 3A to 3D are schematic cross-sectional views for explaining a method of manufacturing a semiconductor package according to an embodiment of the present invention.

  Hereinafter, preferred embodiments will be described. However, the following embodiments are merely illustrative, and the present invention is not limited to the following embodiments. In each drawing, members having substantially the same functions may be referred to by the same reference numerals.

  FIG. 1 is a schematic cross-sectional view showing a semiconductor package and a semiconductor device according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view showing, in an enlarged manner, a portion provided with a sealing material layer in a semiconductor package and a semiconductor device according to an embodiment of the present invention.

[Semiconductor package]
As shown in FIG. 1, the semiconductor package 1 is a semiconductor package for mounting and sealing the semiconductor element 7. Examples of the semiconductor device 7 mounted on the semiconductor package 1 include solid-state imaging devices such as CCD and CMOS.

  The semiconductor package 1 includes a container 2, a glass lid 5 and a sealing material layer 6.

  In the present embodiment, the container 2 is configured by low temperature co-fired ceramics (LTCC). However, the container 2 may be made of other materials, and the material of the container 2 is not particularly limited.

  The container 2 has a bottom 3 and a side wall 4. The bottom portion 3 is a portion of the container 2 on which the semiconductor element 7 is mounted. A frame-like side wall 4 is disposed on the bottom 3. Further, a glass lid 5 is disposed on the upper surface 4 a of the side wall portion 4. The glass lid 5 is a member for sealing the container 2.

  A sealing material layer 6 is provided between the side wall 4 and the glass lid 5. The side wall 4 and the glass lid 5 are joined by the sealing material layer 6. In the present embodiment, the sealing material layer 6 is made of glass frit containing bismuth-based glass. However, the sealing material layer 6 may be made of another material, and is not particularly limited. In the present embodiment, the cross-sectional shape of the sealing material layer 6 is rectangular, but the side surface 6 b of the sealing material layer 6 may have a rounded shape, and the shape of the sealing material layer 6 Is not particularly limited.

  In the semiconductor package 1 of the present embodiment, the side wall 4 is provided between the upper end 6 a of the sealing material layer 6 and the outer peripheral edge 7 b of the semiconductor element 7 so that a part of the side wall 4 exists. There is. The upper end 6 a of the sealing material layer 6 is the upper end of the sealing material layer 6 on the side of the semiconductor element 7. The outer peripheral edge 7 b is the outer peripheral edge of the top surface 7 a of the semiconductor element 7.

  In the semiconductor package 1, the side wall 4 is provided between the upper end 6 a of the sealing material layer 6 and the upper end 7 c of the semiconductor element 7 so that a part of the side wall 4 exists. The upper end 7 c of the semiconductor element 7 is the upper end of the semiconductor element 7 opposite to the upper end 6 a of the sealing material layer 6.

  In the semiconductor package 1, the sidewall 4 is provided so that a part of the sidewall 4 exists between the upper end 6 a of the sealing material layer 6 and the outer peripheral edge 7 b of the semiconductor element 7. Soft errors of the semiconductor element 7 due to the ionizing action of the line are unlikely to occur. This can be described as follows.

  In the semiconductor package 1 of the present embodiment, as described above, the side wall portion 4 and the glass lid 5 are joined using the glass frit containing bismuth-based glass. Under the present circumstances, the glass frit containing bismuth type | system | group glass may contain the impurity which discharge | releases an alpha ray like lead. Therefore, in the conventional semiconductor package using such a glass frit, the soft error of the semiconductor element may occur due to the ionizing action of the α ray emitted from the glass frit.

  On the other hand, in the semiconductor package 1 of the present embodiment, as described above, a portion of the sidewall 4 is present between the upper end 6 a of the sealing material layer 6 and the outer peripheral edge 7 b of the semiconductor element 7. Side wall portion 4 is provided. Therefore, the α-rays emitted from the sealing material layer 6 and directed to the semiconductor element 7 can be shielded by the side wall 4. Accordingly, it becomes difficult for the semiconductor element 7 to be irradiated with the α-rays emitted from the sealing material layer 6, and the soft error of the semiconductor element 7 due to the ionizing action of the α-rays can be made difficult to occur.

  As described above, in the semiconductor package 1, since part of the side wall portion 4 exists on all straight lines connecting the upper end portion 6 a of the sealing material layer 6 and the outer peripheral edge 7 b of the semiconductor element 7, sealing is performed. The α-rays emitted from the material layer 6 toward the semiconductor element 7 can be shielded by the side wall portion 4, whereby soft errors of the semiconductor element 7 due to the ionizing action of the α-rays can be made less likely to occur.

  As described above, when the cross-sectional shape of the sealing material layer 6 is not rectangular, for example, the side surface 6 b of the sealing material layer 6 has a rounded shape, the sealing material layer 6 is It is preferable that the side wall portion 4 be provided so that a part of the side wall portion 4 exists between the portion of the side surface 6 b closest to the semiconductor element 7 and the outer peripheral edge 7 b of the semiconductor element 7. In this case, the α-rays can be shielded more reliably by the side wall portion 4, and soft errors of the semiconductor element 7 due to the ionizing action of the α-rays can be further prevented from occurring.

  In the present invention, it is preferable that A, B, C and D shown in FIG. 1 and FIG. 2 satisfy A / B <C / D.

  The above A is the thickness of the sealing material layer 6. The above B is the distance in plan view between the upper end 6 a of the sealing material layer 6 and the upper end 4 b of the side wall 4. The upper end 4 b of the side wall 4 is an upper end of the side wall 4 on the side of the semiconductor element 7. Further, B is the shortest distance in plan view between the upper end 6 a of the sealing material layer 6 and the upper end 4 b of the side wall 4.

  The above C is the difference in height between the upper surface 4 a of the side wall 4 and the upper surface 7 a of the semiconductor element 7 (upper surface 4 a of the side wall 4-upper surface 7 a of the semiconductor element 7). Further, D is a distance in plan view between the upper end 4 b of the side wall 4 and the upper end 7 c of the semiconductor element 7. The upper end 7 c of the semiconductor element 7 is the upper end of the semiconductor element 7 opposite to the sealing material layer 6. More specifically, the upper end portion 7 c of the semiconductor element 7 is the upper end portion of the semiconductor element 7 provided on the opposite side to the upper end portion 6 a of the sealing material layer 6 used when obtaining B. The upper end portion 7 c of the semiconductor element 7 is a portion of the outer peripheral edge 7 b of the semiconductor element 7 that is the most distant from the upper end portion 6 a of the sealing material layer 6 used when obtaining B.

  When A, B, C, and D shown in FIGS. 1 and 2 satisfy A / B <C / D, the side wall portion 4 can shield the α ray more reliably. Therefore, the soft error of the semiconductor element 7 due to the ionizing action of the α ray can be made more difficult to occur.

  A / B (ratio of A to B) is preferably less than 0.1, more preferably 0.05 or less. When A / B is less than or equal to the above upper limit, the α-ray can be shielded more reliably by the sidewall portion 4, and soft errors of the semiconductor element 7 due to the ionizing action of the α-ray can be further prevented. In addition, it is preferable that A / B is 0.001 or more. In this case, the bonding strength between the side wall 4 and the glass lid 5 can be further enhanced.

  C / D (ratio of C to D) is preferably 0.05 or more, more preferably 0.1 or more. When C / D is equal to or more than the above lower limit, the α ray can be shielded more reliably by the sidewall portion 4, and soft errors of the semiconductor element 7 due to the ionizing action of the α ray can be further prevented. The upper limit value of C / D can be, for example, 50.

  Hereinafter, details of each member constituting the semiconductor package 1 will be described.

(container)
The container 2 has a bottom 3 and a side wall 4. The container 2 may be one in which the bottom 3 and the side wall 4 are integrally formed, or one in which the bottom 3 and the side wall 4 are separately formed is joined by an adhesive or the like. Good.

  The container 2 is made of, for example, ceramic, glass ceramic or the like. Examples of the ceramic include aluminum oxide, aluminum nitride, zirconia, mullite and the like. As a glass ceramic, LTCC (Low Temperature Co-fired Ceramics) etc. are mentioned. Specific examples of LTCC include sintered bodies of inorganic powders such as titanium oxide and niobium oxide and glass powders.

(Glass lid)
The glass constituting the glass lid 5, for _{example, SiO 2 -B 2 O 3 -RO} (R is Mg, Ca, Sr or Ba) based _{glass, SiO 2 -B 2 O 3 -R} '2 O (R' Is Li, Na or Ka) glass, SiO ₂ -B ₂ O ₃ -RO-R ' ₂ O glass (R' is Li, Na or Ka), SnO-P ₂ O ₅ glass, TeO ₂ glass Alternatively, Bi ₂ O ₃ based glass can be used.

(Sealing material layer)
As a sealing material for forming the sealing material layer 6, for example, glass frit can be used. Among them, it is preferable to contain glass frit having a low melting point, such as Bi ₂ O ₃ based glass powder (bismuth based glass powder), SnO-P ₂ O ₅ based glass powder, V ₂ O ₅ -TeO ₂ based glass powder, etc. preferable. In particular, in the case of sealing by laser irradiation, it is necessary to soften the sealing material by heating for a shorter period of time and from the viewpoint of further increasing the bonding strength, the glass frit has a bismuth system having a very low softening point. More preferably, glass powder is used. In addition, the glass frit may contain a low expansion refractory filler, a laser absorber, and the like. Examples of the low expansion refractory filler include cordierite, willemite, alumina, a zirconium phosphate compound, zircon, zirconia, tin oxide, quartz glass, β-quartz solid solution, β-eucryptite, and spodumene. Moreover, as a laser absorber, compounds, such as an oxide containing at least 1 sort (s) of metal selected from Fe, Mn, Cu etc., or this metal, are mentioned, for example.

[Semiconductor device]
The semiconductor device 10 includes the semiconductor package 1 and the semiconductor element 7 described above. The semiconductor element 7 is housed inside the semiconductor package 1. Since the semiconductor device 10 includes the above-described semiconductor package 1, soft errors in the semiconductor element 7 due to the ionizing action of α rays are unlikely to occur.

  As described above, in the semiconductor device 10, soft errors of the semiconductor element 7 due to the ionizing action of α rays are unlikely to occur. Therefore, as the semiconductor element 7, for example, a solid-state imaging element such as CCD or CMOS can be suitably used.

  Hereinafter, an example of a method for manufacturing the semiconductor package 1 and the semiconductor device 10 will be described with reference to FIGS. 3 (a) to 3 (d).

(Semiconductor package and method of manufacturing semiconductor device)
First, as shown to Fig.3 (a), the container 2 which has the bottom part 3 and the side wall part 4 is prepared. Subsequently, as shown in FIG. 3 (b), a sealing material is printed on the upper surface 4 a of the side wall 4 of the container 2. As the sealing material, for example, a glass frit containing bismuth-based glass can be used. After printing the sealing material, it is dried and heat treated to sinter the sealing material to form a sealing material layer 6. The sealing material layer 6 may be formed on the glass lid 5 side.

  Next, as shown in FIG. 3C, the semiconductor element 7 is mounted on the bottom 3 of the container 2. In the present manufacturing method, when mounting the semiconductor element 7, a portion of the side wall 4 is present between the upper end 6 a of the sealing material layer 6 and the outer peripheral edge 7 b of the semiconductor element 7. The side wall 4 and the sealing material layer 6 are to be formed.

  Next, as shown in FIG. 3D, the glass lid 5 is disposed on the top surface 4a of the side wall 4 where the sealing material layer 6 is provided. The glass lid 5 may be disposed so as to at least partially overlap with the portion where the sealing material layer 6 is provided in a plan view. However, it is preferable to arrange the glass lid 5 so as to completely overlap with the portion where the sealing material layer 6 is provided in a plan view.

  Next, in a state where the glass lid 5 is disposed on the upper surface 4 a of the side wall portion 4 with the sealing material layer 6 interposed, the sealing material layer 6 is softened by irradiating the laser from the laser light source. The side wall 4 and the glass lid 5 are joined. Thereby, the inside of the container 2 is hermetically sealed to obtain the semiconductor package 1 and the semiconductor device 10 shown in FIG. According to this method, since only the sealing material layer 6 can be locally heated, the semiconductor package 1 can be hermetically sealed without deteriorating the semiconductor element 7 with low heat resistance. As the laser, for example, a laser having a wavelength of 600 nm to 1600 nm can be used.

  Further, at the time of the laser irradiation, first, the sealing material layer 6 is irradiated with the laser from the laser light source through the glass lid 5. At this time, the laser scans and orbits the upper surface 4 a of the frame-like side wall 4. The circulated laser irradiates to a position beyond the start point of the laser irradiation. Thereby, the container 2 is sealed. The end point of the laser may be a position beyond the start point after orbiting the laser, or may be the same position as the start point.

  In the present invention, even if the sealing material layer 6 is softened simply by heating the sealing material layer 6 without irradiating the laser, the side wall 4 of the container 2 and the glass lid 5 are bonded. Good.

  In the obtained semiconductor device 10, the sidewall 4 is provided between the upper end 6a of the sealing material layer 6 and the outer peripheral edge 7b of the semiconductor element 7 so that a part of the sidewall 4 is present. Soft errors of the semiconductor element 7 due to the ionizing action of alpha rays are unlikely to occur.

  EXAMPLES Hereinafter, the present invention will be described in more detail based on specific examples, but the present invention is not limited to the following examples at all, and the present invention is appropriately modified without changing the gist of the present invention. It is possible.

Example 1
First, a container having a bottom portion and a side wall portion and made of LTCC was prepared.

Next, a glass frit was printed on the upper surface of the side wall of the container. After printing, it was dried and heat-treated to sinter the glass frit to form a sealing material layer. In addition, as a glass frit, Bi ₂ O ₃ 39%, B ₂ O ₃ 23.7%, ZnO 14.1%, Al ₂ O ₃ 2.7%, CuO 20%, Fe ₂ O _{3 in} mol%. A glass powder having a composition of 0.5% was used.

  Next, a scintillation counter was set in a predetermined area of the inner bottom of the prepared container, specifically, an area where the upper surface of the semiconductor element is to be disposed when the semiconductor element is mounted.

  Next, a glass lid was disposed at a portion provided with the sealing material layer above the side wall portion of the container. Subsequently, the portion of the side wall portion of the container where the sealing material layer is provided is irradiated with a laser from a laser light source above the glass lid to soften the sealing material layer, and the sidewall portion of the container and the glass lid are joined. The Thereby, the inside of the container was sealed to obtain a semiconductor package.

  In Example 1, the thickness A of the sealing material layer is 5 μm, and when the semiconductor element is mounted, the upper end portion on the semiconductor element side of the sealing material layer and the upper end portion on the semiconductor element side of the side wall portion The semiconductor package was designed such that the distance B in plan view of the above was 300 μm. The difference C in height between the upper surface of the side wall and the upper surface of the semiconductor element is 400 μm, and a plan view of the upper end of the side wall on the semiconductor element side and the upper end opposite to the sealing material layer of the semiconductor element The semiconductor package was designed such that the distance D at 7200 μm was 7200 μm.

  In the obtained semiconductor package, when the semiconductor element is mounted, a part of the side wall is present between the upper end of the sealing material layer on the semiconductor element side and the outer peripheral edge of the upper surface of the semiconductor element. Side wall was provided.

(Comparative example 1)
In Comparative Example 1, the thickness A of the sealing material layer is 5 μm, and when the semiconductor element is mounted, the plane of the upper end portion of the sealing material layer on the semiconductor element side and the upper end portion of the sidewall portion on the semiconductor element side The semiconductor package was designed such that the distance B in vision was 10 μm. The difference C in height between the upper surface of the side wall and the upper surface of the semiconductor element is 400 μm, and a plan view of the upper end of the side wall on the semiconductor element side and the upper end opposite to the sealing material layer of the semiconductor element A semiconductor package was obtained in the same manner as in Example 1 except that the semiconductor package was designed such that the distance D at 7200 μm.

  In the obtained semiconductor package, when the semiconductor element is mounted, a part of the side wall is present between the upper end of the sealing material layer on the semiconductor element side and the outer peripheral edge of the upper surface of the semiconductor element. It was not.

(Evaluation)
The alpha dose was measured by a scintillation counter placed as described above.

  The value of α dose shown below was calculated by dividing the count number measured for 24 hours by the above method (scintillation counter) by time and the area of the semiconductor element mounting surface.

In Example 1, the alpha dose incident on the scintillation counter was 0.00 cph / cm ² . On the other hand, in Comparative Example 1, the α dose incident on the scintillation counter was 2.80 cph / cm ² .

DESCRIPTION OF SYMBOLS 1 semiconductor package 2 container 3 bottom 4 side wall 4a, 7a top 4b 6a, 7c top 5 glass lid 6 sealing material layer 6 side 7 semiconductor element 7b peripheral edge 10 Semiconductor device

Claims (6)

A semiconductor package for mounting and sealing a semiconductor element,
A container having a bottom on which the semiconductor element is mounted and a frame-like side wall disposed on the bottom;
A glass lid, disposed above the sidewall of the container, for sealing the interior of the container;
A sealing material layer disposed between the side wall of the container and the glass lid;
Equipped with
The semiconductor package, wherein the side wall portion is provided so that a part of the side wall portion is present between an upper end portion on the semiconductor element side of the sealing material layer and an outer peripheral edge of the upper surface of the semiconductor element. The ratio A when the thickness of the sealing material layer is A, and the distance in plan view between the upper end of the sealing material layer on the side of the semiconductor element and the upper end of the side wall on the side of the semiconductor element is B / B and
A difference in height between the upper surface of the side wall portion and the upper surface of the semiconductor element is C, and the upper end portion of the side wall portion on the semiconductor element side and the upper end portion on the opposite side of the sealing material layer of the semiconductor element Ratio C / D when distance in planar view of is D,
The semiconductor package according to claim 1, wherein A / B <C / D is satisfied.   The semiconductor package according to claim 1, wherein the sealing material layer is made of glass frit.   The semiconductor package according to any one of claims 1 to 3, wherein the glass frit comprises bismuth-based glass. The semiconductor package according to any one of claims 1 to 4.
A semiconductor element housed inside the semiconductor package;
A semiconductor device comprising:   The semiconductor device according to claim 5, wherein the semiconductor element is a solid-state imaging element.

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