JP2018148595A - Multilevel power conversion device and control method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent occurence of a voltage change of two levels or more with line-to-line voltage upon switch control for controlling charging/discharging of a flying capacitor in a multilevel power conversion device sharing the flying capacitor by a plurality of phases.SOLUTION: When two or more phases for outputting potential using a flying capacitor Cexist, and switching of a switch group for controlling current polarity flowing in the flying capacitor Cis required, the potential of the phase for outputting the potential using the flying capacitor Cis changed to potential which does not use the flying capacitor Cwith one level difference with the potential. In all the phases for changing the potential, the polarity for changing the potential is made the same. A charging/discharging pattern for inverting the current polarity flowing in the flying capacitor Cis switched. Lastly, the potential of each phase is returned to the original potential.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a flying capacitor type multi-level converter, and more particularly to control of a switch accompanying charge / discharge control of a flying capacitor.

  In the voltage type DC / AC power converter (inverter), the output voltage level is 3 levels for the purpose of high voltage, large capacity, high quality, low loss and downsizing of the AC output. Various multi-level inverter circuits to be increased are disclosed.

  Patent Document 1 discloses a circuit constituted by a capacitor and a switching device connected to both ends of the capacitor with respect to a DC voltage source. By switching on and off the switching device in the current path between the DC voltage source and the AC output terminal, the capacitor is connected in series to or disconnected from the DC voltage source, and the connection direction of the capacitor is switched.

  As a result, in addition to the potentials at both ends of the DC voltage source, it is possible to output to the AC output terminal a potential obtained by adding or subtracting an arbitrary number of voltages from the plurality of capacitors. Generally, this capacitor is called a flying capacitor, and such a power converter is called a flying capacitor type multi-level power converter.

  Patent Document 2 discloses a flying capacitor type multi-level power converter configured to share a flying capacitor in a plurality of AC output phases. In Patent Document 1, an independent flying capacitor is provided for each AC output phase. For example, in the case of a three-phase flying capacitor type three-level power conversion circuit, three flying capacitors are required for one DC voltage source.

  In Patent Document 2, the flying capacitor is configured to be used jointly in a plurality of output phases. For example, in the case of a three-level power conversion circuit, one flying capacitor is sufficient for one DC voltage source regardless of the number of output phases. In the case of a 5-level power conversion circuit, two flying capacitors are sufficient for two DC voltage sources (divided by two), regardless of the number of output phases.

  As a result, the number and capacity of flying capacitors necessary for configuring the multilevel power conversion circuit can be reduced.

  It is assumed that the voltage across the flying capacitor in the flying capacitor multilevel power converter is maintained at a specified voltage in order to realize a desired voltage output by pulse width modulation (PWM). For example, it is maintained at 1/2, 1/4, etc. of the DC link voltage.

  Also, the voltage across the flying capacitor is not normally controlled by power supply / consumption from the outside, but is charged / discharged and fluctuated by the current flowing by using the flying capacitor. Therefore, in order to maintain the voltage across the flying capacitor at a specified voltage, it is necessary to control the current flowing through the flying capacitor to a specified voltage by arbitrarily controlling the current.

FIG. 19 is an example of a three-level multilevel power conversion circuit in Patent Document 1. If the magnitude of the voltage V _DC of the DC voltage source was set to E, by controlling the voltage of the flying capacitor C _FC to E / 2, a three-level voltage can be output. Here, the output voltage V _OUT is E / 2, 0, −E / 2. In FIG. 19, for convenience in determining the reference potential, the capacitor constituting the DC voltage source is divided into C _DC1 and C _DC2 , and the voltage E is divided into E / 2 at the same time. A common connection point between C _DC1 and C _DC2 is set as a reference potential point.

The switching pattern in which a current flows through the flying capacitor C _FC includes the second and fourth switching patterns when the first and third switching devices S ₁ and S ₃ are on and the second and fourth switching devices S ₂ and S ₄ are off. There are times when the switching devices S ₂ and S ₄ are on and the first and third switching devices S ₁ and S ₃ are off.

Assuming that the voltage of the flying capacitor C _FC is E / 2, in both cases, the output voltage V _OUT output to the AC output terminal is zero. Therefore, there are two types of switching patterns for outputting a voltage of 0.

When the AC output current I _OUT flows from the DC side to the AC terminal side as shown in FIG. 19, the first and third switching devices S ₁ and S ₃ are on, and the second and fourth switching devices S When _2, S ₄ selects the switching pattern of off, current flows in a direction that flying capacitor C _FC charges. On the other hand, when a switching pattern in which the second and fourth switching devices S ₂ and S ₄ are on and the first and third switching devices S ₁ and S ₃ are off is selected, a current flows in a direction in which the flying capacitor C _FC is discharged. It will be.

Therefore, in the period for outputting 0 to the output voltage, by selecting the two switching patterns in appropriate proportions, it can be controlled charging and discharging the flying capacitor C _FC. For example, when the direction of the output current I _OUT can be detected, charging / discharging of the flying capacitor C _FC can be arbitrarily controlled by selecting an appropriate switching pattern by switching control.

The basic method of the above flying capacitor circuit characteristics, and the voltage control is the same for the circuit method of sharing flying capacitor C _FC at multiple power phases disclosed in Patent Document 2. Figure 20 shows a basic circuit included in the multi-level power converter disclosed in the embodiments 14 to 17 of Patent Document 2 will be described voltage control of the flying capacitor C _FC contained therein.

As in FIG. 19, the first to fourth switching devices S _{1 to} S ₄ and the flying capacitor type multi-level power conversion circuit configured by the flying capacitor C _FC are connected in parallel to the DC voltage source. When the voltage V _DC of the DC voltage source is E, the voltage V _FC of the flying capacitor C _FC is controlled to E / 2, so that a voltage of 0 can be output to the terminal P ₂ .

Unlike the case of FIG. 19, the potential of the terminal P ₂ output from the intermediate point between the _second and third switching devices S ₂ and S ₃ is always controlled to zero. Accordingly, the first to fourth switching devices S _{1 to} S ₄ do not turn on the _first and second switching devices S ₁ and S ₂ and the third and fourth switching devices S ₃ and S ₄ at the same time. 1, the third switching devices S ₁ , S ₃ are on, the second, fourth switching devices S ₂ , S ₄ are off, or the second, fourth switching devices S ₂ , S ₄ are on, the first , Only the pattern of turning off the third switching devices S ₁ and S ₃ is selected.

The output of each phase is the potential V _{1 at} the positive terminal P ₁ of the DC voltage source = + E / 2, the potential V _{3 at} the negative terminal P ₃ of the DC voltage source = −E / 2, the potential V ₂ = 0 at the terminal P _2. These three potentials are input, and one potential is selected from the three potentials by the voltage selection circuits 1 and 2, thereby outputting a multi-level (three-level) voltage.

FIG. 20 shows an example in which there are two phases of output. Two outputs of the output potential V _OUT1 are obtained by the voltage selection circuit 1 and the output potential V _OUT2 is obtained by the voltage selection circuit 2.

  The following explanation is based on the same principle even when the output is three or more phases. However, for the sake of simplicity, explanation will be made with two phases as shown in FIG.

Voltage of the flying capacitor C _FC, like the case of FIG. 19, varies with the current flowing through the flying capacitor C _FC. Current I _FC that flows through the flying capacitor C _FC, the current flowing in terminal P _2, determined by the switching pattern of the first to fourth switching devices S ₁ to S _4, the current flowing through the terminal P ₂ is the terminal P ₂ potential Is determined by the total output current of the selected output phase.

The polarity of the current I _FC flowing through the flying capacitor C _FC and the output currents I _OUT1 and I _OUT2 is positive in the direction of the arrow in FIG. At that time, for example, the first and third switching devices S ₁ and S ₃ are on, the second and fourth switching devices S ₂ and S ₄ are off, the voltage selection circuit 1 is a terminal P ₂ , and the voltage selection circuit 2 is a terminal. If you selected the non-P _2, the I _FC = I _OUT1.

When the second and fourth switching devices S ₂ and S ₄ are on, the first and third switching devices S ₁ and S ₃ are off, and the voltage selection circuits 1 and 2 are in the same situation as above, I _FC = −I _OUT1 . Furthermore, the first and third switching devices S ₁ and S ₃ are on, the second and fourth switching devices S ₂ and S ₄ are off, and both the voltage selection circuit 1 and the voltage selection circuit 2 select the terminal P ₂ . In this case, I _FC = I _OUT1 + I _OUT2 .

If both the voltage selection circuits 1 and ₂ have selected other than the terminal P ₂ , naturally, I _FC = 0 and no voltage fluctuation occurs. From the above, the current flowing through the terminal P ₂ (polarity), the first to fourth pattern switching device S ₁ to S _4, or flying capacitor C _FC discharges or charges is determined.

Therefore, based on the selection status of the output current information and voltage selection circuits 1 and 2 obtained by such detection or estimation, the voltage information of the flying capacitor C _FC, by estimating the current flowing through the terminal P2, the first to The switching pattern of the four switching devices S _{1 to} S ₄ can be determined, and the voltage control of the flying capacitor C _FC can be performed.

Patent 3301761 JP 2015-47056 A

  The flying capacitor type multi-level power converter switches the charging / discharging state of the flying capacitor by controlling two switching patterns in which a current flows through the flying capacitor among the switching devices attached to the flying capacitor, The voltage is controlled to an arbitrary magnitude.

These two switching patterns have the same output potential no matter which one is selected, assuming that the voltage of the flying capacitor is at a specified value. 19, and if the potential of the flying capacitor C _FC is + E / 2, the first, third switching device S _1, S ₃ is turned on, the second, the fourth switching device S _2, S ₄ is off patterns, The output potential V _OUT becomes 0 regardless of which of the patterns in which the second and fourth switching devices S ₂ and S ₄ are on and the first and third switching devices S ₁ and S ₃ are off.

A problem at the time of switching between charge and discharge in a general flying capacitor type multi-level power converter as seen in Patent Document 1 will be considered. In FIG. 19, the first and third switching devices S ₁ and S ₃ are turned on, the second and fourth switching devices S ₂ and S ₄ are turned off, and a switching pattern in which a current flows through the flying capacitor C _FC is selected. And

From this state, switches the second, the fourth switching device S _2, S ₄ on, first, the switching pattern in which a current flows in the third switching device S _1, another of the flying capacitor to the S ₃ Off C _FC In this case, it is necessary to temporarily turn off all the first to fourth switching devices S _{1 to} S _{4 in} order to prevent a short circuit between the DC voltage source and the flying capacitor.

At that time, the path of the output current is from the path flowing through the flying capacitor C _FC to the switch (IGBT or the like) of the first and second switching devices S ₁ and S ₂ or the third and fourth switching devices S ₃ and S _4. It switches to the path which flows through the diode connected in antiparallel.

Therefore, the output potential V _OUT becomes + E / 2 or −E / 2 according to the direction of the output current I _OUT . Such an unintended change in the output potential causes an error in the output potential V _OUT with respect to the command value and a switching loss due to commutation.

  In addition, in the case where an inverter is configured with a plurality of phases (for example, single phase (two phases) or three phases), the potential change due to PWM of another phase overlaps with the timing of this unintended potential change. The line voltage output between the two phases may change by two levels simultaneously or in a very short time.

  When the potential change of the line voltage doubles the normal, the rate of change of the potential also doubles, and the load changes more than usual due to the potential change rate and a large surge voltage, depending on the type of load. Adverse effects may occur.

  For example, when the load is a motor, insulation may be reduced by applying a voltage larger than usual between the motor terminals and the motor windings, resulting in a reduction in life. In addition, problems such as an increase in noise accompanying a voltage change and an increase in loss occur.

To prevent such unintentional potential changes, the control of switching between charge and discharge pattern directly prohibited, after once changed to another potential, such as by pulse width modulation, the potential output through again flying capacitor C _FC A method of switching at the timing of switching is generally used.

An example is shown in FIG. This is PWM control that generates a three-level voltage output command by comparing two carrier signals (carrier signal carry1, carrier signal carry2) having the same phase and different offsets with the voltage command. Consider applying this to the circuit of FIG. The output potential is controlled as follows according to the relationship between the voltage command and the carrier signals carry1 and carry2.
Voltage command ≧ carry1: V _OUT = + E / 2
carry1> voltage command ≧ carry2: V _OUT = 0
carry2> Voltage command: V _OUT = −E / 2
When the output potential V _OUT = 0, output is performed using the flying capacitor C _FC . At this time, there are two switching patterns as described above. As shown in FIG. 21, the two patterns are alternately switched every time the output potential V _OUT = 0 while performing the PWM control.

Alternatively, these two patterns are selected at the timing when the output potential V _OUT = 0 so that the voltage of the flying capacitor C _FC becomes an optimum value while observing the voltage of the flying capacitor C _FC and the polarity of the output current.

In this way, while an output potential V _OUT = 0, that is, without switching the charge and discharge pattern in the output using a flying capacitor C _FC, it is possible to control the voltage of the flying capacitor C _FC.

  On the other hand, the same problem occurs in a multilevel power conversion device that shares a flying capacitor in a plurality of phases as in Patent Document 2 (particularly, Embodiments 14 to 17). FIG. 22 shows a circuit example of a common flying capacitor system.

In FIG. 22, the first phase in FIG. 20 is the X phase, the second phase is the Y phase, and the voltage selection circuits 1 and 2 are composed of a T-type three-level circuit using three switches. Yes. The third switches S _X3 and S _Y3 in the voltage selection circuits 1 and 2 for controlling the connection to the terminal P ₂ are two series switches S _X3A and S _X3B and the third S _Y3A and S _Y3B in anti-series. The reverse blocking switch is configured by connecting to. The load is an inductive load as an example.

23 shows in potential output using the flying capacitor C _FC, the state of charge and discharge pattern switching flying capacitor. FIG. 24 shows the switching devices, the ON / OFF signals of the switches, the X-phase and Y-phase output potentials V _{OUT_X} and V _{OUT_Y} , and the line voltage V _{OUT_XY} between the X and Y phases. In FIG. 23, the switching devices and switches surrounded by circles are in an on state, and the dotted line switching devices and switches are in an off state.

In the initial state t _0, determines the charge and discharge characteristics of the flying capacitor C _FC (Flying controlling the charging and discharging current polarity of the capacitor C _FC) first to fourth state of the switching device S ₁ to S ₄ (charge-discharge pattern) The first and third switching devices S ₁ and S ₃ are on, and the second and fourth switching devices S ₂ and S ₄ are off.

In the voltage selection circuits 1 and 2, the first and second switches S _X1 and S _X2 are off in the X phase, the third switch S _X3 (S _X3A and S _X3B ) is on, and the first and second switches in the Y phase are the first and first switches. 2S _Y1 and S _Y2 are off, and the third switch S _Y3 (S _Y3A and S _Y3B ) is on. This X-phase, a state where both Y phase and outputs the potential of the terminal P _2, i.e., a state in which the output voltage by using a flying capacitor C _FC.

The X-phase output current flows from the DC side to the AC side (I _{OUT_X} > 0), and the Y-phase output current flows from the AC side to the DC side (I _{OUT_Y} <0). In order to switch the charge / discharge characteristics of the flying capacitor C _FC , when switching the first and third switching devices S ₁ and S ₃ from on to off and the second and fourth switching devices S ₂ and S ₄ from off to on, direct current to prevent shorting of the voltage source and the flying capacitor C _FC, temporarily to the first to fourth off all the switching devices S ₁ to S ₄ (time t _1).

At this time, the output current I _{OUT_X} the X phase which has been flowing in the flying capacitor C _FC, to route to the flying capacitor C _FC to the DC voltage source ahead is blocked, the negative terminal P ₃ of the DC voltage source , And commutates to a path that flows through the diode of the second switch S _X2 . Accordingly, the X-phase output potential V _{OUT —} X changes from 0 to −E / 2.

Similarly, the Y-phase output current I _{OUT_Y} is commutated from the positive terminal P ₁ of the DC voltage source to the current path flowing through the diode of the first switch S _Y1 , and the Y-phase output potential V _{OUT_Y} is changed from 0 to + E / 2. To change. At this time, the line voltage V _{OUT_XY} changes from 0 to −E by two levels.

When the second and fourth switching devices S ₂ and S ₄ are turned on at time t ₂ , the current path to the flying capacitor C _FC is restored, so both the X phase and the Y phase return to the original current path, and the X phase the output potential V _{OUT_X} = 0, Y output potential V _{Out_Y} = 0 in phase.

At this time, the line voltage V _{OUT — XY} returns from −E to 0, and a voltage change of two levels occurs again. As described above, in the circuit share the flying capacitor C _FC in multiple phases, in the voltage output using a flying capacitor C _FC, switching of the charging and discharging pattern for controlling the charging and discharging the flying capacitor C _FC When this is performed, an unintended change in the output potential occurs as in a general flying capacitor multilevel power converter.

In addition, when a plurality of output phases is performing a voltage output using a flying capacitor C _FC, depending on the current polarity of the output phase voltage change 2-level is generated line voltage.

To prevent this unintentional potential changes, consider applying the general solution techniques on conventional flying capacitor type multilevel power converting apparatus that does not share the flying capacitor C _FC.

That is, in the voltage output using a flying capacitor C _FC without switching the charging and discharging pattern, when the change from the potential not using flying capacitor C _FC to the potential to use the flying capacitor C _FC, to select a pattern Consider applying the method.

Figure 25 is an example of the PWM pattern of the multi-level power converter share the flying capacitor C _FC in 2 phases shown in Figure 22. The X-phase voltage command and the Y-phase voltage command are compared with the two carrier signals carry1 and carry2, and the respective output potentials are determined. The relationship is the same as described in FIG.

When the potential of the X phase is _{switched from the} potential not using the flying capacitor C _FC (V _OUT — _X = + E / 2 or −E / 2) to the potential using the flying capacitor C _FC (V _{OUT —X} = 0), When the switching patterns (charge / discharge patterns) of the four switching devices S _{1 to} S ₄ are selected and determined, for example, as shown in FIG. 25, the first and third switching devices S ₁ , S _{3 in} the period from time t ₁ to time t _4. Is turned on, the second and fourth switching devices S ₂ and S ₄ are turned off, and during the period from time t ₅ to time t ₈ , the second and fourth switching devices S ₂ and S ₄ are turned on. By turning on the switching devices S ₁ and S ₃ , charge / discharge pattern switching can be performed.

However, the problem here is the output potential of the Y phase. In the X phase is a period of time t ₅ from the time t ₄ when outputs a potential not using flying capacitor C _FC, Y phase became period (V _{OUT_Y} = 0) and for outputting by using a flying capacitor C _FC ing.

Instant time t _5, when performing the switching of the switching patterns consisting of first to fourth switching devices S ₁ to S _4, Y-phase output is temporarily cut off the current path to the flying capacitor C _FC is, V _{Out_Y} = From 0, the potential is switched to a potential of + E / 2 or -E / 2. That is, the potential variation does not occur in the X phase, but the potential variation described in FIG. 23 occurs in the Y phase. As a result, voltage fluctuations of two levels may occur in the XY line voltage due to the potential fluctuation and the X-phase potential fluctuation.

  In the case of a system with three or more phases, two-level voltage fluctuations may occur in the line voltage with the other phases due to normal PWM control of other phases and unintended potential fluctuations of the Y phase. .

  Therefore, the conventional two-level change prevention measure in the flying capacitor type multi-level power conversion device in which the flying capacitors exist independently for each phase is a flying capacitor type multi-level power in which the flying capacitor is shared by each phase (each voltage selection circuit). It cannot be applied to a conversion device.

  As described above, in a multi-level power conversion device that shares a flying capacitor in a plurality of phases, when performing switch control for controlling charging / discharging of the flying capacitor, the line voltage exceeds two levels. It is a problem to prevent the voltage change from occurring.

  The present invention has been devised in view of the above-described conventional problems. One aspect of the present invention is that each phase common first serially connected in series between the positive electrode end and the negative electrode end of the DC voltage source common to each phase. 1 to 4 switching devices, and common flying capacitors connected between common connection points of the first and second switching devices and common connection points of the third and fourth switching devices. A common module; a positive terminal of the DC voltage source; a common connection point of the second and third switching devices; a switch between the negative terminal of the DC voltage source and the output terminal; A voltage selection circuit for each phase that selects one of the common connection point of the second and third switching devices and the negative terminal of the DC voltage source to establish a connection state with the output terminal. In addition, the number of phases is 2 or more A method for controlling a level power converter, wherein the first and third switching devices are turned on, the second and fourth switching devices are turned off, the first and third switching devices are turned off, and the second , All the voltage selection circuits of the phase in which the voltage selection circuit control unit selects the common connection point of the second and third switching devices before the state transition between the ON state of the fourth switching device and the fourth switching device. A first step of changing to the positive terminal of the DC voltage source or all the negative terminal of the DC voltage source, and the charge / discharge control unit turns on the first and third switching devices, and the second and fourth switching devices. A second step of performing a state transition between an off state of the device, an off state of the first and third switching devices, and an on state of the second and fourth switching devices. The voltage selection circuit control unit, after the second step, the voltage selection circuit of the phase in which the positive terminal of the DC voltage source or the negative terminal of the DC voltage source is selected in the first step, , And a third step of changing to a common connection point of the third switching device.

  Further, as another aspect, the first to fourth switching devices common to each phase sequentially connected in series between the positive electrode end and the negative electrode end of the DC voltage source common to each phase, and the first and second switching devices A common module having a common connection point between each of the third and fourth switching devices, and a common module having a flying capacitor common to each phase, and a positive terminal of the DC voltage source, A common connection point of the third switching device; a switch between a negative electrode end of the DC voltage source and an output terminal; a positive electrode end of the DC voltage source; a common connection point of the second and third switching devices; A control method for a multilevel power conversion device having two or more phases, comprising: a voltage selection circuit for each phase that selects any one of negative electrode ends of a DC voltage source and establishes a connection state between the DC voltage source and an output terminal. And before The first and third switching devices are turned on, the second and fourth switching devices are turned off, the first and third switching devices are turned off, and the second and fourth switching devices are turned on. Before the state transition between them, the voltage selection circuit control unit selects the voltage selection circuit of the phase in which the common connection point of the second and third switching devices is selected as the positive terminal of the DC voltage source or the DC voltage source. A first step of changing the negative electrode end of each phase at a constant time interval, and a state in which the charge / discharge control unit turns on the first and third switching devices, and turns off the second and fourth switching devices, A second step of performing a state transition between the first and third switching devices being turned off and the second and fourth switching devices being turned on; and the voltage selection circuit control unit After the second step, a phase voltage selection circuit in which the positive terminal of the DC voltage source or the negative terminal of the DC voltage source is selected in the first step is connected to the common connection of the second and third switching devices. And a third step of changing each point with a constant time interval for each phase.

  Further, as one aspect thereof, the multilevel power conversion device includes N (N = 2 or greater integer) common modules, and the DC voltage of the K (integer from 1 to N−1) th common module. A negative terminal of the source and a positive terminal of the DC voltage source of the K + 1th common module, a fourth switching device of the Kth common module, and a first switching device of the K + 1th common module, The voltage selection circuit is commonly connected to the negative terminal of the direct current voltage source of the Kth common module and the positive terminal of the direct current voltage source of the (K + 1) th common module.

  According to the present invention, in a multi-level power conversion device that shares a flying capacitor in a plurality of phases, when performing switch control for controlling charging / discharging of the flying capacitor, a voltage change of two or more levels in line voltage Can be prevented from occurring.

3 is a time chart showing a switching pattern, an output potential, and a line voltage in the first embodiment. The figure which shows the switching device of each control step in Embodiment 1, the on-off state of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 1, the on-off state of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 1, the on-off state of a switch, and the state of an electric current. FIG. 3 is a diagram illustrating a control configuration in the first embodiment. The figure which shows an example of 5 level power converter device. 3 is a time chart showing a switching pattern, an output potential, and a line voltage in the first embodiment. The figure which shows the switching device of each control step in Embodiment 1, the on-off state of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 1, the on-off state of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 1, the on-off state of a switch, and the state of an electric current. 4 is a time chart showing a switching pattern, an output potential, and a line voltage in Embodiment 2. The figure which shows the switching device of each control step in Embodiment 2, the state of ON / OFF of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 2, the state of ON / OFF of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 2, the state of ON / OFF of a switch, and the state of an electric current. 4 is a time chart showing a switching pattern, an output potential, and a line voltage in Embodiment 2. The figure which shows the switching device of each control step in Embodiment 2, the state of ON / OFF of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 2, the state of ON / OFF of a switch, and the state of an electric current. The figure which shows the switching device of each control step in Embodiment 2, the state of ON / OFF of a switch, and the state of an electric current. The figure which shows an example of the conventional multilevel power converter device. The figure which shows the other example of the conventional multilevel power converter device. The time chart which shows an example of the conventional PWM control. The figure which shows the multilevel power converter device of a flying capacitor common system. The figure which shows the switching device of the multilevel power converter device of a flying capacitor common system, the on-off state of a switch, and the state of an electric current. The time chart which shows a switching pattern, an output potential, and a line voltage. The time chart which shows an example of the conventional PWM control.

[Embodiment 1]
In the first embodiment, the multilevel power conversion device shown in FIG. 22 is controlled. As shown in FIG. 22, the DC voltage source is composed of capacitors C _DC1 and C _DC2 connected in series. The first to fourth switching devices S _{1 to} S ₄ are sequentially connected in series between the positive end of the capacitor C _DC1 and the negative end of the capacitor C _DC2 . A flying capacitor C _FC is connected between the common connection point of the first and second switching devices S ₁ and S _{2 and} the common connection point of the third and fourth switching devices S ₃ and S ₄ .

Here, the DC voltage sources (capacitors C _DC1 and C _DC2 ), the first to fourth switching devices S _{1 to} S _4, and the flying capacitor C _FC constitute a common module common to each phase.

Voltage selection circuits 1 and 2 having switches are provided between the positive terminal of the capacitor C _DC1 , the second and third switching devices S ₂ and S ₃ , the negative terminal of the capacitor C _DC2 , and the output terminals X and Y. It is done.

In the voltage selection circuit 1, _first and second switches S _X1 and S _X2 are sequentially connected in series between the positive terminal P 1 of the capacitor C _DC1 and the negative terminal P ₃ of the capacitor C _DC2 . The third switch S _X3 is connected between the common connection point (terminal P ₂ ) of the second and third switching devices S ₂ and S _{3 and} the common connection point of the first and second switches S _X1 and S _X2. . The third switch S _X3 is configured by connecting the switch S _X3A and the switch S _X3B in reverse series. The same applies to the voltage selection circuit 2.

In Embodiment 1, there phases for outputting the potential to use the flying capacitor C _FC is two or more, the following procedure when it is necessary to switch the switches to control the current polarity flowing in the flying capacitor C _FC The switching operation is performed.
(1) the potential of the phase that outputs the potential to use the flying capacitor C _FC, to change simultaneously to the potential and does not use the potential of the flying capacitor C _FC 1 level difference. At this time, the polarity for changing the potential is the same in all phases where the potential is changed.
(2) Switching of the charge / discharge pattern that reverses the polarity of the current flowing through the flying capacitor C _FC .
(3) Return the potential of each phase to the original potential.

  The switching of the potential is performed in the same procedure as a normal potential change by PWM control or the like. For example, insertion of a dead time for preventing a switch short circuit is performed as usual.

  In addition, each operation waits appropriately so that the fluctuation of the output line voltage does not change by two levels, and the ON / OFF operation of each switching device and switch is surely completed and no short circuit occurs. Set the time.

  Conversely, no waiting time is required where the above two-level change or short circuit does not occur. These standby times can be set in advance from the use of the circuit, circuit configuration, circuit parts, and the like, and it is not necessary to sequentially review these settings during the control.

For simplicity of control, when the phase of outputting the potential to use the flying capacitor C _FC does not exist two or more, may also apply the above procedure (1) to (3). However, there is a possibility that the time required for switching slightly increases as compared with the case where it is not applied.

Embodiment 14 to 17 of Patent Document 2 a plurality of flying capacitors formula multilevel power conversion circuit, as seen in connecting a plurality of stages in series (Example 10 as a), a multi-level circuit having a plurality of flying capacitor C _FC The configuration is controlled as follows. When simultaneously switching the charging / discharging patterns of a plurality of flying capacitors C _FC , according to the above steps (1) to (3), all the output phases using the flying capacitors C _FC to be switched are charged / discharged patterns. changing the potential that does not use temporarily flying capacitor C _FC potential. Moreover performs switching between charging and discharging pattern, it performs the operations of returning the potential to utilize the subsequent original flying capacitor C _FC. At this time, the flying capacitor C _FC is similar to the case of one, the potential polarity to temporarily change the same polarity.

  The operation and action when the control procedure of the first embodiment is applied to the circuit of FIG. 22 will be described.

FIG. 1 shows a switching pattern (on / off signal of each switching device and each switch) to which a control procedure is applied, and X-phase and Y-phase output potentials V _{OUT_X} and V _{OUT_Y} and XY line voltage V _{OUT_XY} at that time. Yes. 2 to 4 are schematic diagrams showing switching devices, switch on / off states, and current states in each control step.

As with the initial state t ₀ is 24, determining the charge and discharge characteristics of the flying capacitor C _FC (control the charging and discharging current polarity of the flying capacitor C _FC) first to fourth state of the switching device S ₁ to S ₄ (charge In the discharge pattern), the first and third switching devices S ₁ and S ₃ are on, and the second and fourth switching devices S ₂ and S ₄ are off. In the voltage selection circuits 1 and 2, the first and second switches S _X1 and S _X2 are OFF in the X phase, the third switch S _X3 (S _X3A and S _X3B ) is ON, and the first and second switches in the Y phase are the first and second. The switches S _Y1 and S _Y2 are off, and the third switch S _Y3 (S _Y3A , S _Y3B ) is on.

This X-phase, a state where both Y phase and outputs the potential of the terminal P _2, i.e., a state in which the output voltage by using a flying capacitor C _FC. The X-phase output current flows from the DC side to the AC side (I _{OUT_X} > 0), and the Y-phase output current flows from the AC side to the DC side (I _{OUT_Y} <0).

Procedure (1) is started from this state. That, X-phase, Y phase of the output potential V _{OUT_X,} changing a potential that does not use V _{Out_Y} from the potential to use the flying capacitor. X-phase, the output potential of the Y-phase is the V _{OUT_X} = V _{OUT_Y} = 0, the potential not using flying capacitor C _FC 1 level difference becomes + E / 2 or -E / 2. Either one of the voltages may be selected. In this example, + E / 2 is selected.

First, at time t _A , the third switches S _X3A and S _Y3A on the terminal P ₂ side of each phase are turned off. Thus is cut off the current path to the flying capacitor C _FC of Y phase, for commutation in antiparallel diode of the first switch S _Y1, Y phase of the output voltage V _{Out_Y} = + a E / 2.

Next, at time t _B , the first switches S _X1 and S _Y1 are turned on. As a result, the current path between the positive terminal of the DC voltage source and the X-phase output is released, and the current is commutated there. Therefore, the X-phase output potential V _OUT — X = + E / 2.

Thereafter, at time t _C , the third switches S _X3B and S _Y3B on the output terminal side of each phase are turned off, the third switches S _X3 and _SY3 are completely cut off, and the potential change (and commutation) is completed. . The line voltage at this time _changes from V _OUT — _XY = ₀ in the initial state t ₀ to −E / 2 at time t _{A and} to 0 again at time t _B. The change in the line voltage V _{OUT_XY} is one level at a time, and the two-level potential change is prevented.

The time intervals from the time t _A to the time t _B and from the time t _B to the time t _C may be equivalent to the dead time for preventing a short circuit of the DC voltage source of the inverter as in the case of a normal potential change.

Next, procedure (2) is started. At time t _D , the first and third switching devices S ₁ and S ₃ are turned off and the flying capacitor C _FC is shut off. Next, at time t _E , the second and fourth switching devices S ₂ and S ₄ are turned on to complete the switching of the charge / discharge pattern.

The interval from time t _C to time t _D is the commutation completion time assumed when the current switches from the path (potential) using the flying capacitor C _FC to the path (potential) not using at time t _C. desirable.

Further, it is desirable that the interval from time t _D to time t _E is ensured only for the time when the switch operation of the _first to fourth switching devices S _{1 to} S ₄ is reliably completed. During switching operation of the charging and discharging pattern of the flying capacitor C _FC, the voltage change of the potential and line-to-line phase does not occur. For this reason, the two-level potential change that has conventionally occurred is not generated.

Finally, the procedure (3) is started. Contrary to the procedure (1), the third switch S _X3B of each phase of the output terminal side at time t _F, S _Y3B turned on, the first switch S _X1, S _Y1 off at time t _G, the time t _H Then, the third switches S _X3A and S _X3B on the terminal P ₂ side of each phase are turned on. At this time, the phase potential change and the line voltage change have the same voltage as in the procedure (1) but reverse waveforms in time series. Therefore, a two-level change in the line voltage V _OUT — XY between the XY phases does not occur.

FIG. 5 is a control configuration (a configuration for generating a gate signal for turning on and off each switching device and each switch) for realizing the first embodiment in the circuit configuration of FIG. This control configuration includes a charge / discharge control unit 3 (gate signal generation units of the _first to fourth switching devices S _{1 to} S ₄ ) and a voltage selection circuit control unit 4 (first to third switches S _X1 and S _X2. , S _X3 , S _Y1 , S _Y2 , S _Y3 gate signal generation unit).

  Further, the voltage selection circuit control unit 4 includes a voltage command / carrier signal comparison unit 5 and a gate signal correction unit 6.

  The voltage command / carrier signal comparison unit 5 generates a gate signal before correction in accordance with Tables 1 and 2 and outputs it to the gate signal correction unit 6.

The gate signal correction unit 6 uses the charge / discharge switching timing signal described later as a trigger to correct the gate signal of each switch during the period from time t _A to time t _H in FIG. 1 with respect to the input gate signal before correction. The corrected gate signal is output to each switch.

The voltage command / carrier signal comparison unit 5 transmits a charge / discharge switching timing signal to the charge / discharge control unit 3 and the gate signal correction unit 6 based on each voltage command and the carrier signals carry1 and carry2. In FIG. 25, this signal is transmitted at timings t ₁ and t _{5 when} the difference between the carrier signal carry1 and the X-phase voltage command is switched from negative to positive.

The charge / discharge control unit 3 that has received this signal provides a predetermined delay time (corresponding to the period from time t _A to time t _D, t _E in FIG. 1), and the first to fourth switching devices S _1. ˜S ₄ gate signal is switched and output to each switching device.

In FIG. 1, the first and third switching devices S ₁ and S ₃ are switched from on to off at time t _D. Further, the second and fourth switching devices S ₂ and S ₄ are switched from OFF to ON at the timing at time t _E.

  In the prior art, the voltage selection circuit control unit 4 has no gate signal correction unit 6. The feature of the first embodiment is that the gate signal correction unit 6 is provided in the voltage selection circuit control unit 4.

As described above, the voltage utilizing flying capacitor C _FC, intentionally changed temporarily does not utilize the flying capacitor C _FC potential, by then switching the charging and discharging pattern of flying capacitor C _FC, pattern switching It is possible to prevent unintended potential fluctuations accompanying the polarity of the output current.

  As a result, it is possible to prevent two-level simultaneous changes in the line voltage caused by unintended potential fluctuations. By making the polarity of the potential to be temporarily changed the same in all related phases, it is possible to prevent a two-level change in the line voltage that may occur due to the potential change.

  In the example, the number of output phases is two, but the same effect can be obtained by the same control even when there are three or more phases. In the example, a T-type three-level circuit is applied to the voltage selection circuits 1 and 2, but the same effect can be obtained in another circuit configuration such as an NPC type including a switch and a diode.

  The operation and action when a plurality of flying capacitor type multilevel power conversion circuits are connected in series in a plurality of stages to form a multilevel circuit having a plurality of flying capacitors will be described by way of example.

  This multi-level power converter includes N common modules (N is an integer equal to or larger than 2; the uppermost common module is 1, and the lowermost common module is N). The negative terminal of the DC voltage source of the K (integer from 1 to N−1) th common module and the positive terminal of the DC voltage source of the K + 1th common module are connected. The fourth switching device of the Kth common module is connected to the first switching device of the K + 1th common module. The voltage selection circuit is commonly connected to the negative terminal of the DC voltage source of the Kth common module and the positive terminal of the DC voltage source of the K + 1th common module.

  FIG. 6 shows Embodiment 15 of Patent Document 2 as a typical circuit. Two three-level multi-level power converters composed of flying capacitors and four switching devices are connected in series to form a five-level DC voltage source.

Specifically, the DC voltage source is composed of capacitors C _DC1 and C _DC2 . (C _DC1 corresponds to the capacitor of the Kth common module, and C _DC2 corresponds to the capacitor of the K + 1th common module.) Between the positive terminal and the negative terminal of the capacitor C _DC1 , the first to fourth switching devices S are provided. ₁ to S ₄ are connected in series. A first flying capacitor C _FC1 is connected between the common connection point of the first and second switching devices S ₁ and S _{2 and} the common connection point of the third and fourth switching devices S ₃ and S ₄ .

Also, fifth to eighth switching device S ₅ to S ₈ are connected in series between the positive terminal and the negative electrode of the capacitor C _DC2. A second flying capacitor C _FC2 is connected between the common connection point of the fifth and sixth switching devices S ₅ and S _{6 and} the common connection point of the seventh and eighth switching devices S ₇ and S ₈ .

The capacitors C _DC1 and C _DC2 , the first to eighth switching devices S _{1 to} S ₈ , and the flying capacitors C _FC1 and C _FC2 constitute a common module common to each phase.

The positive end of the capacitor C _DC1 , the common connection point of the second and third switching devices S ₂ and S ₃ , the common connection point of the capacitors C _DC1 and C _DC2 , the common of the sixth and seventh switching devices S ₆ and S ₇ A voltage selection circuit is provided for each phase between the connection point, the negative end of the capacitor C _DC2 and the output terminals U, V, W. Hereinafter, the voltage selection circuit will be described on behalf of the U phase.

First and second switches S _U1 and S _U2 are sequentially connected in series between the positive end of the capacitor C _DC1 and the common connection point of the second and third switching devices S ₂ and S ₃ . Ninth and tenth switching devices S _U9 and S _U10 are sequentially connected in series between the common connection point of the sixth and seventh switching devices S ₆ and S ₇ and the negative end of the capacitor C _DC2 .

Between the common connection point of the first and second switches S _U1 and S _{U2 and} the common connection point of the ninth and tenth switches S _U9 and S _U10 , third to eighth switches S _{U3 to} S _U8 are sequentially connected in series. Connected. The first to fourth diodes D _{U1 to} D _U4 are sequentially arranged between the common connection point of the third and fourth switches S _U3 and S _{U4 and} the common connection point of the seventh and eighth switches S _U7 and S _U8. Connected in series.

The common connection point of the fourth and fifth switching devices S ₄ and S ₅ (that is, the common connection point of the capacitors C _{DC1 and} C _DC2 ) and the common connection point of the second and third diodes D _U2 and D _U3 are connected. . The common connection point of the fifth and sixth switches S _U5 and S _U6 is the output terminal U. The V-phase and W-phase voltage selection circuits are similarly configured. In this way, a three-phase voltage output is realized by connecting three voltage selection circuits in parallel to a five-level DC voltage source.

FIG. 7 shows examples of ON / OFF state transitions of the _first to eighth switching devices S _{1 to} S ₈ to which the control logic is applied, and output potentials V _{OUT_U} , V _{OUT_V} , U-phase, V-phase, and W-phase at that time. Line voltages V _{OUT_UV} , V _{OUT_VW} , V _{OUT_WU} between V _{OUT_W} and U−V, between V−W, and W−U are shown. However, the state of the switch of the voltage selection circuit of each phase is omitted.

The on of 8 to 10 first to eighth switching device S ₁ to S ₈ in each control step, first to tenth switch _{S U1 ~S U10, S V1 ~S} V10, S W1 ~S W10 FIG. 4 is a schematic diagram showing an off state and a current state.

The output potential of each phase in the initial state t ₀ is as follows.
V _{OUT_U} = + E / 4
V _{OUT_V} = + E / 4
V _{OUT_W} = −E / 4
The U-phase and V-phase output potentials using the first flying capacitor C _FC1 and the W-phase outputs the second flying capacitor C _FC2 . In addition, the polarity of the output current of each phase is as follows when the direction from the DC voltage source side to the AC terminal is positive.

I _{OUT_U} > 0
I _{OUT_V} <0
I _{OUT_W} > 0
The first to fourth switching devices S _{1 to} S ₄ that control the current polarity of the first flying capacitor C _FC1 are ON in the _first and third switching devices S ₁ and S ₃ , and the second and fourth switching devices S _2. , S ₄ is in an off state. Also, fifth to eighth switching device S ₅ to S ₈ for controlling the current polarity of the second flying capacitor C _FC2 is sixth, eighth switching device S _6, S ₈ is turned on, the fifth, seventh switching device S ₅ and S ₇ are off.

A procedure for switching the switching pattern of both the switching device that controls the current polarity of the first flying capacitor C _{FC1 and} the switching device that controls the current polarity of the second flying capacitor C _FC2 from the initial state t ₀ will be described below. .

First, the procedure (1) (time t ₀ → time t _A → time t _B ) is started. The U phase, the V phase, and the W phase each output a potential using the first flying capacitor C _FC1 or the second flying capacitor C _FC2 , so the first and second flying capacitors C _FC1 and C _FC2 are not used. Change to potential.

Since the U phase and the V phase output + E / 4, the potential that does not use the first and second flying capacitors C _FC1 and C _FC2 and can be changed by fluctuation of one level is + E / 2 or 0. In this example, + E / 2 is selected.

Since the U-phase and the V-phase do not change to different potentials (for example, the U-phase is + E / 2 and the V-phase is 0), the two-line voltage V _{OUT_UV} can be prevented from generating a two-level voltage change.

Since the W phase outputs −E / 4, the potential that does not use the first and second flying capacitors C _FC1 and C _FC2 and can be changed by fluctuation of one level is 0 or −E / 2 The second flying capacitor C _FC2 used by the W phase is different from the first flying capacitor C _FC1 used by the U phase and the V phase, but the line voltage of the U phase, the V phase and the W phase is 2 In order to prevent level voltage change, the W-phase output potential V _{OUT_W} is set to 0, which is the same as the polarity (positive direction) of the U-phase and V-phase potential changes.

As a result, as shown in FIG. 8, in the procedure (1) (period from the initial state t ₀ to time t _B ), it is possible to prevent the two-level change in the line voltage. Based on the above explanation, the switching procedure of the first to tenth switches will be described.

At time t _A , the second and eighth switches S _U2 , S _V2 and S _W8 are turned off. As a result, the V-phase potential V _{OUT —} V _changes from + E / 4 to + E / 2. Next, at time t _B , the first, fourth, and fifth switches S _U1 , S _V1 , S _W4 , and S _W5 are turned on. As a result, the U-phase potential V _{OUT_U} changes from + E / 4 to + E / 2, and the W-phase potential V _{OUT_W} changes from −E / 4 to 0.

  In this phase potential fluctuation, two or more phases may fluctuate simultaneously. However, since the potential fluctuation polarity is the same, even if a delay or variation occurs in the timing of the potential fluctuation, the line voltage has two levels. No voltage change occurs.

  These are the same procedures as those for normal potential switching. Therefore, each time interval may be the same as normal potential switching (dead time for preventing a DC voltage source short circuit of the inverter).

Next, procedure (2) is started. At time t _C , the first, third, sixth and eighth switching devices S ₁ , S ₃ , S ₆ and S ₈ are turned off. Next, at time t _D , the second, fourth, fifth and seventh switching devices S ₂ , S ₄ , S ₅ and S ₇ are turned on.

In the procedure (1), since the currents flowing through the first and second flying capacitors C _FC1 and C _FC2 are cut off, naturally, the change of these switches does not affect the voltage of each phase. Therefore, this operation can prevent a two-level change in the line voltage.

The interval from time t _B to time t _C is preferably equal to or longer than the time at which the potential fluctuation and current commutation at time t _B are completed (for example, equivalent to dead time). The interval from the time t _C to the time t _D may be equivalent to the time when the switching of the switching device is surely completed because the current is interrupted.

Finally, the procedure (3) is started. The potential of each phase is returned to the original potential by an operation reverse to the procedure (1). At time t _E , the first, fourth and fifth switches S _U1 , S _V1 , S _W4 and S _W5 are turned off. Next, at time t _F , the second and eighth switches S _U2 , S _V2 and S _W8 are turned on.

The time interval from time t _D to time t _E is the same as from time t _C to time t _D. The time interval from time t _E to time t _F may be the same as the normal switching operation (dead time).

In the above, the charge / discharge patterns of both the first and second flying capacitors C _FC1 and C _FC2 are switched. However, when only one of them is switched, the output related to the first and second flying capacitors C _FC1 and C _FC2 is switched. It is sufficient to change the potential of only the phase. This is the same even when there are three or more flying capacitors.

When the pattern of the switching device group that controls the current polarity of the first and second flying capacitors C _FC1 and C _FC2 is switched, the potential of the related phase is changed to another potential in advance and temporarily, and the change is made. Control so that the polarity of the potential to be matched. It is possible to prevent two-level voltage fluctuations of the line voltage generated by the temporary potential changing operation and the pattern switching operation of the switch group that controls the current polarity of the flying capacitor. Therefore, it is possible to reduce damage (dielectric breakdown) due to voltage change with respect to a load (device or the like) connected to the output.

  Furthermore, it is possible to reduce the cost and size by reducing the design conditions for the insulation of the equipment.

  Further, in order to suppress damage, it is possible to reduce the size, cost, and reduction of additional equipment such as an output filter inserted between the inverter and the load. Further, noise due to voltage fluctuation is reduced, and an increase in cost and size such as addition of equipment accompanying noise countermeasures can be suppressed.

[Embodiment 2]
Embodiment 2 is present phase outputs a potential to use the flying capacitor C _FC is two or more, when it is necessary to reverse the current polarity flowing in the flying capacitor C _FC, switching devices in the following steps, the switch Perform switching operation.
(1) When phase outputs a potential to use the flying capacitor C _FC there is a plurality, a switch for controlling a current path to those phases of the flying capacitor C _FC, with an interval of at least a predetermined time for each phase, And turn off in any phase order.
(2) Switching of the charge / discharge pattern that reverses the polarity of the current flowing through the flying capacitor C _FC .
A switch for controlling a current path to Blocked flying capacitor C _FC (3) (1), with a predetermined time or more intervals for each phase, and is turned on at any phase sequence.

Time interval between turning off the switch for controlling a current path for each phase as shown in step (1) to the flying capacitor C _FC, along with the potential variation due to their operation, the bad influence on the voltage between the output line load It is desirable to shorten it as long as it is not given.

  Before the phase change of the phase that has been turned off is completed, the next phase is not turned off, that is, the potential fluctuation range or potential time of each phase is set so that potential fluctuation states do not overlap between multiple phases. The time interval is determined in consideration of the amount of change with respect to and the influence (surge voltage or vibrational potential fluctuation) generated by the components and components of the main circuit and the like.

Order in which to turn off the switch for controlling the current path to the flying capacitor C _FC for each phase may choose how. The same applies when turning on in step (3). Even if the order is different between the procedure (1) and the procedure (3) or they are coincident, the order may be reversed between (1) and (3) with symmetry.

For simplicity of control, when the phase of outputting the potential to use the flying capacitor C _FC does not exist two or more, may also apply the above procedure (1) to (3). However, there is a possibility that the time required for switching slightly increases as compared with the case where it is not applied.

  An operation and an action when the control procedure in the second embodiment is applied to the circuit of FIG. 22 will be described as an example.

FIG. 11 shows switching patterns (first to fourth switching devices S _{1 to} S ₄ , on / off signals of switches S _{X1 to} S _X3 , S _{Y1 to} S _Y3 ) to which the control procedure is applied, and the X phase and Y phase at that time of the output potential V _{OUT_X,} it shows a V _{Out_Y} and line X-Y voltage V _{OUT_XY.} FIGS. 12 to 14 are schematic diagrams showing switching devices, switch on / off states, and current states in each control step.

As with the initial state t ₀ is 24, determining the charge and discharge characteristics of the flying capacitor C _FC (control the charging and discharging current polarity of the flying capacitor C _FC) first to fourth state of the switching device S ₁ to S ₄ (charge In the discharge pattern), the first and third switching devices S ₁ and S ₃ are on, and the second and fourth switching devices S ₂ and S ₄ are off.

In the voltage selection circuits 1 and 2, the first and second switches S _X1 and S _X2 are OFF in the X phase, the third switch S _X3 (S _X3A and S _X3B ) is ON, and the first and second switches in the Y phase are the first and second. The switches S _Y1 and S _Y2 are off, and the third switch S _Y3 (S _Y3A , S _Y3B ) is on. This X-phase, a state where both Y phase and outputs the potential of the terminal P2, i.e., a state in which the output voltage by using a flying capacitor C _FC.

The X-phase output current flows from the DC side to the AC side (I _{OUT_X} > 0), and the Y-phase output current flows from the AC side to the DC side (I _{OUT_Y} <0).

Procedure (1) is started from this state. That is, the third switches S _X3 and S _Y3 connected to the X-phase and Y-phase flying capacitors C _FC are sequentially turned off. First, at time t _A , the third switch S _X3 (S _X3A , S _X3B ) is turned off. As a result, the current path to the X-phase flying capacitor C _FC is cut off and commutated to the antiparallel diode of the second switch S _X2 , so that the X-phase output potential V _OUT — X = −E / 2.

Next, at time t _B , the third switch S _Y3 (S _Y3A , S _Y3B ) is turned off. Thus is cut off the current path to the flying capacitor C _FC of Y phase, since the current commutates to the antiparallel diode of the first switch S _Y1, Y phase of the output voltage V _{Out_Y} = + a E / 2.

The line voltage V _{OUT_XY at} this time _changes from V _{OUT_XY} = 0 in the initial state t ₀ to −E / 2 at time t _{A and} −E at time t _B. The change in potential is one level at a time, and a two-level potential change is prevented.

The time interval from the time t _A to the time t _B is shortened in a range in which the line voltage V _{OUT — XY} does not adversely affect the load due to the potential fluctuation due to the operation. By performing the current interruption to flying capacitor C _FC of X-phase at time t _A, the potential of the output terminal of the X phase begins variation from 0 to -E / 2, it takes a certain time to it. If the Y-phase cutoff operation at time t _B is started during the potential fluctuation transiently, the influence of the X-phase and Y-phase potential fluctuations overlaps with the line voltage V _{OUT_XY of} the XY phase. Thus, a voltage fluctuation similar to the simultaneous change of two levels occurs.

  For example, the amount of change in voltage per time is the same as that at the time of two-level simultaneous change, which has an adverse effect on the load such as an increase in surge voltage. In addition, along with the fluctuation of the X phase, an oscillating potential fluctuation may occur and persist due to the impedance between the output terminal and the load terminal, etc., but the Y phase shutoff operation before it is fully completed In this case, the influences may overlap.

Therefore, in consideration of such influence, it is desirable to set the time interval as short as possible. With the above operation, the output current flowing through the flying capacitor C _FC is cut off, and a state in which the operation of the switch group that controls the current polarity of the flying capacitor C _FC does not affect the output phase potential is obtained. Further, during the above operation, it is possible to prevent the occurrence of two-level potential fluctuations in the line voltage V _OUT — XY between XY.

Next, procedure (2) is started. At time t _C , the first and third switching devices S ₁ and S ₃ are turned off. Next, by turning on the _second and fourth switching devices S ₂ and S ₄ at time t _D , the polarity of the flying capacitor C _FC connected to the DC voltage source is reversed, and the switching of the charge / discharge pattern is completed. .

The interval from time t _B to time t _C is the commutation completion time expected when the current switches from the path (potential) using the flying capacitor C _FC to the path (potential) not using at time t _C. desirable. Further, it is desirable that the interval from time t _C to time t _D is ensured only for a time when the switch operation of the _first to fourth switching devices S _{1 to} S ₄ is reliably completed.

During switching operation of the charging and discharging pattern of the flying capacitor C _FC, the voltage change of the potential and line-to-line phase does not occur. For this reason, the two-level potential change that has conventionally occurred is not generated.

Finally, the procedure (3) is started. Contrary to the procedure (1), and turns on the third switch S _X3 at time t _E, and turns on the third switch S _Y3 at time t _F. At this time, the phase potential change and the line voltage change have the same voltage as in the procedure (1) but reverse waveforms in time series. Therefore, a two-level change in the line voltage does not occur. Each switching time interval may be the same as before.

As described above, the current path to the flying capacitor C _FC is temporarily interrupted for each phase at a constant time interval, and thereafter, the charge / discharge pattern of the flying capacitor C _FC is switched to occur during the switching operation. Simultaneous changes of two levels of the line voltage can be prevented.

Further, in the temporary blocking and return current paths of the flying capacitor C _FC (re conducting) is to operate, by performing with a certain time interval between a plurality of phases, that can occur by the potential change X A two-level change in the line voltage V _OUT — XY between −Y can be prevented.

In the example, the number of output phases is two, but the same effect can be obtained by the same control even when there are three or more phases. However, with the increase of the number of phases, number of steps of the blocking and restoring operation of the current path to the flying capacitor C _FC increases the total time of charge and discharge switching operation increases. In the example, a T-type three-level circuit is applied to the voltage selection circuits 1 and 2, but the same effect can be obtained in another circuit configuration such as an NPC type including a switch and a diode.

  The operation and action in the case where a plurality of flying capacitor type multilevel circuits are connected in series in a plurality of stages to constitute a multilevel circuit having a plurality of flying capacitors will be described by way of example.

  Here, it demonstrates using FIG. 6 similarly to Embodiment 1. FIG.

FIG. 15 shows an example of ON / OFF state transitions of the _first to eighth switching devices S _{1 to} S ₈ to which the control logic is applied, and the output potentials V _{OUT_U} , V _{OUT_V} , U-phase, V-phase, and W-phase at that time. Line voltages V _{OUT_UV} , V _{OUT_VW} , V _{OUT_WU} between V _{OUT_W} and U−V, between V−W, and W−U are shown. However, the state of the switch of the voltage selection circuit of each phase is omitted.

The on of 16 to 18 are first to eighth switching device S ₁ to S ₈ in each control step, first to tenth switch _{S U1 ~S U10, S V1 ~S} V10, S W1 ~S W10 FIG. 4 is a schematic diagram showing an off state and a current state. The output potential of each phase in the initial state t ₀ is as follows.
V _{OUT_U} = + E / 4
V _{OUT_V} = + E / 4
V _{OUT_W} = −E / 4
The U-phase and V-phase output potentials using the first flying capacitor C _FC1 and the W-phase outputs the second flying capacitor C _FC2 .

In addition, the polarity of the output current of each phase is as follows when the direction from the DC voltage source side to the AC terminal is positive.
I _{OUT_U} > 0
I _{OUT_V} <0
I _{OUT_W} > 0
The first to fourth switching devices S _{1 to} S ₄ that control the current polarity of the first flying capacitor C _FC1 are ON in the _first and third switching devices S ₁ and S ₃ , and the second and fourth switching devices S _2. , S ₄ is in an off state. Also, fifth to eighth switching device S ₅ to S ₈ for controlling the current polarity of the second flying capacitor C _FC2 is sixth, eighth switching device S _6, S ₈ is turned on, the fifth, seventh switching device S ₅ and S ₇ are off.

A procedure for switching the switching pattern of both the switching device that controls the current polarity of the first flying capacitor C _{FC1 and} the switching device that controls the current polarity of the second flying capacitor C _FC2 from the initial state t ₀ will be described below. .

First, the procedure (1) (time t ₀ → time t _A → time t _B → time t _C ) is started. By turning off the switches that become current paths to the first and second flying capacitors C _FC1 and C _{FC2 of the} U-phase, V-phase, and W-phase at specific time intervals, two-level voltage changes in the line voltage can be achieved. To prevent.

At time t _A , the second and third switches S _U2 and S _U3 are turned off. As a result, the current path flowing through the first flying capacitor C _FC1 is interrupted and commutated to the path passing through the first and second diodes D _U2 and D _U1 , the fourth and fifth switches S _U4 and S _U5. The phase potential V _{OUT — U} changes from + E / 4 to 0.

Next, at time t _B , the second and third switches S _V2 and S _V3 are turned off. As a result, the current path flowing through the first flying capacitor C _FC1 is cut off and commutated to the path passing through the antiparallel diodes of the first, third, fourth, and fifth switches S _V1 , S _V3 , S _V4 , and S _{V5. Therefore} , the V-phase potential V _{OUT_V} changes from + E / 4 to + E / 2.

Further, at time t _C , the eighth and ninth switches S _W8 and S _W9 are turned off. As a result, the current path flowing through the second flying capacitor C _FC2 is cut off and commutated to a path passing through the antiparallel diodes of the tenth, eighth, seventh, and sixth switches S _W10 , S _W8 , S _W7 , and S _{W6. Therefore} , the W-phase potential V _{OUT_W} changes from −E / 4 to −E / 2.

These phase potential fluctuations do not cause potential fluctuations in two or more phases at the same time. Therefore, simultaneous two-level voltage changes do not occur in the line voltages V _{OUT — UV} , V _{OUT — VW} , V _{OUT — WU} . In addition, by shifting the timing of turning off each phase by a time that takes into account phenomena such as fluctuations in the potential of each phase and the oscillation of the potential, two-level voltages are applied to the line voltages V _{OUT_UV} , V _{OUT_VW} , and V _{OUT_WU.} No change occurs.

  In the example, the order of the U phase, the V phase, and the W phase is used. However, since the above-described effect can be obtained in any order, the order may be arbitrary.

Next, procedure (2) is started. At time t _D , the first, third, sixth and eighth switching devices S ₁ , S ₃ , S ₆ and S ₈ are cut off. Next, at time t _E , the second, fourth, fifth and seventh switching devices S ₂ , S ₄ , S ₅ and S ₇ are turned on.

In the procedure (1), since the currents flowing through the first and second flying capacitors C _FC1 and C _FC2 are cut off, naturally, the change of these switching devices does not affect each phase voltage. Therefore, this operation can prevent two-level changes in the line voltages V _{OUT_UV} , V _{OUT_VW} , and V _{OUT_WU} .

The interval from the time t _C to the time t _D is preferably set to be equal to or longer than the time when the potential fluctuation and the current commutation are completed at the time t _C (for example, equivalent to the dead time). Interval from time t _D to time t _E, since the current is cut off, reliably may be time considers to the switching of the switch is completed.

Finally, the procedure (3) is started. The current paths to the first and second flying capacitors C _FC1 and C _FC2 interrupted in the procedure (1) are restored again, and the phase potentials are restored to their original magnitudes. At time t _F , the first and second switches S _U2 and S _U3 are turned on. Next, at time t _G , the second and third switches S _V2 and S _V3 are turned on. Finally, the eighth and ninth switches S _W8 and S _W9 are turned on at time t _H.

The time interval from time t _E to time t _F is the same as from time t _D to time t _E. The time intervals from time t _F to time t _G and from time t _G to time t _H are affected by potential fluctuations in each phase as in the time from time t _A to time t _B and from time t _B to time t _C. It is desirable to set the time interval so that it does not occur.

In the above, the charge / discharge patterns of both the first and second flying capacitors C _FC1 and C _FC2 are switched. However, when only one of them is switched, the output related to the first and second flying capacitors C _FC1 and C _FC2 is switched. It is only necessary to control the on / off control of a switch that is a current path to the first and second flying capacitors C _FC1 and C _FC2 only for the phase. This is the same even when there are three or more flying capacitors.

  As described above, even when there are a plurality of flying capacitors, a two-level voltage fluctuation of the line voltage can be prevented by the same method.

  At the time of switching the pattern of the switch group that controls the current polarity of the flying capacitor, the current path to the flying capacitor of the phase concerned in advance and temporarily is cut off. In addition, by interrupting the current path and shifting the timing of each phase for re-conduction, the current path is interrupted to the flying capacitor temporarily, and the switch group pattern switching operation is controlled to control the current polarity of the flying capacitor. 2 can prevent voltage fluctuations at two levels of the line voltage. Therefore, it is possible to reduce damage (dielectric breakdown) due to voltage change with respect to a load (device or the like) connected to the output.

  Furthermore, it is possible to reduce the cost and size by reducing the design conditions for the insulation of the equipment. Further, in order to suppress damage, it is possible to reduce the size, cost, and reduction of additional equipment such as an output filter inserted between the inverter and the load. Further, noise due to voltage fluctuation is reduced, and an increase in cost and size such as addition of equipment accompanying noise countermeasures can be suppressed.

  Although the present invention has been described in detail only for the specific examples described above, it is obvious to those skilled in the art that various changes and modifications are possible within the scope of the technical idea of the present invention. Such variations and modifications are naturally within the scope of the claims.

DESCRIPTION OF SYMBOLS 1, 2 ... Voltage selection circuit 3 ... Charging / discharging control part 4 ... Voltage selection circuit control part 5 ... Voltage command / carrier signal comparison part 6 ... Gate signal correction part

Claims (5)

First to fourth switching devices common to each phase, which are sequentially connected in series between a positive electrode end and a negative electrode end of a DC voltage source common to each phase, a common connection point of the first and second switching devices, and the first 3, a common module having a common flying capacitor connected between the common connection points of the fourth switching devices,
A positive electrode terminal of the DC voltage source; a common connection point of the second and third switching devices; a switch between a negative electrode terminal of the DC voltage source and an output terminal; a positive electrode terminal of the DC voltage source; 2, a common connection point of the third switching device, and a voltage selection circuit for each phase that selects any one of the negative electrode ends of the DC voltage source and establishes a connection state with the output terminal. Is a control method for a multi-level power converter having two or more,
Turning on the first and third switching devices, turning off the second and fourth switching devices, turning off the first and third switching devices, and turning on the second and fourth switching devices; Before the state transition between
The voltage selection circuit control unit selects all of the voltage selection circuits of the phases for which the common connection point of the second and third switching devices is selected at the positive terminal of the DC voltage source or the negative terminal of the DC voltage source. A first step to change;
The charge / discharge control unit turns on the first and third switching devices, turns off the second and fourth switching devices, and turns off the first and third switching devices. The second and fourth switching devices A second step for performing a state transition between
After the second step, the voltage selection circuit control unit selects a voltage selection circuit of a phase in which the positive terminal of the direct current voltage source or the negative terminal of the direct current voltage source is selected in the first step. And a third step of changing to a common connection point of the third switching device. First to fourth switching devices common to each phase, which are sequentially connected in series between a positive electrode end and a negative electrode end of a DC voltage source common to each phase, a common connection point of the first and second switching devices, and the first 3, a common module having a common flying capacitor connected between the common connection points of the fourth switching devices,
A positive electrode terminal of the DC voltage source; a common connection point of the second and third switching devices; a switch between a negative electrode terminal of the DC voltage source and an output terminal; a positive electrode terminal of the DC voltage source; 2, a common connection point of the third switching device, and a voltage selection circuit for each phase that selects any one of the negative electrode ends of the DC voltage source and establishes a connection state with the output terminal. Is a control method for a multi-level power converter having two or more,
Turning on the first and third switching devices, turning off the second and fourth switching devices, turning off the first and third switching devices, and turning on the second and fourth switching devices; Before the state transition between
A voltage selection circuit control unit selects a phase voltage selection circuit that selects a common connection point of the second and third switching devices for each phase at the positive terminal of the DC voltage source or the negative terminal of the DC voltage source. A first step of changing at regular time intervals;
The charge / discharge control unit turns on the first and third switching devices, turns off the second and fourth switching devices, and turns off the first and third switching devices. The second and fourth switching devices A second step for performing a state transition between
After the second step, the voltage selection circuit control unit selects a voltage selection circuit of a phase in which the positive terminal of the direct current voltage source or the negative terminal of the direct current voltage source is selected in the first step. A third step of changing the common connection point of the third switching device at a constant time interval for each phase, and a control method for a multilevel power conversion device. The multi-level power converter is
N common modules (N = 2 or more integers) are provided,
Connecting the negative terminal of the DC voltage source of the K (the integer from 1 to N-1) th common module and the positive terminal of the DC voltage source of the K + 1th common module;
Connecting a fourth switching device of the Kth common module and a first switching device of the K + 1th common module;
3. The connection of the voltage selection circuit between the negative terminal of the direct current voltage source of the Kth common module and the positive terminal of the direct current voltage source of the (K + 1) th common module is common. Control method for multi-level power converters. First to fourth switching devices common to each phase, which are sequentially connected in series between a positive electrode end and a negative electrode end of a DC voltage source common to each phase, a common connection point of the first and second switching devices, and the first 3, a common module having a common flying capacitor connected between the common connection points of the fourth switching devices,
A positive electrode terminal of the DC voltage source; a common connection point of the second and third switching devices; a switch between a negative electrode terminal of the DC voltage source and an output terminal; a positive electrode terminal of the DC voltage source; 2, a common connection point of the third switching device, and a voltage selection circuit for each phase that selects any one of the negative electrode ends of the DC voltage source and establishes a connection state with the output terminal. Is a multi-level power converter of 2 or more,
Turning on the first and third switching devices, turning off the second and fourth switching devices, turning off the first and third switching devices, and turning on the second and fourth switching devices; Before the state transition between
Voltage selection circuit control for changing the voltage selection circuit of the phase where the common connection point of the second and third switching devices is selected to the positive terminal of the DC voltage source or the negative terminal of the DC voltage source And
Turning on the first and third switching devices, turning off the second and fourth switching devices, turning off the first and third switching devices, and turning on the second and fourth switching devices; A charge / discharge control unit that performs state transition between
The voltage selection circuit controller is
The voltage selection circuit of the phase changed to the positive terminal of the DC voltage source or the negative terminal of the DC voltage source before the state transition is used as a common connection point of the second and third switching devices after the state transition. A multi-level power converter characterized by changing. First to fourth switching devices common to each phase, which are sequentially connected in series between a positive electrode end and a negative electrode end of a DC voltage source common to each phase, a common connection point of the first and second switching devices, and the first 3, a common module having a common flying capacitor connected between the common connection points of the fourth switching devices,
A positive electrode terminal of the DC voltage source; a common connection point of the second and third switching devices; a switch between a negative electrode terminal of the DC voltage source and an output terminal; a positive electrode terminal of the DC voltage source; 2, a common connection point of the third switching device, and a voltage selection circuit for each phase that selects any one of the negative electrode ends of the DC voltage source and establishes a connection state with the output terminal. Is a multi-level power converter of 2 or more,
Turning on the first and third switching devices, turning off the second and fourth switching devices, turning off the first and third switching devices, and turning on the second and fourth switching devices; Before the state transition between
The voltage selection circuit of the phase that selects the common connection point of the second and third switching devices is changed to the positive terminal of the DC voltage source or the negative terminal of the DC voltage source with a constant time interval for each phase. A voltage selection circuit control unit;
Turning on the first and third switching devices, turning off the second and fourth switching devices, turning off the first and third switching devices, and turning on the second and fourth switching devices; A charge / discharge control unit that performs state transition between
The voltage selection circuit controller is
The voltage selection circuit of the phase changed to the positive terminal of the DC voltage source or the negative terminal of the DC voltage source before the state transition is used as a common connection point of the second and third switching devices after the state transition. A multi-level power conversion device, wherein the power level is changed with a constant time interval for each phase.

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