JP2018037564A - Package for high-frequency semiconductor and high-frequency semiconductor device - Google Patents

Abstract

A high-frequency semiconductor package capable of suppressing cracks in a circuit board and a high-frequency semiconductor device with improved heat dissipation are provided. A package for a high-frequency semiconductor includes a copper base, a frame, a terminal portion, a brazing material, a buffer plate, and a metal particle layer. The frame body has an upper surface and a lower surface and is made of metal. The frame has an opening that opens from the lower surface side and does not reach the upper surface. The terminal portion includes a ceramic member and a conductive portion. The brazing material is between the inner wall of the opening and the terminal portion, between the lower surface of the terminal portion and the upper surface of the copper base, and the outer peripheral portion of the lower surface of the frame and the upper surface of the copper base. Between. The buffer plate has a linear expansion coefficient smaller than that of the copper base and is made of metal. The metal particle layer joins the inner region of the outer peripheral portion of the upper surface of the copper base and the buffer plate. [Selection] Figure 4

Description

  Embodiments described herein relate generally to a high-frequency semiconductor package and a high-frequency semiconductor device.

  High-frequency semiconductor devices with good heat dissipation are used for radar devices and microwave communication equipment.

  The terminal portion is composed of a ceramic member and a conductive portion, and the frame body is made of a FeNiCo material having a linear expansion coefficient close to that of the ceramic so that excessive stress is not applied to the terminal portion when the frame body is joined. When the high-frequency semiconductor amplifying element is mounted on a copper-based package, a high-frequency semiconductor device with good heat dissipation can be obtained.

  However, when a ceramic substrate mounted with an input / output circuit including a high-frequency matching circuit is directly bonded to a copper base, the package is warped due to a difference in linear expansion coefficient. If the package or substrate becomes large and the amount of warpage is large, the ceramic substrate may be cracked. In order to avoid cracking, a buffer plate made of metal and having a linear thermal expansion coefficient smaller than that of the copper base is sandwiched between the ceramic substrate and the copper base.

JP 2010-27953 A

  Cracking of the ceramic substrate can be avoided by sandwiching a buffer plate between the ceramic substrate and the copper base, but there is a difference in linear expansion coefficient between the frame body such as FeNiCo and the copper base, and the frame body of FeNiCo has high rigidity. In addition, tensile stress remains on the copper base. As a result, the temperature dependence of the warping amount shows a complicated behavior. In particular, if the bonding temperature of the buffer plate and the bonding temperature of the ceramic substrate are the same, the bonding material between the buffer plate and the copper base is remelted when the ceramic substrate is bonded, and cracking is likely to occur once the buffer plate and the copper base are separated. . In order to prevent the buffer plate and the copper base bonding material from remelting when the ceramic substrate is bonded, a bonding material having a higher melting point than the ceramic substrate and the buffer plate bonding material may be used for bonding the buffer plate and the copper base. However, when the bonding temperature between the buffer plate and the copper base is increased, warping of the copper base increases, and a gap is generated between the package and the external casing, so that heat dissipation is impaired. The present invention provides a high-frequency semiconductor package in which cracking of a ceramic substrate can be suppressed and the amount of warpage is small, and a high-frequency semiconductor device with improved heat dissipation.

  The package for a high-frequency semiconductor according to the embodiment includes a copper base, a frame, a terminal portion, a brazing material, a buffer plate, and a metal particle layer. The frame body has an upper surface and a lower surface and is made of metal. The frame has an opening that opens from the lower surface side and does not reach the upper surface. The terminal portion includes a ceramic member and a conductive portion. The brazing material is between the inner wall of the opening and the terminal portion, between the lower surface of the terminal portion and the upper surface of the copper base, and the outer peripheral portion of the lower surface of the frame and the upper surface of the copper base. Between. The buffer plate has a linear expansion coefficient smaller than that of the copper base and is made of metal. The metal particle layer joins the inner region of the outer peripheral portion of the upper surface of the copper base and the buffer plate.

FIG. 1A is a schematic perspective view for explaining the manufacturing process of the high-frequency semiconductor package according to the first embodiment, FIG. 1B is a schematic side view of the frame, and FIG. 1C is a schematic of the terminal portion. A perspective view and FIG.1 (d) are schematic sectional drawings along the AA line. FIG. 2A is a schematic perspective view after applying the metal nanoparticle paste to the upper surface of the copper base, and FIG. 2B is a schematic perspective view of the high-frequency semiconductor package according to the first embodiment. 3A to 3C are schematic views for explaining an assembly process of the high-frequency semiconductor device according to the embodiment. FIG. 3A is a schematic perspective view in which an input / output circuit is joined on a buffer plate. 3B is a schematic perspective view in which the high-frequency semiconductor amplifying element and the input / output circuit and between the input / output terminal and the input / output circuit are wire-bonded, and FIG. 3C is a process of joining the lid and the frame. FIG. It is a partial schematic cross section along CC line. It is a schematic cross section of a modified example of the package. FIG. 6A is a schematic perspective view of the high-frequency semiconductor package of the first embodiment, and FIG. 6B is a schematic cross-sectional view illustrating the amount of warpage along the line BB. FIG. 7A is a schematic perspective view in which an input / output circuit and a high-frequency semiconductor amplifying element are joined with an AuSn solder material, and FIG. 7B is a schematic cross-sectional view illustrating the amount of warpage along the line BB. . FIG. 8A is a schematic perspective view after joining the input / output circuit and the high-frequency semiconductor amplifying element with AuSn solder material, and FIG. 8B is a schematic cross-sectional view for explaining the amount of warpage along the line BB. is there.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1A is a schematic perspective view for explaining the manufacturing process of the high-frequency semiconductor package according to the first embodiment, FIG. 1B is a schematic side view of the frame, and FIG. 1C is a schematic of the terminal portion. A perspective view and FIG.1 (d) are schematic sectional drawings along the AA line.
As illustrated in FIGS. 1A to 1D, the high-frequency semiconductor package includes at least a frame body 20, a copper base 30, a terminal portion 40, and a brazing material 34.

  As shown in FIG. 1B, the frame 20 has a lower surface 20a and an upper surface 20b and is made of metal. The frame 20 has an opening 20c. The opening 20c is opened from the lower surface 20a side, but does not reach the upper surface 20b.

  As shown in FIG. 1C, the terminal portion 40 includes a ceramic member 42 and a conductive portion 44 provided on the ceramic member 42. A lead 45 protruding toward the outside of the package can be joined to the conductive portion 44.

  As shown in FIG. 1D, the brazing material 34 is formed between the inner wall 20d of the opening 20c and the terminal portions 40a and 40b, between the lower surface 40c of the terminal portions 40a and 40b and the upper surface of the copper base 30, and a frame. The lower surface 20a of the body 20 and the outer peripheral portion OP of the upper surface of the copper base 30 are joined.

  As the brazing material 34, silver brazing or the like can be used. For example, when components of Ag (50%), Cu (15.5%), Zn (16.5%, Cd (18%) are used, the brazing temperature can be set to 635 to 760 ° C. When components such as Ag (72%) and Cu (28%) are used, a eutectic alloy having a brazing temperature of 780 to 900 ° C. can be obtained.

  A convex portion 30 a may be provided at the central portion of the copper base 30. As shown in FIG. 1A, the convex portion 30 a is provided to extend along the first straight line 32 in the central portion of the inner region of the upper surface of the copper base 30.

FIG. 2A is a schematic perspective view after applying the metal nanoparticle paste to the upper surface of the copper base, and FIG. 2B is a schematic perspective view of the high-frequency semiconductor package according to the first embodiment.
The terminal portion 40 can include an input terminal portion 40a and an output terminal portion 40b disposed at a position opposite to the input terminal portion 40a with respect to the first straight line 32.

  As shown in FIG. 2A, the liquid metal nanoparticle paste 50 is formed between the input terminal portion 40a and the convex portion 30a, and between the convex portion 30a and the output terminal portion 40b in the inner region of the copper base 30. In the meantime, it is applied by scanning with a dispenser or using an ink jet.

  The metal nanoparticle paste 50 is prepared by mixing metal nanoparticles such as silver (Ag), gold (Au), platinum (Pt), and palladium (Pd) and an organic solvent such as ester alcohol in a desired ratio. The The particle size of the metal nanoparticles is several nm to 1 μm. The ratio of the metal nanoparticles is, for example, 85 to 93% by weight. The proportion of the organic solvent is 5 to 15% by weight.

  When the applied liquid metal nanoparticle paste 50 is heated at 120 ° C., for example, the organic solvent volatilizes and the thickness decreases, but no reaction between the metal nanoparticles occurs.

  As shown in FIG. 2B, the buffer plate 60 (including the first buffer plate 60a and the second buffer plate 60b) is placed on the metal nanoparticle paste 50 and heated at, for example, 180 to 250 ° C. When the pressure is further increased as necessary, the reaction proceeds between the metal nanoparticles and is sintered together, resulting in a metal particle layer in a state in which a larger particle size is connected. The metal particle layer thus produced does not melt to near the melting point of the metal. For this reason, even if it exposes to high temperature, such as AuSn, at the time of a semiconductor joining or lid | cover part joining, a metal particle layer does not remelt, but the joining between a buffer plate and the same base can be maintained. Thereafter, washing is performed to remove organic solvent residues. For this reason, it is possible to suppress the contamination of the surface of the high-frequency semiconductor amplifying element inside the sealed package with the organic matter, and to improve the reliability. Also, the workability of the assembly process such as mounting of the high-frequency semiconductor amplifying element and wire bonding can be improved.

The linear expansion coefficient of the buffer plate 60 is close to the linear expansion coefficient of a ceramic plate such as Al ₂ O ₃ . For this reason, when the copper base 30 having a large linear expansion coefficient and the ceramic plate having a small linear expansion coefficient are directly joined, a brittle fracture occurs due to the stress generated in the temperature lowering process, and the ceramic board breaks. In the first embodiment, the buffer plate 60 may be molybdenum (Mo) or tungsten (W).

  The thickness of the buffer plate 60 can be 0.15 to 0.3 mm or the like. If it is too thin, the buffering effect against thermal expansion becomes insufficient, and the amount of warping of the copper base 30 cannot be sufficiently suppressed. In the high frequency semiconductor device according to the first embodiment, the amount of warpage of the package when the temperature is lowered is suppressed by the buffer plate 60.

3A to 3C are schematic perspective views illustrating an assembly process of the high-frequency semiconductor device according to the first embodiment. 3A is a schematic perspective view after the input / output circuit is joined on the buffer plate, and FIG. 3B is a view between the high-frequency semiconductor amplifying element and the input / output circuit, and the input / output terminal and the input / output. FIG. 3C is a schematic perspective view for explaining a process of joining the lid portion and the frame body after wire bonding the circuit.
FIG. 4 is a partial schematic cross-sectional view taken along the line CC.

  The high-frequency semiconductor device according to the first embodiment includes a high-frequency semiconductor package 5, a high-frequency semiconductor amplifying element 80, and a first AuSn solder material that joins the high-frequency semiconductor amplifying element 80 and the upper surface 30d of the convex portion 30a of the copper base 30. 53 and a lid 90 joined to the upper surface 20b of the frame body 20. The high-frequency semiconductor device may further include an input circuit 70a joined to the first buffer plate 60a and an output circuit 70b joined to the second buffer plate 60b.

  The high-frequency semiconductor amplifying element 80 may be a HEMT (High Electron Mobility Transistor), a MESFET (Metal Semiconductor Field Effect Transistor), or the like.

  As shown in FIG. 4, the high-frequency semiconductor amplifying element 80 is bonded to the upper surface 30 d of the convex portion 30 a of the copper base 30 using the first AuSn solder material 53. For example, bonding can be performed at a temperature of about 280 ° C. which is a eutectic point of AuSn (Sn: 20% by weight) or slightly higher. In this case, the input circuit 70 a and the output circuit 70 b are joined to the first and second buffer plates 60 a and 60 b by the second AuSn solder material 52. It is more preferable that the first AuSn solder material 53 and the second AuSn solder material 52 have the same composition because the same joining process can be performed.

As shown in FIG. 4, the input circuit 70a and the output circuit 70b are provided on the surfaces of ceramic plates 72a (first ceramic plate) and 72b (second ceramic plate) such as Al ₂ O ₃ and ceramic plates 72a and 72b. And a conductive portion 71a (first conductive portion) and 71b (second conductive portion) including a thick film.

  The input circuit 70a can include a microstrip distributor 73 as shown in FIG. As shown in FIG. 3A, the output circuit 70b can include a microstrip synthesizer 75 and the like. The ceramic plate 72a and the ceramic plate 72b may be made of different materials.

  The input terminal portion 40a and the input circuit 70a are connected by a bonding wire. The input circuit 70 a and the high frequency semiconductor amplifying element 80 are connected by a bonding wire 84. The high-frequency semiconductor amplifying element 80 and the output circuit 70b are connected by a bonding wire 85. The output circuit 70b and the output terminal portion 40b are connected by a bonding wire.

  Further, the upper surface 20b of the frame body 20 and the lid 90 are joined with a joining material such as AuSn. As a result, good airtightness is maintained inside the package.

  For example, the thickness T1 between the lower surface 30e of the copper base 30 and the upper surface 30d of the convex portion 30a is set to 0.8 to 1.5 mm or the like. The thickness T3 of the ceramic plate 72a constituting the input circuit 70a and the ceramic plate 72b constituting the output circuit 70b is 0.25 mm or the like. The thickness T4 of the high-frequency semiconductor amplifying element 80 is 50 μm or the like.

FIG. 5 is a schematic cross-sectional view of a modified example of the package.
The convex portion 30a of the copper base 30 has a first region 30b where the high-frequency semiconductor amplifying element 80 is disposed, and a second region 30c provided on both sides of the first region 30b and having a low height. The high frequency semiconductor amplifying element 80 is disposed in the first region 30b, and the ferroelectric substrates 76a and 76b are disposed in the second region 30c. The relative permittivity of the ferroelectric substrates 76a and 76b is, for example, 40 to 140.

  If a conductor layer (not shown) is provided on the upper surfaces of the ferroelectric substrates 76a and 76b, a capacitor is formed. For example, impedance matching is facilitated in the microwave by setting the thickness T5 of the ferroelectric substrates 76a and 76b to 100 μm or the like. The ferroelectric substrates 76a and 76b which are as thin as 100 μm are easily cracked if the amount of warpage of the package is large. When the package of the present modification is used, the amount of warpage of the package is reduced, so that cracking of the ferroelectric substrates 76a and 76b is suppressed.

Next, the warpage of the package that occurs in the assembly process of the high-frequency semiconductor amplifying element will be described.
FIG. 6A is a schematic perspective view of a high-frequency semiconductor package, and FIG. 6B is a schematic cross-sectional view for explaining the amount of warpage along the line BB.

Oxygen-free copper (Cu is 99.96 wt%, JIS No. 1020) has a linear expansion coefficient (300K) of about 17.7 × 10 ⁻⁶ / K and a thermal conductivity (300K) of about 391 W / (m · K). ). Cu is mixed with Zn, Sn, Ni, Si, or the like to form an alloy. For example, in an alloy (JIS No. 2100) containing 95% by weight of Cu and 5% by weight of Zn, the linear expansion coefficient (300K) is about 18.1 × 10 ⁻⁶ / K, and the thermal conductivity (300K). Is about 234 W / (m · K). That is, as the weight percentage of Cu decreases, the thermal conductivity generally decreases. In the present embodiment, it is preferable that the thermal conductivity is 300 W / (m · K) or more and heat dissipation is increased from the high-frequency semiconductor amplifying element 80. In the present specification, the Cu weight% of the copper base 30 is 99.6 or more. Further, in the present specification, the linear expansion coefficient represents the ratio of the thermal expansion coefficient (or thermal expansion coefficient) in which the length of the object is thermally expanded.

The frame 20 is made of FeNiCo (linear expansion coefficient: about 7 × 10 ⁻⁶ / K). The linear expansion coefficient (20 to 100 ° C.) of molybdenum (Mo) is 3.7 to 5.3 × 10 ⁻⁶ / K. The linear expansion coefficient of 96% Al ₂ O ₃ is about 6.4 × 10 ⁻⁶ / K, which is close to that of FeNiCo.

  In the following, the buffer plate 60 is made of molybdenum, but may be tungsten. The copper base 30 and the molybdenum plate 60 are joined by AuSn (melting point of 20 wt% Sn: about 280 ° C.) and AuSi (melting point of 3.15 wt% Si is about 363 ° C.). Note that AuGe (the melting point of 12 wt% Ge is about 356 ° C.) may be used instead of AuSi. The plane size of the copper base 30 is 10 mm × 10 mm or the like.

  Assume that the copper base 30 and the molybdenum plate 60 have an interface of an Ag particle layer 50a, an AuSn solder material, and an AuSi solder material, and their bonded structures are compared.

  The copper base 30 having a large linear expansion coefficient is obtained in the temperature drop process from 250 ° C. to room temperature (about 27 ° C.) after the joining is completed by the pressurized and heated (250 ° C.) silver particle layer (not shown). The shrinkage amount is larger than that of the molybdenum plate 60 having a small linear expansion coefficient. For this reason, the joined package warps so as to be convex upward so as to be a part of the arc of the center of curvature O1 (warping amount S11). The warp amount S11 is, for example, 30 μm.

  The package in which the copper base 30 and the molybdenum plate 60 are joined by AuSn (joining temperature: about 300 ° C.) warps so as to protrude upward so as to be a part of the arc of the center of curvature O2 (warping amount S12). ). The warp amount S12 is, for example, 50 μm.

  A package in which the copper base, 30 and the molybdenum plate 60 are joined by AuSi (joining temperature: about 380 ° C.) warps so as to protrude upward so as to be a part of the arc of the center of curvature O3 (warping amount). S13). The warpage amount S13 is, for example, 80 μm. When the amount of warpage is 50 μm or more, the gap between the high-frequency semiconductor device and the housing cannot be filled even if a thermal sheet or the like is interposed, and the thermal resistance becomes high.

FIG. 7A is a schematic perspective view in the process of joining the input / output circuit and the high-frequency semiconductor amplifying element with AuSn solder material, and FIG. 7B is a schematic cross-sectional view for explaining the amount of warpage along the line BB. It is.
During the period when the bonding temperature is 300 ° C. and the AuSn solder material is melted, the bonding layer between the molybdenum plate and the copper base is also exposed to 300 ° C.

    In the case of a package in which a molybdenum plate is bonded by pressurizing and heating silver nanoparticles, the bonded silver particle layer does not melt until near the melting point of the silver particles (melting point of silver: about 962 ° C.) The copper base 30 and the molybdenum plate 60 are not separated. For this reason, the copper base 30 becomes convex so as to become a part of the arc of the center of curvature O1 after being flattened at a bonding temperature of 250 ° C. after being convex upward at room temperature and then at a bonding temperature of 250 ° C. A warped state is obtained (warp amount S21).

  In the case of a package in which a molybdenum plate is bonded with an AuSn solder material, the copper base 30 and the molybdenum plate 60 are separated by remelting of AuSn. Since they are separated, the warping amount S22 is about zero, but the copper base 30 and the molybdenum plate 60 are separated once, so that the ceramic substrate is easily cracked when the temperature is lowered.

  A package in which a molybdenum plate is bonded at a bonding temperature of 380 ° C. using an AuSi solder material does not separate at 300 ° C. because AuSi does not remelt. The copper base 30 side tends to extend in response to a temperature rise from room temperature to 300 ° C. However, the expansion of the copper base 30 is suppressed by the molybdenum plate 60 having a small linear expansion coefficient, and approaches the flatness, but is still lower than the bonding temperature of 380 ° C., so that the package is slightly warped upward. The state is maintained (warp amount S23). The arc is, for example, a part of a circle with a center of curvature O3.

FIG. 8A is a schematic perspective view after joining the input / output circuit and the high-frequency semiconductor amplifying element with AuSn solder material, and FIG. 8B is a schematic cross-sectional view for explaining the amount of warpage along the line BB. is there.
The package in which the silver plate is pressed and heated to join the molybdenum plate is convex downward as shown in FIG. 7B in the process of lowering the temperature from 300 ° C. which is the melting point of the AuSn solder material to room temperature. After returning from the state to the flat state, as shown in FIG.

  After the temperature is lowered to room temperature, the warp amount S31 returns to the vicinity of the warp amount S11 at room temperature before the temperature rise. Note that a metal such as molybdenum has a stress level that causes brittle fracture sufficiently higher than the stress level at the elastic limit. For this reason, even if stress is applied by thermal expansion or thermal contraction to cause a warp, it is unlikely to break.

  On the other hand, in the case of a package in which a molybdenum plate is bonded with an AuSn solder material, the remelted AuSn (FIG. 7B) resolidifies in the temperature lowering process. In this case, the warp amount S32 of the package after the temperature drop substantially returns to the warp amount S12 shown in FIG. Further, the warpage amount S33 of the package joined at 380 ° C. using the AuSi solder material increases the warpage due to the difference in linear expansion coefficient in the temperature lowering process from 300 ° C. to room temperature, and the warpage in the state of FIG. Approaches the amount S13.

  When the copper base 30 and the molybdenum plate 60 are joined by the AuSn solder material, the amount of warping of the package can be reduced as compared with the case where the copper base 30 and the ceramic plate are directly joined. However, the copper base 30 and the molybdenum plate 60 are separated in the process of joining the input / output circuit and the high-frequency semiconductor amplifying element with the AuSn solder material. Since the copper base 30 and the molybdenum plate 60 are separated once, the ceramic substrate is easily cracked when the temperature is lowered. When the copper base 30 and the molybdenum plate 60 are joined with an AuSi solder material or the like, the amount of warping of the package can be reduced as compared with the case where the copper base 30 and the ceramic plate are directly joined, and the input / output circuit and the high-frequency semiconductor amplifying element 80 can be reduced. In the process of joining with the AuSn solder material, the copper base 30 and the molybdenum plate 60 are not separated. However, it is difficult to make the amount of warpage smaller than 50 μm, and even if a thermal sheet or the like is sandwiched, the gap generated between the high-frequency semiconductor device and the housing cannot be filled, and the thermal resistance becomes high.

  In contrast, in the high frequency semiconductor package of the first embodiment, a copper base and a buffer plate made of a metal having a low coefficient of linear expansion can be joined at a low temperature such as 250 ° C. using a metal nanoparticle paste. For this reason, the amount of warpage of the high-frequency semiconductor device can be reduced, and cracking of the ceramic substrate, the ferroelectric substrate, and the high-frequency semiconductor amplifying element can be suppressed. In addition, since the warpage is small enough to be absorbed by a thermal sheet or the like, the thermal resistance between the high-frequency semiconductor device and the housing to be attached can be reduced.

  According to the present embodiment, a high-frequency semiconductor package capable of suppressing cracks in a circuit board and a high-frequency semiconductor device with improved heat dissipation are provided. The high-frequency semiconductor device according to this embodiment is widely used in radar devices and microwave communication equipment.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

5 High frequency semiconductor package, 20 frame, 20a lower surface, 20b upper surface, 20c opening, 20d side wall, 30 copper base, 30a convex portion, 32 first straight line, 34 brazing material, 40, 40a, 40b terminal portion, 50 Metal nanoparticle paste, 50a metal particle layer, 52 second AuSn solder material, 53 first AuSn solder material, 60, 60a, 60b buffer plate, 70a input circuit, 70b output circuit, 72a first ceramic plate, 72b second ceramic plate, 90 Lid, OP Outer perimeter

However, when a ceramic substrate mounted with an input / output circuit including a high-frequency matching circuit is directly bonded to a copper base, the package is warped due to a difference in linear thermal expansion coefficient. If the package or substrate becomes large and the amount of warpage is large, the ceramic substrate may be cracked. In order to avoid cracking, a buffer plate made of metal and having a linear thermal expansion coefficient smaller than that of the copper base is sandwiched between the ceramic substrate and the copper base.

Claims (5)

With copper base,
A frame body having an upper surface and a lower surface and made of metal, the frame body having an opening that is opened from the lower surface side and does not reach the upper surface;
A terminal portion including a ceramic member and a conductive portion;
Joining between the inner wall of the opening and the terminal portion, between the lower surface of the terminal portion and the upper surface of the copper base, and between the lower surface of the frame and the outer peripheral portion of the upper surface of the copper base Brazing material,
A buffer plate having a linear expansion coefficient smaller than that of the copper base and made of metal;
A metal particle layer that joins the inner region of the outer peripheral portion and the buffer plate of the upper surface of the copper base;
A package for high-frequency semiconductors.   The high-frequency semiconductor package according to claim 1, wherein the buffer plate contains molybdenum or tungsten. The central portion of the inner region of the copper base is provided with a convex portion extending along a first straight line,
The terminal portion includes a first terminal portion and a second terminal portion disposed at a position opposite to the first terminal portion with respect to the first straight line,
The buffer plate includes a first buffer plate provided between the first terminal portion and the convex portion in the inner region of the copper base, and between the convex portion and the second terminal portion. The high frequency semiconductor package according to claim 1, further comprising: a second buffer plate provided. A package for a high-frequency semiconductor according to claim 3,
A high-frequency semiconductor amplifying element;
A first gold-tin solder material that joins the high-frequency semiconductor amplifying element and the upper surface of the convex portion;
A lid joined to the upper surface of the frame;
An input circuit including a first ceramic plate and a first conductive portion provided on an upper surface of the first ceramic plate;
An output circuit including a second ceramic plate and a second conductive portion provided on an upper surface of the second ceramic plate;
A second gold-tin solder material that joins between the input circuit and the first buffer plate and between the output circuit and the second buffer plate;
With
The high-frequency semiconductor amplifying element is a high-frequency semiconductor device sealed in an internal space composed of the frame, the copper base, and the lid.   5. The high-frequency semiconductor device according to claim 4, wherein a composition of the first gold-tin solder material and a composition of the second gold-tin solder material are the same.

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