JP2018005037A - Mems mirror driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress a concurrent application of a driving voltage to an electrostatic actuator providing a positive inclination angle and an electrostatic actuator providing a negative inclination angle.SOLUTION: A driving circuit includes: a controller which outputs a first digital driving signal for driving a first electrostatic actuator to a wiring in a first period and outputs a second digital driving signal for driving a second electrostatic actuator to the wiring in a second period not overlapping with the first period; a D/A converter electrically connected to the wiring; and a switching circuit having an input end electrically connected to the D/A converter, a first output end electrically connected to the first electrostatic actuator, and a second output end electrically connected to the second electrostatic actuator. The controller controls the switching circuit so that the input end and the first output end are connected together in the first period and the input end and the second output end are connected together in the second period.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a MEMS mirror driving circuit.

  Patent Document 1 describes a technique related to an optical switch driving device. The drive device described in this document includes a control circuit, two D / A converters for one MEMS (Micro Electro Mechanical Systems) mirror, and two drive circuits for one MEMS mirror. After the biaxial voltage information output by the control circuit is converted into an analog signal by a D / A converter, it is amplified by a drive circuit and separated into a positive voltage and a negative voltage and output, and one of each axis of the MEMS mirror is output. A positive voltage is applied to the other electrode and a negative voltage is applied to the other electrode.

JP 2003-140063 A

  In an optical communication network, an optical switch using a MEMS mirror is used. Some MEMS mirrors have, for example, electrostatic actuators. In such a MEMS mirror, a rotating shaft is provided in the mirror portion, an electrostatic actuator that gives a positive tilt angle on one side of the rotating shaft, and an electrostatic actuator that gives a negative tilt angle on the other side are arranged. Then, by applying a voltage to one of the electrostatic actuators, the mirror portion is tilted at an angle corresponding to the magnitude of the voltage.

  In the conventional drive circuit, two drive signals output from a common arithmetic element (MCU) to separate wires for these two electrostatic actuators are converted into analog signals and amplified into drive voltages, respectively. Provided to the actuator. However, in such a circuit configuration, there is a possibility that a drive voltage is simultaneously applied to the two electrostatic actuators due to a shift in control timing or a setting error in the arithmetic element. Since the MEMS mirror is a fine mechanical element and extremely delicate, if a driving voltage is simultaneously applied to each electrostatic actuator, a load is applied to the MEMS mirror and the performance may be deteriorated.

  The present invention has been made in view of such problems, and suppresses simultaneous application of a drive voltage to an electrostatic actuator that gives a positive tilt angle and an electrostatic actuator that gives a negative tilt angle. An object of the present invention is to provide a MEMS mirror driving circuit that can be used.

  In order to solve the above-described problem, a MEMS mirror driving circuit according to an embodiment of the present invention includes a first electrostatic actuator that tilts the mirror surface at a positive angle around the rotation axis, and a negative around the rotation axis. A circuit that drives a MEMS mirror including a second electrostatic actuator that tilts the mirror surface at an angle of, and outputs a first digital drive signal that drives the first electrostatic actuator to the wiring in a first period; In a second period that does not overlap with the first period, a controller that outputs a second digital drive signal for driving the second electrostatic actuator to the wiring, and the first digital drive signal and the second digital that are electrically connected to the wiring A D / A converter for converting a drive signal into a voltage signal, an input terminal electrically connected to the D / A converter, and a first output terminal electrically connected to the first electrostatic actuator And a switch circuit having a second output terminal connected second electrostatic actuator electrically, the. The control unit controls the switch circuit so that the input terminal and the first output terminal are connected in the first period, and controls the switch circuit so that the input terminal and the second output terminal are connected in the second period.

  According to the MEMS mirror drive circuit of the present invention, it is possible to suppress the drive voltage from being simultaneously applied to the electrostatic actuator that gives a positive tilt angle and the electrostatic actuator that gives a negative tilt angle.

FIG. 1 is a plan view showing a configuration of a MEMS mirror driven by a MEMS mirror driving circuit according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing the configuration of the drive circuit. FIG. 3A is a graph showing an example of the time change of the control signal output from the MCU to the switch circuit. FIG. 3B is a graph illustrating an example of a time change of the digital drive signal output from the MCU. FIG. 4 is a circuit diagram showing a configuration of a drive circuit according to the first modification. FIG. 5A is a graph showing an example of the time change of the control signal output from the MCU to the switch circuit. FIG. 5B is a graph illustrating an example of a time change of the digital drive signal output from the MCU. FIG. 6 is a circuit diagram showing a configuration of a drive circuit according to a second modification. FIG. 7A is a graph showing an example of a time change before delay of the control signal output from the MCU to the switch circuit. FIG. 7B is a graph showing an example of a time change after delay of the control signal. FIG. 7C is a graph illustrating an example of a time change of the digital drive signal output from the MCU. FIG. 8 is a circuit diagram showing a drive circuit as a comparative example.

[Description of Embodiment of Present Invention]
First, the contents of the embodiment of the present invention will be listed and described. A MEMS mirror driving circuit according to an embodiment of the present invention includes a first electrostatic actuator that inclines a mirror surface at a positive angle around a rotation axis, and a first electrostatic actuator that inclines the mirror surface at a negative angle around the rotation axis. A circuit for driving a MEMS mirror including two electrostatic actuators, wherein a first digital drive signal for driving the first electrostatic actuator is output to the wiring in the first period, and the second period does not overlap with the first period , A control unit that outputs a second digital drive signal for driving the second electrostatic actuator to the wiring, and a D that is electrically connected to the wiring and converts the first digital drive signal and the second digital drive signal into a voltage signal. / A converter, input terminal electrically connected to D / A converter, first output terminal electrically connected to first electrostatic actuator, and second electrostatic actuator And a switching circuit having a second output terminal which is gas-connected. The control unit controls the switch circuit so that the input terminal and the first output terminal are connected in the first period, and controls the switch circuit so that the input terminal and the second output terminal are connected in the second period.

  In this MEMS mirror drive circuit, the control unit outputs a first digital drive signal for driving the first electrostatic actuator and a second digital drive signal for driving the second electrostatic actuator to a common D / A converter. To do. That is, the control unit outputs the first digital drive signal in the first period, and outputs the second digital drive signal in the second period that does not overlap with the first period. In the first period, the control unit controls the switch circuit so as to connect the input end and the first output end, so that the voltage signal converted from the first digital drive signal is provided to the first electrostatic actuator. The In the second period, the control unit controls the switch circuit so as to connect the input terminal and the second output terminal, so that the voltage signal converted from the second digital drive signal is provided to the second electrostatic actuator. The That is, in this MEMS mirror drive circuit, the drive voltage is selectively provided to the first electrostatic actuator or the second electrostatic actuator by the switch circuit. Therefore, it can suppress that a drive voltage is simultaneously applied with respect to each electrostatic actuator.

  In addition, the MEMS mirror driving circuit is connected between the first output circuit and the first electrostatic actuator, and between the second output terminal and the second electrostatic actuator. And a second amplifier circuit. As described above, since the amplifier circuit is provided not in the preceding stage but in the subsequent stage of the switch circuit, the switch circuit handles a voltage signal having a relatively constant voltage, and thus the scale of the switch circuit can be reduced.

  In the MEMS mirror driving circuit, the control unit may be configured such that the first electrostatic actuator and the second electrostatic actuator are in a non-driven state in a third period between the first period and the second period. A drive signal may be output to the wiring. Alternatively, in the MEMS mirror driving circuit described above, the switch circuit further includes a third output terminal, and the control unit includes the input terminal and the third output terminal in the third period between the first period and the second period. The switch circuit may be controlled so as to be connected.

  Since the electrostatic actuator has a small capacity, even if the application of the driving voltage is stopped, the electrostatic actuator is continuously driven until the electric charge accumulated in the capacity is discharged. As described above, neither the first electrostatic actuator nor the second electrostatic actuator is driven between the first period for driving the first electrostatic actuator and the second period for driving the second electrostatic actuator. By providing the third period, it is possible to promote the discharge of the electrostatic actuator that was driven in the previous period and to suppress the simultaneous driving of the two electrostatic actuators.

  The MEMS mirror driving circuit includes a first capacitive element connected between a node between the first output terminal and the first electrostatic actuator and the reference potential line, a second output terminal, and a second static electricity terminal. A second capacitive element connected between a node between the electric actuator and a reference potential line may be further included. Such a first capacitive element and a second capacitive element constitute a filter for removing noise, for example. In such a case, even if the application of the drive voltage is stopped, the electrostatic actuator continues to be driven until the charge accumulated in the first capacitor element or the second capacitor element is discharged. As described above, neither the first electrostatic actuator nor the second electrostatic actuator is driven between the first period for driving the first electrostatic actuator and the second period for driving the second electrostatic actuator. By providing the third period, it is possible to promote the discharge of the first capacitive element or the second capacitive element and to suppress the two electrostatic actuators from being driven simultaneously.

[Details of the embodiment of the present invention]
A specific example of the MEMS mirror driving circuit according to the embodiment of the present invention will be described below with reference to the drawings. In addition, this invention is not limited to these illustrations, is shown by the claim, and intends that all the changes within the meaning and range equivalent to the claim are included. In the following description, the same reference numerals are given to the same elements in the description of the drawings, and redundant descriptions are omitted.

  FIG. 1 is a plan view showing a configuration of a MEMS mirror 10 driven by a MEMS mirror driving circuit (hereinafter simply referred to as a driving circuit) according to an embodiment of the present invention. The MEMS mirror 10 has a configuration of a so-called gimbal type tilt mirror, and is used, for example, in an optical switch constituting an optical network. As shown in FIG. 1, the MEMS mirror 10 has a mirror surface 11 and rotates around a first rotation shaft 12 a and a first rotation unit 13 and a first rotation unit 13. And a second rotating section 14 that supports the second rotating shaft 12b and rotates around the second rotating shaft 12b.

  The planar shape of the mirror surface 11 is various such as a circular shape and a quadrangular shape, and the first rotation shaft 12a extends through the center of the mirror surface 11 along the Y-axis direction. The first rotating portion 13 has a pair of cylindrical shaft portions 13 a and 13 b with the first rotating shaft 12 a as a central axis, and the pair of shaft portions 13 a and 13 b are the second rotating portion 14. It is supported so that it can rotate freely. The first rotating unit 13 includes one comb-like electrode 15 a constituting the electrostatic actuator 15 and one comb-like electrode 16 a constituting the electrostatic actuator 16.

  The second rotation shaft 12b passes through the center of the mirror surface 11 and extends along the X-axis direction. The second rotating portion 14 has a pair of cylindrical shaft portions 14 a and 14 b with the second rotating shaft 12 b as a central axis, and the pair of shaft portions 14 a and 14 b is a frame body of the MEMS mirror 10. 19 is rotatably supported. The second rotating unit 14 includes the other comb-like electrode 15 b constituting the electrostatic actuator 15 and the other comb-like electrode 16 b constituting the electrostatic actuator 16.

  The electrostatic actuators 15 and 16 are disposed on both sides of the first rotation shaft 12a with the first rotation shaft 12a interposed therebetween. The electrostatic actuator 15 is the first electrostatic actuator in the present embodiment, and moves the mirror surface 11 in the forward rotation direction around the first rotation shaft 12a. The comb-like electrode 15a and the comb-like electrode 15b are alternately arranged so that the electrostatic force corresponding to the potential difference is generated between the comb-like electrode 15a and the comb-like electrode 15b. A positive tilt angle corresponding to the force (exactly proportional to the square of the potential difference) is given to the mirror surface 11. The electrostatic actuator 16 is the second electrostatic actuator in the present embodiment, and moves the mirror surface 11 in the reverse rotation direction around the first rotation shaft 12a. The comb-like electrode 16a and the comb-like electrode 16b are alternately arranged so that the electrostatic force corresponding to the potential difference is generated between the comb-like electrode 16a and the comb-like electrode 16b. A negative tilt angle corresponding to the force (exactly proportional to the square of the potential difference) is given to the mirror surface 11. The tilt angle range of the mirror surface 11 is, for example, ± several degrees.

  The second rotating unit 14 further includes one comb-like electrode 17 a constituting the electrostatic actuator 17 and one comb-like electrode 18 a constituting the electrostatic actuator 18. The frame body 19 includes the other comb-like electrode 17 b constituting the electrostatic actuator 17 and the other comb-like electrode 18 b constituting the electrostatic actuator 18.

  The electrostatic actuators 17 and 18 are disposed on both sides of the second rotation shaft 12b with the second rotation shaft 12b interposed therebetween. The electrostatic actuator 17 is the first electrostatic actuator in the present embodiment, and moves the mirror surface 11 in the forward rotation direction around the second rotation shaft 12b. The comb-like electrode 17a and the comb-like electrode 17b are arranged so as to alternately mesh with each other, and an electrostatic force corresponding to a potential difference is generated between the comb-like electrode 17a and the comb-like electrode 17b. A positive tilt angle corresponding to the force (exactly proportional to the square of the potential difference) is given to the mirror surface 11. The electrostatic actuator 18 is the second electrostatic actuator in the present embodiment, and moves the mirror surface 11 in the reverse rotation direction around the second rotation shaft 12b. The comb-shaped electrodes 18a and the comb-shaped electrodes 18b are arranged so as to alternately mesh with each other, and an electrostatic force corresponding to a potential difference is generated between the comb-shaped electrodes 18a and the comb-shaped electrodes 18b. A negative tilt angle corresponding to the force (exactly proportional to the square of the potential difference) is given to the mirror surface 11.

  FIG. 2 is a circuit diagram showing a configuration of the drive circuit 1A of the present embodiment. FIG. 2 also shows a circuit portion that simulates the electrostatic actuators 15 to 18 of the MEMS mirror 10. The electrostatic actuators 15 to 18 are simulated by a resistor Ra and a capacitor Ca connected in parallel to each other. The resistance value of the resistor Ra is an extremely large value such as several GΩ. The capacitance value of the capacitor Ca is a small value such as several tens of pF. The MEMS mirror 10 shown in this example includes four input terminals 10a to 10d and one common terminal 10e. The four input terminals 10a to 10d are connected to one comb-like electrodes of the corresponding electrostatic actuators 15 to 18, respectively. One common terminal 10e is connected to the other comb-like electrodes of the four electrostatic actuators 15-18. The common terminal 10e is connected to the reference potential line (GND line) 5 of the drive circuit 1A.

  The drive circuit 1A includes a micro control unit (MCU) 21 as a control unit, D / A converters 22a and 22b, switch circuits 23 and 24, amplifier circuits 25a to 25d, filter circuits 26a to 26d, and current limiting. Resistors 27a to 27d.

  The MCU 21 has a central processing circuit and a memory, and operates according to a program stored in advance. The MCU 21 is electrically connected to the input end of the D / A converter 22a via the wiring 31a, and is electrically connected to the input end of the D / A converter 22b via the wiring 31b. The MCU 21 outputs a digital drive signal D1 for operating the mirror surface 11 around the first rotation shaft 12a of the MEMS mirror 10 to the D / A converter 22a. Further, the MCU 21 outputs a digital drive signal D2 for operating the mirror surface 11 around the second rotation shaft 12b of the MEMS mirror 10 to the D / A converter 22b. The wirings 31a and 31b are data buses, for example. The D / A converters 22a and 22b may be built in the MCU 21. Data relating to the relationship between the tilt angle of the mirror surface 11 and the digital drive signals D1 and D2 is stored in advance in a storage device. When the MCU 21 receives a request for the optical path of the connection destination from the host controller, the MCU 21 changes the digital drive signals D1 and D2 according to the data in the storage device.

  The output end of the D / A converter 22a is electrically connected to the switch circuit 23 via the wiring 32a. The output end of the D / A converter 22b is electrically connected to the switch circuit 24 via the wiring 32b. The D / A converter 22a converts the digital drive signal D1 output from the MCU 21 into a voltage signal V1. The D / A converter 22b converts the digital drive signal D2 output from the MCU 21 into a voltage signal V2. The output voltages from the D / A converters 22a and 22b are within a range of, for example, a lower limit 0V and an upper limit number V.

  The switch circuit 23 includes an input terminal 23a electrically connected to the D / A converter 22a, a first output terminal 23b electrically connected to the electrostatic actuator 15 via the input terminal 10a, and the input terminal 10b. And a second output end 23c electrically connected to the electrostatic actuator 16 through the second output end 23c. The switch circuit 23 further includes a control terminal that is electrically connected to the MCU 21. The switch circuit 23 is an analog switch configured to include one or more transistors, for example. The switch circuit 23 switches the connection between the input terminal 23a and the first output terminal 23b and the second output terminal 23c in accordance with the control signal S1 from the MCU 21, thereby connecting the input terminal 23a and the first output terminal 23b. And the connection state between the input end 23a and the second output end 23c are selectively realized.

  The amplifier circuit 25 a is a first amplifier circuit in the present embodiment, and is electrically connected between the first output end 23 b and the electrostatic actuator 15. The amplifier circuit 25b is a second amplifier circuit in the present embodiment, and is electrically connected between the second output end 23c and the electrostatic actuator 16. These amplifying circuits 25a and 25b are configured to output a voltage signal V1 in the range of 0V to several V obtained from the D / A converter 22a via the switch circuit 23, for example, from 0V to several tens of volts to several hundreds V (for example, 200V). To generate the drive voltage VD1.

  A resistor element R1 is connected between the node N1 between the amplifier circuit 25a and the switch circuit 23 and the reference potential line 5. This resistance element R1 is provided to regulate the input voltage to the amplifier circuit 25a to 0V when the first output end 23b of the switch circuit 23 is in an open state (non-connected state). Similarly, a resistance element R2 is connected between the node N2 between the amplifier circuit 25b and the switch circuit 23 and the reference potential line 5. The resistor element R2 is provided to regulate the input voltage to the amplifier circuit 25b to 0V when the second output terminal 23c of the switch circuit 23 is in an open state (non-connected state).

  The filter circuits 26a and 26b are electrically connected between the switch circuit 23 and the electrostatic actuators 15 and 16 (in the present embodiment, between the amplification circuits 25a and 25b and the electrostatic actuators 15 and 16), respectively. . These filter circuits 26a and 26b are circuits for reducing (preferably removing) noise included in the drive voltage VD1 and the resonance frequency component of the MEMS mirror 10. In one example, the filter circuit 26a is connected between the resistor R3 connected between the switch circuit 23 and the electrostatic actuator 15, and one end of the resistor R3 on the electrostatic actuator 15 side and the reference potential line 5. The capacitor C1 is included. The filter circuit 26b includes a resistor R4 connected between the switch circuit 23 and the electrostatic actuator 16, and a capacitor connected between one end of the resistor R4 on the electrostatic actuator 16 side and the reference potential line 5. It has element C2. The capacitive element C1 is a first capacitive element connected between the node N3 between the first output end 23b and the electrostatic actuator 15 and the reference potential line 5. The capacitive element C2 is a second capacitive element connected between the node N4 between the second output end 23c and the electrostatic actuator 16 and the reference potential line 5.

  The current limiting resistors 27a and 27b are electrically connected between the switch circuit 23 and the electrostatic actuators 15 and 16, respectively. The current limiting resistors 27 a and 27 b are resistors for protecting the MEMS mirror 10 and limit the current flowing through the electrostatic actuators 15 and 16. Note that the current limiting resistor may be connected between the common terminal 10 e and the reference potential line 5.

  The switch circuit 24 includes an input terminal 24a electrically connected to the D / A converter 22b, a first output terminal 24b electrically connected to the electrostatic actuator 17 via the input terminal 10c, and an input terminal 10d. And a second output end 24c electrically connected to the electrostatic actuator 18 through the second output end 24c. The switch circuit 24 further has a control terminal electrically connected to the MCU 21. The switch circuit 24 is an analog switch configured to include, for example, one or a plurality of transistors. The switch circuit 24 switches the connection between the input terminal 24a and the first output terminal 24b and the second output terminal 24c in accordance with the control signal S2 from the MCU 21, thereby connecting the input terminal 24a and the first output terminal 24b. And the connection state between the input terminal 24a and the second output terminal 24c are selectively realized.

  The amplifier circuit 25 c is a first amplifier circuit in the present embodiment, and is electrically connected between the first output end 24 b and the electrostatic actuator 17. The amplifier circuit 25d is a second amplifier circuit in the present embodiment, and is electrically connected between the second output end 24c and the electrostatic actuator 18. These amplifying circuits 25c and 25d receive a voltage signal V2 in the range of 0V to several V obtained from the D / A converter 22b via the switch circuit 24, for example, from 0V to several tens to several hundreds V (for example, 200V). To generate a drive voltage VD2.

  A resistor element R5 is connected between the node N5 between the amplifier circuit 25c and the switch circuit 24 and the reference potential line 5. The resistor element R5 is provided to regulate the input voltage to the amplifier circuit 25c to 0 V when the first output terminal 24b of the switch circuit 24 is in an open state (non-connected state). Similarly, a resistor element R6 is connected between the node N6 between the amplifier circuit 25d and the switch circuit 24 and the reference potential line 5. The resistor element R6 is provided to regulate the input voltage to the amplifier circuit 25d to 0 V when the second output terminal 24c of the switch circuit 24 is in an open state (non-connected state).

  The filter circuits 26c and 26d are electrically connected between the switch circuit 24 and the electrostatic actuators 17 and 18 (in this embodiment, between the amplification circuits 25c and 25d and the electrostatic actuators 17 and 18), respectively. . These filter circuits 26c and 26d are circuits for reducing (preferably removing) noise included in the drive voltage VD2 and resonance frequency components (for example, several kHz) of the MEMS mirror 10. In one example, the filter circuit 26c is connected between the resistor R7 connected between the switch circuit 24 and the electrostatic actuator 17, and one end of the resistor R7 on the electrostatic actuator 17 side and the reference potential line 5. A capacitor C3 is included. The filter circuit 26d includes a resistor R8 connected between the switch circuit 24 and the electrostatic actuator 18, and a capacitor connected between one end of the resistor R8 on the electrostatic actuator 18 side and the reference potential line 5. It has element C4. The capacitive element C3 is a first capacitive element connected between the node N7 between the first output end 24b and the electrostatic actuator 17 and the reference potential line 5. The capacitive element C4 is a second capacitive element connected between the node N8 between the second output end 24c and the electrostatic actuator 18 and the reference potential line 5.

  The current limiting resistors 27c and 27d are electrically connected between the switch circuit 24 and the electrostatic actuators 17 and 18, respectively. The current limiting resistors 27c and 27d are resistors for protecting the MEMS mirror 10, and limit the current flowing through the electrostatic actuators 17 and 18. Note that the current limiting resistor may be connected between the common terminal 10 e and the reference potential line 5.

  The operation of the drive circuit 1A having the above configuration will be described. FIG. 3A is a graph showing an example of a time change of the control signal S1 (or S2) output from the MCU 21 to the switch circuit 23 (or 24). FIG. 3B is a graph illustrating an example of a time change of the digital drive signal D1 (or D2) output from the MCU 21.

  Consider a case where the sign of the tilt angle of the mirror surface 11 around the first rotation axis 12a shown in FIG. 1 is changed from positive to negative. As shown in FIG. 3B, in the first period T1 in which the sign of the tilt angle of the mirror surface 11 is positive, the MCU 21 converts the first digital drive signal D11 for driving the electrostatic actuator 15 into the digital drive signal. It outputs to the wiring 31a as D1. Then, the MCU 21 outputs the second digital drive signal D12 for driving the electrostatic actuator 16 to the wiring 31a as the digital drive signal D1 in the second period T2 that does not overlap with the first period T1. The first digital drive signal D11 and the second digital drive signal D12 are converted into voltage signals by the D / A converter 22a.

  Further, the MCU 21 sets, as the digital drive signal D1, the third digital drive signal D13 in which both the electrostatic actuators 15 and 16 are in the non-driven state in the third period T3 between the first period T1 and the second period T2. Output to the wiring 31a. In one example, the third digital drive signal D13 is a signal that causes the drive voltage VD1 to be 0V.

  On the other hand, as shown in FIG. 3A, the MCU 21 uses, as the control signal S1, the control signal S11 that controls the switch circuit 23 so that the input terminal 23a and the first output terminal 23b are connected in the first period T1. In the second period T2, the control signal S12 for controlling the switch circuit 23 is output as the control signal S1 so that the input terminal 23a and the second output terminal 23c are connected. Such switching of the control signal S1 is performed, for example, during the third period T3.

  Next, consider a case where the sign of the tilt angle of the mirror surface 11 around the second rotation axis 12b shown in FIG. 1 is changed from positive to negative. As shown in FIG. 3B, in the first period T1 in which the sign of the tilt angle of the mirror surface 11 is positive, the MCU 21 converts the first digital drive signal D21 for driving the electrostatic actuator 17 into the digital drive signal. D2 is output to the wiring 31b. Then, the MCU 21 outputs the second digital drive signal D22 for driving the electrostatic actuator 18 to the wiring 31b as the digital drive signal D2 in the second period T2 that does not overlap with the first period T1. The first digital drive signal D21 and the second digital drive signal D22 are converted into voltage signals by the D / A converter 22b.

  Further, the MCU 21 sets, as the digital drive signal D2, the third digital drive signal D23 in which both the electrostatic actuators 17 and 18 are in the non-driven state in the third period T3 between the first period T1 and the second period T2. Output to the wiring 31b. In one example, the third digital drive signal D23 is a signal that causes the drive voltage VD2 to be 0V.

  On the other hand, as shown in FIG. 3A, the MCU 21 uses, as the control signal S2, the control signal S21 that controls the switch circuit 24 so that the input terminal 24a and the first output terminal 24b are connected in the first period T1. In the second period T2, the control signal S22 for controlling the switch circuit 24 is output as the control signal S2 so that the input terminal 24a and the second output terminal 24c are connected. Such switching of the control signal S2 is performed, for example, during the third period T3.

  3A and 3B illustrate the case where the first period T1 is before the second period T2, but the second period T2 is before the first period T1. Also good.

  The effect by the drive circuit 1A of this embodiment demonstrated above is demonstrated. FIG. 8 is a circuit diagram showing a drive circuit 100 as a comparative example. The drive circuit 100 includes D / A converters 22c to 22f, amplifier circuits 25a to 25d, filter circuits 26a to 26d, and current limiting resistors 27a to 27d corresponding to the four electrostatic actuators 15 to 18, respectively. That is, the drive circuit 100 includes a D / A converter for each electrostatic actuator, unlike the drive circuit 1A of the present embodiment. However, in such a circuit configuration, a drive voltage may be simultaneously applied to the electrostatic actuators 15 and 16 (or to the electrostatic actuators 17 and 18) due to a control timing shift or a setting error in the MCU 21. . Since the MEMS mirror 10 is a fine mechanical element and extremely delicate, when a driving voltage is applied to the electrostatic actuators 15 and 16 (or to the electrostatic actuators 17 and 18) simultaneously, the MEMS mirror 10 There is a risk of performance degradation.

  On the other hand, in the drive circuit 1A of this embodiment, the MCU 21 uses a common D as a first digital drive signal D11 for driving the electrostatic actuator 15 and a second digital drive signal D12 for driving the electrostatic actuator 16. / A output to the converter 22a. That is, the MCU 21 outputs the first digital drive signal D11 in the first period T1, and outputs the second digital drive signal D12 in the second period T2 that does not overlap with the first period T1. In the first period T1, the MCU 21 controls the switch circuit 23 so as to connect the input terminal 23a and the first output terminal 23b. Therefore, the voltage signal V1 converted from the first digital drive signal D11 is the drive voltage. VD1 is provided to the electrostatic actuator 15. In the second period T2, the MCU 21 controls the switch circuit 23 so as to connect the input terminal 23a and the second output terminal 23c. Therefore, the voltage signal V1 converted from the second digital drive signal D12 is the drive voltage. VD1 is provided to the electrostatic actuator 16. That is, in this drive circuit 1A, the switch circuit 23 selectively provides the drive voltage VD1 to the electrostatic actuator 15 or 16. Accordingly, it is possible to suppress the drive voltage VD1 from being applied to the electrostatic actuators 15 and 16 simultaneously.

  Similarly to the above, in the drive circuit 1A, the MCU 21 uses a common D / A converter to convert the first digital drive signal D21 for driving the electrostatic actuator 17 and the second digital drive signal D22 for driving the electrostatic actuator 18 into a common D / A converter. To 22b. That is, the MCU 21 outputs the first digital drive signal D21 in the first period T1, and outputs the second digital drive signal D22 in the second period T2 that does not overlap with the first period T1. In the first period T1, the MCU 21 controls the switch circuit 24 so as to connect the input terminal 24a and the first output terminal 24b. Therefore, the voltage signal V2 converted from the first digital drive signal D21 is the drive voltage. VD <b> 2 is provided to the electrostatic actuator 17. In the second period T2, the MCU 21 controls the switch circuit 24 so as to connect the input terminal 24a and the second output terminal 24c. Therefore, the voltage signal V2 converted from the second digital drive signal D22 is the drive voltage. VD2 is provided to the electrostatic actuator 18. That is, in the drive circuit 1A, the switch circuit 24 selectively provides the drive voltage VD2 to the electrostatic actuator 17 or 18. Accordingly, it is possible to suppress the drive voltage VD2 from being applied to the electrostatic actuators 17 and 18 simultaneously.

  In the MEMS mirror 10, the electrostatic actuators 15 to 18 are driven with a high voltage such as several tens of volts to several hundreds of volts, while the tilt angle of the mirror surface 11 is required to have extremely high accuracy. Accordingly, the dynamic range of the drive voltages VD1 and VD2 is widened, and a high-resolution D / A converter (for example, 16 bits or more) is required. However, according to this embodiment, compared with the comparative example shown in FIG. Thus, the number of D / A converters can be halved. Therefore, the circuit scale and manufacturing cost of the drive circuit can be reduced.

  In the drive device described in Patent Document 1 described above, since a positive voltage and a negative voltage are output from the D / A converter, the circuit scale of the power supply and the like is increased. Further, since the resolution of the D / A converter is shared by the two electrostatic actuators, the resolution per electrostatic actuator is reduced by the sign bit. On the other hand, according to the drive circuit 1A of the present embodiment, it is sufficient to output only a positive voltage from the D / A converters 22a and 22b. The resolution can be made equal to the resolution of the D / A converter.

  Further, as in the present embodiment, the drive circuit 1A may include amplifier circuits 25a to 25d that are electrically connected between the switch circuits 23 and 24 and the electrostatic actuators 15 to 18. As described above, since the amplifier circuits 25a to 25d are provided not in the previous stage of the switch circuits 23 and 24 but in the subsequent stage, the switch circuits 23 and 24 handle the voltage signals V1 and V2 having relatively constant voltages. The scale of the circuits 23 and 24 can be reduced.

  Further, as in the present embodiment, the MCU 21 is configured such that the electrostatic actuators 15 and 16 (or 17, 18) are in the non-driven state in the third period T3 between the first period T1 and the second period T2. Three digital drive signals D13 and D23 may be output. Since the electrostatic actuator has a slight capacitance Ca, even if the application of the drive voltage VD1 or VD2 is stopped, the electrostatic actuator continues to be driven until the charge remaining in the capacitance Ca is discharged. As in the present embodiment, the electrostatic actuators 15 and 16 are between the first period T1 for driving the electrostatic actuator 15 (or 17) and the second period T2 for driving the electrostatic actuator 16 (or 18). By providing the third period T3 in which none of (or 17, 18) is driven, the discharge of the residual charges of the electrostatic actuator driven in the previous period is promoted, and the electrostatic actuators 15, 16 (or 17, 18) can be effectively suppressed from being driven simultaneously.

  In particular, when the capacitive elements C1 to C4 of the filter circuits 26a to 26d are provided as in the present embodiment, even if the application of the drive voltage to a certain electrostatic actuator is stopped, the capacitive elements are accumulated in the corresponding capacitive element. The electrostatic actuator continues to be driven until the charged electric charge is discharged. On the other hand, by providing the above-described third period T3, it is possible to promote the discharge of the capacitive element and effectively suppress the electrostatic actuators 15 and 16 (or 17, 18) from being driven simultaneously.

(First modification)
FIG. 4 is a circuit diagram showing a configuration of a drive circuit 1B according to the first modification. The difference between this modified example and the above embodiment is the configuration of the switch circuit. In addition to the configuration of the switch circuits 23 and 24 of the above embodiment, the switch circuits 23A and 24A of the present modification have third output terminals 23d and 24d, respectively. The third output end 23d is not electrically connected to any of the electrostatic actuators 15 and 16. Similarly, the third output end 24d is not electrically connected to either of the electrostatic actuators 17 and 18. Here, “not being electrically connected” means not being electrically connected via the reference potential line 5.

  FIG. 5A is a graph showing an example of a time change of the control signal S1 (or S2) output from the MCU 21 to the switch circuit 23 (or 24). FIG. 5B is a graph showing an example of a time change of the digital drive signal D1 (or D2) output from the MCU 21.

  Unlike the above-described embodiment, in the present modification, in the third period T3 between the first period T1 and the second period T2, the MCU 21 has the input terminal 23a (or 24a) and the third output terminal 23d (or 24d). The control signal S13 (or S23) for controlling the switch circuit 23 (or 24) so as to be connected is output as the control signal S1 (or S2). Then, the MCU 21 does not output the third digital drive signal D13 (or D23) (see FIG. 3B) in the third period T3, and the first digital drive signal D11 (or D21) and the second digital drive signal D12. (Or D22) is switched in the third period T3.

  As in the present modification, the switch circuit 23 (24) further includes a third output terminal 23d (24d), and the MCU 21 includes the input terminal 23a (24a) and the third output terminal 23d (24d) in the third period T3. The switch circuit 23 (24) may be controlled so as to be connected to each other. Thereby, the discharge of the capacitance Ca of the electrostatic actuator driven in the previous period and the discharge of the capacitive elements C1 to C4 are urged during the third period T3, and the electrostatic actuators 15, 16 (or 17, 18). ) Can be suppressed from being driven simultaneously.

(Second modification)
FIG. 6 is a circuit diagram showing a configuration of a drive circuit 1C according to the second modification. The difference between this modified example and the first modified example is the configuration of the control unit. The control unit 29 according to this modification includes delay control circuits 28a and 28b in addition to the MCU 21. The delay control circuit 28a is provided on the path of the control signal S1, and the delay control circuit 28b is provided on the path of the control signal S2. These delay control circuits 28a and 28b set the control signal to an intermediate value for a predetermined period when the signal value of the control signal is changed. Note that such delay control circuits 28a and 28b are realized by, for example, a CR delay circuit.

  FIG. 7A is a graph illustrating an example of a time change before delay of the control signal S1 (or S2) output from the MCU 21 to the switch circuit 23 (or 24). FIG. 7B is a graph showing an example of a time change after the delay of the control signal S1 (or S2). FIG. 7C is a graph illustrating an example of a time change of the digital drive signal D1 (or D2) output from the MCU 21.

  In this modification, as shown in FIG. 7A, the MCU 21 changes the digital drive signal D1 (or D2) from the first digital drive signal D11 (or D21) to the second digital drive signal D12 (or D22). Before switching, the control signal S1 (or S2) is switched from the control signal S11 (or S21) to the control signal S12 (or S22). However, as shown in FIG. 7B, the control signal S1 (or S2) temporarily becomes an intermediate value (control signal S13 (or S23)) in the third period T3 by the action of the delay control circuits 28a and 28b. Thereby, the input end 23a (24a) is connected to the third output end 23d (24d).

  Also in this modification, the switch circuit 23 (24) is controlled so that the input terminal 23a (24a) and the third output terminal 23d (24d) are connected in the third period T3. Thereby, the discharge of the capacitance Ca of the electrostatic actuator driven in the previous period and the discharge of the capacitive elements C1 to C4 are urged during the third period T3, and the electrostatic actuators 15, 16 (or 17, 18). ) Can be suppressed from being driven simultaneously.

  The drive circuit according to the present invention is not limited to the above-described embodiment, and various other modifications are possible. For example, the above-described embodiments and modifications may be combined with each other according to the necessary purpose and effect. In the above embodiment, the switch circuit is connected between the D / A converter and the amplifier circuit. However, the switch circuit is provided between the amplifier circuit and the electrostatic actuator (for example, between the amplifier circuit and the filter circuit, the filter circuit). It may be connected between the circuit and the current limiting resistor, or between the current limiting resistor and the electrostatic actuator). In that case, the circuit elements (amplifier circuit, amplifier circuit and filter circuit, or amplifier circuit, filter circuit and current limiting resistor) in the previous stage of the switch circuit can be shared, and the circuit scale can be further reduced. However, since the input voltage to the switch circuit becomes a high voltage of several tens to several hundreds V in the subsequent stage of the amplifier circuit, it is preferable to use a mechanical switch such as an electromagnetic relay instead of an analog switch.

  Moreover, although the circuit which drives a MEMS mirror provided with two rotation axes was illustrated in the said embodiment, the number of the rotation axes of a MEMS mirror may be one or more various numbers. The drive circuit according to the present invention can include one D / A converter and one switch circuit for each rotating shaft.

  DESCRIPTION OF SYMBOLS 1A, 1B, 1C ... Drive circuit, 5 ... Reference potential line, 10 ... MEMS mirror, 10a, 10b, 10c, 10d ... Input terminal, 10e ... Common terminal, 11 ... Mirror surface, 12a ... First rotating shaft, 12b ... 2nd rotating shaft, 13 ... 1st rotating part, 13a, 13b ... Shaft part, 14 ... 2nd rotating part, 14a, 14b ... Shaft part, 15, 16, 17, 18 ... Electrostatic actuator, 15a , 15b, 16a, 16b, 17a, 17b, 18a, 18b ... comb electrodes, 19 ... frame, 21 ... MCU, 22a, 22b ... D / A converter, 23, 24, 23A, 24A ... switch circuit, 23a , 24a ... input end, 23b, 24b ... first output end, 23c, 24c ... second output end, 23d, 24d ... third output end, 25a, 25b, 25c, 25d ... amplification circuit, 26a, 26b, 26c, 26d ... Filter circuit, 27a, 27b, 27c, 27d ... current limiting resistor, 28a, 28b ... delay control circuit, 29 ... control unit, 31a, 31b, 32a, 32b ... wiring, D1, D2 ... digital drive signal, D11, D21 ... 1st digital drive signal, D12, D22 ... 2nd digital drive signal, D13, D23 ... 3rd digital drive signal, S1, S2 ... control signal, T1 ... 1st period, T2 ... 2nd period, T3 ... 3rd period , V1, V2 ... voltage signals, VD1, VD2 ... drive voltages.

Claims (5)

A circuit for driving a MEMS mirror, comprising: a first electrostatic actuator that tilts the mirror surface at a positive angle around the rotation axis; and a second electrostatic actuator that tilts the mirror surface at a negative angle around the rotation axis. Because
In the first period, a first digital drive signal that drives the first electrostatic actuator is output to the wiring, and in a second period that does not overlap the first period, a second digital drive signal that drives the second electrostatic actuator A control unit for outputting to the wiring;
A D / A converter that is electrically connected to the wiring and converts the first digital drive signal and the second digital drive signal into voltage signals;
An input terminal electrically connected to the D / A converter, a first output terminal electrically connected to the first electrostatic actuator, and a second output electrically connected to the second electrostatic actuator. A switch circuit having an end;
With
The control unit controls the switch circuit so that the input terminal and the first output terminal are connected in the first period, and the input terminal and the second output terminal are connected in the second period. A MEMS mirror driving circuit for controlling the switch circuit as described above. A first amplifier circuit electrically connected between the first output end and the first electrostatic actuator;
A second amplifier circuit electrically connected between the second output end and the second electrostatic actuator;
The MEMS mirror driving circuit according to claim 1, further comprising:   In the third period between the first period and the second period, the control unit transmits a third digital drive signal in which the first electrostatic actuator and the second electrostatic actuator are in a non-driven state. The MEMS mirror drive circuit according to claim 1, wherein the MEMS mirror drive circuit outputs to The switch circuit further includes a third output;
The control unit controls the switch circuit so that the input terminal and the third output terminal are connected in a third period between the first period and the second period. The MEMS mirror drive circuit according to 1. A first capacitive element electrically connected between a node between the first output end and the first electrostatic actuator and a reference potential line;
A second capacitive element electrically connected between a node between the second output end and the second electrostatic actuator and the reference potential line;
The MEMS mirror driving circuit according to claim 3, further comprising:

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