JP2016017984A - Electro-optic device, electronic equipment, and method for manufacturing electro-optic device - Google Patents

Abstract

An object of the present invention is to prevent moisture in the atmosphere from passing through an interface between a substrate and a sealing material and entering a liquid crystal layer to cause deterioration in display quality. An element substrate body 11 on which a pixel electrode 12 is disposed, a first alignment layer 41 disposed so as to cover the pixel electrode 12, a counter substrate body 21 on which a common electrode 23 is disposed, and a common electrode 23 A second alignment layer 42 disposed so as to cover, a sealing material 52 disposed between the element substrate body 11 and the counter substrate body 21 so as to surround a region where the pixel electrode 12 is disposed, A liquid crystal layer 50 disposed in a region surrounded by a sealing material 52, and when the element substrate body 11 side is viewed from the counter substrate body 21 side, the region where the pixel electrode is disposed is a display region V, The area where the sealing material 52 is provided is the sealing area H3, and at least one of the surface of the first alignment layer 41 and the surface of the second alignment layer 42 has an affinity for water in the sealing area H3 compared to the display area V. Is characterized by high. [Selection] Figure 2

Description

  The present invention relates to an electro-optical device, an electronic apparatus including the electro-optical device, and a method for manufacturing the electro-optical device.

  A liquid crystal device having a display area in which pixel electrodes are arranged in a matrix is used in a light modulation device (light valve) such as a projector. In the liquid crystal device, a pair of substrates are bonded to each other with a sealant so as to have a predetermined gap, and liquid crystal is sealed (filled) in a region surrounded by the sealant. When the liquid crystal device is driven, a unidirectional flow is generated in the liquid crystal in the vicinity of each of the pair of substrates, and ionic impurities mixed in the liquid crystal move together with the liquid crystal. If the ionic impurities move together with the liquid crystal and are unevenly distributed at a specific location in the display area, there is a risk of causing display defects such as image sticking.

  In order to suppress the uneven distribution of ionic impurities, for example, the method of Patent Document 1 has been proposed. In Patent Document 1, a plurality of electrodes are provided adjacent to each other around the display region, and a horizontal electric field is generated by changing the potential of the adjacent electrodes. By moving quickly from the display area to the display area, uneven distribution of ionic impurities in the display area can be suppressed.

JP 2008-58497 A

  However, in the method of Patent Document 1, when moisture (humidity) in the atmosphere passes through the interface between the substrate and the sealing material and enters (invades) into the liquid crystal, ionic impurities are moved from the display area to the outside of the display area. There was a problem that it was difficult to move.

  Specifically, the sealing material is composed of an organic material such as an acrylic resin or an epoxy resin. Compared with a method such as a hermetic seal, for example, moisture (humidity) in the atmosphere passes through the interface between the substrate and the sealing material. Easy to enter (invade) into the liquid crystal. If moisture enters the liquid crystal, the moisture is likely to be adsorbed on the highly hydrophilic portion of the display area. When moisture is adsorbed on a highly hydrophilic portion of the display region, ionic impurities in the liquid crystal are attracted and ionic impurities are trapped. When the ionic impurities are trapped in the portion where the moisture in the display area is adsorbed, it is difficult to discharge the ionic impurities from the display area to the outside of the display area by a horizontal electric field provided around the display area. Become. Therefore, ionic impurities are unevenly distributed, and there is a possibility that display quality such as image sticking is deteriorated at a portion where the ionic impurities are unevenly distributed.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

  Application Example 1 An electro-optical device according to this application example is opposed to the first substrate on which the pixel electrode is disposed, the first alignment layer disposed to cover the pixel electrode, and the first substrate. A second substrate on which a common electrode is disposed; a second alignment layer disposed to cover the common electrode; and the pixel electrode is disposed between the first substrate and the second substrate. A sealing material provided so as to surround the region, and an electro-optical layer disposed in the region surrounded by the sealing material, and when the first substrate side is viewed from the second substrate side, A region where the pixel electrode is disposed is a first region, and a region where the sealant is provided is a second region, and at least one of the surface of the first alignment layer and the surface of the second alignment layer is the first region. The second region has a higher affinity for water than the first region.

  In the electro-optical device according to this application example, the sealing material is disposed between the first substrate and the second substrate, and the first alignment layer of the first substrate and the second alignment layer of the second substrate are bonded by the sealing material. The electro-optic layer is disposed (sealed) inside the area surrounded by the sealing material. The first region (the region where the pixel electrode is disposed) is a display region where display is performed, and the second region is a seal region where the sealing material is disposed.

  When the surface of the first alignment layer in the seal region, that is, the first alignment layer in contact with the seal material has higher affinity with water than the surface of the first alignment layer in the display region, the seal material and the first alignment layer Moisture (humidity) trying to enter through the interface is constrained (trapped) by the first alignment layer in a portion having a high affinity with water, and is difficult to enter inside the region surrounded by the sealing material. When the surface of the second alignment layer in the seal region, that is, the second alignment layer in contact with the seal material, has higher affinity with water than the surface of the second alignment layer in the display region, the seal material and the second alignment layer Moisture (humidity) entering through the interface is constrained (trapped) in a portion having high affinity with water, and is difficult to enter inside the region surrounded by the sealing material.

Since at least one of the surface of the first alignment layer and the surface of the second alignment layer has a higher affinity for water in the seal region than in the display region, the interface between the first alignment layer and the sealant is interposed. At least one of the moisture that tries to penetrate and the moisture that tries to penetrate through the interface between the second alignment layer and the sealing material is a portion having a high affinity with water (the surface of the first orientation layer and the first It is trapped by at least one of the surfaces of the two alignment layers, and is less likely to enter the inside of the region surrounded by the sealing material, that is, the electro-optic layer.
Accordingly, since moisture intrusion into the electro-optical layer is suppressed, adverse effects due to water intrusion into the electro-optical layer, that is, deterioration in display quality of the electro-optical device can be suppressed, and display quality of the electro-optical device can be improved.

  Application Example 2 In the electro-optical device according to the application example described above, a third region is provided between the first region and the second region, and the surface of the first alignment layer and the second alignment layer At least one of the surfaces preferably has a high affinity for water in the order of the first region, the third region, and the second region.

A third region is disposed between the display region (first region) and the seal region (second region), and at least one of the surface of the first alignment layer and the surface of the second alignment layer extends from the display region to the seal region. The affinity with water is increased in the direction toward, and the affinity with water is decreased in the direction from the seal area toward the display area.
Therefore, at least one of the moisture that tries to enter through the interface between the first alignment layer and the sealing material and the moisture that tries to enter through the interface between the second alignment layer and the sealing material is the water in the sealing region. Is trapped by the portion with high affinity (at least one of the surface of the first alignment layer and the surface of the second alignment layer) and hardly enters the area surrounded by the sealing material, that is, the electro-optic layer. Become.

  Furthermore, it is easy to move (discharge) the moisture in the electro-optic layer in the direction from the display area toward the seal area. That is, the moisture in the electro-optic layer in the display area can be moved (discharged) in the direction toward the seal area, and the adverse effect on the display of moisture in the electro-optic layer in the display area can be reduced.

  Application Example 3 In the electro-optical device according to the application example described above, a third region is provided between the first region and the second region, and the surface of the first alignment layer and the second alignment layer It is preferable that at least one of the surfaces has the same affinity for water in the second region and the third region.

A third region is disposed between the display region (first region) and the seal region (second region), and at least one of the surface of the first alignment layer and the surface of the second alignment layer is more than the first region. The affinity with water is high, and the affinity with water is the same in the third region and the second region.
Therefore, at least one of the moisture that tries to enter through the interface between the first alignment layer and the sealing material and the moisture that tries to enter through the interface between the second alignment layer and the sealing material is the water in the sealing region. Is trapped by the portion with high affinity (at least one of the surface of the first alignment layer and the surface of the second alignment layer) and hardly enters the area surrounded by the sealing material, that is, the electro-optic layer. Become.

  Even if moisture enters the electro-optic layer through the interface between the alignment layer and the sealing material, the moisture has a portion with high affinity with water in the third region (the surface of the first alignment layer and the surface). It is trapped by at least one of the surfaces of the second alignment layer, and does not easily enter the display region, and the adverse effect on the display of moisture can be further reduced.

  Application Example 4 In the electro-optical device according to the application example described above, the first alignment layer covers the third alignment layer and the third alignment layer, and has a lower affinity for water than the third alignment layer. A fourth alignment layer, wherein the first alignment layer in the second region is composed of the third alignment layer, and the first alignment layer in the first region is the third alignment layer and the fourth alignment layer. It is preferable that it is comprised by these.

  Since the surface of the first alignment layer in the second region is a third alignment layer, and the surface of the first alignment layer in the first region is a fourth alignment layer having a lower affinity with water than the third alignment layer, The surface of the first alignment layer in the second region can have higher affinity with water than the surface of the first alignment layer in the first region.

  Application Example 5 In the electro-optical device according to the application example described above, the first alignment layer covers the third alignment layer and the third alignment layer, and has a lower affinity with water than the third alignment layer. A fourth alignment layer, and a fifth alignment layer that covers the third alignment layer and has a lower affinity with water than the third alignment layer and a higher affinity with water than the fourth alignment layer, The first alignment layer in the second region is composed of the third alignment layer, the first alignment layer in the first region is composed of the third alignment layer and the fourth alignment layer, and the third alignment layer. The first alignment layer in the region is preferably composed of the third alignment layer and the fifth alignment layer.

  The surface of the first alignment layer in the second region is the third alignment layer, and the surface of the first alignment layer in the third region has a lower affinity with water than the third alignment layer, and more water than the fourth alignment layer. Since the surface of the first alignment layer in the first region is a fourth alignment layer having a lower affinity with water than the third alignment layer, the surface of the first alignment layer Can increase the affinity with water in the order of the first region, the third region, and the second region.

  Application Example 6 In the electro-optical device according to the application example described above, the second alignment layer covers the sixth alignment layer and has a lower affinity with water than the sixth alignment layer. A second alignment layer of the second region, and the second alignment layer of the first region includes the sixth alignment layer and the seventh alignment layer. It is preferable that it is comprised by these.

  Since the surface of the second alignment layer in the second region is the sixth alignment layer, and the surface of the second alignment layer in the first region is the seventh alignment layer having a lower affinity with water than the sixth alignment layer, The surface of the second alignment layer in the second region can have higher affinity with water than the surface of the second alignment layer in the first region.

  Application Example 7 In the electro-optical device according to the application example, the second alignment layer covers the sixth alignment layer and the sixth alignment layer, and has a lower affinity with water than the sixth alignment layer. And an eighth alignment layer covering the sixth alignment layer and having a lower affinity with water than the sixth alignment layer and a higher affinity with water than the seventh alignment layer, The second alignment layer in the second region is composed of the sixth alignment layer, the second alignment layer in the first region is composed of the sixth alignment layer and the seventh alignment layer, and the third region The second alignment layer is preferably composed of the sixth alignment layer and the eighth alignment layer.

  The surface of the second alignment layer in the second region is the sixth alignment layer, and the surface of the second alignment layer in the third region has a lower affinity with water than the sixth alignment layer, and more water than the seventh alignment layer. Since the surface of the second alignment layer in the first region is the seventh alignment layer having a lower affinity with water than the sixth alignment layer, the surface of the second alignment layer Can increase the affinity with water in the order of the first region, the third region, and the second region.

  Application Example 8 An electro-optical device according to this application example includes a substrate and an alignment layer disposed so as to cover the substrate, and the surface of the second region which is a region overlapping the sealing material of the alignment layer Has a higher affinity for water than the surface of the first region, which is an inner region of the second region of the alignment layer.

The second area, which is an area overlapping with the seal material, is a seal area where the seal material is disposed, and the first area, which is an area inside the second area, is a display area where display is performed.
Since the surface of the sealing region (second region) of the alignment layer has a higher affinity for water than the surface of the display region (first region) of the alignment layer, the display region is interposed via the interface between the alignment layer and the sealing material. Moisture that tends to enter the trap is trapped in a portion having a high affinity with water (the surface of the sealing region of the alignment layer) and hardly enters the display region.
Accordingly, it is possible to suppress the display quality from being deteriorated due to moisture intrusion into the display area.

  Application Example 9 An electronic apparatus described in this application example includes the electro-optical device described in the application example.

  In the electro-optical device described in the application example, since the display quality is prevented from being deteriorated due to moisture intrusion into the electro-optical layer, and the display quality is improved, the electron to which the electro-optical device described in the application example is applied is applied. The device will have excellent display quality. For example, for electronic devices such as projectors, direct-view TVs, mobile phones, portable audio devices, personal computers, video cameras with monitors, car navigation systems, electronic notebooks, calculators, workstations, videophones, POS terminals, digital still cameras, etc. By applying the electro-optical device described in the application example, excellent display quality can be realized.

  Application Example 10 In the method of manufacturing an electro-optical device according to this application example, a first substrate having a pixel electrode and a first alignment layer covering the pixel electrode, a second alignment covering the common electrode and the common electrode. A second substrate having a layer is bonded via a sealing material provided so as to surround the region where the pixel electrode is disposed, and an electro-optic layer is disposed in the region surrounded by the sealing material In the method of manufacturing an optical device, when the first substrate side is viewed from the second substrate side, the region where the pixel electrode is disposed is the first region, and the region where the sealing material is provided. When forming the second region, a step of forming a third alignment layer on the first substrate so as to cover the first region and the second region, and covering the surface of the third alignment layer, the third alignment Forming a fourth alignment layer having a lower affinity for water than the layer; and Was irradiated with light, characterized in that it comprises a step of removing said fourth alignment layer of the second region.

  After sequentially forming the third alignment layer and the fourth alignment layer having a lower affinity for water than the third alignment layer so as to cover the first region and the second region, the second region is irradiated with light. The third alignment layer is disposed in the second region by removing the fourth alignment layer in the second region, and the first alignment layer in which the third alignment layer and the fourth alignment layer are disposed in the first region. Can be formed. That is, it is possible to form the first alignment layer whose affinity for water is higher in the second region than in the first region.

  Application Example 11 In the method of manufacturing the electro-optical device according to the application example described above, irradiation is performed in the step of having a third region between the first region and the second region and removing the fourth alignment layer. The fourth alignment layer in the third region is irradiated with light having a lower energy density per unit area than the light to be emitted, and the fourth alignment layer in the third region is more water than the fourth alignment layer. It is preferable to convert to a fifth alignment layer having high affinity.

  The fourth alignment layer is irradiated with light having a lower energy density per unit area than the light that removes (decomposes) the fourth alignment layer, and the fourth alignment layer is partially decomposed to partially decompose the fourth alignment layer. A fifth alignment layer having a higher affinity with water is formed. As a result, the third alignment layer is disposed in the second region, the third alignment layer and the fifth alignment layer are disposed in the third region, and the third alignment layer and the fourth alignment layer are disposed in the first region. The first alignment layer can be formed, and the affinity of the first alignment layer with water can be increased in the order of the first region, the third region, and the second region.

  Application Example 12 An electro-optical device manufacturing method according to this application example includes a first substrate having a pixel electrode and a first alignment layer covering the pixel electrode, and a second alignment covering the common electrode and the common electrode. A second substrate having a layer is bonded via a sealing material provided so as to surround the region where the pixel electrode is disposed, and an electro-optic layer is disposed in the region surrounded by the sealing material In the method of manufacturing an optical device, when the first substrate side is viewed from the second substrate side, the region where the pixel electrode is disposed is the first region, and the region where the sealing material is provided. When forming the second region, a step of forming a sixth alignment layer on the second substrate so as to cover the first region and the second region, and covering the surface of the sixth alignment layer, the sixth alignment Forming a seventh alignment layer having a lower affinity for water than the layer; and Was irradiated with light, characterized in that it comprises a step of removing the seventh alignment layer of the second region.

  After sequentially forming the sixth alignment layer and the seventh alignment layer having a lower affinity for water than the sixth alignment layer so as to cover the first region and the second region, the second region is irradiated with light. The sixth alignment layer is disposed in the second region by removing the seventh alignment layer in the second region, and the second alignment layer in which the sixth alignment layer and the seventh alignment layer are disposed in the first region. Can be formed. That is, it is possible to form the second alignment layer whose affinity for water is higher in the second region than in the first region.

  Application Example 13 In the method of manufacturing an electro-optical device according to the application example described above, irradiation is performed in a step of removing the seventh alignment layer having a third region between the first region and the second region. The third region is irradiated with light having a lower energy density per unit area than the light to be emitted, and the seventh alignment layer in the third region has an affinity for water higher than that of the seventh alignment layer. It is preferable to convert to a layer.

  The seventh alignment layer is partially decomposed by irradiating the seventh alignment layer in the third region with light having a lower energy density per unit area than the light for removing (decomposing) the seventh alignment layer. An eighth alignment layer having a higher affinity with water is formed. As a result, the sixth alignment layer is disposed in the second region, the sixth alignment layer and the eighth alignment layer are disposed in the third region, and the sixth alignment layer and the seventh alignment layer are disposed in the first region. The second alignment layer can be formed, and the affinity of the second alignment layer with water can be increased in the order of the first region, the third region, and the second region.

  Application Example 14 In the electro-optical device manufacturing method described in the application example, it is preferable that the light is ultraviolet light having a wavelength of 180 nm to 400 nm.

  When the fourth alignment layer and the seventh alignment layer are irradiated with ultraviolet rays in the range of 180 nm to 400 nm, the fourth alignment layer and the seventh alignment layer can be efficiently decomposed and removed.

FIG. 2 is a schematic plan view showing the configuration of the liquid crystal device according to the first embodiment. FIG. 2 is a schematic cross-sectional view of the liquid crystal device along the line A-A ′ of FIG. 1. FIG. 3 is an equivalent circuit diagram illustrating an electrical configuration of the liquid crystal device according to the first embodiment. (A) is a schematic sectional drawing of a counter substrate, (b) is a schematic sectional drawing of an element substrate. 5 is a process flow of a characteristic part of the method for manufacturing the liquid crystal device according to the first embodiment. FIG. 6 is a schematic cross-sectional view of an element substrate showing a state after undergoing main steps of the process flow shown in FIG. 5. FIG. 6 is a schematic cross-sectional view of a counter substrate showing a state after the main process of the process flow shown in FIG. 5 is performed. (A) is a structural diagram of the silane coupling agent, (b) is a structural diagram schematically showing the state of the alignment layer provided on the element substrate and the counter substrate. (A) is a schematic sectional drawing of the opposing board | substrate of the liquid crystal device which concerns on Embodiment 2, (b) is a schematic sectional drawing of the element substrate of the liquid crystal device which concerns on Embodiment 2. FIG. 10 is a process flow of a characteristic part of the method for manufacturing a liquid crystal device according to the second embodiment. FIG. 11 is a schematic cross-sectional view of an element substrate showing a state after undergoing main processes in the process flow shown in FIG. 10. FIG. 11 is a schematic cross-sectional view of the counter substrate showing a state after the main process of the process flow shown in FIG. 10 is performed. (A) is a schematic sectional drawing of the opposing board | substrate of the liquid crystal device which concerns on Embodiment 3, (b) is a schematic sectional drawing of the element substrate of the liquid crystal device which concerns on Embodiment 3. FIG. Schematic which shows the structure of a projection type display apparatus.

  Embodiments of the present invention will be described below with reference to the drawings. Such an embodiment shows one aspect of the present invention and does not limit the present invention, and can be arbitrarily changed within the scope of the technical idea of the present invention. In each of the following drawings, the scale of each layer or each part is made different from the actual scale so that each layer or each part can be recognized on the drawing.

(Embodiment 1)
"Outline of LCD"
The liquid crystal device 1 according to Embodiment 1 is a transmissive liquid crystal device including a thin film transistor (hereinafter referred to as TFT) 30 and can be suitably used as, for example, a light modulation element of a liquid crystal projector described later.
The liquid crystal device 1 is an example of the “electro-optical device” in the present invention.

  FIG. 1 is a schematic plan view showing the configuration of the liquid crystal device. FIG. 2 is a schematic cross-sectional view of the liquid crystal device taken along line A-A ′ of FIG. 1. FIG. 3 is an equivalent circuit diagram showing an electrical configuration of the liquid crystal device. Hereinafter, an overall configuration of the liquid crystal device 1 according to the present embodiment will be described with reference to FIGS. 1 to 3.

  As shown in FIGS. 1 and 2, the liquid crystal device 1 according to the present embodiment includes an element substrate 10 and a counter substrate 20 that are arranged to face each other, and a liquid crystal layer 50 that is sandwiched between the pair of substrates. Have.

The element substrate 10 is larger than the counter substrate 20 and has a rectangular shape. The element substrate 10 is bonded to the counter substrate 20 via a sealing material 52 disposed along the outer periphery of the counter substrate 20. As the sealing material 52, for example, an adhesive such as a thermosetting or ultraviolet curable epoxy resin can be used. A spacer (not shown) that holds the element substrate 10 and the counter substrate 20 at a constant interval (gap) is mixed in the sealing material 52. A liquid crystal layer 50 is sealed (sealed) in a region surrounded by the sealing material 52.
The liquid crystal layer 50 is an example of the “electro-optic layer” in the present invention.

  The liquid crystal layer 50 has negative dielectric anisotropy, and has a uniaxial vertical alignment in which a pretilt is given to the first alignment layer 41 of the element substrate 10 and the second alignment layer 42 of the counter substrate 20. ing.

In sealing (filling) the liquid crystal layer 50 into the gap between the element substrate 10 and the counter substrate 20, a sealing material 52 is disposed along the outer periphery of one of the pair of substrates, and the sealing material 52 is placed inside the sealing material 52. An ODF (One Drop Fill) method is employed in which a fixed amount of the liquid crystal layer 50 is dropped, and one substrate on which the liquid crystal layer 50 is dropped is bonded to the other substrate under reduced pressure.
In the sealing (filling) of the liquid crystal layer 50, a method of filling (injecting) the liquid crystal layer 50 into the gap between the element substrate 10 and the counter substrate 20 through the injection hole by providing an injection hole in the sealing material 52, for example, You may employ | adopt the method of injecting using a vacuum injection method or a capillary phenomenon.

  A frame-shaped parting part 53 is provided inside the area surrounded by the sealing material 52. Inside the region surrounded by the parting portion 53, the pixel P1 (pixel electrode 12) and the dummy pixel P2 (dummy pixel electrode 12a) are arranged.

The pixels P1 (pixel electrodes 12) are arranged in a matrix, and the area where the pixels P1 (pixel electrodes 12) are arranged becomes the display area V. In other words, when the element substrate 10 (element substrate body 11) side is viewed from the counter substrate 20 (counter substrate body 21) side, the area where the pixel P1 (pixel electrode 12) is disposed becomes the display area V. . A non-display area H is a peripheral edge of the display area V, that is, between the display area V and the end of the counter substrate 20 (counter substrate body 21).
The display area V is an example of the “first area” in the present invention.

The dummy pixel P2 (dummy pixel electrode 12a) is arranged between the parting portion 53 and the display area V. Specifically, two dummy pixels P <b> 2 are arranged between the parting portion 53 and the display region V along the long side direction of the element substrate 10. The dummy pixel P2 has the same configuration as the pixel P1, and is supplied with a signal that always displays black. That is, a light shielding region for shielding light is formed by the dummy pixel P2 and the parting portion 53. The inner side of the light shielding area formed by the dummy pixel P2 and the parting portion 53 is a display area V.
Note that the number of dummy pixels P2 disposed along the long side direction of the element substrate 10 between the parting portion 53 and the display region V is not limited to two. There may be a plurality. Furthermore, the structure which does not provide the dummy pixel P2 may be sufficient.
A sealing material 52 is disposed between the parting portion 53 and the end of the counter substrate 20 (counter substrate main body 21).

A region where the dummy pixel P2 is provided is a dummy pixel region H1, and is provided so as to surround the display region V. A region where the seal material 52 is provided is a seal region H3 and is disposed so as to surround the parting region H2. In other words, when the element substrate 10 (element substrate body 11) side is viewed from the counter substrate 20 (counter substrate body 21) side, the region where the sealing material 52 is provided becomes the seal region H3. A region between the sealing material 52 and the dummy pixel region H1 is a parting region H2. The parting part 53 is provided in at least a part of the parting area H2. The non-display area H includes a dummy pixel area H1, a parting area H2, and a seal area H3.
The seal region H3 is an example of the “second region” in the present invention. The parting area H2 is an example of the “third area” in the present invention.

  One end of the seal region H3 is disposed at the end of the counter substrate 20 (counter substrate main body 21). One end of the parting area H2 (the other end of the sealing area H3) is disposed between the sealing material 52 and the parting part 53, and forms a boundary between the sealing area H3 and the parting area H2. The other end of the parting area H2 is arranged at the boundary between the parting part 53 and the dummy pixel P2, and forms the boundary between the parting area H2 and the dummy pixel area H1.

  A data line driving circuit 101 is provided between the first side of the element substrate 10 and the sealing material 52 along the first side. A scanning line driving circuit 102 is provided between the seal material 52 and the display region V along other second and third sides that are orthogonal to the first side and face each other. Between the sealing material 52 and the display area V along the other fourth side facing the first side, a plurality of wirings 105 that connect the two scanning line driving circuits 102 are provided. A plurality of external connection terminals 103 are provided at the end of the element substrate 10 on the side where the data line driving circuit 101 is provided. Between the plurality of external connection terminals 103 and the data line driving circuit 101 and the scanning line driving circuit 102, wirings for electrically connecting each of them are provided.

As shown in FIG. 2, the element substrate 10 includes an element substrate main body 11, a thin film transistor (hereinafter referred to as TFT) 30 provided on the surface of the element substrate main body 11 on the liquid crystal layer 50 side, a dummy TFT 30a, The data line driving circuit 101, the scanning line driving circuit 102, the interlayer insulating layer 31, the pixel electrode 12, the dummy pixel electrode 12a, the external connection terminal 103, the first alignment layer 41, and the like are included.
In other words, the element substrate 10 includes the element substrate body 11 in which the pixel electrode 12 is disposed, and the first alignment layer 41 disposed so as to cover the pixel electrode 12.
The element substrate body 11 is an example of the “first substrate” in the present invention.

  The element substrate body 11 is composed of a light-transmitting insulating substrate such as a quartz substrate or a glass substrate. On the surface of the element substrate body 11 on the liquid crystal layer 50 side, a TFT 30, a dummy TFT 30a, a data line driving circuit 101, a scanning line driving circuit 102, and the like are provided. The TFT 30 and the dummy TFT 30a are, for example, n-channel TFTs and have the same configuration. The data line driving circuit 101 and the scanning line driving circuit 102 are composed of, for example, CMOS TFTs having an n-channel TFT and a p-channel TFT. The TFT 30, the dummy TFT 30a, the data line driving circuit 101, and the scanning line driving circuit 102 are formed in the same process and have a semiconductor layer, a plurality of conductive layers, and a plurality of insulating layers. The data line driving circuit 101 and the scanning line driving circuit 102 are electrically connected to the external connection terminal 103 by a three-dimensional wiring (not shown) formed using the plurality of conductive layers and the plurality of insulating layers. Yes.

  The TFT 30, the dummy TFT 30 a, the data line driving circuit 101, and the scanning line driving circuit 102 are covered with an interlayer insulating layer 31. The interlayer insulating layer 31 is made of a light-transmitting insulating film such as silicon oxide. On the interlayer insulating layer 31, the pixel electrode 12, the dummy pixel electrode 12a, the external connection terminal 103, and the like are provided. The pixel electrode 12 and the dummy pixel electrode 12a are made of a transparent conductive material such as ITO (Indium Tin Oxide).

  The pixel electrode 12 is electrically connected to the drain of the TFT 30 through a contact hole (not shown) that penetrates the interlayer insulating layer 31. The dummy pixel electrode 12 a is electrically connected to the drain of the dummy TFT 30 a through a contact hole (not shown) that penetrates the interlayer insulating layer 31.

A first alignment layer 41 is provided so as to cover the pixel electrode 12 and the dummy pixel electrode 12a. The first alignment layer 41 is provided so as to overlap the counter substrate 20 in a planar manner. For example, the first alignment layer 41 may be provided so as to cover substantially the entire surface of the element substrate body 11. When the first alignment layer 41 is provided so as to cover substantially the entire surface of the element substrate body 11, it is necessary to form a contact hole that exposes the external connection terminal 103 in the first alignment layer 41.
Details of the first alignment layer 41 will be described later.

The counter substrate 20 includes a counter substrate body 21, a parting portion 53, an insulating film 22, a common electrode 23, a second alignment layer 42, and the like that are sequentially stacked on the surface of the counter substrate body 21 on the liquid crystal layer 50 side. .
In other words, the counter substrate 20 includes the counter substrate body 21 in which the common electrode 23 is disposed, and the second alignment layer 42 disposed so as to cover the common electrode 23.
The counter substrate body 21 is an example of the “second substrate” in the present invention.

  The counter substrate main body 21 is composed of a light-transmitting insulating substrate such as a quartz substrate or a glass substrate. The parting part 53 is made of, for example, a light-shielding metal or metal oxide. The parting part 53 is provided so as to overlap the above-described scanning line driving circuit 102 in a plan view, blocks light incident from the counter substrate 20 side, and prevents malfunction of the scanning line driving circuit 102 due to light. Moreover, the parting part 53 is shielded so that unnecessary stray light does not enter the display region V, thereby increasing the display contrast in the display region V.

  The insulating film 22 is made of a light-transmitting inorganic insulating material, and for example, silicon oxide formed using a normal pressure or low pressure CVD method can be used. The insulating film 22 has a film thickness that can relieve surface irregularities caused by forming the parting portion 53 on the counter substrate body 21.

The common electrode 23 is formed on the insulating film 22 and is made of a transparent conductive material such as ITO. The common electrode 23 is provided on substantially the entire surface of the counter substrate body 21. The common electrode 23 is electrically connected to the routing wiring (not shown) of the element substrate 10 by the vertical conduction portions 106 provided at the four corners of the counter substrate 20.
Details of the second alignment layer 42 will be described later.

  As shown in FIG. 3, the liquid crystal device 1 includes a plurality of scanning lines 5 and a plurality of data lines 6 that are insulated from each other and orthogonal to each other at least in the display region V, and a capacitor line 7 that is parallel to the scanning lines 5. . The arrangement of the capacitor line 7 is not limited to this, and the capacitor line 7 may be arranged parallel to the data line 6.

A pixel electrode 12, a TFT 30, and a storage capacitor 70 are provided in a region divided by the scanning line 5 and the data line 6, and these constitute a pixel circuit of the pixel P1.
Although not shown, a dummy pixel electrode 12a, a dummy TFT 30a, and a dummy storage capacitor are provided in a region divided by the scanning line 5 and the data line 6, and these are the pixel circuit of the dummy pixel P2. Is configured.

  The scanning line 5 is electrically connected to the gate of the TFT 30, and the data line 6 is electrically connected to the source of the TFT 30. The pixel electrode 12 is electrically connected to the drain of the TFT 30.

  The data lines 6 are connected to a data line driving circuit 101 (see FIG. 1), and image signals D1, D2,..., Dn are supplied from the data line driving circuit 101 to the respective pixels P1 through the data lines 6. . The scanning line 5 is connected to the scanning line driving circuit 102, and scanning signals SC1, SC2,..., SCm are supplied from the scanning line driving circuit 102 to the respective pixels P1 through the scanning line 5. The image signals D1 to Dn supplied from the data line driving circuit 101 to the data lines 6 may be supplied line-sequentially in this order, or may be supplied for each group of data lines 6 adjacent to each other. .

  In the liquid crystal device 1, the image signals D1 to Dn are supplied from the data line 6 in synchronization with the timing when the TFT 30 as a switching element is turned on for a certain period by the input of the scanning signals SC1 to SCm. The electric charge corresponding to Dn is accumulated in the capacitance between the pixel electrode 12 and the common electrode 23 and is held for a certain period.

  In order to reduce the influence of leakage of charges accumulated in the capacitance between the pixel electrode 12 and the common electrode 23, a storage capacitor 70 is added in parallel with the liquid crystal capacitance between the pixel electrode 12 and the common electrode 23. ing. The storage capacitor 70 is provided between the drain of the TFT 30 and the capacitor line 7.

  Such a liquid crystal device 1 is of a transmissive type, and the transmittance of a pixel when no voltage is applied is larger than the transmittance when a voltage is applied and the display is bright, or when no voltage is applied. A normally black mode optical design is adopted in which the transmittance of the pixel is smaller than the transmittance when a voltage is applied and dark display is achieved. Depending on the optical design, polarizing elements (not shown) are respectively used on the light incident side and the light emitting side.

"Outline of alignment layer"
FIG. 4A is a diagram in which the counter substrate is extracted from FIG. 2, and is a schematic cross-sectional view of the counter substrate. FIG. 4B is a diagram in which the element substrate is extracted from FIG. 2, and is a schematic cross-sectional view of the element substrate.
In FIG. 4A and FIG. 4B, the sealing material 52 is shown by phantom lines.
Hereinafter, with reference to FIG. 4A and FIG. 4B, details of the alignment layers 41 and 42 provided on the element substrate 10 and the counter substrate 20 will be described.

  As shown in FIG. 4A, the second alignment layer 42 of the counter substrate 20 includes a sixth alignment layer 46 and a seventh alignment layer 47. The sixth alignment layer 46 is provided so as to cover the common electrode 23, and is disposed in the entire display area V and non-display area H. The seventh alignment layer 47 is provided so as to cover the sixth alignment layer 46, and is disposed in the display region V, the dummy pixel region H1, and the parting region H2.

  The second alignment layer 42 disposed in the seal region H <b> 3 includes a sixth alignment layer 46. The second alignment layer 42 disposed in the dummy pixel region H 1, the parting region H 2, and the display region V is composed of a sixth alignment layer 46 and a seventh alignment layer 47.

The sixth alignment layer 46 is an inorganic alignment layer made of, for example, silicon oxide. The seventh alignment layer 47 is a hydrophobic film formed by subjecting the surface of the sixth alignment layer 46 to a hydrophobic treatment, and has a lower affinity with water than the sixth alignment layer 46.
Therefore, the portion where the surface of the second alignment layer 42 is the sixth alignment layer 46 is a portion having a high affinity with water, and the portion where the surface of the second alignment layer 42 is the seventh alignment layer 47 is water and It becomes a part with low affinity.

  The surface of the second alignment layer 42 in the parting region H2, the dummy pixel region H1, and the display region V is the seventh alignment layer 47, and the surface of the second alignment layer 42 in the seal region H3 is the sixth alignment layer 46. The surface of the second alignment layer 42 in the parting region H2, the dummy pixel region H1, and the display region V has a lower affinity with water than the surface of the second alignment layer 42 in the seal region H3. That is, the surface of the second alignment layer 42 in the seal region H3 has higher affinity with water than the surface of the second alignment layer 42 in the display region V. Therefore, the surface of the second alignment layer 42 has a higher affinity with water in the seal region H3 than in the display region V.

As shown in FIG. 4B, the first alignment layer 41 of the element substrate 10 includes a third alignment layer 43 and a fourth alignment layer 44. The third alignment layer 43 is provided so as to cover the pixel electrode 12 and the dummy pixel electrode 12a, and is disposed in the entire display area V and non-display area H. The fourth alignment layer 44 is provided so as to cover the third alignment layer 43, and is disposed in the display region V, the dummy pixel region H1, and the parting region H2.
As a result, the first alignment layer 41 disposed in the seal region H <b> 3 includes the third alignment layer 43. The first alignment layer 41 disposed in the dummy pixel region H <b> 1, the parting region H <b> 2, and the display region V is composed of a third alignment layer 43 and a fourth alignment layer 44.

  The third alignment layer 43 is an inorganic alignment layer made of, for example, silicon oxide, and has the same configuration as the sixth alignment layer 46. The fourth alignment layer 44 is a hydrophobic film formed by subjecting the surface of the third alignment layer 43 to a hydrophobic treatment, has the same configuration as the seventh alignment layer 47, and is more than the third alignment layer 43. Low affinity with water. Therefore, the portion where the surface of the first alignment layer 41 is the third alignment layer 43 is a portion having a high affinity with water, and the portion where the surface of the first alignment layer 41 is the fourth alignment layer 44 is water and It becomes a part with low affinity.

  Since the surface of the first alignment layer 41 of the parting region H2, the dummy pixel region H1, and the display region V is the fourth alignment layer 44, and the surface of the first alignment layer 41 of the seal region H3 is the third alignment layer 43. The surface of the first alignment layer 41 in the parting region H2, the dummy pixel region H1, and the display region V has a lower affinity for water than the surface of the first alignment layer 41 in the seal region H3. That is, the surface of the first alignment layer 41 in the seal region H3 has higher affinity with water than the surface of the first alignment layer 41 in the display region V. Therefore, the surface of the first alignment layer 41 has a higher affinity with water in the seal region H3 than in the display region V.

  As described above, in the counter substrate 20, the surface of the second alignment layer 42 in the seal region H <b> 3 has higher affinity with water than the surface of the second alignment layer 42 in the display region V. The surface of the first alignment layer 41 of H3 has higher affinity with water than the surface of the first alignment layer 41 in the display region V. That is, in both the element substrate 10 and the counter substrate 20, the alignment layers 41 and 42 in contact with the sealing material 52 have higher affinity with water than the alignment layers 41 and 42 in the display region V.

  Moisture (humidity) in the atmosphere may pass through the interface between the sealing material 52 and the alignment layers 41 and 42 and enter the liquid crystal layer 50. If moisture in the atmosphere passes through the interface between the sealing material 52 and the alignment layers 41 and 42 and enters (mixes) into the liquid crystal layer 50, for example, the specific resistance of the liquid crystal layer 50 decreases, and the pixel electrode 12 and Leakage of charge accumulated in the capacitor (liquid crystal capacitor, storage capacitor 70) between the common electrode 23 is increased, the effective voltage applied to the liquid crystal layer 50 is deteriorated, and display quality such as display unevenness is deteriorated. There is a fear. Further, when moisture that has entered the liquid crystal layer 50 is adsorbed to the alignment layers 41 and 42 in the display region V, the adsorbed moisture attracts ionic impurities in the liquid crystal layer, causes ionic impurities to be unevenly distributed, and displays such as burn-in. There is a risk of degrading quality.

  The alignment layers 41 and 42 in contact with the sealing material 52 (alignment layers 41 and 42 in the seal region H3) have higher affinity with water than the alignment layers 41 and 42 in the display region V. Moisture is more likely to be adsorbed (easily trapped) by the alignment layers 41 and 42 having a higher affinity with water than the alignment layers 41 and 42 having a lower affinity with water. Therefore, the moisture that is about to enter from the interface between the sealing material 52 and the alignment layers 41 and 42 is constrained (trapped) by the portion having high affinity with water (the alignment layers 41 and 42 in the seal region H3), and the liquid crystal layer 50 is difficult to enter. Accordingly, since moisture hardly enters the liquid crystal layer 50, it is difficult to cause deterioration in display quality such as display unevenness and image sticking as described above, and display quality can be improved.

  Furthermore, although inorganic alignment layers (the 3rd alignment layer 43, the 6th alignment layer 46), such as a silicon oxide, are excellent in heat resistance and light resistance compared with organic alignment layers, such as a polyimide, compared with an organic alignment layer. The anchoring force is weak, and the orientation force tends to decrease due to the influence of a slight disturbance. For example, the inorganic alignment layers (the third alignment layer 43 and the sixth alignment layer 46) easily adsorb moisture, and the alignment force tends to decrease due to the adsorption of moisture. That is, the inorganic alignment layers (the third alignment layer 43 and the sixth alignment layer 46) are inferior in moisture resistance compared to an organic alignment layer such as polyimide.

  In the display region V, the first alignment layer 41 of the element substrate 10 and the second alignment layer 42 of the counter substrate 20 are both inorganic alignment layers (third alignment layer 43 and sixth alignment layer 46) and hydrophobic coatings (first 4 alignment layer 44 and 7th alignment layer 47). That is, the alignment layers 41 and 42 in the display region V have a lower affinity with water than the alignment layers 41 and 42 in the seal region H3, are not easily affected by moisture, and have improved moisture resistance. Even if moisture in the atmosphere penetrates into the liquid crystal layer 50, it is difficult to adsorb to the alignment layers 41 and 42 in the display region V, so display unevenness (decrease in alignment force) and image sticking (uneven distribution of ionic impurities). It is difficult to cause a decrease in display quality such as, and the display quality can be improved.

"Liquid crystal device manufacturing method"
FIG. 5 is a process flow of a characteristic part of a method for manufacturing a liquid crystal device. FIG. 6 is a diagram corresponding to FIG. 4B, and is a schematic cross-sectional view of the element substrate showing a state after undergoing main processes of the process flow shown in FIG. 5. FIG. 7 is a diagram corresponding to FIG. 4A, and is a schematic cross-sectional view of the counter substrate showing a state after undergoing main processes of the process flow shown in FIG. 5. FIG. 8A is a structural diagram of the silane coupling agent, and FIG. 8B is a structural diagram schematically showing the state of the alignment layer provided on the element substrate and the counter substrate.

In FIG. 7, the upper and lower sides of FIG.
In FIG. 8B, the silicon oxide constituting the inorganic alignment layer (the third alignment layer 43 and the sixth alignment layer 46) is illustrated with the ratio of oxygen atoms (O) to silicon atoms (Si) being 2. . The ratio of oxygen atoms (O) to silicon atoms (Si) in silicon oxide constituting the inorganic alignment layers (third alignment layer 43 and sixth alignment layer 46) may be smaller than 2.
The manufacturing method of the liquid crystal device 1 according to the present embodiment is characterized in the process of forming the first alignment layer 41 and the second alignment layer 42, and other processes use known techniques. Below, with reference to FIG.4 and FIG.5, the feature point of the manufacturing method of the liquid crystal device 1 is demonstrated.

  As shown in FIG. 5, the method for manufacturing the liquid crystal device 1 includes a step of forming the third alignment layer 43 on the element substrate 10 (step S <b> 1) and a step of forming the fourth alignment layer 44 on the element substrate 10 (step S <b> 2). ), A process of removing the fourth alignment layer 44 by irradiating the seal region H3 with the ultraviolet ray 65 (step S3), a process of forming the sealing material 52 on the element substrate 10 (step S4), and a liquid crystal layer on the element substrate 10 50 (step S5), a step of forming the sixth alignment layer 46 on the counter substrate 20 (step S11), a step of forming the seventh alignment layer 47 on the counter substrate 20 (step S12), a seal A step of removing the seventh alignment layer 47 by irradiating the region H3 with the ultraviolet ray 65 (step S13) and a step of bonding the element substrate 10 and the counter substrate 20 (step S21) are included.

  Steps S <b> 1 to S <b> 3 are steps for forming the first alignment layer 41 on the element substrate 10, and characterize the method for manufacturing the liquid crystal device 1 according to the present embodiment. Steps S <b> 11 to S <b> 13 are steps for forming the second alignment layer 42 on the counter substrate 20, and characterize the method for manufacturing the liquid crystal device 1 according to the present embodiment.

  As shown in FIG. 6A, in step S <b> 1, silicon oxide is obliquely deposited on the element substrate 10 from the direction intersecting the thickness direction of the element substrate 10 to form the third alignment layer 43. That is, silicon oxide is made to fly from the oblique direction indicated by the arrow in the drawing, and silicon oxide is deposited on the element substrate 10 to form the third alignment layer 43. The third alignment layer 43 is formed in the display area V and the non-display area H. The region where the external connection terminal 103 is formed is masked with a metal mask (not shown) so that silicon oxide does not accumulate on the external connection terminal 103.

  As shown in FIG. 7A, in step S <b> 11, silicon oxide is obliquely deposited on the counter substrate 20 from the direction crossing the thickness direction of the counter substrate 20 to form the sixth alignment layer 46. That is, silicon oxide is allowed to fly from an oblique direction indicated by an arrow in the drawing, and silicon oxide is deposited on the counter substrate 20 to form the sixth alignment layer 46. The sixth alignment layer 46 is formed in the display region V and the non-display region H.

  The material for forming the third alignment layer 43 and the sixth alignment layer 46 may be any inorganic material that is transparent to visible light. For example, aluminum oxide, titanium oxide, or magnesium fluoride is used in addition to silicon oxide. can do. Furthermore, as a method for depositing the inorganic material, a method such as a sputtering method, an electron beam deposition method, or an ion assist deposition method can be used.

  As shown in FIG. 6B, in step S2, a silane coupling agent 90 (see FIG. 8A) is applied to the element substrate 10 by, for example, a spin coating method, a dip coating method, a printing method, or a spraying method. The fourth alignment layer 44 is formed on the third alignment layer 43 by performing heat treatment at approximately 100 ° C. to 200 ° C.

  As shown in FIG. 7B, in step S12, the silane coupling agent 90 is applied to the counter substrate 20 by, for example, a spin coating method, a dip coating method, a printing method, a spraying method, and the like, and is dried. A seventh alignment layer 47 is formed on the sixth alignment layer 46 by performing a heat treatment at a temperature of from about 200 ° C. to 200 ° C.

As shown in FIG. 8A, the silane coupling agent 90 includes a hydrolyzable alkoxy group 91 and a linear, cyclic or branched alkyl group 92 (hydrophobic group) having 1 to 20 carbon atoms. It is a silicon compound that has both. In the figure, the alkoxy group 91 is indicated by OR ₁ , and the alkyl group 92 (hydrophobic group) is indicated by R ₂ .

As shown in FIG. 8B, after the alkoxy group 91 of the silane coupling agent 90 is hydrolyzed by moisture to form a silanol group, the silanol group of the silane coupling agent 90 and the alignment layers 43 and 46 (silicon oxide) ) Undergo a dehydration condensation reaction, and the silane coupling agent 90 is bonded to the surfaces of the alignment layers 43 and 46 (silicon oxide).
In parallel with this reaction, silanol groups are condensed to form a silicon oligomer 94. That is, the silicon oligomer 94 is a polymer in which silicon compounds having a hydrophobic group (alkyl group 92) (silane coupling agent 90) as a monomer are polymerized. That is, the alignment layers 44 and 47 are a polymer (silicon oligomer 94) of a silicon compound having a hydrophobic group (alkyl group 92).

  In this manner, the fourth alignment layer 44 (silicon oligomer 94) covering the third alignment layer 43 is formed by applying the silane coupling agent 90 to the third alignment layer 43 and drying it. A seventh alignment layer 47 (silicon oligomer 94) that covers the sixth alignment layer 46 is formed by applying a silane coupling agent 90 and drying.

The silicon oligomer 94 has a linear, cyclic or branched alkyl group 92 (hydrophobic group) having 1 to 20 carbon atoms on the side opposite to the side bonded to the alignment layers 43 and 46 (the side in contact with the alignment layers 43 and 46). Is arranged. Therefore, when the alignment layers 43 and 46 are covered with the silicon oligomer 94 (alignment layers 44 and 47), the number of carbon atoms is increased on the surface of the laminate of the alignment layers 43 and 46 and the silicon oligomer 94 (alignment layers 44 and 47). 1 to 20 linear, cyclic or branched alkyl groups R ₂ (hydrophobic groups) are disposed, and the affinity with water is lower than that of silicon oxide (alignment layers 43 and 46).

  As described above, the fourth alignment layer 44 and the seventh alignment layer 47 are a polymer (silicon oligomer 94) of a silicon compound having an alkyl group 92 (hydrophobic group) at the terminal (surface). The surface of the film in which the third alignment layer 43 and the fourth alignment layer 44 are laminated by the alkyl group 92 (hydrophobic group) has a lower affinity for water than the surface of the third alignment layer 43, and the sixth alignment The surface of the film in which the layer 46 and the seventh alignment layer 47 are stacked has a lower affinity for water than the surface of the sixth alignment layer 46.

As shown in FIG. 6C, in step S3, for example, a mask 61 in which a light shielding film 63 such as chromium is provided on a quartz substrate 62 is used, and the display area V and the dummy pixel area H1 are formed by the light shielding film 63. The parting region H2 is shielded from light and the fourth alignment layer 44 in the seal region H3 is irradiated with ultraviolet rays 65 indicated by arrows in the drawing. Specifically, the wavelength range is 180Nm～400nm, illuminance ultraviolet 65 is ^{150mW / cm 2 ~240mW / cm 2} , irradiation schematic 40 seconds in the fourth alignment layer 44 of the sealing region H3. That is, the fourth alignment layer 44 in the seal region H3 is irradiated with ultraviolet rays 65 having a wavelength range of 180 nm to 400 nm and an integrated light amount (irradiation energy per unit area) of 6000 mJ / cm ^{2 to} 9600 mJ / cm ² . Then, the fourth alignment layer 44 in the seal region H3 is decomposed and removed.
As a result, the third alignment layer 43 is disposed in the seal region H3, and the third alignment layer 43 and the fourth alignment layer 44 are disposed in the dummy pixel region H1, the parting region H2, and the display region V. The first alignment layer 41 is formed on the element substrate 10.

  In step S2, when the fourth alignment layer 44 is also formed on the interlayer insulating layer 31 and the external connection terminal 103, the fourth alignment formed on the interlayer insulating layer 31 and the external connection terminal 103 is used. The layer 44 is decomposed and removed by irradiation with the ultraviolet ray 65 in step S3.

As shown in FIG. 7C, in step S13, the ultraviolet ray 65 under the same conditions as in step S3 described above, that is, the wavelength range is 180 nm to 400 nm, and the integrated light amount (irradiation energy per unit area) is 6000 mJ / cm ^2. The seventh alignment layer 47 in the seal region H3 is irradiated with ultraviolet rays 65 of ˜9600 mJ / cm ² to decompose and remove the seventh alignment layer 47 in the seal region H3.
As a result, the sixth alignment layer 46 disposed in the seal region H3, and the sixth alignment layer 46 and the seventh alignment layer 47 disposed in the dummy pixel region H1, the parting region H2, and the display region V are configured. A second alignment layer 42 is formed on the counter substrate 20.

  As shown in FIG. 6D, in step S4, a sealing material 52 (for example, epoxy resin) is applied on the third alignment layer 43 in the sealing region H3 of the element substrate 10 by using, for example, a dispenser.

  As shown in FIG. 6E, in step S5, the liquid crystal layer 50 is dropped inside the sealing material 52 using, for example, a dispenser.

In step S21, the counter substrate 20 is bonded to a predetermined position while being pressed against the element substrate 10, the sealing material 52 is cured, the counter substrate 20 and the element substrate 10 are bonded, and the counter substrate 20 and the element substrate 10 are bonded. A liquid crystal device 1 (see FIG. 2) in which a liquid crystal layer 50 is sealed (sealed) therebetween is formed.
In addition, step S5 and step S21 mentioned above are processed in the pressure-reduced atmosphere.

  With this manufacturing method, the alignment layers 41 and 42 having a high affinity with water in the seal region H3 and a low affinity with water in the display region V are stabilized on both the element substrate 10 and the counter substrate 20. Thus, it is possible to manufacture the liquid crystal device 1 in which the moisture is less likely to enter from the interface between the sealing material 52 and the alignment layers 41 and 42 and the display quality is improved.

(Embodiment 2)
"Outline of LCD"
FIG. 9A corresponds to FIG. 4A and is a schematic cross-sectional view of the counter substrate of the liquid crystal device according to the second embodiment. FIG. 9B is a diagram corresponding to FIG. 4B and is a schematic cross-sectional view of the element substrate of the liquid crystal device according to the present embodiment.
In the present embodiment, the configuration of the first alignment layer 41 of the element substrate 10 and the second alignment layer 42 of the counter substrate 20 and the manufacturing method thereof are different from those of the first embodiment. Other configurations are the same between the liquid crystal device 2 according to the present embodiment and the liquid crystal device 1 according to the first embodiment.
Hereinafter, an overview of the liquid crystal device 2 according to the present embodiment will be described with reference to FIG. 9A and FIG. 9B, focusing on differences from the first embodiment. In addition, about the component same as Embodiment 1, the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted.

As shown in FIG. 9A, the second alignment layer 42 of the counter substrate 20 includes a sixth alignment layer 46, a seventh alignment layer 47, and an eighth alignment layer 48. The sixth alignment layer 46 is provided so as to cover the pixel electrode 12 and the dummy pixel electrode 12a, and is disposed in the entire display area V and non-display area H. The seventh alignment layer 47 is provided so as to cover the sixth alignment layer 46, and is disposed in the display region V and the dummy pixel region H1. The eighth alignment layer 48 is provided so as to cover the sixth alignment layer 46 and is disposed in the parting region H2.
As a result, the second alignment layer 42 in the seal region H3 is configured by the sixth alignment layer 46, the second alignment layer 42 in the parting region H2 is configured by the sixth alignment layer 46 and the eighth alignment layer 48, and dummy pixels. The second alignment layer 42 in the region H1 and the display region V includes a sixth alignment layer 46 and a seventh alignment layer 47.

As shown in FIG. 9B, the first alignment layer 41 of the element substrate 10 includes a third alignment layer 43, a fourth alignment layer 44, and a fifth alignment layer 45. The third alignment layer 43 is provided so as to cover the pixel electrode 12 and the dummy pixel electrode 12a, and is disposed in the entire display area V and non-display area H. The fourth alignment layer 44 is provided so as to cover the third alignment layer 43, and is disposed in the display region V and the dummy pixel region H1. The fifth alignment layer 45 is provided so as to cover the third alignment layer 43 and is disposed in the parting region H2.
As a result, the first alignment layer 41 in the seal region H3 is configured by the third alignment layer 43, the first alignment layer 41 in the parting region H2 is configured by the third alignment layer 43 and the fifth alignment layer 45, and the dummy pixel. The first alignment layer 41 in the region H1 and the display region V includes a third alignment layer 43 and a fourth alignment layer 44.

The third alignment layer 43 and the sixth alignment layer 46 are inorganic alignment layers made of, for example, silicon oxide.
The fourth alignment layer 44, the fifth alignment layer 45, the seventh alignment layer 47, and the eighth alignment layer 48 were formed by subjecting the surface of the third alignment layer 43 or the sixth alignment layer 46 to a hydrophobic treatment. It is a hydrophobic coating and has a lower affinity for water than the third alignment layer 43 and the sixth alignment layer 46. Specifically, the fourth alignment layer 44, the fifth alignment layer 45, the seventh alignment layer 47, and the eighth alignment layer 48 are polymers of silicon compounds having a hydrophobic group (alkyl group 92) at the terminal (surface) (silicon This is an oligomer 94 (see FIG. 8B).

Although details will be described later, the fifth alignment layer 45 is formed by irradiating the fourth alignment layer 44 with light (ultraviolet rays), and has higher affinity with water than the fourth alignment layer 44.
The surface of the portion where the third alignment layer 43 is covered with the fourth alignment layer 44 (the first alignment layer 41 in the display region V and the dummy pixel region H1), and the third alignment layer 43 is covered with the fifth alignment layer 45. The affinity with water increases in the order of the surface of the part (first alignment layer 41 in the parting region H2) and the surface of the third alignment layer 43 (first alignment layer 41 in the seal region H3). That is, the first alignment layer 41 has higher affinity with water in the order of the display region V, the dummy pixel region H1, the parting region H2, and the seal region H3.

Although details will be described later, the eighth alignment layer 48 is formed by irradiating the seventh alignment layer 47 with light (ultraviolet rays), and has higher affinity with water than the seventh alignment layer 47.
The surface of the portion where the sixth alignment layer 46 is covered with the seventh alignment layer 47 (the second alignment layer 42 in the display region V and the dummy pixel region H1), and the sixth alignment layer 46 is covered with the eighth alignment layer 48. The affinity with water increases in the order of the surface of the portion (second alignment layer 42 in the parting region H2) and the surface of the sixth alignment layer 46 (second alignment layer 42 in the seal region H3). That is, the second alignment layer 42 has higher affinity with water in the order of the display region V, the dummy pixel region H1, the parting region H2, and the seal region H3.

  The alignment layers 41 and 42 in contact with the sealing material 52 (alignment layers 41 and 42 in the seal region H3) have higher affinity to water than the alignment layers 41 and 42 in other regions, adsorb moisture, and are restrained. Easy to trap. Therefore, moisture that tends to enter from the interface between the sealing material 52 and the alignment layers 41 and 42 is constrained (trapped) by the alignment layers 41 and 42 in the seal region H <b> 3 and hardly enters the liquid crystal layer 50. Accordingly, since moisture hardly enters the liquid crystal layer 50, it is difficult to cause deterioration in display quality such as display unevenness or image sticking, and the display quality can be improved.

  Furthermore, since the first alignment layer 41 and the second alignment layer 42 have a high affinity for water in the direction from the display region V toward the seal region H3, moisture and ionic impurities in the liquid crystal layer 50 are It is easy to move in the direction from the display area V toward the seal area H3. On the other hand, the first alignment layer 41 and the second alignment layer 42 have a low affinity for water in the direction from the seal region H3 to the display region V. Therefore, moisture and ionic impurities in the liquid crystal layer 50 are reduced. Is difficult to move in the direction from the seal area H3 toward the display area V. Therefore, moisture and ionic impurities in the liquid crystal layer 50 are less likely to enter the display region V side from the non-display region H, and are easily discharged from the display region V to the non-display region H side. And the adverse effect on the display of ionic impurities can be weakened.

"Liquid crystal device manufacturing method"
FIG. 10 is a process flow of a characteristic part of a method for manufacturing a liquid crystal device. FIG. 11 is a diagram corresponding to FIG. 6 and is a schematic cross-sectional view of the element substrate showing a state after the main process of the process flow shown in FIG. FIG. 12 is a diagram corresponding to FIG. 7 and is a schematic cross-sectional view of the counter substrate showing a state after the main process of the process flow shown in FIG.
The manufacturing method of the liquid crystal device 2 according to the present embodiment is characterized by the process of forming the first alignment layer 41 and the second alignment layer 42, and other processes use known techniques. Hereinafter, an outline of a method for manufacturing the liquid crystal device 2 will be described with reference to FIGS. 10 to 12 focusing on differences from the first embodiment.

  As shown in FIG. 10, the method for manufacturing the liquid crystal device 2 includes a step of forming the third alignment layer 43 on the element substrate 10 (step S1) and a step of forming the fourth alignment layer 44 on the element substrate 10 (step S2). ), A step of irradiating the seal region H3 and the parting region H2 with the ultraviolet ray 65 to form the fifth alignment layer 45 (step S31), and a step of irradiating the seal region H3 with the ultraviolet ray 65 to remove the fifth alignment layer 45 (step S31). Step S32), a step of forming the sealing material 52 on the element substrate 10 (Step S4), a step of dropping the liquid crystal layer 50 on the element substrate 10 (Step S5), and a sixth alignment layer 46 formed on the counter substrate 20 The step of forming the seventh alignment layer 47 on the counter substrate 20 (step S12), and the eighth alignment layer 48 by irradiating the seal region H3 and the parting region H2 with ultraviolet rays 65. A step of forming (step S14), a step of irradiating the seal region H3 with ultraviolet rays 65 to remove the eighth alignment layer 48 (step S15), a step of bonding the element substrate 10 and the counter substrate 20 (step S21), and including.

In addition, step S1, step S2, step S31, and step S32 are processes for forming the first alignment layer 41 on the element substrate 10, and are characteristic of the method for manufacturing the liquid crystal device 2 according to the present embodiment. Step S11, step S12, step S14, and step S15 are steps for forming the second alignment layer 42 on the counter substrate 20, and are characteristic of the method for manufacturing the liquid crystal device 2 according to the present embodiment.
Further, Step S1, Step S2, Step S4, Step S5, Step S11, Step S12, and Step S21 are the same as those in the first embodiment, and a description thereof is omitted.

As shown in FIG. 11A, in step S31, for example, a mask 61 in which a light shielding film 63 such as chrome is provided on a quartz substrate 62 is used, and the display area V and the dummy pixel area H1 are formed by the light shielding film 63. , And the fourth alignment layer 44 of the element substrate 10 disposed in the parting region H2 and the seal region H3 is irradiated with the ultraviolet ray 65 indicated by an arrow in the drawing. Specifically, the wavelength range is 180Nm～400nm, illuminance ultraviolet 65 is ^{150mW / cm 2 ~240mW / cm 2} , irradiation schematic 20 seconds in the fourth alignment layer 44 of the partition region H2 and the sealing region H3. That is, the wavelength range 180Nm～400nm, ultraviolet 65 is ^{3000mJ / cm 2 ~4800mJ / cm 2} ( irradiation energy per unit area) integrated light quantity, a fourth alignment layer of the parting region H2 and the sealing region H3 44 Irradiate.
Hereinafter, the integrated light amount (irradiation energy per unit area) is referred to as irradiation energy.

The irradiation energy of the ultraviolet ray 65 in the present embodiment is half of the irradiation energy of the ultraviolet ray 65 in the first embodiment. For this reason, the fourth alignment layer 44 in the seal region H3 is not completely decomposed but partially decomposed. In other words, the fifth alignment layer 45 is formed by partially decomposing the fourth alignment layer 44 by irradiating ultraviolet rays 65 having irradiation energy smaller than the irradiation energy for completely decomposing the fourth alignment layer 44.
Alternatively, ultraviolet rays 65 having irradiation energy smaller than the irradiation energy for completely decomposing the fourth alignment layer 44 are irradiated to partially decompose (oxidize) the alkyl group (R ₂ ) of the fourth alignment layer 44. Then, the fifth alignment layer 45 is formed.
As a result, the fifth alignment layer 45 formed in step S31 has a higher affinity for water than the fourth alignment layer 44, and a lower affinity for water than the third alignment layer 43.

  As described above, in step S31, the fourth alignment layer 44 is irradiated with the ultraviolet light 65 having an irradiation energy smaller than the irradiation energy for completely decomposing the fourth alignment layer 44, and the affinity with water is higher than that of the fourth alignment layer 44. The fifth alignment layer 45 is formed with a higher affinity for water than the third alignment layer 43.

As shown in FIG. 12A, in step S14, the ultraviolet rays 65 indicated by arrows in the drawing are irradiated to the seventh alignment layer 47 of the counter substrate 20 arranged in the parting region H2 and the seal region H3. Specifically, the wavelength range 180Nm～400nm, seventh alignment layer 47 of the irradiation energy 3000 mJ / cm ² ultraviolet 65 is ~4800mJ / cm ^2, a counter substrate 20 disposed in the partition region H2 and the sealing region H3 Irradiate. In other words, the eighth alignment layer 48 is formed by partially decomposing the seventh alignment layer 47 by irradiating the ultraviolet light 65 with irradiation energy smaller than the irradiation energy for completely decomposing the seventh alignment layer 47.
Alternatively, the ultraviolet light 65 having an irradiation energy smaller than the irradiation energy for completely decomposing the seventh alignment layer 47 is irradiated to partially decompose (oxidize) the alkyl group (R ₂ ) of the seventh alignment layer 47. Then, the eighth alignment layer 48 is formed.
As a result, the eighth alignment layer 48 formed in step S <b> 14 has a higher affinity for water than the seventh alignment layer 47 and a lower affinity for water than the sixth alignment layer 46.

  As described above, in step S14, the seventh alignment layer 47 is irradiated with the ultraviolet ray 65 having an irradiation energy smaller than the irradiation energy for completely decomposing the seventh alignment layer 47, and the affinity with water is higher than that of the seventh alignment layer 47. The eighth alignment layer 48 is formed, which has a higher affinity for water than the sixth alignment layer 46.

In step S31 and step S14, the alignment layers 44 and 47 having a low affinity with water are irradiated with ultraviolet rays 65 having irradiation energy smaller than the irradiation energy for completely decomposing, and the alignment layers 44 and 47 are partially decomposed. Alternatively, the alkyl groups (R ₂ ) of the alignment layers 44 and 47 are partially decomposed (oxidized) to convert the alignment layers 44 and 47 into alignment layers 45 and 48 (from the alignment layers 44 and 47 to the alignment layer). 45, 48). As a result, the alignment layers 45 and 48 having higher affinity with water than the alignment layers 44 and 47 and lower than the alignment layers 43 and 46 can be stably formed.

  For example, when the ultraviolet rays 65 having higher irradiation energy in the order of the A region, the B region, the C region, and the D region are irradiated to the A region, the B region, the C region, and the D region on the surfaces of the alignment layers 44 and 47, water and Can be increased in the order of the A region, the B region, the C region, and the D region. That is, the affinity of the alignment layers 45 and 48 with water is adjusted between the affinity of the alignment layers 43 and 46 and the affinity of the alignment layers 44 and 47 with the irradiation energy of the ultraviolet light 65. be able to.

As shown in FIG. 11B, in step S32, for example, a mask 61 in which a light shielding film 63 such as chromium is provided on a quartz substrate 62 is used, and the display area V and the dummy pixel area H1 are formed by the light shielding film 63. The parting region H2 is shielded from light, the ultraviolet ray 65 indicated by the arrow in the drawing is irradiated to the fifth alignment layer 45 of the element substrate 10 disposed in the seal region H3, and the fifth alignment layer 45 is decomposed, Remove. Specifically, the wavelength range 180Nm～400nm, ultraviolet 65 irradiation energy is ^{3000mJ / cm 2 ~4800mJ / cm 2} , was irradiated to the fifth alignment layer 45 of the sealing region H3, decomposing the fifth alignment layer 45 And remove.
In other words, the ultraviolet energy 65 of the irradiation energy that completely decomposes the fourth alignment layer 44 is irradiated in two steps, step S31 and step S32, to completely decompose the fourth alignment layer 44 in the seal region H3. Then, the third alignment layer 43 in the seal region H3 is exposed.

Then, through the steps S1, S2, S31, and S32, the third alignment layer 43 is disposed in the seal region H3, and the third alignment layer 43 and the fifth alignment layer 45 are disposed in the parting region H2. The first alignment layer 41 in which the third alignment layer 43 and the fourth alignment layer 44 are arranged is formed in the dummy pixel region H1 and the display region V, and the affinity of the first alignment layer 41 with water is displayed. The region V, the dummy pixel region H1, the parting region H2, and the seal region H3 can be made higher in this order.
As shown in FIG. 12B, the eighth alignment layer 48 of the counter substrate 20 arranged in the seal region H3 is irradiated with ultraviolet rays 65, and the eighth alignment layer 48 is decomposed and removed. Specifically, the wavelength range 180Nm～400nm, ultraviolet 65 irradiation energy is ^{3000mJ / cm 2 ~4800mJ / cm 2} , irradiating the eighth alignment layer 48 of the sealing region H3, decomposing the eighth alignment layer 48 And remove.

  In other words, the ultraviolet rays 65 of irradiation energy that completely decomposes the seventh alignment layer 47 are irradiated in two steps, Step S14 and Step S15, to completely decompose the seventh alignment layer 47 in the seal region H3. Then, the sixth alignment layer 46 in the seal region H3 is exposed.

  Then, through step S11, step S12, step S14, and step S15, the sixth alignment layer 46 is disposed in the seal region H3, and the sixth alignment layer 46 and the eighth alignment layer 48 are disposed in the parting region H2. The second alignment layer 42 in which the sixth alignment layer 46 and the seventh alignment layer 47 are arranged is formed in the dummy pixel region H1 and the display region V, and the affinity of the second alignment layer 42 with water is displayed. The region V, the dummy pixel region H1, the parting region H2, and the seal region H3 can be made higher in this order.

(Embodiment 3)
FIG. 13A corresponds to FIG. 4A and is a schematic cross-sectional view of the counter substrate of the liquid crystal device according to the third embodiment. FIG. 13B is a diagram corresponding to FIG. 4B and is a schematic cross-sectional view of the element substrate of the liquid crystal device according to the present embodiment.
In the present embodiment, the position of the fourth alignment layer 44 constituting the first alignment layer 41 of the element substrate 10 and the position of the seventh alignment layer 47 constituting the second alignment layer 42 of the counter substrate 20 are the same as those in the first embodiment. And different. Other configurations are the same between the liquid crystal device 3 according to the present embodiment and the liquid crystal device 1 according to the first embodiment.
Hereinafter, an overview of the liquid crystal device 3 according to the present embodiment will be described with reference to FIG. 13A and FIG. 13B, focusing on differences from the first embodiment. In addition, about the component same as Embodiment 1, the same code | symbol is attached | subjected and the overlapping description is abbreviate | omitted.

  As shown in FIG. 13A, the second alignment layer 42 of the counter substrate 20 includes a sixth alignment layer 46 and a seventh alignment layer 47. The sixth alignment layer 46 is provided so as to cover the common electrode 23, and is disposed in the entire display area V and non-display area H. The seventh alignment layer 47 is provided so as to cover the sixth alignment layer 46, and is disposed in the display region V and the dummy pixel region H1.

  Since the surface of the second alignment layer 42 in the display region V and the dummy pixel region H1 is the seventh alignment layer 47, and the surface of the second alignment layer 42 in the parting region H2 and the seal region H3 is the sixth alignment layer 46, The surface of the second alignment layer 42 in the parting region H2 and the seal region H3 has higher affinity with water than the surface of the second alignment layer 42 in the display region V and the dummy pixel region H1. Furthermore, since the surfaces of the second alignment layer 42 in the parting region H2 and the seal region H3 are both the sixth alignment layer 46, the surface of the second alignment layer 42 is in the parting region H2 and the seal region H3, The affinity is the same.

  As shown in FIG. 13B, the first alignment layer 41 of the element substrate 10 includes a third alignment layer 43 and a fourth alignment layer 44. The third alignment layer 43 is provided so as to cover the pixel electrode 12 and the dummy pixel electrode 12a, and is disposed in the entire display area V and non-display area H. The fourth alignment layer 44 is provided so as to cover the third alignment layer 43, and is disposed in the display region V and the dummy pixel region H1.

  Since the surface of the first alignment layer 41 in the display region V and the dummy pixel region H1 is the fourth alignment layer 44, and the surface of the first alignment layer 41 in the parting region H2 and the seal region H3 is the third alignment layer 43, The surface of the first alignment layer 41 in the parting region H2 and the seal region H3 has higher affinity with water than the surface of the first alignment layer 41 in the display region V and the dummy pixel region H1. Furthermore, since the surfaces of the first alignment layer 41 in the parting region H2 and the seal region H3 are both the third alignment layer 43, the surface of the first alignment layer 41 is in the parting region H2 and the seal region H3, The affinity is the same.

  Thus, in this embodiment, the alignment layers 41 and 42 in the parting region H2 and the seal region H3 have higher affinity with water than the alignment layers 41 and 42 in the display region V and the dummy pixel region H1. . On the other hand, in the first embodiment, the alignment layers 41 and 42 in the seal region H3 have higher affinity for water than the alignment layers 41 and 42 in the display region V, the dummy pixel region H1, and the parting region H2. . That is, the area of the portion of the alignment layers 41 and 42 where the affinity with water is increased is wider in the present embodiment than in the first embodiment. This is the difference between the present embodiment and the first embodiment.

  In the present embodiment, in addition to the alignment layers 41 and 42 in contact with the sealing material 52 (alignment layers 41 and 42 in the seal region H3), the alignment layers 41 and 42 in the parting region H2 are also aligned in the display region V. , 42 has higher affinity with water. Therefore, moisture that tends to enter from the interface between the sealing material 52 and the alignment layers 41 and 42 is constrained (trapped) by the alignment layers 41 and 42 in contact with the sealing material 52, and does not easily enter the liquid crystal layer 50. Become. If moisture enters the liquid crystal layer 50 in the parting region H2 from the interface between the sealing material 52 and the orientation layers 41 and 42, the moisture is restrained (trapped) in the alignment layers 41 and 42 in the parting region H2. Therefore, compared to the first embodiment, moisture is less likely to enter the liquid crystal layer 50 in the display region V. Therefore, as compared with the first embodiment, it is possible to more strongly suppress display quality deterioration such as display unevenness and image sticking.

<Electronic equipment>
Next, an electronic apparatus according to the present embodiment will be described with reference to FIG. FIG. 14 is a schematic diagram illustrating a configuration of a projection display device (liquid crystal projector) as an electronic apparatus.

  As shown in FIG. 14, a projection display apparatus 1000 as an electronic apparatus includes a polarization illumination apparatus 1100 arranged along the system optical axis L, two dichroic mirrors 1104 and 1105 as light separation elements, and three Reflective mirrors 1106, 1107, 1108, five relay lenses 1201, 1202, 1203, 1204, 1205, three transmissive liquid crystal light valves 1210, 1220, 1230 as light modulating elements, and cross dichroic as a light combining element A prism 1206 and a projection lens 1207 are provided.

  The polarized light illumination device 1100 is generally configured by a lamp unit 1101 as a light source composed of a white light source such as an ultra-high pressure mercury lamp or a halogen lamp, an integrator lens 1102, and a polarization conversion element 1103.

  The dichroic mirror 1104 reflects red light (R) and transmits green light (G) and blue light (B) among the polarized light beams emitted from the polarization illumination device 1100. Another dichroic mirror 1105 reflects the green light (G) transmitted through the dichroic mirror 1104 and transmits the blue light (B).

The red light (R) reflected by the dichroic mirror 1104 is reflected by the reflection mirror 1106 and then enters the liquid crystal light valve 1210 via the relay lens 1205.
Green light (G) reflected by the dichroic mirror 1105 enters the liquid crystal light valve 1220 via the relay lens 1204.
The blue light (B) transmitted through the dichroic mirror 1105 enters the liquid crystal light valve 1230 via a light guide system including three relay lenses 1201, 1202, 1203 and two reflection mirrors 1107, 1108.

  The liquid crystal light valves 1210, 1220, and 1230 are arranged so as to face the incident surfaces of the cross dichroic prism 1206 for each color light. The color light incident on the liquid crystal light valves 1210, 1220, and 1230 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 1206. In this prism, four right-angle prisms are bonded together, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface thereof. The three color lights are synthesized by these dielectric multilayer films, and the light representing the color image is synthesized. The synthesized light is projected on the screen 1300 by the projection lens 1207 which is a projection optical system, and the image is enlarged and displayed.

  Any of the liquid crystal device 1, the liquid crystal device 2, or the liquid crystal device 3 described above is applied to the liquid crystal light valve 1210. The liquid crystal device 1, the liquid crystal device 2, or the liquid crystal device 3 is disposed with a gap between a pair of polarizing elements disposed in crossed Nicols on the incident side and the emission side of colored light. The same applies to the other liquid crystal light valves 1220 and 1230.

  As described above, in the liquid crystal devices 1, 2, and 3, moisture intrusion into the liquid crystal layer 50 and adverse effects of moisture intrusion (decrease in display quality) are suppressed, and display quality is improved. Therefore, the projection display device 1000 to which the liquid crystal devices 1, 2, and 3 are applied can also provide a high-quality display.

  As electronic devices, in addition to the projection display device 1000, direct-view televisions, mobile phones, portable audio devices, personal computers, video cameras with monitors, car navigation devices, electronic notebooks, calculators, workstations, video phones The liquid crystal devices 1, 2, and 3 according to the present invention can be applied to various electronic devices such as POS terminals and digital still cameras.

The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit or idea of the invention that can be read from the claims and the entire specification. An electronic device in which the device is mounted is also included in the technical scope of the present invention.
Various modifications other than the above embodiment are conceivable. Hereinafter, a modification will be described.

(Modification 1)
In the first embodiment, the alignment layers (the first alignment layer 41 and the second alignment layer 42) having a high affinity with water in the seal region H3 and a low affinity with water in the display region V are used as the element substrate. 10 and the counter substrate 20.
The first alignment layer 41 having a high affinity with water in the seal region H3 and a low affinity with water in the display region V may be provided only on the element substrate 10. Further, the second alignment layer 42 having a high affinity with water in the seal region H3 and a low affinity with water in the display region V may be provided only on the counter substrate 20. That is, an alignment layer having a high affinity with water in the seal region H3 and a low affinity with water in the display region V is formed on at least one of the element substrate 10 and the counter substrate 20. If you do.

In the second embodiment, in the element substrate 10 and the counter substrate 20, the affinity of the alignment layers (the first alignment layer 41 and the second alignment layer 42) with water is such that the display region V, the dummy pixel region H1, the parting region H2, It became high in order of the seal | sticker area | region H3.
Only the element substrate 10 may have a configuration in which the affinity of the first alignment layer 41 with water increases in the order of the display region V, the dummy pixel region H1, the parting region H2, and the seal region H3. Only the counter substrate 20 may have a configuration in which the affinity of the second alignment layer 42 with water increases in the order of the display region V, the dummy pixel region H1, the parting region H2, and the seal region H3.
That is, in at least one of the element substrate 10 and the counter substrate 20, the affinity of the alignment layers (the first alignment layer 41 and the second alignment layer 42) with water is such that the display region V, the dummy pixel region H 1, the parting region H 2, What is necessary is just to have the structure which became high in order of the seal | sticker area | region H3.

In the third embodiment, in the element substrate 10 and the counter substrate 20, the affinity of the alignment layers (the first alignment layer 41 and the second alignment layer 42) with water is the same in the parting region H2 and the seal region H3. .
Only the element substrate 10 may have a configuration in which the affinity of the first alignment layer 41 with water is the same in the parting region H2 and the sealing region H3. Further, only the counter substrate 20 may have a configuration in which the affinity of the second alignment layer 42 with water is the same in the parting region H2 and the sealing region H3.
That is, in at least one of the element substrate 10 and the counter substrate 20, the alignment layer (the first alignment layer 41 and the second alignment layer 42) has the same affinity for water in the parting region H2 and the sealing region H3. As long as it has.

(Modification 2)
The alignment layers 44 and 47 are formed by applying a silicon compound (silane coupling agent 90) having a linear, cyclic or branched alkyl group R ₂ (hydrophobic group) having 1 to 20 carbon atoms to the alignment layers 43 and 46, Although it was the polymer (silicon oligomer 94) of the silicon compound formed by drying, it is not limited to this.

  For example, the alignment layers 44 and 47 may be a polymer (hydrophobic coating) of a silicon compound formed by applying a silicon compound having a fluorine or fluoroalkyl group at the terminal to the alignment layers 43 and 46 and drying. . For example, the alignment layers 44 and 47 may be hydrophobic films formed by applying an aliphatic alcohol to the alignment layers 43 and 46 and drying them.

(Modification 3)
The ends of the portions of the alignment layers 41 and 42 that have a high affinity with water may be disposed between the sealing material 52 and the display region V. In Embodiment 3, the portions of the alignment layers 41 and 42 having high affinity with water are arranged in the seal region H3 and the parting region H2. For example, the portions of the alignment layers 41 and 42 having high affinity with water are The structure arrange | positioned in a part of seal | sticker area | region H3 and the parting area | region H2 may be sufficient. In addition, the portions of the alignment layers 41 and 42 having a low affinity with water may have a configuration that overlaps (same as) the display region V in plan view or is wider than the display region V.

  DESCRIPTION OF SYMBOLS 1, 2, 3 ... Liquid crystal device, 5 ... Scan line, 6 ... Data line, 7 ... Capacitance line, 10 ... Element substrate, 11 ... Element substrate main body, 12 ... Pixel electrode, 12a ... Dummy pixel electrode, 20 ... Counter substrate 21 ... Counter substrate body, 22 ... Insulating film, 23 ... Common electrode, 30 ... TFT, 30a ... Dummy TFT, 31 ... Interlayer insulating layer, 41 ... First alignment layer, 43 ... Third alignment layer, 44 ... Fourth Alignment layer 45 ... 5th alignment layer 42 ... 2nd alignment layer 46 ... 6th alignment layer 47 ... 7th alignment layer 48 ... 8th alignment layer 50 ... Liquid crystal layer 52 ... Sealant 53 ... Parting part 70 ... Storage capacity 90 ... Silane coupling agent 91 ... Alkoxy group 92 ... Alkyl group 94 ... Silicon oligomer 101 ... Data line driving circuit 102 ... Scanning line driving circuit 103 ... External connection terminal 106, vertical conduction part, V ... display area, H ... Display area, H1 ... dummy pixel region, H2 ... partition region, H3 ... sealing region, P1 ... pixel, P2 ... dummy pixels.

Claims (14)

A first substrate on which pixel electrodes are disposed;
A first alignment layer disposed to cover the pixel electrode;
A second substrate facing the first substrate and having a common electrode disposed thereon;
A second alignment layer disposed to cover the common electrode;
A sealing material disposed between the first substrate and the second substrate and provided so as to surround a region where the pixel electrode is disposed;
An electro-optic layer disposed in a region surrounded by the sealing material;
Including
When the first substrate side is viewed from the second substrate side, a region where the pixel electrode is disposed is a first region, and a region where the sealing material is provided is a second region,
An electro-optical device, wherein at least one of the surface of the first alignment layer and the surface of the second alignment layer has a higher affinity for water in the second region than in the first region.   A third region is provided between the first region and the second region, and at least one of the surface of the first alignment layer and the surface of the second alignment layer includes the first region, the third region, The electro-optical device according to claim 1, wherein the second optical region has a high affinity with water in the order of the second region.   A third region is provided between the first region and the second region, and at least one of the surface of the first alignment layer and the surface of the second alignment layer is the second region and the third region. The electro-optical device according to claim 1, wherein the electro-optical device has the same affinity for water. The first alignment layer includes a third alignment layer and a fourth alignment layer that covers the third alignment layer and has a lower affinity with water than the third alignment layer;
The first alignment layer in the second region is composed of the third alignment layer, and the first alignment layer in the first region is composed of the third alignment layer and the fourth alignment layer. The electro-optical device according to claim 1. The first alignment layer includes a third alignment layer, a fourth alignment layer that covers the third alignment layer and has a lower affinity with water than the third alignment layer, and covers the third alignment layer. A fifth alignment layer having a lower affinity for water than the alignment layer and a higher affinity for water than the fourth alignment layer,
The first alignment layer in the second region is composed of the third alignment layer, the first alignment layer in the first region is composed of the third alignment layer and the fourth alignment layer, and the third alignment layer. 3. The electro-optical device according to claim 2, wherein the first alignment layer in the region includes the third alignment layer and the fifth alignment layer. The second alignment layer includes a sixth alignment layer and a seventh alignment layer that covers the sixth alignment layer and has a lower affinity with water than the sixth alignment layer,
The second alignment layer in the second region is composed of the sixth alignment layer, and the second alignment layer in the first region is composed of the sixth alignment layer and the seventh alignment layer. The electro-optical device according to claim 1. The second alignment layer includes a sixth alignment layer, a seventh alignment layer that covers the sixth alignment layer and has a lower affinity with water than the sixth alignment layer, and covers the sixth alignment layer. An eighth alignment layer having a lower affinity for water than the layer and a higher affinity for water than the seventh alignment layer,
The second alignment layer in the second region is composed of the sixth alignment layer, the second alignment layer in the first region is composed of the sixth alignment layer and the seventh alignment layer, and the third alignment layer. The electro-optical device according to claim 2, wherein the second alignment layer in the region includes the sixth alignment layer and the eighth alignment layer. A substrate,
An alignment layer arranged to cover the substrate;
Including
The surface of the second region, which is a region overlapping with the sealing material of the alignment layer, has a higher affinity for water than the surface of the first region, which is a region inside the second region of the alignment layer. An electro-optical device.   An electronic apparatus comprising the electro-optical device according to claim 1. A first substrate having a pixel electrode and a first alignment layer covering the pixel electrode, and a second substrate having a common electrode and a second alignment layer covering the common electrode are regions where the pixel electrode is disposed. An electro-optical device manufacturing method in which an electro-optical layer is disposed in a region surrounded by a sealing material provided so as to surround and surrounded by the sealing material,
When the first substrate side is viewed from the second substrate side, the region where the pixel electrode is disposed is the first region, and the region where the sealing material is provided is the second region,
Forming a third alignment layer on the first substrate so as to cover the first region and the second region;
Covering a surface of the third alignment layer and forming a fourth alignment layer having a lower affinity with water than the third alignment layer;
Irradiating the second region with light and removing the fourth alignment layer in the second region;
A method for manufacturing an electro-optical device. Having a third region between the first region and the second region;
The fourth alignment layer in the third region is irradiated with light having a lower energy density per unit area than the light irradiated in the step of removing the fourth alignment layer, and the fourth alignment in the third region. The method of manufacturing an electro-optical device according to claim 10, wherein the layer is converted into a fifth alignment layer having a higher affinity with water than the fourth alignment layer. A first substrate having a pixel electrode and a first alignment layer covering the pixel electrode, and a second substrate having a common electrode and a second alignment layer covering the common electrode are regions where the pixel electrode is disposed. An electro-optical device manufacturing method in which an electro-optical layer is disposed in a region surrounded by a sealing material provided so as to surround and surrounded by the sealing material,
When the first substrate side is viewed from the second substrate side, the region where the pixel electrode is disposed is the first region, and the region where the sealing material is provided is the second region,
Forming a sixth alignment layer on the second substrate so as to cover the first region and the second region;
Covering a surface of the sixth alignment layer and forming a seventh alignment layer having a lower affinity with water than the sixth alignment layer;
Irradiating the second region with light and removing the seventh alignment layer in the second region;
A method for manufacturing an electro-optical device. Having a third region between the first region and the second region;
The third region is irradiated with light having a lower energy density per unit area than the light irradiated in the step of removing the seventh alignment layer, and the seventh alignment layer in the third region is irradiated from the seventh alignment layer. The method of manufacturing an electro-optical device according to claim 12, wherein the conversion into an eighth alignment layer having a high affinity with water is performed.   The method of manufacturing an electro-optical device according to claim 10, wherein the light is ultraviolet light having a wavelength of 180 nm to 400 nm.

Images