JP2015041622A - Epitaxial wafer manufacturing method and epitaxial wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing an epitaxial wafer which allows for formation of an epitaxial layer satisfying a target resistivity range required as a device fabrication region, even if a gettering layer consisting of a region containing carbon with high concentration is formed directly under the epitaxial wafer, with a target thickness or more required as the device fabrication region, and to provide an epitaxial wafer.SOLUTION: When manufacturing an epitaxial wafer 1 by forming a gettering layer 13 in the surface layer area 12 of a silicon wafer 11 by implanting carbon ions into the surface 11A of the silicon wafer 11, and then forming an epitaxial layer 14 on the surface 11A of the silicon wafer 11 on the side where the gettering layer 13 is formed, the epitaxial layer 14 is formed by adjusting the thickness of the epitaxial layer 14 on the basis of the thickness of a resistance variation region, not satisfying a target resistivity range required as a device fabrication region, formed in the epitaxial layer 14 by formation of the gettering layer 13.

Description

  The present invention relates to an epitaxial wafer manufacturing method and an epitaxial wafer, and in particular, a target resistivity range required as a device manufacturing region even when a gettering layer composed of a region containing a high concentration of carbon is formed immediately below an epitaxial layer. The present invention relates to an epitaxial wafer manufacturing method and an epitaxial wafer in which an epitaxial layer satisfying the above condition is obtained with a thickness equal to or larger than a target thickness required as a device manufacturing region.

  One problem in the semiconductor process is that heavy metals are mixed into the silicon wafer. For example, when heavy metals such as cobalt, copper, and nickel are mixed in a silicon wafer, device characteristics such as pause time failure, retention failure, junction leak failure, and dielectric breakdown of the oxide film are significantly adversely affected. Therefore, the gettering method is usually adopted so as to suppress the diffusion of heavy metals into the device fabrication region on the silicon wafer surface.

  The gettering method includes an intrinsic gettering method (IG method) in which oxygen is precipitated inside the silicon wafer and the formed oxygen precipitate is used as a gettering site. Further, there is an extrinsic gettering method (EG method) in which mechanical strain is applied using a sandblast method or the like, or a polycrystalline silicon film or the like is formed as a gettering site.

However, due to the low temperature of the manufacturing process and the large diameter of the silicon wafer, there is a problem that the gettering capability cannot be sufficiently imparted to the silicon wafer. That is, it is difficult to form oxygen precipitates in the silicon wafer due to the low manufacturing process temperature.
In addition, for silicon wafers having a diameter of 300 mm or more, it is common to perform mirror polishing not only on the main surface but also on the back surface, giving mechanical distortion to the back surface of the silicon wafer, A crystalline silicon film or the like cannot be formed.
Thus, at present, it is difficult to give gettering capability to a silicon wafer.

  In recent years, it has been required that a device manufacturing region, which is a region for manufacturing a device, be defect-free. Therefore, an epitaxial wafer in which an epitaxial layer is grown on a silicon wafer is manufactured, and the epitaxial layer is used as a device manufacturing region.

  As a method for forming a gettering layer on such an epitaxial wafer, carbon ions are implanted into the surface of the silicon wafer, and a getter consisting of a region containing a high concentration of carbon in the surface layer region of the wafer (hereinafter referred to as a “high concentration carbon region”). There is a method of manufacturing an epitaxial wafer having an excellent gettering capability by forming an epitaxial layer on the surface of the silicon wafer after preparing a silicon wafer on which a ring layer is formed (see, for example, Patent Document 1). .

  When a gettering layer is formed by this carbon ion implantation method, in order to avoid carbon diffusion into the epitaxial layer as much as possible, the carbon ion implantation range is increased, and the gettering layer is formed at a relatively deep position from the wafer surface. Typically, ion implantation is performed so that a ring layer is formed.

JP-A-5-152304

  However, when forming an epitaxial layer on a silicon wafer or forming a device element on a device fabrication region, if contaminated metal adheres to the wafer surface, the device fabrication process leaves the device fabrication region due to the low temperature of the device manufacturing process described above. There is a concern that it cannot be captured by a gettering site existing at a deep position from the wafer surface. In that case, for example, a device characteristic defect such as a white defect occurs in a solid-state imaging device.

  In addition, in order to form a gettering layer by implanting carbon ions at a high concentration deep from the wafer surface, it is necessary to increase the acceleration voltage of the carbon ions. As a result, the crystallinity of the wafer surface deteriorates. There is also a problem of generating defects in the epitaxial layer grown thereon.

  As a result of studying a method for solving these problems, the inventor ion-implanted carbon ions having a large shared atomic radius in a very shallow position near the surface of the silicon wafer, and a high-concentration carbon region is formed in the surface region of the wafer. It has been found that by forming a gettering layer, the above problems can be solved and an epitaxial wafer having a better gettering ability can be obtained.

  However, when a gettering layer composed of a high-concentration carbon region is formed in the surface layer region of a silicon wafer and an epitaxial layer is grown thereon to produce an epitaxial wafer, the epitaxial layer in the vicinity of the interface between the epitaxial layer and the silicon wafer has The resistivity of the region significantly varies from the target resistivity set in manufacturing the epitaxial wafer, and an epitaxial layer that satisfies the target resistivity range required as the device manufacturing region has a target thickness required as the device manufacturing region. It turns out that I am not satisfied.

  Accordingly, an object of the present invention is to provide an epitaxial layer that satisfies the target resistivity range required as a device manufacturing region even when a gettering layer composed of a high-concentration carbon region is formed immediately below the epitaxial layer. An object of the present invention is to provide an epitaxial wafer manufacturing method and an epitaxial wafer obtained with a target thickness or more.

  The inventor diligently studied how to solve the above problems. As described above, the inventors implanted carbon ions having a large shared atomic radius into a very shallow position near the silicon wafer surface to form a gettering layer composed of a high-concentration carbon region. It has been found that an epitaxial wafer having a better gettering ability can be obtained by solving the problem of the disorder of property. However, if a gettering layer consisting of a high-concentration carbon region is formed immediately below the epitaxial layer, the target resistivity set in the epitaxial wafer fabrication in the region in the epitaxial layer near the interface between the epitaxial layer and the silicon wafer is remarkably increased. As a device fabrication region, a region where the resistivity does not meet the target resistivity range required for the device fabrication region and the resistivity varies beyond the target resistivity beyond an allowable amount (hereinafter referred to as “resistance variation region”) occurs. It has been found that an epitaxial layer satisfying the required target resistivity range does not satisfy the target thickness required as a device fabrication region.

  The inventor investigated the resistivity of the epitaxial layer in detail for silicon epitaxial wafers obtained under various production conditions. As a result, it was found that the thickness of the resistance variation region depends on the dose of carbon ions, and that the thickness of the resistance variation region increases as the dose increases.

In addition, the relationship between the dose of carbon ions and the thickness of the resistance variable region differs greatly depending on the conductivity type of the epitaxial layer. When the conductivity type of the epitaxial layer is p-type, It was found that the rate of increase in thickness was large. It was also found that the resistance variation region does not occur when the dose amount is low.
In contrast, when the conductivity type of the epitaxial layer is n-type, the rate of increase in the thickness of the resistance variation region with respect to the increase in dose is small, but the resistance variation region is formed even when the dose is low. Became clear.

  Furthermore, the thickness of the resistance variation region also depends on the resistivity (target resistivity) of the epitaxial layer, and it has been found that the resistance variation region becomes thicker as the resistivity of the epitaxial layer increases.

  Based on these results, the inventors found that the reason why the resistance variation region occurs is that when a gettering layer consisting of a high-concentration carbon region is formed immediately below the epitaxial layer, oxygen in the silicon wafer is surrounded by carbon atoms in the gettering layer. To generate oxygen donors, electrons emitted from the oxygen donors diffuse into the epitaxial layer, and the resistivity varies in the region in the epitaxial layer near the interface between the epitaxial layer and the silicon wafer. thinking.

  That is, when the conductivity type of the epitaxial layer is p-type, when electrons emitted from the oxygen donor diffuse into the epitaxial layer, they recombine with holes emitted from the p-type dopant to increase the resistivity. Therefore, as the dose of carbon ions increases, the number of electrons diffusing into the epitaxial layer also increases, so that the resistance variation amount and the thickness of the resistance variation region also increase.

  On the other hand, when the conductivity type of the epitaxial layer is n-type, electrons are emitted from the oxygen donor and diffused into the epitaxial layer as in the case of the p-type. However, the amount of oxygen donor generated in the gettering layer is smaller than the amount of n-type dopant added to the epitaxial layer. Therefore, even if the dose amount of carbon ions increases, the resistance variation amount and the thickness of the resistance variation region are small.

  As described above, when the conductivity type of the epitaxial layer is p-type, the resistance variation region is formed when carbon ions are implanted at a high dose. Therefore, the resistance variation region can be reduced by reducing the dose. Can be prevented, but as a result, the gettering ability decreases. On the other hand, when the conductivity type of the epitaxial layer is n-type, a resistance variation region occurs even if the dose of carbon ions is reduced.

  Based on the above results, the inventor found that the epitaxial layer satisfying the target resistivity range required as the device fabrication region is a device fabrication region even when a gettering layer composed of a high-concentration carbon region is formed immediately below the epitaxial layer. As a result of intensive investigations on how to obtain an epitaxial wafer obtained with a target thickness equal to or greater than the target thickness range, the target resistivity range required as a device fabrication region formed in the epitaxial layer by forming the gettering layer The inventors have found that it is effective to adjust the thickness of the epitaxial layer based on the thickness of the variable resistance region that does not satisfy the requirements, and have completed the present invention.

That is, the gist of the present invention is as follows.
(1) Carbon ions are implanted into the surface of the silicon wafer to form a gettering layer in the surface layer region of the silicon wafer, and then an epitaxial layer is formed on the surface of the silicon wafer on which the gettering layer is formed In manufacturing an epitaxial wafer, the thickness of the variable resistance region that does not satisfy the target resistivity range required as a device manufacturing region generated in the epitaxial layer due to the gettering layer is formed. A method for producing an epitaxial wafer, comprising adjusting the thickness of the epitaxial layer based on the above.

(2) The manufacturing method according to (1), wherein the thickness of the epitaxial layer is adjusted such that the thickness of the epitaxial layer that satisfies the target resistivity range is equal to or greater than a target thickness required as a device manufacturing region.

(3) The thickness of the resistance variation region is calculated using a calibration curve obtained from a relationship between a dose amount of the carbon ions and a thickness of the resistance variation region, according to (1) or (2). Production method.

(4) The said carbon ion implantation is a manufacturing method as described in any one of said (1)-(3) performed by the dosage amount of 5 * 10 < ¹³ > atoms / cm < ² > or more.

(5) The manufacturing method according to any one of (1) to (4), wherein the carbon ion implantation is performed at an acceleration voltage of 300 keV / atom or less.

(6) On the surface of the silicon wafer having a gettering layer containing carbon having a maximum carbon concentration of 3 × 10 ¹⁸ atoms / cm ³ or more in the surface layer region, and the side of the silicon wafer on which the gettering layer is formed An epitaxial wafer comprising the formed epitaxial layer, wherein the epitaxial layer is adjacent to the silicon wafer and adjacent to the resistance variable region and a resistance variable region that does not satisfy a target resistivity range required as a device fabrication region An epitaxial wafer comprising: a predetermined resistance region satisfying the target resistivity range, wherein the thickness of the predetermined resistance region is equal to or greater than a target thickness required as a device manufacturing region.

  According to the present invention, the thickness of the variable resistance region that does not satisfy the target resistivity range required as the device fabrication region formed in the epitaxial layer during the formation of the epitaxial layer by forming the gettering layer. Since the epitaxial layer thickness is adjusted based on the above, an epitaxial wafer satisfying the target resistivity range required as the device manufacturing region can be obtained with an epitaxial wafer obtained at a target thickness or higher required as the device manufacturing region. .

It is a figure which shows the flowchart of the manufacturing method of the epitaxial wafer which concerns on this invention. It is a figure which shows the fluctuation | variation of the thickness direction of the resistivity of an epitaxial layer at the time of forming the gettering layer which consists of a high concentration carbon area directly under an epitaxial layer. It is a figure which shows an example of the calibration curve showing the relationship between the dose amount of carbon ion, and the film thickness added in the case of formation of an epitaxial layer. Calibration curve for the relationship between the dose of carbon ions and the thickness of the resistance fluctuation region It is a figure which shows the relationship between the depth position from the surface of the epitaxial layer with respect to (a) a comparative example and (b) invention example, the resistivity of an epitaxial layer, and the density | concentration of cobalt.

(Epitaxial wafer manufacturing method)
Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a flowchart showing an epitaxial wafer manufacturing method according to the present invention. First, a silicon wafer 11 serving as an epitaxial wafer substrate is prepared (FIG. 1A). As this silicon wafer 11, a single crystal silicon wafer made of a silicon single crystal is used. This single crystal silicon wafer is obtained by slicing a single crystal silicon ingot grown by a Czochralski method (CZ method) or a floating zone method (FZ method) with a wire saw or the like. be able to. Further, any appropriate impurity such as phosphorus or boron can be added to make the conductivity type n-type or p-type.

  Next, carbon ions are implanted into the surface 11A of the silicon wafer 11 (FIG. 1B), and a gettering layer 13 made of a high-concentration carbon region is formed in the surface layer region 12 of the silicon wafer 11 (FIG. 1C). ). Thereby, the gettering layer 13 having an excellent gettering capability can be obtained without disturbing the crystallinity of the surface 11A of the silicon wafer 11. This ion implantation can be performed using a well-known ion implantation technique.

  In the present invention, the “surface layer region” of the silicon wafer 11 means a region from the surface 11A of the silicon wafer 11 to a depth position of 1 μm. In FIG. 1C, the surface of the gettering layer 13 is located on the surface 11 </ b> A of the silicon wafer 11, but it is not necessary and may be located inside the surface layer region 12.

The carbon concentration of the gettering layer 13 depends on the dose of carbon ions. In recent years, the epitaxial wafer has been required to have better gettering capability, and therefore, the dose of carbon ions in the present invention is set to 5 × 10 ¹³ atoms / cm ² or more. In addition, since the product becomes defective due to the warpage, cracking, and surface defects of the wafer, the dose is set to 2.0 × 10 ¹⁶ atoms / cm ² or less. By performing carbon ion implantation with a dose in this range, the gettering layer 13 made of a high concentration carbon region having a maximum concentration of 3 × 10 ¹⁸ atoms / cm ³ or more can be formed.

  The depth position of the gettering layer 12 depends on the acceleration voltage of carbon ions. In the present invention, in order to form the gettering layer 13 in the surface layer region 12 of the silicon wafer 11, the acceleration voltage of carbon ions is set to 300 keV / atom or less. The lower limit of the acceleration voltage is 10 keV / atom because carbon ions need only be implanted into the surface 11A of the silicon wafer 11 to form the gettering layer 12 made of a high-concentration carbon region.

  The above-described carbon ion implantation conditions are those in the case of so-called monomer ions in which a single carbon atom is ionized, but as described in International Publication No. 2012/157162 pamphlet. Instead of the monomer ions, the surface of the silicon wafer 11 can be irradiated with cluster ions obtained by ionizing clusters composed of atoms and molecules. In this case, since cluster ions can be introduced into the surface layer region 12 of the silicon wafer 11 with lower energy than the monomer ions, the position of the maximum concentration of carbon is positioned closer to the surface 11A than when monomer ions are implanted. Can do. Moreover, since the range of the wafer depth direction in which carbon is distributed can be narrowed, the maximum concentration of carbon can also be increased. Furthermore, since the cluster ions are irradiated with low energy, disorder of crystallinity on the surface of the silicon wafer 11 can be suppressed.

When the surface 11A of the silicon wafer 11 is irradiated with carbon ions as cluster ions, ethane, methane, propane, dibenzyl (C ₁₄ H ₁₄ ), carbon dioxide (CO ₂ ), or the like is used as a carbon source for the cluster ions. be able to. Further, since it is easy to form a small-sized cluster ion beam, clusters C _n H _m (3 ≦ n ≦ 16, 3 ≦ m ≦ 10) generated from pyrene (C ₁₆ H ₁₀ ), dibenzyl (C ₁₄ H ₁₄ ), or the like. ) Is preferably used.

The carbon concentration of the gettering layer 13 depends on the dose amount of cluster ions as in the case of monomer ions. The dose amount of the cluster ions is 5 × 10 ¹³ atoms / cm ² or more per carbon atom in terms of one carbon atom. In addition, since the product becomes defective due to the warpage, cracking, and surface defects of the wafer, the dose is set to 2.0 × 10 ¹⁶ atoms / cm ² or less. By performing carbon ion implantation with a dose in this range, the gettering layer 13 made of a high concentration carbon region having a maximum concentration of 3 × 10 ¹⁸ atoms / cm ³ or more can be formed.

  In the case of irradiation with cluster ions, the depth position of the gettering layer 12 depends on the acceleration voltage of the cluster ions and the cluster size. In order to form the gettering layer 13 in the surface layer region 12, the acceleration voltage of cluster ions is set to be greater than 0 keV / atom and less than or equal to 50 keV / atom. Preferably, it is 40 keV / atom or less. The cluster size is 2 or more, preferably 50 or less. Here, “cluster size” means the number of atoms or molecules constituting one cluster.

  In this way, the gettering layer 13 made of the high-concentration carbon region is formed in the surface layer region 12 of the silicon wafer 11, and the silicon wafer 11 having excellent gettering ability can be obtained.

  Subsequently, an epitaxial layer 14 is formed on the surface 11 on the gettering layer 13 side of the silicon wafer 11 (FIG. 1D). At that time, the epitaxial layer 14 is formed based on the thickness of the variable resistance region 14 </ b> A that does not satisfy the target resistivity range required as the device manufacturing region, which is generated in the epitaxial layer 14 due to the gettering layer 13. It is important to adjust the thickness of 14.

  As described above, when carbon ions are implanted into the surface 11A of the silicon wafer 11, the gettering layer 13 made of a high concentration carbon region is formed in the surface layer region 12 of the silicon wafer 11, and oxygen in the silicon wafer is absorbed in the gettering layer. It is thought that oxygen donors are generated around the carbon atoms. When the epitaxial layer 14 is grown on the surface 11 on the gettering layer 13 side of the silicon wafer 11, electrons emitted from the oxygen donor diffuse into the epitaxial layer 14, and the interface between the epitaxial layer 14 and the silicon wafer 11. It is considered that the resistivity variation region 14A that does not satisfy the target resistivity range required as the device fabrication region is generated by changing the resistivity of the region in the nearby epitaxial layer 14 from the target resistivity.

In the present invention, the “resistance variation region” is a region exceeding the value calculated from the following formula based on the resistivity of the product standard. That is,
| (Resistivity at the surface of the epitaxial layer 14) − (Maximum value or minimum value of resistivity of product standard) | / (Maximum value or minimum value of resistivity of product standard)
It is. Here, (resistivity on the surface of the epitaxial layer 14) is compared with (maximum value of resistivity of product standard) and (minimum value of resistivity of product standard) (minimum value of resistivity of product standard). (The minimum value of the resistivity of the product standard) is used, and (the maximum value of the resistivity of the product standard) is used when it is close to (maximum value of the resistivity of the product standard).

FIG. 2 is a diagram showing fluctuation in the thickness direction of the resistivity of the epitaxial layer in the epitaxial wafer. In this figure, the horizontal axis represents the position in the thickness direction from the interface between the silicon wafer and the epitaxial layer 14, and the vertical axis represents the resistivity at the surface of the epitaxial layer 14 and from the interface between the epitaxial layer 14 and the silicon wafer 11. It represents the ratio of the difference from the resistivity at each position in the thickness direction to the resistivity on the surface. That is,
| (Resistivity at each position in the thickness direction from the interface with the silicon wafer 11) − (Resistivity at the surface of the epitaxial layer 14) | / (Resistivity at the surface of the epitaxial layer 14)
It is.

The epitaxial wafer subjected to this resistivity measurement was implanted with carbon ions at a dose of 1 × 10 ¹⁵ atoms / cm ² and an acceleration voltage of 60 keV / atom on the surface of a silicon wafer made of a single crystal silicon wafer. It is an n-type silicon epitaxial wafer obtained by doping phosphorus and growing an n-type silicon epitaxial layer by 8 μm. The target resistivity of the epitaxial layer 14 is 65 Ω · cm.

  The resistivity of the n-type silicon epitaxial wafer thus obtained was measured at each position in the thickness direction of the epitaxial layer 14. As a result, as shown in FIG. 2, in the region from the surface of the epitaxial layer 14 to a depth position up to about 3 μm, the variation rate of the resistivity was less than 10%. However, in the region from the interface between the epitaxial layer 14 and the silicon wafer 11 to 3 μm, the rate of change in resistivity exceeded 10%, and the resistivity at the surface of the epitaxial layer 14 varied significantly. The resistivity at the surface of the epitaxial layer 14 (wafer) was almost the target resistivity.

  It is not uniquely determined whether the ratio of the variation in resistivity satisfies the target resistivity range required as the device fabrication region because it depends on the product specifications of each epitaxial wafer. In other words, the thickness of the resistance variation region 14A depends on the allowable rate of variation in resistivity. For example, in FIG. 2, when the ratio of allowable resistivity variation is 10%, that is, when the variation from the target resistivity is within 10%, the resistivity satisfies the target resistivity range required as the device fabrication region. When it is assumed, the thickness of the resistance variation region 14A is about 3 μm.

  Since the resistance variation region 14A cannot be used as a device fabrication region, only the predetermined resistance region 14B that exists on the resistance variation region 14A and satisfies the target resistivity range required as the device fabrication region can be used as the device fabrication region. In general, since it is assumed that all of the grown epitaxial layer 14 is used as a device manufacturing region, the epitaxial layer 14 having the initially assumed thickness cannot be used due to the occurrence of the resistance variation region 14A. Therefore, it is important to form the epitaxial layer 14 by adjusting the thickness of the epitaxial layer 14 based on the thickness of the resistance variable region 14A generated in the epitaxial layer 14 by the formation of the gettering layer 13.

  Here, the thickness of the epitaxial layer 14 is adjusted so that the thickness of the epitaxial layer that satisfies the target resistivity range is equal to or greater than the target thickness required as the device manufacturing region. Specifically, the thickness of the epitaxial layer 14 to be grown is set to be equal to or larger than the thickness obtained by adding the thickness of the resistance variation region 14A to the target thickness required as the device manufacturing region. As a result, even if the resistance variation region 14A is generated, the epitaxial layer 14 having the initially assumed thickness can be used as the device fabrication region. Thus, even when a gettering layer composed of a high-concentration carbon region is formed immediately below the epitaxial layer, an epitaxial layer that satisfies the target resistivity range required as the device manufacturing region can be obtained with a thickness greater than the target thickness required as the device manufacturing region. An epitaxial wafer 1 can be obtained (FIG. 1E).

  When the thickness of the epitaxial layer 14 is adjusted, the thickness of the resistance variation region 14A can be calculated using a calibration curve obtained from the relationship between the dose of carbon ions and the thickness of the resistance variation region. This calibration curve depends on the conductivity type and resistivity (target resistivity) of the epitaxial layer 14 and the dose of carbon ions, and can be obtained in advance for these various conditions. FIG. 3 is a diagram showing an example of a calibration curve representing the relationship between the dose of carbon ions and the film thickness added when the epitaxial layer 14 is formed. The target resistivity of the epitaxial layer 14 in the epitaxial wafer used for obtaining this calibration curve is 65 Ω · cm. In this figure, the film thickness added when the epitaxial layer on the vertical axis is formed means the thickness of the resistance variation region 14A.

  As shown in this figure, the film thickness to be added when the epitaxial layer 14 is formed (the thickness of the resistance variation region 14A) depends on the dose amount of the carbon ions and the conductivity type of the epitaxial layer 14. The added film thickness is determined based on the dose amount at the time and the conductivity type of the epitaxial layer 14. Then, the epitaxial layer 14 having a thickness obtained by adding the obtained additional thickness to the target thickness required as the device manufacturing region is grown. Thus, even when the gettering layer 13 having an excellent gettering capability is formed immediately below the epitaxial layer 14, the epitaxial layer 14 that satisfies the target resistivity range required as the device manufacturing region is required as the device manufacturing region. The epitaxial wafer 1 obtained with the target thickness or more can be manufactured.

(Epitaxial wafer)
Next, the epitaxial wafer 1 according to the present invention will be described. The epitaxial wafer 1 according to the present invention shown in FIG. 1 (E) has a gettering layer 13 containing carbon having a maximum concentration of 3 × 10 ¹⁸ atoms / cm ³ or more in a surface layer region 12 of 1 μm or less from the surface. A silicon wafer 1 and an epitaxial layer 14 formed on the surface of the silicon wafer 11 on the side where the gettering layer 13 is formed are provided. Here, the epitaxial layer 14 is adjacent to the silicon wafer 11 and has a resistance variation region 14A that does not satisfy the target resistivity range required as a device fabrication region, and a predetermined resistance that is adjacent to the resistance variation region 14A and satisfies the target resistivity range. And the thickness of the predetermined resistance region 14B is equal to or greater than a target thickness required as a device manufacturing region.

This epitaxial wafer 1 has a gettering layer 13 composed of a high concentration carbon region containing carbon having a maximum concentration of 3 × 10 ¹⁸ atoms / cm ³ or more immediately below the surface layer region 12 of the silicon wafer 1, that is, directly below the epitaxial layer 14. have. Therefore, it is an epitaxial wafer having a gettering ability superior to that of the prior art.

(Invention example)
Examples of the present invention will be described below.
The epitaxial wafer according to the present invention was manufactured according to the flowchart shown in FIG. That is, first, an n-type silicon wafer obtained from a CZ single crystal (diameter: 300 mm, thickness: 775 μm, dopant type: phosphorus, resistivity: 15 to 20 Ω · cm, oxygen concentration: 1.8 × 10 ¹⁸ atoms / cm ³ ) Was prepared. Next, using a medium current ion implantation apparatus, carbon monomer ions were implanted into the surface of the silicon wafer at a dose of 6.0 × 10 ¹⁴ atoms / cm ² and an acceleration voltage of 60 keV / atom. At that time, the carbon ion implantation depth target was 0.2 μm. Subsequently, the silicon wafer is transferred into an epitaxial growth apparatus (Applied Materials) and subjected to a hydrogen baking treatment at a temperature of 1120 ° C. for 30 seconds in the apparatus, followed by hydrogen as a carrier gas, trichlorosilane as a source gas, The epitaxial layer of silicon (target thickness: 8 μm, dopant type: phosphorus, target resistivity: 55 Ω · cm) is epitaxially grown on a silicon wafer by CVD at a growth temperature of 1000 to 1150 ° C. using phosphine as a dopant gas. A silicon epitaxial wafer according to the invention was prepared. At that time, it was found from a calibration curve prepared in advance that the thickness of the resistance variation region was 2 μm from the conductivity type and resistivity of the epitaxial layer and the dose of carbon ion implantation, so that the thickness of the resistance variation region was increased to the target thickness of 8 μm. An epitaxial layer having a thickness of 10 μm was grown by adding 2 μm.

(Comparative example)
An epitaxial wafer was produced in the same manner as the inventive example. However, the acceleration voltage of carbon ions was 2 MeV / atom, and the target at the implantation depth position of carbon ions was 2 μm. The thickness of the epitaxial layer to be grown was 8 μm, which is the target thickness. All other conditions are the same as in the invention examples.

<Measurement of resistivity>
The resistivity of the fabricated epitaxial wafers of the inventive example and the comparative example was examined. Specifically, it measured by the spreading resistance method (SR method; Spreading Resistance Analysis) using the resistivity measuring device (model number: SSM2000, Nippon SSM Co., Ltd. product).

<Evaluation of gettering ability>
About the produced epitaxial wafer of the invention example and the comparative example, the surface of the epitaxial layer was intentionally contaminated by a spin coating contamination method using a cobalt contamination liquid (1.0 × 10 ¹² atoms / cm ² ), and then a nitrogen atmosphere Heat treatment was performed at 1000 ° C. for 10 minutes. Then, the concentration of cobalt in the epitaxial wafer was measured by SIMS (Secondary Ion Mass Spectrometry) to evaluate the gettering performance of each epitaxial wafer.

FIG. 4 is a diagram showing the relationship between the depth position from the surface of the epitaxial layer, the resistivity of the epitaxial layer, and the concentration of cobalt for (a) the comparative example and (b) the inventive example. In FIG. 4, the bold line indicates the resistivity, and the thin line indicates the cobalt concentration.
First, referring to FIG. 4A, in the comparative example, since the target at the carbon ion implantation depth is 2 μm, a cobalt concentration peak is observed at a depth of 10 μm from the surface of the epitaxial layer. It was. Further, although there is a region in which the resistivity greatly varies from the target resistivity in the silicon wafer, it can be seen that the variation in the resistivity of the epitaxial layer is small because the carbon ion implantation depth is deep.
On the other hand, in FIG. 4B, in the example of the invention, the target at the carbon ion implantation depth is 0.2 μm, so that the cobalt is located at a depth of about 10 μm from the surface of the epitaxial layer. The concentration peak is located. It can also be seen that a resistance variation region having a thickness of 2 μm is generated in a region in the epitaxial layer near the interface between the epitaxial layer and the silicon wafer. However, a predetermined resistance region having a thickness of 8 μm exists on the resistance variation region, and the target thickness required as the device manufacturing region is 8 μm. Therefore, the epitaxial layer satisfying the target resistivity range required as the device manufacturing region. However, it turns out that it is obtained more than the target thickness calculated | required as a device preparation area.
Further, when the gettering ability of the inventive example and the comparative example are compared, in the comparative example shown in FIG. 4A, the maximum concentration of cobalt is 2 × 10 ¹⁶ atoms / cm ³ , whereas FIG. In the invention example shown in (b), the maximum cobalt concentration is 1 × 10 ¹⁷ atoms / cm ³ , and the epitaxial wafer of the invention example has better gettering ability than that of the comparative example. I understand that.

  According to the present invention, since the epitaxial layer is formed by adjusting the thickness of the epitaxial layer based on the change in resistivity in the thickness direction of the epitaxial layer, the gettering layer comprising a high-concentration carbon region immediately below the epitaxial layer. Even when formed, an epitaxial layer satisfying a target resistivity range required as a device manufacturing region can be obtained with a thickness equal to or more than a target thickness required as a device manufacturing region, and thus is useful for the semiconductor wafer manufacturing industry.

DESCRIPTION OF SYMBOLS 1 Epitaxial wafer 11 Silicon wafer 11A Surface 12 Surface layer area 13 Gettering layer 14 Epitaxial layer 14A Resistance fluctuation area 14B Predetermined resistance area

Claims (6)

Carbon ions are implanted into the surface of the silicon wafer to form a gettering layer in the surface layer region of the silicon wafer, and then an epitaxial layer is formed on the surface of the silicon wafer on the side where the gettering layer is formed. In manufacturing the wafer,
The formation of the epitaxial layer is performed by adjusting the thickness of the epitaxial layer based on the thickness of the resistance variable region that does not satisfy the target resistivity range required as a device manufacturing region, which is generated in the epitaxial layer due to the gettering layer. An epitaxial wafer manufacturing method characterized by performing adjustment.   The manufacturing method according to claim 1, wherein the thickness of the epitaxial layer is adjusted so that a thickness of the epitaxial layer satisfying the target resistivity range is equal to or greater than a target thickness required as a device manufacturing region.   The manufacturing method according to claim 1 or 2, wherein the thickness of the resistance variation region is calculated using a calibration curve obtained by calculating a relationship between a dose amount of the carbon ions and a thickness of the resistance variation region. The said carbon ion implantation is a manufacturing method as described in any one of Claims 1-3 performed with the dosage amount of 5 * 10 < ¹³ > atoms / cm < ² > or more.   The said carbon ion implantation is a manufacturing method as described in any one of Claims 1-4 performed with the acceleration voltage of 300 keV / atom or less. A silicon wafer having a gettering layer containing carbon of 3 × 10 ¹⁸ atoms / cm ³ or more in the surface layer region with a maximum concentration of carbon, and formed on the surface of the silicon wafer on the side where the gettering layer is formed An epitaxial wafer comprising an epitaxial layer,
The epitaxial layer is
A resistance variation region that is adjacent to the silicon wafer and does not satisfy the target resistivity range required as a device fabrication region,
It consists of a predetermined resistance region that is adjacent to the resistance variation region and satisfies the target resistivity range,
An epitaxial wafer, wherein a thickness of the predetermined resistance region is equal to or greater than a target thickness required as a device manufacturing region.

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