JP2014066566A - Open-phase detection device - Google Patents

Abstract

The present invention provides a phase loss detection device capable of detecting phase loss of each of three phases without increasing the processing load of a CPU.
Photocouplers 25a and 25b as voltage / pulse conversion means for detecting a line voltage of a three-phase AC power source and converting it into a pulse in an apparatus for detecting a phase failure of any phase of a three-phase AC power source. Comparators 27a and 27b as phase loss determination pulse generation means for generating a phase loss determination pulse synchronized with the line voltage based on the pulse output from the photocoupler, and the phase loss determination pulse generated by these comparators And a CPU 28 as an open phase determination means for detecting the presence or absence of a single phase open phase constituting the line voltage. Thereby, it is possible to detect a missing phase of each of the three phases without increasing the processing load of the CPU.
[Selection] Figure 2

Description

  The present invention relates to an apparatus for detecting an open phase of a three-phase AC power source.

Conventionally, as this type of phase loss detection device, for example, those described in Patent Documents 1 and 2 are known.
FIG. 6 is a configuration diagram of the phase loss detection device described in Patent Document 1. In FIG. 6, 100 is a three-phase AC power source, 110 is a means for obtaining a pseudo neutral point N1 by connecting a plurality of resistors to the output terminals R, S, and T of the three-phase AC power source 100, and 121 and 122 are pseudo neutral. Comparators that detect the potentials of the terminals R and S viewed from the point N1 as voltages R1 and S1, respectively, and convert them into logic signals R2 and S2, 120 a logic signal output means, 130 an oscillator, and 141 and 142 logic signals R2, A counter 143 counts the clock of the oscillator 130 according to S2, and a bus 143 connects the counters 141, 142 and the CPU 150. The CPU 150 also receives the logic signals R2, S2 and the clock.

In this prior art, the comparators 121 and 122 detect that the voltages R1 and S1 have become equal to or higher than the pseudo neutral point N1, and output high level logic signals R2 and S2. The count value is latched at the rising edge of S2. The CPU 150 reads the values latched in the counters 141 and 142 by an interrupt request (IRQ: Interrupt Request) based on the rising edges of the logic signals R2 and S2, and detects the phase difference between the logic signals R2 and S2.
With the above operation, the CPU 150 causes the R phase or S2 signal when either of the logic signals R2 and S2 does not change for a certain period or more, or when the phase difference between the logic signals R2 and S2 departs from a predetermined value by 120 ° or more. It is determined that an open phase has occurred in any of the S phases.

Next, FIG. 7 is a configuration diagram of the phase loss detection device described in Patent Document 2. In FIG. In addition, the same number is attached | subjected to what has the same function as FIG.
In FIG. 7, reference numerals 161, 162, 163 denote operational amplifiers, and voltages R-N1, S-N1, T- of the output terminals R, S, T viewed from the pseudo neutral point N1 based on the potentials R1, S1, T1. N1 is obtained, and these voltages R-N1, S-N1, and T-N1 are input to AD converters 171, 172, and 173, respectively.
On the other hand, 180 is a rectifier circuit connected to the power supply 100, 190 is a capacitor connected between the positive and negative terminals P and N of the rectifier circuit 180, and the negative terminal N is the pseudo neutral point N1 and the AD converter 171, 172, 173.

  In this prior art, the CPU 150 reads the voltages R-N1, S-N1, and T-N1 A / D converted by the AD converters 171, 172, and 173, and based on the line voltage waveform and the phase difference, It is determined that an open phase has occurred in either the phase or the T phase.

Japanese Patent No. 3883054 (paragraph [0005], FIG. 1 etc.) Japanese Patent No. 4300571 (paragraph [0009], FIG. 1 etc.)

  When using the IRQ described in Patent Document 1, as pointed out in Patent Document 2, the processing load of the CPU increases. Also, when high-priority interrupts by other controls overlap, phase loss detection is delayed, and in some cases, detection may be impossible. Therefore, it is necessary to assign an IRQ in consideration of control other than phase loss detection, and there is a problem that software design becomes complicated and much labor is required.

  In Patent Document 2, the CPU performs phase difference calculation of line voltage, determination processing, and the like to detect an open phase. However, in order to obtain the phase difference, data processing using a task with a high processing speed is required. . In addition, unless the AD converter uses a high-accuracy product that is generally expensive, the A / D conversion data of the line voltage needs to be averaged because it varies widely. There was a problem that the load increased.

  Therefore, a problem to be solved by the present invention is to provide a phase loss detection device that can detect phase loss of each of the three phases without increasing the processing load of the CPU.

In order to solve the above-mentioned problem, the invention according to claim 1 is a phase loss detection device that detects phase loss of any phase of a three-phase AC power source.
Voltage / pulse conversion means for detecting and converting at least one line voltage of the three-phase AC power source into a pulse;
An open phase determination pulse generating means for generating an open phase determination pulse synchronized with the line voltage based on the pulse output from the voltage / pulse conversion means;
Phase loss determination means for detecting presence / absence of one phase phase loss constituting the line voltage using the phase loss determination pulse generated by the phase loss determination pulse generation means.

  According to a second aspect of the present invention, in the phase loss detection device according to the first aspect, the phase loss determination pulse generation unit compares the pulse output from the voltage / pulse conversion unit with a threshold value to determine the phase loss determination. It has a comparator which generates a pulse.

  According to a third aspect of the present invention, in the open phase detection device according to the second aspect, when the DC voltage obtained by rectifying and smoothing the voltage of the three-phase AC power supply is equal to or higher than a predetermined reference value, the missing phase is detected. The phase determination means changes the threshold value according to the fluctuation of the line voltage.

  According to a fourth aspect of the present invention, in the phase loss detection device according to any one of the first to third aspects, the phase loss determination means counts the number of phase loss determination pulses to determine the presence or absence of phase loss. It is to detect.

  According to a fifth aspect of the present invention, in the phase loss detection device according to the first aspect, information on two phases in which phase loss is not detected, and DC voltage information obtained by rectifying and smoothing the voltage of the three-phase AC power source, Based on the above, the remaining one-phase phase that becomes the reference of the line voltage is detected.

  According to the present invention, the phase loss determination means comprising a CPU or the like can detect phase loss by a simple process of detecting (counting) the presence or absence of a phase loss determination pulse, and by a low-speed task with a low processing load. The phase loss of each of the three phases can be reliably detected.

It is a block diagram of the induction heating apparatus which shows embodiment of this invention. It is a circuit diagram which shows the principal part of the control circuit in FIG. FIG. 3 is a functional block diagram of FIG. 2. It is a timing chart which shows operation of an embodiment of the present invention. It is a timing chart which shows operation of an embodiment of the present invention. It is a block diagram of the prior art described in patent document 1. FIG. It is a block diagram of the prior art described in patent document 2. FIG.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
In FIG. 1, 1 is a three-phase AC power source, 2 is an induction heating device, 3 is a heating coil, and 4 and 5 are terminal portions, and the phase loss detection device according to this embodiment is a control circuit 20 of the induction heating device 2. Is realized.

The induction heating device 2 includes a fuse 6 connected to the terminal portion 4, a protective element 7 such as a varistor, and a rectifier circuit including a diode bridge in which the AC side is connected to each phase (R, S, T phase) of the power source. 8, a smoothing capacitor 9 connected between the DC output terminals, and an inverter 10 composed of a series circuit of two semiconductor switching elements connected to both ends of the smoothing capacitor 9 and a capacitor group. Output terminals are connected to both ends of the heating coil 3 via the terminal portion 5.
Further, the input terminal of the rectifier circuit 8 and both ends of the smoothing capacitor 9 are connected to the control circuit 20 via connection lines 11 and 12, respectively.

FIG. 2 is a circuit diagram showing a part related to phase loss detection in the control circuit 20 in FIG.
The line voltage (S-phase reference) between R and S of the three-phase AC power supply 1 input to the control circuit 20 via the connection line 11 is divided by the voltage dividing resistors 21a and 22a, and is passed through the capacitor 23a and the diode 24a. To the light emitting diode of the photocoupler 25a. The pulse _P1RS output from the phototransistor of the photocoupler 25a is input to the non-inverting input terminal of the comparator 27a via one end of the pull-up resistor 26a, and the threshold TH set by the CPU 28 is set to the inverting input terminal of the comparator 27a. Have been entered. The output pulse _P2RS of the comparator 27a is input to the CPU.
For even three-phase AC power source 1 of the line voltage between the T-S (S-phase reference), it is processed by the same manner as described above configured circuit, an output pulse P _2TS of the comparator 27b is inputted to the CPU 28.

Although not shown in FIG. 2, the voltage (DC intermediate voltage) of the smoothing capacitor 9 of FIG. 1 is input to the CPU 28 via the connection line 12, and this DC intermediate voltage is a line as will be described later. This is used to adjust the magnitude of the threshold TH when the voltage of the three-phase AC power supply 1 fluctuates due to detection of an open phase of an inter-voltage reference phase (here, S phase) or power supply unbalance.
Here, the values of the voltage dividing resistors 21a, 21b, 22a, and 22b are divided when, for example, the operation of the induction heating apparatus becomes unstable when the line voltage of the three-phase AC power supply 1 is reduced due to an open phase. The voltage at the connection point of the resistors 21a and 22a (the connection point of the voltage dividing resistors 21b and 22b) is measured, and it may be determined so that the photocouplers 25a and 25b operate normally until the voltage is reached.

FIG. 3 shows the configuration of FIG. 2 in functional blocks. The voltage / pulse conversion means 30 _RS and 30 _TS are obtained by the photocouplers 25a and 25b, and the phase loss determination pulse generation means 40 _RS and 40 _TS are These are realized by the comparators 27a and 27b, respectively.
Further, the CPU 28 constitutes an open phase determination unit, and the CPU 28 outputs pulses (missing phase) output from the open phase determination pulse generation units 40 _RS and 40 _TS (comparators 27a and 27b) and input to the ports 28a and 28b. The phase determination pulse) P _2RS and P _2TS are counted to operate so as to determine the phase _loss .

Next, the operation of this embodiment will be described with reference to FIGS.
As shown at times t _{0 to} t ₁ in FIG. 4, when the three-phase AC power supply 1 is normal and no phase loss has occurred, the voltage between the RS line and the voltage between the TS lines is the upper part of FIG. As shown in FIG. At this time, the threshold TH is set so that the input pulses P _1RS and P _{1TS of} the comparators 27a and 27b (output pulses of the photocouplers 25a and 25b) periodically fall below the threshold TH, and a means for further dividing the frequency appropriately is provided. If provided, the comparators 27a and 27b can output the phase loss determination pulses P _2RS and P _2TS synchronized with the line voltage as shown in the lower part of FIG. Therefore, the CPU ₂₈ counts the falling edges (or rising edges) of the phase _loss determination pulses P _2RS and P _2TS , and the phase loss occurs when the count value for a certain period is zero, for example, at times t _{1 to} t _2. Is determined.

In the period from time t _{1 to} time t ₂ in FIG. 4, for example, the amplitude of the R-S line voltage decreases due to a voltage drop or no voltage in the R phase, and sufficient current does not flow through the light emitting diode of the photocoupler 25a. When the phototransistor is turned on, the output voltage (the magnitude of the input pulse _P1RS of the comparator 27a) is not sufficiently reduced. In this way, in a period in which the magnitude of the input pulse P _1RS does not sufficiently decrease, the P _1RS does not fall below the threshold value TH, so that the phase loss determination pulse P _2RS does not occur at the times t _{1 to} t ₂ as illustrated. Therefore, the CPU 28 can determine that the phase is missing (R phase voltage drop or no voltage) based on the count value (= 0) of the missing phase determination pulse _P2RS .

  As for the phase loss of the S phase, which is the reference phase of the line voltage, the presence or absence of the phase loss of the R phase or the T phase is confirmed by the above-described operation, and the phase loss of these R phase or T phase is not detected. In this case, it can be detected from the state of the DC intermediate voltage (the voltage across the smoothing capacitor 9) detected via the connection line 12.

Next, FIG. 5 shows an operation when the voltage of the three-phase AC power source 1 fluctuates.
When the line voltage of the power source 1 fluctuates due to three-phase imbalance or the like, the DC intermediate voltage also fluctuates as shown in FIG. In preparation for such a case, previously set the reference value of the direct current intermediate voltage within the CPU 28, for a period DC link voltage is above the reference value, as the threshold TH 'illustrated, the time t ₀ ~ The magnitude of the threshold is changed according to the fluctuation of the line voltage over t ₁ .
As a result, during the period in which the power supply voltage fluctuates (time t _{0 to} t ₁ ), the erroneous determination of the phase loss due to the absence of the phase loss determination pulse is prevented, and the three-phase AC power supply 1 is normal during the period It can be determined that, it is possible to reliably detect only the original phase loss of time t ₁ after.

  Needless to say, the load of the three-phase AC power source to which the present invention is applied is not limited to the induction heating device, and the present invention can be used for detecting the phase loss of the three-phase AC power source that supplies power to various devices and apparatuses. It is.

1: three-phase AC power source 2: induction heating device 3: heating coils 4, 5: terminal 6: fuse 7: protective element 8: rectifier circuit 9: smoothing capacitor 10: inverter 11, 12: connection line 20: control circuit 21a , 21b, 22a, 22b: voltage dividing resistors 23a, 23b: capacitors 24a, 24b: diodes 25a, 25b: photocouplers 26a, 26b: pull-up resistors 27a, 27b: comparator 28: CPU (phase loss determining means)
28a, 28b: port ₃₀ RS, _{30 TS:} Voltage / pulse converter ₄₀ RS, _{40 TS:} phase loss determining pulse generating means

Claims (5)

In the phase loss detection device that detects the phase loss of any phase of the three-phase AC power supply,
Voltage / pulse conversion means for detecting and converting at least one line voltage of the three-phase AC power source into a pulse;
An open phase determination pulse generating means for generating an open phase determination pulse synchronized with the line voltage based on the pulse output from the voltage / pulse conversion means;
Using the phase loss determination pulse generated by the phase loss determination pulse generation unit, the phase loss determination unit that detects the presence or absence of a single phase phase that constitutes the line voltage;
A phase loss detection apparatus comprising: In the phase loss detection device according to claim 1,
The open phase determination pulse generating means includes a comparator that compares the pulse output from the voltage / pulse conversion means with a threshold value to generate the open phase determination pulse. In the phase loss detection device according to claim 2,
When the DC voltage obtained by rectifying and smoothing the voltage of the three-phase AC power supply is equal to or higher than a predetermined reference value, the phase loss determination means changes the threshold according to the fluctuation of the line voltage. An open phase detector characterized by the following. In the phase loss detection apparatus according to any one of claims 1 to 3,
The phase loss detection unit is configured to detect the presence or absence of a phase loss by counting the number of phase loss determination pulses. In the phase loss detection device according to claim 1,
Based on the two-phase information in which no phase loss is detected and the DC voltage information obtained by rectifying and smoothing the voltage of the three-phase AC power supply, the remaining one-phase phase that is the reference for the line voltage is detected. A phase loss detection device characterized by:

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