JP2013089795A - Printed wiring board and mounting structure of electronic component using the same - Google Patents

Abstract

A printed wiring board capable of reducing mounting defects and a mounting structure for an electronic component using the printed wiring board are provided.
In a printed wiring board, an outer peripheral pad that faces each of outer peripheral terminals of a QFN and a pad that faces a bottom electrode are disposed. A solder resist 5 is formed on the surface of the printed wiring board 2. The solder resist 5 has an opening 5 a that exposes each of the outer peripheral pads 3, and four openings that are exposed by dividing the pad 4 into four regions. Part 5b is formed.
[Selection] Figure 4

Description

  The present invention relates to a printed wiring board and an electronic component mounting structure using the same, and more particularly to a printed wiring board for mounting a surface mounting type electronic component and an electronic component mounting structure using the same. .

  As a method for mounting a surface mount type electronic component on a printed wiring board, there is soldering by reflow. In this method, first, cream solder is printed on a predetermined pad formed on a printed wiring board. Next, a surface mounting type electronic component is mounted so that the claim solder is interposed between the predetermined pads. Thereafter, the electronic component is soldered to the printed wiring board by heating in a reflow furnace at a predetermined temperature to melt the cream solder.

  Such surface mount electronic components include electronic components called QFN (Quad Flat Non-lead package) or SON (Small Outline Non-lead package). Some QFNs and SONs have electrodes (bottom electrodes) formed on the bottom surface of the package for heat radiation and the like in addition to the peripheral terminals arranged on the outer periphery of the package. On the printed wiring board on which QFN and SON are mounted, pads corresponding to such bottom electrodes are formed in addition to the peripheral pads corresponding to the peripheral terminals of the package.

  When QFN or SON is mounted on a printed wiring board, first, solder cream is printed on the outer peripheral pad corresponding to the outer peripheral terminal of the package and the pad corresponding to the bottom electrode. Next, QFN or SON is aligned with the printed wiring board (pad), and the outer peripheral terminal of the package is soldered to the corresponding outer peripheral pad, and the bottom electrode of the package is soldered to the corresponding pad. It will be. Note that there are Patent Literature 1, Patent Literature 2, and Patent Literature 3 that disclose soldering by reflow.

JP 2006-147723 A JP 2010-283039 A JP 2009-105212 A

  However, the conventional method has the following problems. In soldering by reflow, when the cream solder melted by heating aggregates, the melted solder tends to be rounded by its surface tension.

  At this time, if the amount of cream solder supplied to the pad corresponding to the bottom electrode is too large, a package such as QFN rides on the top of the rounded solder and the package may float. When the package floats, the outer peripheral terminal arranged on the outer periphery of the package and the outer peripheral pad corresponding to the outer peripheral terminal do not come into contact with each other, and an open defect occurs.

  Further, the position of the rounded solder apex does not necessarily overlap the center of gravity of QFN or the like in a planar manner. For this reason, if the position of the vertex of the melted solder is shifted from the center of gravity of QFN or the like in a plane, the package of QFN or the like is inclined, and the outer peripheral terminal arranged on the side where the package is floating and its outer periphery The outer peripheral pad corresponding to the terminal becomes an open defect.

  On the other hand, if the amount of cream solder supplied to the pad corresponding to the bottom electrode is small, the bonding area between the bottom electrode and the corresponding pad is reduced. For this reason, it is assumed that the heat dissipation effect which is originally intended cannot be sufficiently obtained and desired performance as an electronic component cannot be obtained. Conventionally, the supply amount of cream solder has been adjusted, for example, by changing the opening size of a metal mask for printing based on manufacturing experience.

  The present invention has been made as part of the development described above, and one object thereof is to provide a printed wiring board that can reduce mounting defects, and the other object is to provide such a printed wiring board. It is providing the mounting structure of the electronic component using this.

  A printed wiring board according to the present invention is a printed wiring board used for mounting an electronic component having a bottom electrode on a bottom surface of a package, and includes a substrate body having a main surface, a pad, and an insulating coating layer. ing. The pad is formed on the main surface of the substrate body, and the bottom electrode is bonded thereto. The insulating coating layer is formed so as to cover the surface of the substrate body. The pad is partitioned into a plurality of regions by at least one of a first aspect in which a part of the surface of the pad is covered with a covering layer and a second aspect that is arranged as a plurality of divided pads. .

  An electronic component mounting structure according to the present invention is an electronic component mounting structure in which the electronic component is mounted on the printed wiring board according to any one of claims 1 to 6, and the electrode pad of the printed wiring board, A bottom electrode formed on the bottom of the electronic component package is joined by soldering.

With the printed wiring board according to the present invention, mounting defects of electronic components can be suppressed.
According to the electronic component mounting structure of the present invention, the electronic component can be reliably bonded to the printed wiring board.

It is a perspective view which shows the external appearance of QFN as an example of the electronic component mounted in the printed wiring board which concerns on Embodiment 1 of this invention. FIG. 2 is a side view of the QFN shown in FIG. 1 in the same embodiment. FIG. 2 is a bottom view of the QFN shown in FIG. 1 in the same embodiment. FIG. 4 is a partial plan view showing a printed wiring board in the same embodiment. In the same embodiment, it is a fragmentary top view which shows 1 process of the mounting procedure of QFN to a printed wiring board. FIG. 6 is a partial cross-sectional view taken along a cross-sectional line VI-VI shown in FIG. 5 in the same embodiment. FIG. 7 is a cross-sectional view showing a step performed after the step shown in FIG. 6 in the same embodiment. FIG. 8 is a cross-sectional view showing a step performed after the step shown in FIG. 7 in the same embodiment. FIG. 9 is a cross-sectional view showing a process performed after the process shown in FIG. 8 in the same embodiment, and shows a state where QFN is mounted on a printed wiring board. It is a fragmentary top view which shows the printed wiring board which concerns on a comparative example. It is sectional drawing which shows 1 process of the mounting procedure of the electronic component to the printed wiring which concerns on a comparative example. It is sectional drawing which shows the process performed after the process shown in FIG. It is sectional drawing which shows the process performed after the process shown in FIG. In the same embodiment, it is a fragmentary top view which shows the 1st state for demonstrating an effect. FIG. 15 is a partial cross-sectional view taken along a cross-sectional line XV-XV shown in FIG. 14 in the same embodiment. In the same embodiment, it is a fragmentary top view which shows the 2nd state for demonstrating an effect. FIG. 17 is a partial cross-sectional view taken along a cross-sectional line XVII-XVII shown in FIG. 16 in the same embodiment. In the embodiment, it is a fragmentary top view which shows the 3rd state for demonstrating an effect. FIG. 19 is a partial cross-sectional view taken along a cross-sectional line XIX-XIX shown in FIG. 18 in the same embodiment. In the same embodiment, it is a top view which shows the relationship between the position of the vertex of the molten solder, and the position of the gravity center of QFN. In the same embodiment, it is the 1st figure which shows the relationship between the thickness of the printed cream solder, and the height of the solder after fuse | melting. In the same embodiment, it is the 2nd figure which shows the relationship between the thickness of the printed cream solder, and the height of the solder after fuse | melting. It is a top view which shows the printed wiring board which concerns on Embodiment 2 of this invention. In the same embodiment, it is a fragmentary top view which shows 1 process of the mounting procedure of QFN to a printed wiring board. FIG. 25 is a partial cross-sectional view taken along a cross-sectional line XXV-XXV shown in FIG. 24 in the same embodiment. FIG. 26 is a partial cross-sectional view showing a step performed after the step shown in FIG. 25 in the same embodiment. FIG. 27 is a cross-sectional view showing a process performed after the process shown in FIG. 26 in the embodiment, and shows a state in which the QFN is mounted on the printed wiring board. It is a top view which shows the printed wiring board which concerns on Embodiment 3 of this invention. In the same embodiment, it is a fragmentary top view which shows 1 process of the mounting procedure of QFN to a printed wiring board. FIG. 30 is a partial cross sectional view taken along a cross sectional line XXX-XXX shown in FIG. 29 in the same embodiment. 306 is a partial cross-sectional view showing a step performed after the step shown in FIG. 305 in the same embodiment. FIG. FIG. 32 is a cross-sectional view showing a step performed after the step shown in FIG. 31 in the embodiment, and showing a state in which the QFN is mounted on the printed wiring board. In each embodiment, it is a figure which shows the plane and cross section for demonstrating the aspect of the division of a pad. It is a figure which shows the plane and cross section for demonstrating the aspect of the division of a pad which is not appropriate.

Embodiment 1
First, an external appearance of QFN will be described as an example of an electronic component mounted on a printed wiring board. As shown in FIGS. 1, 2, and 3, in the QFN as an example of the electronic component 1, a plurality of outer peripheral terminals 13 are arranged along the outer periphery of the package 11. Each of the outer peripheral terminals 13 is electrically connected to a semiconductor chip (not shown) sealed in the package 11. A bottom electrode 12 for heat dissipation and the like is disposed on the bottom surface of the package 11.

  Next, the printed wiring board will be described. As shown in FIG. 4, in the area where the QFN is mounted on the printed wiring board 2 (see the package outer shape 11a), the outer peripheral pad 3 is opposed to each of the plurality of outer peripheral terminals 13 formed in the QFN package. Is arranged. A pad 4 made of one continuous conductor is arranged so as to face the bottom electrode 12 formed in the package.

  Further, a solder resist 5 is formed on the surface of the printed wiring board 2 (substrate body 2a). The solder resist 5 is formed with an opening 5a that exposes each of the plurality of outer peripheral pads 3, and four openings 5b that are exposed by dividing the pad 4 into four regions (pads 44). In particular, each of the openings 5b is formed so as to expose the portion of the substrate body 2a of the printed wiring board 2 beyond the ends of the two sides so that the ends of the two sides of the partitioned pad 44 are exposed. Has been.

  Next, a procedure for mounting QFN on a printed wiring board will be described. First, for example, lead-free solder (composition: Sn-3Ag-0.5Cu) is prepared as cream solder. Further, based on the pad PP and the pad 4 (see FIG. 4), a metal mask having a predetermined opening and a squeegee are prepared.

  Next, using the metal mask and squeegee, cream solder 21 is printed on the surface of the pad 44 exposed on the surface of the printed wiring board 2 as shown in FIGS. At this time, the cream solder 21 is printed with a size smaller than the size (dimension) of the pad 44 so that a region along the outer periphery of the pad 44 is exposed. At this time, cream solder (not shown) is also printed on the surface of the pad PP (see FIG. 4).

  Next, the QFN is aligned with respect to the printed wiring board 2 on which the cream solder is printed, and the QFN is placed on the printed wiring board 2 (cream solder 21). Next, the printed wiring board 2 on which the QFN is placed is placed in a reflow furnace (not shown). Next, in a reflow furnace, for example, heating is performed at a temperature of about several tens of degrees Celsius to melt the cream solder.

  Here, the cream solder 21 is printed with a size smaller than the size (dimension) of the exposed pad 44. Therefore, as shown in FIG. 7, the cream solder melts and aggregates to become spherical and rises (molten solder 22) and tries to lift the QFN package 11. Further, as shown in FIG. 8, the melted solder 22 wets and spreads over the entire surface of the pad 4, so that the QFN package 11 is drawn to the printed wiring board 2 side.

  As a result, as shown in FIG. 9, the bottom electrode 12 of the QFN is joined to the pad 4 via the solder 24, and each of the outer peripheral terminals 13 of the QFN is joined to the corresponding outer peripheral pad 3 via the solder 24. Is done. Thus, the QFN is mounted on the printed wiring board 2.

  With the electronic component mounting method described above, mounting defects on a printed wiring board such as QFN can be reduced. This will be described with a comparative example.

  As shown in FIG. 10, in the printed wiring board according to the comparative example, a plurality of peripheral terminals 13 of QFN (see FIGS. 1 to 3) are provided in the printed wiring board 101 in the region where the QFN is mounted (see the dotted frame). ) Are arranged so as to face each other. A pad 103 is disposed so as to face the bottom electrode 12 (see FIGS. 1 to 3).

  Further, a solder resist 104 is formed on the surface of the printed wiring board 101. The solder resist 104 is formed with an opening 105 for exposing each of the plurality of outer peripheral pads 102 and an opening 106 for exposing the pad 103. In particular, the opening 106 is formed so as to expose the entire pad 103.

  Next, the QFN mounting procedure on the printed wiring board 101 will be described. First, cream solder (not shown) is printed on the surface of the pad 103 exposed on the surface of the printed wiring board 101 and the surface of the outer peripheral pad 102. Next, QFN is placed at a predetermined position on the printed wiring board 101 on which the cream solder is printed, and placed in a reflow furnace. Next, in a reflow furnace, heating is performed at a predetermined temperature to melt the cream solder, and the bottom electrode 12 of the QFN is joined to the pad 4 by soldering, and the outer peripheral terminal 13 is soldered to the outer peripheral pad 3. Join by attaching.

  In soldering by reflow, when cream solder melts and aggregates, the melted solder tends to be rounded due to its surface tension. At this time, if the amount of the cream solder printed on the pad 103 is too large, the QFN package 112 runs on the top of the rounded solder as shown in FIG. For this reason, the QFN package 112 is in a floating state with respect to the printed wiring board 101, and the outer peripheral terminal 13 of the QFN and the outer peripheral pad 102 of the printed wiring board 101 are not in contact with each other, which may cause an open defect. .

  Further, the position of the apex of the rounded solder does not necessarily coincide with the center of gravity of the QFN in a plane. For this reason, if the position of the solder apex is shifted in plan from the center of gravity of the QFN, as shown in FIG. 12, the QFN package is inclined with respect to the printed wiring board 101, and the QFN package is lifted. There is a possibility that an open defect may occur because the outer peripheral terminal 13 located on the side where the pin is located does not contact the corresponding outer peripheral pad 102.

  On the other hand, when the amount of cream solder printed on the pad 103 is small, it is assumed that the bonding area between the bottom electrode 113 of the QFN and the pad 103 becomes small as shown in FIG. For this reason, the heat generated from the QFN cannot be efficiently radiated, and the desired performance as an electronic component may not be obtained.

  In comparison with the comparative example, in the mounting procedure of the electronic component according to the present embodiment, QFN or the like is mounted on the printed wiring board by melting cream solder printed with a size smaller than the size (dimension) of the exposed pad 44. Is done. As described above, when the cream solder is melted and agglomerated, the melted solder tends to be rounded by its surface tension. The height of the solder after the molten solder agglomerates can be approximated by the height of the spherical crown.

  Further, it is known that when the melted cream solder is aggregated, its volume is generally about 50% of the volume of the printed cream solder. Further, it is known that when the solder particles in the cream solder are focused on a fine state, the volume of the agglomerated solder is about 65% of the maximum volume of the printed cream solder. From such knowledge, it is thought that the volume of the solder after melting is about 50% to 65% of the volume of the printed cream solder.

  Here, when the solder cream is printed on the pad, a specific numerical example of the height of the solder after the molten solder aggregates is shown in FIG. FIG. 21 shows the solder height when a solder cream having a thickness of 150 μm and a size of φ2 is printed on a pad of size φ2. When the ratio of the volume after the molten solder agglomerates to the volume of the cream solder printed is defined as the volume change, when the volume change is 50%, the height of the spherical crown (149 μm) is printed. It can be seen that the value is almost the same as the thickness of the cream solder (150 μm).

  When the volume change is higher than 50% (55%, 60%, 65%), the height of the spherical crown (164 μm, 178 μm, 193 μm) is larger than the thickness of the printed cream solder (150 μm). It can be seen that it becomes higher. In this case, for example, as shown in FIG. 11, the melted solder causes the placed QFN package to rise.

  Therefore, as shown in FIGS. 14 and 15, consider a case where cream solder is printed with a size smaller than the size of the partitioned and exposed pad 4 (DBP). In this case, as shown in FIGS. 16 and 17, first, when the cream solder is melted by reflow, it tends to be rounded by its surface tension. At this time, the melted solder tries to lift the placed QFN (not shown). That is, the molten solder acts as a trigger for contacting the bottom electrode.

  As the molten solder contacts the bottom electrode (not shown), the molten solder spreads while wetting the surface of the pad 4 as shown in FIGS. 18 and 19, so the height of the molten solder is reduced. . That is, the melted solder acts to pull the placed QFN package toward the pad 4.

  Here, when the solder cream is printed on the pad with a size smaller than the size of the pad, a specific numerical example of the height of the solder after the molten solder aggregates is shown in FIG. FIG. 22 shows the solder height when a solder cream having a thickness of 150 μm and a size of φ2 is printed on a pad of size φ2.5. It can be seen that the height of the spherical crown is lower than the thickness of the printed cream solder (150 μm) in all cases where the volume change is 50%, 55%, 60% and 65%.

  When cream solder is printed with a size smaller than the size of the pad 4 (44) (case A: FIG. 22), and when cream solder is printed with the same size as the size of the pad 4 (44) (case B: FIG. 21) When the volume change is 50%, the difference between the height of the crown of Case A (96 μm) and the height of the crown of Case B (149 μm) is about 53 μm. I understand. When the volume change is 65%, the difference between the height of the crown of Case A (124 μm) and the height of the crown of Case B (193 μm) is about 69 μm.

  Then, in the case A, the distance between the printed wiring board and the QFN package can be shortened by about 50 μm to 70 μm compared to the case B. That is, in the case A, compared to the case B, the QFN package can be drawn closer to the printed wiring board side. As a result, as shown in FIGS. 8 and 9, the outer peripheral terminals 13 arranged on the outer periphery of the package are securely brought into contact with the molten solder on the surface of the outer peripheral pads 3 of the printed wiring board 2. 13 can be reliably bonded to the outer peripheral pad 3.

  In the printed wiring board described above, as shown in FIG. 4, one pad 4 is exposed in a state of being partitioned into four regions by the solder resist 5. By printing and melting cream solder with the same size and thickness on each of the partitioned and exposed regions, there are four vertices 23 of the melted solder as shown in FIG. .

  On the other hand, the center of gravity of the QFN is located approximately at the center of the package. Therefore, as shown in FIG. 20, when the QFN is placed at a predetermined position on the printed wiring board, the center of gravity 11b of the QFN is an area (virtual area) formed by line segments connecting the four vertices 23 It is located in the center of the plane. As a result, the QFN package is stably supported by the molten solder, and the QFN package can be prevented from being mounted in a tilted state with respect to the printed wiring board.

Embodiment 2
In the first embodiment, a printed wiring board in which a part of the surface of one pad is covered with a solder resist so that the pad is partitioned into a plurality of regions is taken as an example. Here, a printed wiring board partitioned by arranging a plurality of divided pads and a mounting procedure using the printed wiring board will be described.

  As shown in FIG. 23, in the area where the QFN is mounted on the printed wiring board 2 (see the package outer shape 11a), the pads 4 made of a plurality of (four) conductors are spaced apart from each other, and the bottom electrode 12 ( (See FIG. 3). The solder resist 5 has openings 5b that expose the entire four pads 4 arranged. In addition, since it is the same as that of the printed wiring board shown in FIG. 4 about a structure other than this, the same code | symbol is attached | subjected to the same member and the description is not repeated.

  Next, a procedure for mounting QFN on a printed wiring board will be described. First, as described in the first embodiment, a predetermined cream solder, a metal mask, and a squeegee are prepared. Next, using the metal mask and squeegee, cream solder 21 is printed on the surface of the pad 44 exposed on the surface of the printed wiring board 2 as shown in FIGS. At this time, the cream solder 21 is printed with a size smaller than the size (dimension) of the pad 44 so that a region along the outer periphery of the pad 44 is exposed. At this time, cream solder (not shown) is also printed on the surface of the pad PP (see FIG. 4).

  Next, the QFN is aligned with respect to the printed wiring board 2 on which the cream solder is printed, and the QFN is placed on the printed wiring board 2 (cream solder 21). Next, the printed wiring board 2 on which the QFN is placed is placed in a reflow furnace (not shown). Next, in a reflow furnace, for example, heating is performed at a temperature of about several tens of degrees Celsius to melt the cream solder.

  Here, the cream solder 21 is printed with a size smaller than the size (dimension) of the pad 44. In addition, the pad 4 is divided into four pads 44 and is spaced from each other. For this reason, as shown in FIG. 26, the melted solder 22 spreads while wetting the surface of the pad 44 and wraps around the side surface of the pad 44. Accordingly, the height after the molten solder wraps around the side surface of the pad 44 and the molten solder spreads while wetting the pad 44 becomes lower, and the QFN package (not shown) is placed on the printed wiring board side. Can be pulled closer to the

  Thus, as shown in FIG. 27, the bottom electrode 12 of the QFN is bonded to the pad 4 via the solder 24, and each of the outer peripheral terminals 13 of the QFN is bonded to the corresponding outer peripheral pad 3 via the solder 24. Thus, the QFN is mounted on the printed wiring board 2.

  In the mounting procedure using the above-described printed wiring board, the pad is divided into four pads 44 and arranged so as to be spaced apart from each other, and the size (dimension) of each of the pads 44 is smaller. Cream solder is printed with size. For this reason, the molten solder 22 spreads while wetting the surface of the pad 44, and wraps around the side surface of the pad 44.

  Accordingly, the height after the molten solder wraps around the side surface of the pad 44 and the molten solder spreads while wetting the pad 44 becomes lower, and the QFN package (not shown) is placed on the printed wiring board side. The outer peripheral terminal 13 is reliably brought into contact with the molten solder on the surface of the outer peripheral pad 3 of the printed wiring board 2, and the outer peripheral terminal 13 is securely bonded to the outer peripheral pad 3. Can be made. Further, the melted solder 22 wraps around the side surface of the pad 44, whereby the bonding between the bottom electrode 12 and the pad 4 can be further strengthened.

Embodiment 3
Here, a printed wiring board in which a solder resist is formed between the divided pads and a mounting procedure using the printed wiring board will be described.

  As shown in FIG. 28, in the area where the QFN is mounted on the printed wiring board 2 (see the package outer shape 11a), a plurality of (four) pads 4 are spaced apart from each other, and the bottom electrode 12 (see FIG. 3). It arrange | positions so that it may oppose. The solder resist 5 is formed with an opening 5b that exposes each of the four pads 4 arranged so as to cover a portion of the substrate body 2a located between the pads 44 adjacent to each other. Has been. In addition, since it is the same as that of the printed wiring board shown in FIG. 4 about a structure other than this, the same code | symbol is attached | subjected to the same member and the description is not repeated.

  Next, a procedure for mounting QFN on a printed wiring board will be described. First, as described in the first embodiment, a predetermined cream solder, a metal mask, and a squeegee are prepared. Next, using the metal mask and the squeegee, as shown in FIGS. 29 and 30, the cream solder 21 is printed on the surface of the pad 44 exposed on the surface of the printed wiring board 2. At this time, the cream solder 21 is printed with a size smaller than the size (dimension) of the exposed pad 44 so that a region along the outer periphery of the pad 44 is exposed. At this time, cream solder (not shown) is also printed on the surface of the pad PP (see FIG. 4).

  Next, the QFN is aligned with respect to the printed wiring board 2 on which the cream solder is printed, and the QFN is placed on the printed wiring board 2 (cream solder 21). Next, the printed wiring board 2 on which the QFN is placed is placed in a reflow furnace (not shown). Next, in a reflow furnace, for example, heating is performed at a temperature of about several tens of degrees Celsius to melt the cream solder.

  Here, the cream solder 21 is printed with a size smaller than the size (dimension) of the pad 44. Further, the pad 4 is divided into four pads 44 and arranged with a space therebetween, and a solder resist 5 is formed between the adjacent pads 44 and the pads 44.

  For this reason, as shown in FIG. 31, the melted solder 22 spreads while wetting the surface of the pad 44, and goes around the side surface of the pad 44. Accordingly, the height after the molten solder wraps around the side surface of the pad 44 and the molten solder spreads while wetting the pad 44 becomes lower, and the QFN package (not shown) is placed on the printed wiring board side. Can be pulled closer to the Further, it is possible to prevent the solder that has been printed and melted on the pads 44 adjacent to each other from being integrated by the solder resist 5.

  Thus, as shown in FIG. 32, the bottom electrode 12 of the QFN is bonded to the pad 4 via the solder 24, and each of the outer peripheral terminals 13 of the QFN is bonded to the corresponding outer peripheral pad 3 via the solder 24. Thus, the QFN is mounted on the printed wiring board 2.

  In the mounting method using the above-described printed wiring board, the pad is divided into four pads 44 and arranged at intervals from each other, and the size (dimension) is smaller than the respective pads 44. Cream solder is printed with size. For this reason, the molten solder 22 spreads while wetting the surface of the pad 44, and wraps around the side surface of the pad 44.

  Accordingly, the height after the molten solder wraps around the side surface of the pad 44 and the molten solder spreads while wetting the pad 44 becomes lower, and the QFN package (not shown) is placed on the printed wiring board side. The outer peripheral terminal 13 is reliably brought into contact with the molten solder on the surface of the outer peripheral pad 3 of the printed wiring board 2, and the outer peripheral terminal 13 is securely bonded to the outer peripheral pad 3. Can be made.

  Further, the melted solder 22 wraps around the side surface of the pad 44, whereby the bonding between the bottom electrode 12 and the pad 4 can be further strengthened. Further, since the solder resist 5 is formed between the adjacent pads 44, the solder that has been printed and melted on the adjacent pads 44 is integrated by the solder resist 5. This can effectively prevent the QFN package from tilting (floating).

  In each of the above-described embodiments, the case where the pad to which the bottom electrode of the QFN is bonded is partitioned into a plurality of regions by the solder resist or the pad itself has been described. As a method of partitioning the pads, from the viewpoint of stably mounting QFN, as shown in FIG. 33, an area formed by a line segment connecting the apexes 23 of the solder that is printed and melted on each of the partitioned pads 4 In the (virtual region), it is desirable to partition so that the center of gravity 11b of the QFN is positioned in a plane. If the center of gravity 11b of the QFN is positioned in a plane within a region (virtual region) formed by the line segment connecting the vertices 23 of the solder to be melted, it is not limited to a matrix-like section as shown in FIG. .

  On the other hand, as shown in FIG. 34, it is not preferable that the center of gravity 11b of the QFN is positioned on a line connecting the vertexes 23 of the molten solder. In this case, the QFN package is inclined. There is a risk that.

  The electronic component 1 has been described by taking QFN as an example. However, the electronic component 1 may be applied to an electronic component such as SON as long as it is a surface-mounted electronic component in which an electrode is formed on the bottom surface of the electronic component package. It is possible. Furthermore, although the solder resist was mentioned as an example as a coating layer which covers a printed wiring board, if it is the material which has electrical insulation, it will not be restricted to a solder resist.

  The embodiment disclosed this time is an example, and the present invention is not limited to this. The present invention is defined by the terms of the claims, rather than the scope described above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The present invention is effectively used for a printed wiring board for mounting a surface mount type electronic component such as QFN.

  2 printed wiring board, 2a board body, 3 outer peripheral pad, 4 pad, 44 pad, 5 solder resist, 5a, 5b opening, 1 electronic component, 11 package, 11a package outline, 11b package center of gravity, 12 bottom electrode, 13 peripheral terminal, 21 cream solder, 22 molten solder, 23 top of solder, 24 solder.

Claims (7)

A printed wiring board used for mounting an electronic component having a bottom electrode on the bottom surface of a package,
A substrate body having a main surface;
A pad formed on the main surface of the substrate body and to which the bottom electrode is bonded;
An insulating coating layer formed so as to cover the surface of the substrate body,
The pad is partitioned into a plurality of regions by any one of a first aspect in which a part of the surface of the pad is covered with the covering layer and a second aspect in which the pad is arranged as a plurality of divided pads. Printed wiring board. The pad is defined by the first aspect;
The pad is formed by one continuous conductor,
The printed wiring board according to claim 1, wherein the pad is partitioned into a plurality of regions by the covering layer covering a part of the surface of the conductor. The pad is defined by the second aspect,
2. The printed wiring board according to claim 1, wherein the pad is partitioned by arranging a plurality of conductors so as to correspond to the bottom electrode at intervals. 3.   The printed wiring board according to claim 3, wherein in the plurality of conductors, the covering layer is disposed between one conductor and the other conductors that are spaced apart from each other.   When the solder supplied to each of a plurality of partitioned areas is melted, the pad forms a virtual area where the line segment connecting the vertices of the melted solder is closed, and the center of gravity of the electronic component is The printed wiring board according to claim 1, wherein the printed wiring board is partitioned so as to be positioned in a plane in the virtual region.   The printed wiring board according to claim 1, wherein the coating layer is formed so as to expose an edge located on an outermost periphery of the pad. An electronic component mounting structure in which an electronic component is mounted on the printed wiring board according to claim 1,
An electronic component mounting structure in which a bottom electrode formed on the bottom of an electronic component package is joined to the pad of the printed wiring board by soldering.

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