JP2012009560A - Flexible multi layer wiring board, flexible semiconductor device and method for manufacturing flexible multi layer wiring board - Google Patents

Abstract

Provided is a flexible multilayer wiring board capable of ensuring sufficient connection strength when a semiconductor element is crimped to an electrode pad using a wire.
A flexible multilayer wiring board 30, an adhesive layer 1A having a second major surface M ₂ opposite to the first major surface M ₁ and the first main surface M _1, disposed on the adhesive layer 1A , and a third major surface M ₃ and the insulating base layer 2A formed by low modulus material having a fourth major surface M ₄ facing the third major surface M ₃ in contact with the second major surface M ₂ A substrate 10A is included. The flexible multilayer wiring board 30 further includes base materials 10B and 10C having the same configuration as the base material 10A and an outermost base material 10D. In the adhesive layer 1D of the outermost base material 10D, via layers 9A and 9B having an elastic modulus higher than that of the adhesive layer 1D are embedded.
[Selection] Figure 1

Description

  The present invention relates to a flexible multilayer wiring board, a flexible semiconductor device, and a method for manufacturing a flexible multilayer wiring board.

  In the electrical connection between a semiconductor chip and a wiring board, a wire bonding method for connecting using a fine wire has been conventionally used. In connection by this wire bonding method, Au is generally used as a wire material, and a metal such as gold (Au), aluminum (Al), copper (Cu) is used as an electrode material. The metal wire is connected to the electrode metal by thermocompression bonding. At this time, for example, in Au-Au bonding, since it is necessary to increase the temperature to about 300 ° C. only by thermocompression bonding, the resin substrate cannot be applied in this temperature region. For this reason, the metal surface is activated by applying vibration (vibration energy) by ultrasonic waves, and connection at a low temperature of 100 ° C. to 200 ° C. is enabled. This heat, load, and ultrasonic wave are used for solid phase bonding by removing impurities such as moisture on the metal surface and promoting atomic diffusion between the metal wire and the electrode. For this reason, a rigid substrate using a glass epoxy resin having a relatively high elastic modulus has been used in order to sufficiently transmit ultrasonic waves and load.

  However, in recent years, there has been a tendency to adopt a flexible multilayer wiring board using polyimide having a dielectric constant lower than that of glass epoxy resin in order to realize high functionality and high speed transmission of electronic equipment. A multilayer wiring board using polyimide includes a plurality of substrates including an insulating substrate made of polyimide and an adhesive layer. Polyimide generally has a lower elastic modulus than glass epoxy resin. The elastic modulus of glass epoxy resin is about 20 GPa, whereas the elastic modulus of polyimide is about 5 GPa. The elastic modulus of the adhesive layer is several GPa to several hundred MPa.

  Multi-layer wiring boards using polyimide, which is a low-modulus material, as an insulating base material can easily deform the surface of the board due to the load during wire bonding, so the load is insufficient and the connection between the wire and electrode Strength decreases. It is speculated that the adhesive having an elastic modulus of several GPa to several hundreds of MPa acts like a damper and does not sufficiently transmit ultrasonic waves, which is one of the causes of connection strength reduction.

  As means for solving the above-mentioned problems, for example, in order to make up for insufficient connection strength due to wire bonding connection, measures such as increasing the thickness of the wire bonding electrode pad and improving the adhesive (increasing the elastic modulus) are taken. (See, for example, Patent Document 1).

  However, since the wire bonding electrode pad is mainly formed by sputtering or electroplating, increasing the film thickness leads to cost increase and process complexity. In addition, improvement of the adhesive material inevitably increases development costs and time. Therefore, a flexible multilayer wiring board that can sufficiently secure the connection strength between the wire and the wire bonding electrode pad has been demanded.

JP 2003-318546 A

  An object of this invention is to provide the flexible multilayer wiring board which can fully ensure connection strength, when crimping a semiconductor element to a wire bonding electrode pad using a wire.

  According to a first aspect of the present invention, there is provided an adhesive layer including a first main surface and a second main surface opposite to the first main surface, and a third main surface disposed on the adhesive layer and in contact with the second main surface. A plurality of base materials having an insulating base material layer formed of a low elastic modulus material having a fourth main surface facing the surface and the third main surface, and the adhesive layer and the insulating base material layer alternate A flexible multi-layer wiring board laminated with a wire bonding electrode pad on a part of the fourth main surface of the outermost base material, and an elastic modulus higher than that of the adhesive layer in the adhesive layer of the outermost base material The gist of the present invention is a flexible multilayer wiring board in which a high via layer is embedded.

  According to a second aspect of the present invention, there is provided an adhesive layer including a first main surface and a second main surface opposite to the first main surface, and a third main surface disposed on the adhesive layer and in contact with the second main surface. A plurality of base materials having an insulating base material layer formed of a low elastic modulus material having a fourth main surface facing the surface and the third main surface, and the adhesive layer and the insulating base material layer alternate A flexible semiconductor device laminated on the outermost base material, wherein a wire bonding electrode pad is provided on a part of the fourth main surface of the outermost base material, and an elastic modulus higher than that of the wire bonding electrode pad in the adhesive layer of the outermost base material. A flexible via layer is embedded, a semiconductor element is disposed on a part of the fourth main surface of the outermost base material, and the semiconductor element and the wire bonding electrode pad are electrically connected by a wire The gist is a semiconductor device.

  According to a third aspect of the present invention, a fourth main surface facing the third main surface and the third main surface is provided on the adhesive layer including the first main surface and the second main surface facing the first main surface. A step of manufacturing a plurality of base materials by arranging an insulating base material layer formed of a low elastic modulus material provided, and at least one of the base materials, a hole is formed immediately below where a wire bonding electrode pad is formed And stacking multiple substrates so that the step of filling the hole with a material having a higher modulus of elasticity than the wire bonding electrode pad to form a via layer and the adhesive layer and insulating substrate layer alternate The gist of the present invention is a method for manufacturing a multilayer wiring board, which includes a step of manufacturing a temporary substrate, and a step of providing a wire bonding electrode pad on a part of the fourth main surface of the outermost base material corresponding to the upper portion of the via layer.

  ADVANTAGE OF THE INVENTION According to this invention, when crimping a semiconductor element to a wire bonding electrode pad using a wire, the flexible multilayer wiring board which can fully ensure connection strength is provided.

It is sectional drawing of the flexible multilayer wiring board which concerns on embodiment. It is the partially cutaway top view (a) and sectional drawing (b) of the flexible semiconductor device using the flexible multilayer wiring board concerning an embodiment. It is a manufacturing process figure (the 1) of the flexible multilayer wiring board concerning an embodiment. It is a manufacturing process figure (the 2) of the flexible multilayer wiring board concerning an embodiment. It is a manufacturing process figure (the 3) of the flexible multilayer wiring board concerning an embodiment. It is a manufacturing process figure (the 4) of the flexible multilayer wiring board concerning an embodiment. It is a manufacturing process figure (the 5) of the flexible multilayer wiring board which concerns on embodiment. It is a manufacturing process figure (the 6) of the flexible multilayer wiring board concerning an embodiment. It is a manufacturing process figure (the 7) of the flexible multilayer wiring board which concerns on embodiment. It is a manufacturing process figure (the 8) of the flexible multilayer wiring board which concerns on embodiment. It is a manufacturing process figure (the 9) of the flexible multilayer wiring board which concerns on embodiment. The result of the surface subsidence analysis of the multilayer wiring board by the finite element analysis method is shown. It is the top view (a) of the flexible semiconductor device using the flexible multilayer wiring board concerning the modification 1 of an embodiment, and a sectional view (b). It is sectional drawing of the flexible semiconductor device using the flexible multilayer wiring board which concerns on the modification 2 of embodiment. It is sectional drawing of the flexible semiconductor device using the flexible multilayer wiring board which concerns on the modification 3 of embodiment. It is the top view (a) and sectional drawing (b) of the flexible semiconductor device using the flexible multilayer wiring board concerning the modification 4 of embodiment. It is sectional drawing of the flexible semiconductor device using the flexible multilayer wiring board which concerns on the modification 5 of embodiment.

  Hereinafter, the present invention will be described with reference to embodiments, but the present invention is not limited to the following embodiments. In addition, about what has the same function or a similar function in a figure, the same or similar code | symbol is attached | subjected and description is abbreviate | omitted.

[First Embodiment]
[Flexible multilayer wiring board]
As shown in FIG. 1, a flexible multilayer wiring board 30 according to the first embodiment, the adhesive layer 1A having a second major surface M ₂ opposite to the first major surface M ₁ and the first main surface M ₁ , disposed on the adhesive layer 1A, is formed of a low modulus material comprise a fourth major surface M ₄ facing the third major surface M ₃ and third main surface M ₃ in contact with the second major surface M ₂ The base material 10A having the insulating base material layer 2A. The flexible multilayer wiring board 30 further includes base materials 10B and 10C having the same configuration as the base material 10A and an outermost base material 10D. The plurality of base materials 10A... 10C and the outermost base material 10D are bonded onto the base substrate 300 in the form of an adhesive layer 1A, an insulating base layer 2A,... An adhesive layer 1D, an insulating base layer 2D. The agent layers 1A... 1D and the insulating base layers 2A. Fourth part of the main surface _{M 4} wire bonding electrode pads 4A outermost substrate 10D, 4B are provided. In the adhesive layer 1D of the outermost base material 10D, via layers 9A and 9B having an elastic modulus higher than that of the adhesive layer 1D are embedded. Here, the through-hole reaching the first main surface M ₁ of the outermost substrate 10D is provided from the fourth major surface M ₄ the outermost substrate 10D, via layers 9A, 9B is embedded in the through hole. By burying the via layers 9A and 9B having a higher elastic modulus than the adhesive layer 1D in the adhesive layer 1D of the outermost base material 10D, sinking is prevented. Further, since the amount of subsidence determined by the adhesive layer 1D can be reduced, the deflection of the substrate surface is suppressed.

On the first major surface _{M 1} of the base material 10A wiring 12A is formed, the substrate 10B, 10C, the first main surface _{M 1} each wiring 12B even in the outermost substrate 10D, 12C, 12D is formed Yes. Wiring 12A and the wiring 12B is electrically connected through the first main surface _{M 1} interconnect vias _15A buried in the through hole of the fourth major surface _{M 4} from _1, 15A _2, 15A 3, 15A ₄ of the substrate 10A Has been. Similarly, the wiring 12B and the wiring 12C are electrically connected through the wiring vias 15B ₁ , 15B ₂ , and 15B ₃ , and the wiring 12C and the wiring 12D are electrically connected through the wiring vias 15C ₁ , 15C ₂ , and 15C _3. The wiring 12D and the electrode pads 5A and 5B are electrically connected via the wiring vias 15D ₁ and 15D ₂ .

  As a material of the via layers 9A and 9B, a material having a higher elastic modulus than the adhesive layer 1D is preferable. This is because it effectively prevents the sinking. Further, the use of via layers 9A and 9B having a high elastic modulus increases the vibration transmission efficiency of ultrasonic waves. As the via layers 9A and 9B, a material having an elastic modulus higher by one digit or more than the adhesive layers 1A... 1D is preferable, and a material having an elastic modulus higher by two digits or more is more preferable. The via layers 9A and 9B are not particularly limited as long as the via layers 9A and 9B are disposed in the adhesive layer 1D of the outermost base material 10D. However, since the effect of preventing sinking can be expected, the wire bonding electrode pads 4A and 4B can be expected. It is preferable to arrange it immediately below.

  As the via layers 9A and 9B, for example, a metal material or an inorganic material can be used. As the metal material, a conductive paste such as copper (Cu), silver (Ag), tin (Sn), or Ag paste can be used. As the inorganic material, a sintered ceramic, a resin containing an inorganic filler, a sintered paste containing an inorganic filler, or the like can be used.

The via layers 9A and 9B may be wirings that are electrically connected or dummy wirings that are not electrically connected. Via layer 9A, 9B is and wiring 12A ... 12D, wiring vias _15A 1 ... 15D ₂ and may be the same material. From the viewpoint of simplification of the production process can be achieved, via layer 9A, and 9B, the wiring 12A ... 12D, it is preferable that the wiring vias _15A 1 ... 15D ₂ and the same material. The shape of the via layers 9A and 9B is not particularly limited, but a cylindrical one can be used as will be described later with reference to FIG.

  As the insulating base material layers 2A... 2D, a base material made of a low elastic modulus material can be used. Specifically, a flexible resin film such as a polyimide film made of wholly aromatic polyimide (API) or the like, or a polyester film can be used. Among these, it is preferable to use a polyimide film. This is because it is flexible and can be bent. Moreover, it is because a dielectric constant is lower than a glass epoxy resin, and a high-speed transmission characteristic is high. In addition to the polyimide film, epoxy-based, imide-based prepreg, or the like can be used as the insulating base layer 2A... 2D.

  The adhesive layers 1 </ b> A to 1 </ b> D can be formed by sticking a thermoplastic polyimide or a film obtained by adding a thermosetting function to a thermoplastic polyimide in addition to the application of the adhesive.

[Flexible semiconductor devices]
As described above, the flexible multilayer wiring board 30 is prevented from sinking. As an application utilizing such characteristics, as shown in FIG. 2A, the semiconductor element 20A and the wire bonding electrode pads 4A and 4B arranged around the semiconductor element 20A are electrically connected by the wires 3A and 3B. The flexible semiconductor device 31 may be mentioned. As shown in FIG. 2 (b), the flexible semiconductor device 31, an adhesive layer 1A ... 1D comprising a second main surface _{M 2} opposite to the first major surface _{M 1} and the first main surface _{M 1,} adhesive disposed on the layer 1A ... 1D, formed of a low modulus material comprise a fourth major surface M ₄ facing the third major surface M ₃ and third main surface M ₃ in contact with the second major surface M ₂ A plurality of substrates having insulating substrate layers 2A to 2D are provided. A plurality of base materials 10A... 10C and an outermost base material 10D are laminated alternately with the adhesive layers 1A. Fourth part of the main surface M ₄ wire bonding electrode pads 4A outermost substrate 10D of the flexible semiconductor device 31, 4B are provided. 2A, via layers 9A and 9B having a higher elastic modulus than the adhesive layer 1D are embedded in the adhesive layer 1D of the outermost base material 10D. . Here, the via layers 9A and 9B have a cylindrical shape. The semiconductor element 20A is disposed in the fourth part of the main surface _{M 4} the outermost substrate 10D, the semiconductor element 20A and the wire bonding electrode pads 4A, 4B wire 3A, and is electrically connected by 3B. Even if the wires 3A and 3B are thermocompression bonded to the wire bonding electrode pads 4A and 4B, sinking is prevented in the flexible semiconductor device 31, so that the connection strength between the wires 3A and 3B and the wire bonding electrode pads 4A and 4B is increased. Secured. The through-holes extending from the fourth major surface M ₄ outermost substrate 10D on the first major surface M ₁ of the outermost substrate 10D is provided, via layer 9A in the through hole, 9B are embedded. Therefore, by using the via layers 9A and 9B as wiring vias and electrically connecting the wire bonding electrode pads 4A and 4B and the via layers 9A and 9B, the signal from the semiconductor element 20A can be transmitted at the shortest distance to the base material 10C. (And vice versa). Therefore, the wiring resistance can be minimized and the signal transmission speed is increased. Conventionally, in the LVH structure, it is difficult to perform bonding directly on the LVH, and it is necessary to route the wire bonding electrode pad. This eliminates the need to route the wire bonding electrode pad.

[Manufacturing method of flexible multilayer wiring board]
Below, the manufacturing method of the flexible multilayer wiring board 30 (flexible semiconductor device 31) is demonstrated.

(B) As shown in FIG. 3, prepared third main surface M ₃ and the fourth main surface M ₄ insulating base layer 102A formed of a low modulus material comprise opposing the third major surface M ₃ To do. Here, a material made of polyimide is prepared. On the fourth major surface M ₄ is previously subjected to a conductive material 112A made of, for example, copper.

As shown in (b) FIG. 4, the insulating substrate layer 102A, place the adhesive layer 101A having a second major surface _{M 2} opposite to the first major surface _{M 1} and the first main surface _{M 1} . Here, the surface in contact with the third major surface _{M 3} is the second major surface _{M 2.} As shown in FIG. 5, a mask 200 having an opening (not shown) having a desired pattern is disposed on the conductive material 112A. Placing a mask 201 having a desired opening pattern (not shown) on the first main surface M ₁ of the adhesive layer 101A.

(C) A wiring 12A is formed by etching as shown in FIG. Hole 15 Ah ₁ as shown in FIG. 7 by laser beam irradiation, to form a _{15Ah 2, 15Ah 3, 15Ah 4} . Besides the laser beam irradiation, the holes 15Ah ₁ ... 15Ah ₄ may be formed by etching or a combination of laser beam irradiation and etching. As shown in FIG. 8, to produce a squeegee printing method by holes 15 Ah ₁ ... wiring by burying a conductive paste comprising metal 15 Ah ₄ via _15A 1 ... 15A ₄ was formed substrate 10A using a squeegee S. In addition to the squeegee printing method, as a method for forming the via layer, an electrolytic plating method, an electroless plating method, screen printing, a sputtering method, or the like may be used.

(D) The above-described steps (a) to (c) are repeated to form the base materials 10B and 10C and the outermost base material 10D. At least one of the base materials 10A... 10C and the outermost base material 10D is provided with a hole at a portion directly below where the wire bonding electrode pads 4A and 4B are formed. Here, providing holes extending from the fourth major surface M ₄ outermost substrate 10D in the same manner as in FIG. 7 in the first main surface M ₁ of the outermost substrate 10D. Then, via layers 9A and 9B having a higher elastic modulus than the adhesive layer 1D are embedded in the holes in the same manner as in FIG. 8, thereby forming the via layers 9A and 9B. A temporary substrate 130 as shown in FIG. 9 is formed by laminating a plurality of base materials 10A... 10C and an outermost base material 10D so that the adhesive layers 1A... 1D and insulating base layers 2A. obtain. Note that the via layers 9A and 9B may be formed before (before) the wiring vias 15D ₁ and 15D ₂ .

(E) As shown in FIG. 10, provided with a conductive material 114 to the fourth major surface _{M 4} the outermost substrate 10D. After that, as shown in FIG. 11, a mask 202 is disposed on the conductive material 114. The mask 202 includes an opening (not shown) in a portion where the wire bonding electrode pads 4A and 4B are formed. And by etching a via layer 9A, the wire bonding electrode pads 4A to a part of the fourth major surface _{M 4} outermost substrate 10D which corresponds to the upper part of 9B, provided 4B. Thus, the flexible multilayer wiring board 30 shown in FIG. 1 is manufactured.

(F) further, the semiconductor element 20A is disposed in the fourth main surface _{M 4} the outermost substrate 10D, electrically connecting a wire bonding electrode pads 4A, and 4B and the semiconductor element 20A with a wire 3A, 3B Thus, the flexible semiconductor device 31 as shown in FIG. 2 is manufactured.

According to the first embodiment, sinking is prevented by forming the via layers 9A and 9B having a higher elastic modulus than that of the adhesive layer 1D in the adhesive layer 1D of the outermost base material 10D. Further, not only the sinking is prevented, but also the bending of the wire bonding electrode pads 4A and 4B immediately above the via layers 9A and 9B is relatively suppressed, so that the flatness of the bonding load surface is improved. By using the via layers 9A and 9B, the vibration transmission efficiency of the ultrasonic waves is increased. Furthermore, it is possible to cope with existing techniques such as screen printing and electrolytic plating, and the wiring vias 15D ₁ and 15D ₂ and the via layers 9A and 9B can be formed at the same time, so that the number of processes can be increased and the production cost can be suppressed. .

[Second Embodiment]
[Flexible semiconductor devices]
Hereinafter, the second embodiment will be described through the description of the flexible semiconductor device 31 with a focus on differences from the first embodiment. In addition, by describing the flexible semiconductor device 31, the wiring board according to the second embodiment is also described.

  In the first embodiment, the connection strength between the wires 3A and 3B of the flexible semiconductor device 31 and the wire bonding electrode pads 4A and 4B is secured by preventing the wire bonding electrode pads 4A and 4B from sinking during wire bonding. did. However, the connection strength between the wires 3A and 3B and the wire bonding electrode pads 4A and 4B can be secured by the effect of suppressing the deflection of the substrate surface of the flexible multilayer wiring board 30.

  In the first embodiment, the via layers 9A and 9B having a higher elastic modulus than the adhesive layer 1D are embedded in the adhesive layer 1D of the outermost base material 10D. In the second embodiment, via layers 9A and 9B having higher elastic modulus than the wire bonding electrode pads 4A and 4B are embedded in the adhesive layer 1D of the outermost base material 10D. With this configuration, it is possible to suppress the deflection of the substrate surface. The via layers 9A and 9B are not particularly limited as long as the via layers 9A and 9B are disposed in the adhesive layer 1D of the outermost base material 10D, but are preferably disposed immediately below the wire bonding electrode pads 4A and 4B.

  As the wire bonding electrode pads 4A and 4B, silver (Ag), copper (Cu), or the like can be used. The elastic modulus of silver is about 80 GPa. Therefore, when silver is used for the wire bonding electrode pads 4A and 4B, it is preferable to use the via layers 9A and 9B having an elastic modulus greater than 80 GPa.

(Other embodiments)
As described above, the present invention has been described according to the first and second embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  For example, in the first and second embodiments, the via layers 9A and 9B are formed of a metal material. However, the via layers 9A and 9B may be replaced with those formed of an inorganic material without being limited to the metal material. For example, as shown in FIG. 2B, when the substrate 10C and the via layers 9A and 9B are electrically connected, it is effective in the case where inconveniences such as inability to form wiring on the insulating base material layer 2C of the base material 10C occur. It is.

In each of the first and second embodiments, the via layers 9A and 9B are embedded in the adhesive layer 1D of the outermost base material 10D, and the shape is not particularly limited as long as it has a predetermined elastic modulus. For example, although the via layers 9A and 9B are cylindrical in FIG. 2A, as shown in the top view of FIG. 13A, the flexible semiconductor device 32 using the donut-shaped via layers 19A and 19B may be used. Good. The via layers 9A, 9B, 19A, 19B may be larger than the diameters of the wire bonding electrode pads 4A, 4B. Further, as shown in FIG. 14, a through hole extending from the second main surface M2 of the outermost base material 10D to the first main surface M1 of the outermost base material 10D is provided, and via layers 29A and 29B are embedded in the through holes. The flexible semiconductor device 33 may be used. For example, as shown in FIG. 2B, when it is not desired to electrically connect the base material 10C and the via layers 9A and 9B, the same metal material as the wiring vias 15D ₁ and 15D ₂ without using an inorganic material Since the via layers 29A and 29B made of can be used, it is advantageous in that the material can be easily managed. Further, the wire bonding electrode pad 4A has a small diameter, and a via layer having a diameter smaller than the diameter of the wire bonding electrode pad 4A cannot be provided due to a problem in accuracy of the laser processing technique or the like. This is because even if it is difficult, the problem can be solved with the configuration of FIG.

  Further, as shown in the top view of FIG. 16A, the via layer is a base material having a via layer smaller in diameter than the via layers 9A and 9B in FIG. 1 below the wire bonding electrode pads 4A and 4B. A plurality of flexible semiconductor devices 35 arranged therein may be used. This is because the effect of relieving thermal stress due to the difference in linear expansion coefficient between the substrates can be obtained.

  In each of the first and second embodiments, an embedded semiconductor element 20B may be further disposed directly below the semiconductor element 20A as shown in FIG. This is because the calculation speed is improved by shortening the wiring distance between the semiconductor element 20A and the embedded semiconductor element 20B.

  In the first and second embodiments, the via layer is not limited to one layer. As shown in FIG. 15, the via layer 39A, 39B is provided on the base material 10C in contact with the outermost base material 10D, and the two layers are flexible. The semiconductor device 34 may be used. This is because by using two via layers, sinking and deflection can be effectively prevented.

  In the first and second embodiments, the base materials 10A... 10D are laminated on the base substrate 300 as shown in FIG. However, a new insulating base material layer having the same configuration as that of the insulating base material layer 2D is provided below the adhesive layer 1A in the drawing, and electrodes are formed on both main surfaces of the wiring board 30. It does not matter as a structure to do.

  As described above, the present invention naturally includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

  Elastic analysis was performed using a three-dimensional analysis model. FIG. 12 shows the subsidence analysis result of the surface of the multilayer wiring board by the finite element method analysis method (a general-purpose program manufactured by Ansys, trade name “ANSYS 11.0”).

  In this analysis, polyimide was assumed as the insulating substrate, and an epoxy resin adhesive was assumed as the adhesive layer. (1) As an example, a multilayer wiring board in which a metal via layer is formed immediately below the wire bonding electrode pad. (2) As a comparative example 1, a multilayer wiring board in which the thickness of the wire bonding electrode pad is doubled as usual. (3) As Comparative Example 2, three types of ordinary multilayer wiring boards were analyzed.

In the examples, the via diameter was 100 μm, and the elastic modulus of the via layer was 80 GPa (Ag elastic modulus). As analysis conditions, the bonding pressure area was 40 μm ^2, and 250 MPa (corresponding to a load of 40 gf) was applied to the wire bonding electrode pad. Further, as the evaluation condition, the displacement in the normal direction (vertical direction) on the surface of the multilayer wiring board was used.

  From FIG. 12, by forming the via layer immediately below the wire bonding electrode pad, the normal direction displacement on the surface of the multilayer wiring board is reduced to 1/3 compared to the multilayer wiring board not forming the via layer immediately below the wire bonding electrode pad. We were able to reduce to. From this result, it was confirmed that the flatness could be improved and the bonding pressure distribution could be suppressed.

  In addition, compared to a multilayer wiring board in which the wire bonding electrode pad is twice as thick, the multilayer wiring board in which a via layer is formed immediately below the wire bonding electrode pad can reduce the displacement in the normal direction on the surface of the multilayer wiring board by 50%. Was confirmed.

  As mentioned above, according to the Example, bonding reliability improved rather than thickening of the wire bonding electrode pad. Moreover, the vibration transmission efficiency of ultrasonic waves has been improved by the metal via layer. Therefore, it can be expected that the bonding performance is improved as compared with the increase in the thickness of the wire bonding electrode pad and the increase in the elastic modulus of the adhesive.

  Further, in the process surface, the via layer formed immediately below the wire bonding electrode pad can be formed by a Cu plating method, paste printing, a sputtering method, or the like. Either method can be handled by a normal substrate process and can be formed simultaneously with an existing wiring via layer, and therefore has an advantage that it does not lead to an increase in cost and an increase in the number of processes.

30 ... Flexible multilayer wiring board,
31 ... Flexible semiconductor device,
10A, 10B, 10C ... base material, 10D ... outermost base material,
1A ... adhesive layer, M 1 _... first main surface, M 2 _... second main surface 2A ... insulating base, M 3 _... third main surface, M 4 _... fourth major surface 4A, 4B ... wire bonding electrode pad,
9A, 9B ... via layer,

Claims (9)

An adhesive layer comprising a first main surface and a second main surface opposite to the first main surface;
An insulating base layer formed of a low elastic modulus material provided on the adhesive layer and having a third main surface in contact with the second main surface and a fourth main surface opposite to the third main surface; Having a plurality of substrates having
A flexible multilayer wiring board in which the adhesive layer and the insulating base layer are alternately laminated,
A wire bonding electrode pad is provided on a part of the fourth main surface of the outermost base material, and a via layer having a higher elastic modulus than that of the adhesive layer is embedded in the adhesive layer of the outermost base material. A flexible multilayer wiring board characterized by that.   2. The flexible multilayer wiring board according to claim 1, wherein the via layer is buried immediately below the wire bonding electrode pad.   The through hole extending from the fourth main surface of the outermost base material to the first main surface of the outermost base material is provided, and a via layer is embedded in the through hole. Flexible multilayer wiring board.   The through hole extending from the second main surface of the outermost base material to the first main surface of the outermost base material is provided, and a via layer is embedded in the through hole. Flexible multilayer wiring board.   The flexible multilayer wiring board according to claim 1, wherein the via layer is a metal material or an inorganic material.   The flexible multilayer wiring board according to claim 1, wherein the insulating substrate is made of polyimide. An adhesive layer comprising a first main surface and a second main surface opposite to the first main surface;
An insulating base layer formed of a low elastic modulus material provided on the adhesive layer and having a third main surface in contact with the second main surface and a fourth main surface opposite to the third main surface; Having a plurality of substrates having
A flexible semiconductor device in which the adhesive layer and the insulating base layer are alternately laminated,
A wire bonding electrode pad is provided on a part of the fourth main surface of the outermost base material, and a via layer having a higher elastic modulus than the wire bonding electrode pad is embedded in the adhesive layer of the outermost base material,
A flexible semiconductor device, wherein a semiconductor element is disposed on a part of a fourth main surface of the outermost base material, and the semiconductor element and the wire bonding electrode pad are electrically connected by a wire.   An embedded semiconductor element is embedded in the flexible semiconductor device, a through hole extending from the fourth main surface of the outermost base material to the surface of the embedded semiconductor element is provided, a via layer is embedded in the through hole, and the wire 8. The flexible semiconductor device according to claim 7, wherein the bonding electrode pad and the embedded semiconductor element are electrically connected. Formed with a low modulus material having a third main surface and a fourth main surface opposite to the third main surface on an adhesive layer having a first main surface and a second main surface opposite to the first main surface. A step of producing a plurality of base materials by arranging the insulating base material layer,
A step of forming a via layer by forming a hole in a portion of the base material that is directly below where the wire bonding electrode pad is formed, and filling the hole with a material having a higher elastic modulus than the wire bonding electrode pad. When,
A step of producing a temporary substrate by laminating the plurality of base materials such that the adhesive layer and the insulating base material layer alternate;
And a step of providing the wire bonding electrode pad on a part of the fourth main surface of the outermost base material corresponding to the upper portion of the via layer.

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