JP2011238818A - Wafer processing method - Google Patents

Abstract

Provided is a wafer processing method in which chipping generated on the outer periphery of a device chip is reduced and the risk of damaging the wafer is reduced.
A groove forming step for cutting a wafer along a street to form a cutting groove having a depth corresponding to a finished thickness of the device chip, and after performing the groove forming step, at least a surface of the wafer is formed on the surface of the wafer. A protective tape attaching step for attaching a protective tape 24 composed of a base material and an adhesive layer, and wafer holding in which the protective tape side of the wafer is sucked and held by a chuck table 46 so that the back side of the wafer is exposed. Step, low temperature water is supplied from the cutting water supply nozzle 48 to cure the glue layer of the protective tape, and the wafer and the grinding wheel are slid while the grinding stone 42 is in contact with the back surface of the wafer. And grinding to divide the wafer into individual device chips by exposing the cutting grooves on the back surface.
[Selection] Figure 5

Description

  The present invention relates to a wafer processing method in which a wafer in which devices are respectively formed in a plurality of regions partitioned by a street formed in a lattice pattern on the surface is divided into individual device chips along the street.

  For example, in a semiconductor device manufacturing process, devices such as IC and LSI are formed in a plurality of regions partitioned by streets (division lines) formed in a lattice shape on the surface of a semiconductor wafer having a substantially disk shape, Each device chip is manufactured by dividing each region in which the device is formed along a division line.

  As a dividing device that divides a semiconductor wafer into individual device chips, a cutting device generally called a dicing device is used. This cutting device uses a cutting blade having a very thin cutting edge to cut a semiconductor wafer along a planned dividing line. And cut. The device chips divided in this way are packaged and widely used in electric devices such as mobile phones and personal computers.

  In recent years, electric devices such as mobile phones and personal computers are required to be lighter and smaller, and thinner device chips are required. As a technique of dividing a wafer into thinner device chips, a dividing technique called a so-called dicing method has been developed and put into practical use (for example, see Japanese Patent Application Laid-Open No. 11-40520).

  In this tip dicing method, a dividing groove having a predetermined depth (a depth corresponding to the finished thickness of the device chip) is formed along the line to be divided from the surface of the semiconductor wafer, and then the dividing groove is formed on the surface. This is a technique of grinding the back surface of a semiconductor wafer to expose divided grooves on the back surface to divide it into individual device chips, and the thickness of the device chip can be processed to 100 μm or less.

  In grinding, a protective tape in which an acrylic or rubber paste layer is laminated on a substrate such as polyolefin, polyethylene terephthalate, or vinyl chloride is attached to the surface of the wafer for the purpose of protecting the device.

JP 11-40520 A

  However, since the adhesive layer of the protective tape is generally soft, the device chip separated by backside grinding moves during grinding and collides with an adjacent device chip, so that the outer periphery of the device chip may be chipped. is there.

  In addition, for example, a wafer having a step between the device surface formed on the wafer surface and the street, or a wafer having a bumpy electrode formed on the surface, such as a wafer, has an uneven surface. The stress may concentrate on the wafer and the wafer may be damaged.

  The present invention has been made in view of these points, and an object of the present invention is to provide a wafer processing method that reduces chipping generated on the outer periphery of a device chip and reduces the risk of damaging the wafer. That is.

  According to the present invention, there is provided a wafer processing method for manufacturing individual device chips by dividing a wafer in which a device is formed in each region partitioned by a street formed in a lattice shape on a surface, and A groove forming step for cutting the wafer to form a cutting groove having a depth corresponding to the finished thickness of the device chip, and after performing the groove forming step, at least a base material and a glue layer on the surface of the wafer. A protective tape attaching step for attaching the protective tape, and a wafer holding step for sucking and holding the protective tape side of the wafer to which the protective tape is attached with a chuck table so that the back side of the wafer is exposed. Supplying low-temperature water to the wafer held by the chuck table to cure the adhesive layer of the protective tape, and grinding means on the back surface of the wafer. A grinding step for grinding and thinning the back surface of the wafer by sliding the wafer and the grinding means in contact with each other, and exposing the cutting groove to the back surface to divide the wafer into individual device chips; A method for processing a wafer is provided.

  For example, the wafer has irregularities on the surface, and the protective tape has an adhesive layer that is thicker than the level difference of the irregularities.

  According to the present invention, grinding is performed while supplying low-temperature water when grinding a wafer in which cutting grooves are formed, so that the processing heat generated in the grinding process is cooled by the low-temperature water and the adhesive layer of the protective tape is used. Is cured. Therefore, it is possible to suppress the movement of the device chip during grinding and to reduce the chip generated on the outer periphery of the device chip.

  In the processing method of the present invention, even with a wafer having irregularities on the surface, the irregularities can be absorbed by using a sufficiently thick protective tape, and the adhesive layer is cured while supplying low-temperature water during grinding. Improve the fixing force.

  Therefore, stress is prevented from concentrating on the concave portion due to grinding, and movement of the device chip during grinding is suppressed. Further, it is possible to prevent the glue layer from peeling off during grinding and intrusion of grinding water containing grinding debris.

It is a surface side perspective view of a semiconductor wafer. FIG. 2A is an explanatory diagram of the cutting groove forming step, and FIG. 2B is a cross-sectional view of the wafer on which the cutting grooves are formed. It is the surface side perspective view of the wafer in which the cutting groove was formed. FIG. 4A is a perspective view showing a state where a protective tape is attached to the surface of the wafer, and FIG. 4B is a perspective view of a state where the protective tape is attached to the surface of the wafer. FIG. 5A is a perspective view of the back grinding process, and FIG. 5B is a side view of the back grinding process. FIG. 6A is a cross-sectional view of a state where cutting grooves are exposed on the back surface of the wafer by grinding, and FIG. 6B is a perspective view of the wafer where cutting grooves are exposed on the back surface of the wafer.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1, there is shown a perspective view of a semiconductor wafer to be processed according to the present invention.

  A semiconductor wafer 2 shown in FIG. 1 is made of, for example, a silicon wafer having a thickness of 700 μm, and a plurality of division lines (streets) 4 are formed in a lattice shape on the surface 2a. On the surface 2 a of the semiconductor wafer 2, devices 6 such as IC and LSI are formed in a plurality of regions partitioned by a plurality of division lines 4 formed in a lattice shape.

  In the wafer processing method according to the embodiment of the present invention, first, a cutting groove forming step is performed as a first step. That is, a cutting groove having a predetermined depth (a depth corresponding to the finished thickness of each device chip) is formed along the planned division line 4 formed on the surface 2a of the wafer 2 by a so-called tip dicing method.

  This cutting groove forming step is performed using a cutting device 10 shown in FIG. The cutting apparatus 10 shown in FIG. 2A includes a chuck table 8 that includes suction holding means and is movable in the X-axis direction, a cutting unit 12, and moves integrally with the cutting unit 12 in the Y-axis direction and the Z-axis direction. A possible alignment unit 14 is included.

  The cutting unit 12 includes a spindle 16 that is rotationally driven by a motor (not shown), and a cutting blade 18 that is attached to the tip of the spindle 16. The alignment unit 14 includes an imaging unit 20 such as a CCD camera.

  In order to carry out the cutting groove forming process, the semiconductor wafer 2 is placed on the chuck table 8 with its surface 2a facing up. Then, the wafer 2 is held on the chuck table 8 by operating a suction means (not shown).

  In this way, the chuck table 8 that sucks and holds the wafer 2 is positioned directly below the imaging means 20 by a cutting feed mechanism (not shown). When the chuck table 8 is positioned immediately below the image pickup means 20, an alignment operation for detecting a cutting region in which a cutting groove is to be formed in the wafer 2 is performed by the image pickup means 20 and a control means (not shown).

  That is, the imaging unit 20 and a control unit (not shown) execute image processing such as pattern matching for aligning the division line 4 formed in a predetermined direction of the wafer 2 with the cutting blade 18, and cutting. Perform region alignment. Further, the alignment of the cutting area is performed in the same manner with respect to the division lines 4 extending in the direction perpendicular to the predetermined direction formed on the wafer 2.

  After such alignment, the chuck table 8 holding the wafer 2 is moved to the cutting start position in the cutting area. Then, the cutting blade 18 moves downward while rotating in the direction indicated by the arrow 21 in FIG.

  This cutting feed amount is set such that the outer peripheral edge of the cutting blade 18 is a depth position (for example, 100 μm) corresponding to the finished thickness of the device chip from the surface 2 a of the wafer 2.

  When the cutting blade 18 is cut and fed in this way, the chuck table 8 is cut and fed in the X-axis direction, that is, in the direction indicated by the arrow X1 in FIG. As shown in FIG. 2B, a cutting groove 22 having a depth (for example, 100 μm) corresponding to the finished thickness of the device chip is formed along the planned dividing line 4 (cutting groove forming step). This cutting groove forming step is performed along all the division lines 4 formed on the wafer 2. FIG. 3 shows a top perspective view of the wafer 2 obtained as a result.

  Prior to grinding of the semiconductor wafer 2, a protective tape 24 for grinding is attached to the surface 2a of the semiconductor wafer 2 (the surface on which the device 6 is formed). As the protective tape 24, for example, a polyolefin tape having a thickness of 150 μm is used. FIG. 4B shows a state where the protective tape 23 is attached to the surface 2a of the wafer 2. FIG.

  Next, a grinding process is performed in which the back surface 2b of the wafer 2 having the protective tape 24 attached to the front surface is ground, the cutting grooves 22 are exposed on the back surface 2b, and the wafer 2 is divided into individual device chips 6. As shown in FIG. 5A, this cutting process is performed by a grinding device 26 including a chuck table 46 and a grinding unit 28.

  The grinding unit 28 includes a spindle housing 36, a spindle 37 rotatably accommodated in the spindle housing 36, a motor 38 that rotationally drives the spindle 37, a wheel mount 39 fixed to the tip of the spindle 37, and the wheel. A grinding wheel 40 having a plurality of grinding wheels 42 at the lower end attached to the mount 39 in a detachable manner. A grinding water supply nozzle 48 supplies grinding water during grinding.

  In the grinding process of the present embodiment, the protective tape 24 side is sucked and held on the chuck table 46 with the back surface 2b of the wafer 2 facing up, and low temperature grinding water is supplied from the grinding water supply nozzle 48 to paste the protective tape 24. Harden the layer.

  Then, while rotating the chuck table 46 in the direction indicated by the arrow a at 300 rpm, for example, the grinding wheel 40 is rotated in the direction indicated by the arrow b at, for example, 6000 rpm, and the grinding wheel 42 is brought into contact with the back surface 2b of the wafer 2. The back surface 2b of the wafer 2 is ground. This grinding is performed until the cutting groove 22 appears on the back surface 2b of the wafer 2 as shown in FIG.

  Thus, by grinding until the cutting groove 22 is exposed on the back surface 2b, the wafer 2 is divided into individual device chips 6 as shown in FIG. 6B. In addition, since the protective tape 24 is affixed to the surface 2a of the plurality of divided device chips 6, the form of the wafer 2 is maintained without being separated.

  In the grinding process of this embodiment, grinding is performed while supplying low-temperature grinding water from the grinding water supply nozzle 48 when grinding the back surface 2b of the wafer 2 in which the cutting grooves 22 are formed. This low temperature grinding water is preferably 5 ° C. or less.

  The processing heat generated in the grinding process is cooled by the low-temperature grinding water, and the adhesive layer of the protective tape 24 is cured. Therefore, the movement of the device chip 6 during grinding of the back surface 2b of the wafer 2 is suppressed, and chips generated on the outer periphery of the device chip 6 can be reduced.

  In the embodiment shown in FIG. 5, the grinding water supply nozzle 48 is arranged outside the grinding unit 28, but the grinding water supply path is provided inside the spindle housing 36, and the low temperature is supplied from the inside of the grinding wheel 40. Grinding may be performed while supplying the grinding water, or the grinding water supplied from the grinding water supply nozzle 48 provided outside and the grinding water supplied from the inside of the grinding wheel 40 may be used in combination.

  The wafer processing method of the present embodiment is a method for processing individual wafers by processing a wafer having a step between a device surface formed on the wafer surface and a street, or a wafer having bump-shaped projections called bumps formed on the surface. Especially suitable for dividing into.

  In other words, even with a wafer with irregularities on the surface, it is possible to absorb irregularities by using a protective tape with a sufficiently thick glue layer, and to grind by curing the glue layer while supplying low-temperature grinding water during grinding. The fixing force of the wafer can be improved.

  Therefore, stress does not concentrate on the concave portion due to grinding, and movement of the device chip during grinding is suppressed. Furthermore, it can prevent that the glue layer peels off during grinding and the grinding water containing the grinding waste enters between the grinding wheel and the wafer.

2 Semiconductor wafer 4 Scheduled division line (street)
6 Device chip 8 Chuck table 10 Cutting device 12 Cutting unit 14 Alignment unit 18 Cutting blade 20 Imaging means 22 Cutting groove 24 Protective tape 26 Grinding device 28 Grinding unit 40 Grinding wheel 42 Grinding wheel 48 Grinding water supply nozzle

Claims (2)

A wafer processing method for manufacturing individual device chips by dividing a wafer in which a device is formed in each region divided by streets formed in a lattice shape on the surface,
A groove forming step of cutting the wafer along the street to form a cutting groove having a depth corresponding to the finished thickness of the device chip;
After performing the groove forming step, a protective tape attaching step of attaching a protective tape comprising at least a base material and a glue layer on the surface of the wafer;
A wafer holding step in which the protective tape side of the wafer to which the protective tape is attached is sucked and held by a chuck table to expose the back side of the wafer;
By supplying low temperature water to the wafer held by the chuck table to cure the adhesive layer of the protective tape, and sliding the wafer and the grinding means while contacting the grinding means to the back surface of the wafer Grinding and thinning the back surface of the wafer, and dividing the wafer into individual device chips by exposing the cutting grooves to the back surface;
A wafer processing method characterized by comprising:   The wafer processing method according to claim 1, wherein the wafer has irregularities on the surface, and the adhesive layer of the protective tape is thicker than the height difference of the irregularities.

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