JP2011023739A - Diode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique for reducing forward resistance by utilizing an inherent pn junction diode in a diode in which a p-type semiconductor region is provided on a part of the surface of an n-type semiconductor region.
An n-type semiconductor region, a p-type semiconductor region provided on a part of the surface of the n-type semiconductor region, a surface of the n-type semiconductor region, and a surface of the p-type semiconductor region are contacted. The anode electrode 2 (surface electrode) having a Schottky junction Jb at least on the surface of the n-type semiconductor region 22, the right side surface 30 b (first side surface) and the left side surface 30 a (second surface) in contact with the n-type semiconductor region 22. An insulating region 30 having a side surface. The right side surface 30 b faces the second n-type semiconductor region 22 b located below the Schottky junction Jb, and the left side surface 30 a is below the pn junction 13 between the n-type semiconductor region 22 and the p-type semiconductor region 14. Opposite the first n-type semiconductor region 22a located.
[Selection] Figure 1

Description

  The present invention relates to a diode having a Schottky junction.

  A diode having an n-type semiconductor region and a p-type semiconductor region in a surface layer portion of a semiconductor layer is known. The anode electrode of this diode is a Schottky junction with both the n-type semiconductor region and the p-type semiconductor region. This type of diode is called a JBS (Junction Barrier Schottky) type diode. An example of a JBS type diode is disclosed in Patent Document 1.

FIG. 19 shows a basic configuration of the JBS type diode 100. The diode 100 includes a cathode electrode 104, a semiconductor substrate 103, and an anode electrode 102. The semiconductor substrate 103 includes an n ⁺ type cathode region 110, an n type semiconductor region 112, and a plurality of p type semiconductor regions 114. The p-type semiconductor regions 114 are distributed and arranged on the surface of the n-type semiconductor region. The anode electrode 102 has a Schottky junction Jb with both the n-type semiconductor region 112 and the p-type semiconductor region 114.

When a voltage higher than that of the cathode electrode 104 is applied to the anode electrode 102 (a forward voltage is applied), a current flows from the anode electrode 102 to the cathode electrode 104 via the Schottky junction Jb, the n-type semiconductor region 112, and the cathode region 110. Flows.
When a higher voltage than the anode electrode 102 is applied to the cathode electrode 104 (a reverse voltage is applied), a depletion layer spreads from the junction surface of the pn junction 113 between the p-type semiconductor region 114 and the n-type semiconductor region 112. When a plurality of p-type semiconductor regions 114 are dispersed and arranged on the surface of the n-type semiconductor region 112, the depletion layer spreads widely and high breakdown voltage can be obtained. The JBS type diode 100 can have a higher breakdown voltage than a conventional Schottky diode in which the p-type semiconductor region 114 is not formed.

Japanese Patent Laid-Open No. 10-321879

FIG. 20 shows the relationship between the forward voltage V (V) applied between the anode and cathode of a general Schottky diode and the current density I (A / cm ² ) (referred to as voltage / current density characteristics). FIG. 21 shows voltage / current density characteristics of a general pn junction diode. The general Schottky diode in FIG. 20 is a type in which a p-type semiconductor region is not formed in the surface layer portion of the semiconductor substrate, and the n-type semiconductor region and the anode electrode are in Schottky junction over the entire surface of the semiconductor substrate. . The general pn junction diode of FIG. 21 is a type in which a p-type semiconductor region is formed over the entire surface layer portion of a semiconductor substrate, and the p-type semiconductor region and the anode electrode are pn-junction over the entire surface of the semiconductor substrate. .
As shown in FIGS. 20 and 21, the Schottky diode can pass a current even in a range where the forward voltage is low, and has a large forward resistance in a range where the forward voltage is high, as compared with a pn junction diode. On the other hand, in the pn junction diode, compared with the Schottky diode, no current flows in a range where the forward voltage is low, and the forward resistance is small in a range where the forward voltage is high.

  The JBS diode 100 of FIG. 19 includes a pn junction composed of a p-type semiconductor region 114 and an n-type semiconductor region 112. Therefore, the JBS type diode 100 has a configuration in which both the structure of the Schottky diode and the structure of the pn junction diode are combined on the surface layer portion of the semiconductor substrate 103. However, the voltage / current density characteristics of the JBS diode 100 are similar to the voltage / current density characteristics of the general Schottky diode shown in FIG. 20, as shown in FIG. That is, the JBS diode 100 has a pn junction composed of the p-type semiconductor region 114 and the n-type semiconductor region 112, but it is considered that the pn junction does not substantially function as a diode.

When the current path of the JBS type diode 100 of FIG. 19 was examined, it was found that the current path shown in FIG. In the JBS type diode 100, the Schottky junction is first conducted in a range where the forward voltage is low. The current flowing through the Schottky junction Jb 112 flows into the n-type semiconductor region below the p-type semiconductor region 114. For this reason, the potential of the n-type semiconductor region 112 located below the p-type semiconductor region 114 rises. When the potential of the n-type semiconductor region 112 rises, no potential difference exceeding the forward voltage drop occurs in the pn junction 113. As a result, in the conventional JBS type diode 100, even if the forward voltage rises to a high range, the pn junction 113 does not conduct. That is, in the conventional JBS type diode 100, the current flowing through the Schottky junction Jb 112 flows into the n-type semiconductor region below the p-type semiconductor region 114, so that the pn arranged in parallel with the Schottky junction Jb. The junction could not function substantially as a diode. If the structure of the pn junction diode composed of the p-type semiconductor region 114 and the n-type semiconductor region 112 can be utilized, the forward resistance can be lowered in a high forward voltage range, but the current JBS diode 100 has the advantage. Not enjoyed.
An object of the present invention is to provide a technique for reducing a forward resistance by utilizing an inherent pn junction diode in a diode in which a p-type semiconductor region is provided on a part of the surface of an n-type semiconductor region. .

  The present invention is characterized in that an insulating region is provided in the n-type semiconductor region in order to suppress a current flowing through the Schottky junction from flowing into the n-type semiconductor region located below the p-type semiconductor region. It is said. The insulating region is disposed between the n-type semiconductor region located below the p-type semiconductor region and the Schottky junction. As a result, the event that current flowing through the Schottky junction flows into the n-type semiconductor region located below the p-type semiconductor region is suppressed, and the forward direction is directed to the pn junction composed of the p-type semiconductor region and the n-type semiconductor region. A potential difference exceeding the voltage drop can be generated. For this reason, the pn junction conducts in a range where the forward voltage is high, and a low forward resistance can be realized.

  That is, the diode of the present invention includes an n-type semiconductor region, a p-type semiconductor region, a surface electrode, and an insulating region. The p-type semiconductor region is provided on a part of the surface of the n-type semiconductor region. The surface electrode is in contact with the surface of the n-type semiconductor region and the surface of the p-type semiconductor region. The surface electrode is Schottky bonded at least to the surface of the n-type semiconductor region. The surface electrode may be Schottky bonded or ohmic bonded to the surface of the p-type semiconductor region. The insulating region has a first side surface and a second side surface in contact with the n-type semiconductor region. The first side surface of the insulating region faces the n-type semiconductor region positioned below the Schottky junction between the surface of the n-type semiconductor region and the surface electrode. The second side surface of the insulating region faces the n-type semiconductor region positioned below the pn junction between the n-type semiconductor region and the p-type semiconductor region.

  Here, the Schottky junction refers to a junction in which a Schottky barrier exists between the semiconductor and the surface electrode. In the Schottky junction, there is a difference between the barrier height of the semiconductor and the barrier height of the surface electrode.

  In the above diode, when a forward voltage is applied to the diode, the current flowing through the Schottky junction is blocked by the insulating region and flows into the n-type semiconductor region located below the p-type semiconductor region Is suppressed, and a potential difference exceeding a forward voltage drop can be generated in a pn junction composed of a p-type semiconductor region and an n-type semiconductor region. The structure of the pn junction diode can be made conductive and utilized. Thereby, the forward resistance of the diode can be reduced.

The insulating region is preferably disposed along a boundary portion between a range where the Schottky junction exists and a range where the pn junction exists when viewed in a plan view.
Here, the boundary portion is not limited to the boundary surface, and includes a region near the boundary surface.
According to the configuration described above, the insulating region is arranged along the periphery of the p-type semiconductor region. For this reason, the phenomenon that the current flowing through the Schottky junction flows in the entire n-type semiconductor region located below the p-type semiconductor region is suppressed. Most of the pn junction composed of the p-type semiconductor region and the n-type semiconductor region can be used as a pn junction diode. The forward resistance in the high forward voltage range is significantly reduced.

The n-type semiconductor region and the p-type semiconductor region may be provided in the semiconductor substrate. In this case, the n-type semiconductor region and the p-type semiconductor region are preferably repeated along at least one direction in the surface layer portion of the semiconductor substrate. Moreover, it is preferable that the surface electrode is provided on the semiconductor substrate.
In the configuration described above, a plurality of p-type semiconductor regions are dispersedly arranged in the surface layer portion of the semiconductor substrate. When a reverse voltage is applied, a depletion layer can be extended from a plurality of pn junctions. The breakdown voltage of the diode can be further improved.

It is preferable that the insulating region described above extends from the surface of the semiconductor substrate to a position deeper than the p-type semiconductor region.
The insulating region of the above form is obtained by forming a trench by etching from the surface of the semiconductor substrate and filling the trench with an insulator. The insulating region of the above form has a feature that it is easy to manufacture.

The insulating region described above preferably penetrates the p-type semiconductor region.
According to the above configuration, the p-type semiconductor region is divided by the insulating region. A part of the divided p-type semiconductor region is formed on a part of the surface of the n-type semiconductor region located below the Schottky junction. When a reverse voltage is applied, the depletion layer can be expanded from these pn junctions. A depletion layer easily spreads in the vicinity of the Schottky junction surface, and a breakdown voltage can be secured.

  The diode described above preferably further includes an n-type high concentration semiconductor region and a back electrode. The n-type high concentration semiconductor region is provided in contact with the back surface of the n-type semiconductor region. The n-type high concentration semiconductor region has a higher impurity concentration than the n-type semiconductor region. The back electrode is electrically connected to the back surface of the n-type high concentration semiconductor region. The insulating region preferably extends from the surface of the semiconductor substrate until it reaches the n-type high concentration semiconductor region.

The surface electrode preferably has a first surface electrode and a second surface electrode. The first surface electrode is Schottky joined to part of the surface of the n-type semiconductor region. The second surface electrode is in ohmic contact with the p-type semiconductor region.
Here, the ohmic junction substantially means a junction having no Schottky barrier. In the ohmic junction, there is substantially no difference between the barrier height of the semiconductor and the barrier height of the metal. When a forward external voltage is applied to the ohmic junction, a current proportional to the external voltage flows according to Ohm's law.
According to the configuration described above, a substantial potential difference does not occur between the second surface electrode and the p-type semiconductor region. Therefore, the potential difference of the pn junction composed of the p-type semiconductor region and the n-type semiconductor region can be further increased. Even in a range where the forward voltage is relatively low, a pn junction composed of a p-type semiconductor region and an n-type semiconductor region can function as a diode.

  According to the diode of the present invention, in the diode in which the p-type semiconductor region is provided on a part of the surface of the n-type semiconductor region, the forward resistance can be reduced by utilizing the inherent pn junction diode.

It is principal part sectional drawing of the diode 1 of 1st Example. It is a figure when the semiconductor substrate 3 of the diode 1 is planarly viewed. The voltage / current density characteristics of the diode 1 are shown. In the diode 1, a path of a current flowing through the Schottky junction Jb is shown. The manufacturing method of the diode 1 is shown. The manufacturing method of the diode 1 is shown. The manufacturing method of the diode 1 is shown. The manufacturing method of the diode 1 is shown. It is a figure which shows another aspect when the semiconductor substrate 3 is planarly viewed. It is principal part sectional drawing of the diode 1a which is a modification of 1st Example. It is principal part sectional drawing of the diode 1b which is a modification of 1st Example. It is principal part sectional drawing of the diode 1c which is a modification of 1st Example. It is principal part sectional drawing of the diode 1d of 2nd Example. It is principal part sectional drawing of the diode 1e which is a modification of 2nd Example. It is principal part sectional drawing of the diode 1f which is a modification of 2nd Example. It is principal part sectional drawing of the diode 1g of 3rd Example. It is principal part sectional drawing of the diode 1h which is a modification of 3rd Example. It is principal part sectional drawing of the diode 1j which is a modification of 3rd Example. It is principal part sectional drawing of the diode 100 of a prior art. The voltage / current density characteristics of a general Schottky diode are shown. The voltage / current density characteristics of a typical pn junction diode are shown. The voltage and current density characteristics of the diode 100 are shown. In the diode 100, a path of a current flowing through the Schottky junction Jb is shown.

The features of the embodiment described below will be summarized.
(First Feature) The diode includes a plurality of p-type semiconductor regions provided on the surface of the semiconductor substrate. Adjacent p-type semiconductor regions are arranged at intervals on the surface of the semiconductor substrate. (Fig. 13)
(Second feature) The p-type semiconductor region is formed by epitaxial growth from the surface of the n-type semiconductor region. Formation of defects due to ion implantation of p-type impurities can be prevented. There is no need to perform a high-temperature heat treatment process to activate the p-type semiconductor region. Surface roughness due to sublimation of the semiconductor material from the surface of the n-type semiconductor region can be prevented. Leakage current during reverse voltage application can be reduced. (Fig. 13)
(Third feature) The semiconductor material of the n-type semiconductor region and the p-type semiconductor region is silicon carbide.

(First embodiment)
FIG. 1 shows a cross-sectional view of the main part of a diode 1 in which the structure of a Schottky diode and the structure of a pn junction diode are mixed. FIG. 2 is a sectional view taken along line II-II in FIG. FIG. 2 is a plan view of the semiconductor substrate 3 on which the diode 1 is formed.
As shown in FIG. 1, the diode 1 is formed using a SiC semiconductor substrate 3. An n ⁺ type cathode region 10 (an example of an n-type high concentration semiconductor region) and an n-type semiconductor region 22 are sequentially stacked on the semiconductor substrate 3. The diode 1 includes p-type semiconductor regions 14 arranged in a distributed manner on the surface of the n-type semiconductor region 22. As shown in FIG. 2, a plurality of p-type semiconductor regions 14 are formed in stripes with the longitudinal direction aligned. Therefore, the n-type semiconductor region 22 and the p-type semiconductor region 14 are repeated along the lateral direction shown in FIG. 2 in the surface layer portion of the semiconductor substrate 3.

  As shown in FIG. 1, the diode 1 includes an anode electrode 2 in contact with the surface of an n-type semiconductor region 22 and the surface of a p-type semiconductor region. The anode electrode 2 includes a Schottky electrode 2b (an example of a first surface electrode) having a Schottky junction Jb on the surface of the n-type semiconductor region 22, and an ohmic electrode having an ohmic junction Ja on the surface of the p-type semiconductor region 14. 2a (an example of the second surface electrode). The Schottky electrode 2b is made of molybdenum. The ohmic electrode 2a is formed of titanium, aluminum, nickel, or a laminate of two or more selected from them. The diode 1 also includes a cathode electrode 4 that is in ohmic contact with the back surface of the cathode region 10 (the back surface 3b of the semiconductor substrate 3).

  The diode 1 has a pn junction diode structure (referred to as a pn junction diode region J1) and a Schottky diode structure (referred to as a Schottky diode region J2). In the pn junction diode region J1, the cathode electrode 4, the cathode region 10, the n-type semiconductor region 22, the p-type semiconductor region 14, and the ohmic electrode 2a are sequentially stacked. In the Schottky diode region J2, the cathode electrode 4, the cathode region 10, the n-type semiconductor region 22, and the Schottky electrode 2b are sequentially stacked.

The diode 1 of this embodiment includes an insulating region 30 provided along a boundary portion between a range where the Schottky junction Jb exists and a range where the pn junction 13 exists. As shown in FIG. 1, the insulating region 30 extends from the surface 3 a of the semiconductor substrate 3 until it reaches the cathode region 10. By the insulating region 30, the n-type semiconductor region 22 is divided into a first n-type semiconductor region 22a and a second n-type semiconductor region 22b. The first n-type semiconductor region 22a is located below the p-type semiconductor region 14 in the pn junction diode region J1, and is in contact with the left side surface 30a of the insulating region 30. The first n-type semiconductor region 22 a is in pn junction 13 with the p-type semiconductor region 14. The second n-type semiconductor region 22b is located below the Schottky junction Jb in the Schottky diode region J2, and is in contact with the right side surface 30b of the insulating region 30. FIG.
As shown in FIG. 2, the insulating region 30 surrounds the p-type semiconductor region 14 when viewed in plan. Therefore, the Schottky diode region J2 of the diode 1 extends outside the insulating region 30 when viewed in plan. The pn junction diode region J1 of the diode 1 extends inside the insulating region 30.

  In the diode 1, when a reverse voltage is applied between the anode and the cathode, a depletion layer spreads from the pn junction 13. When a reverse voltage is applied, a depletion layer also spreads in the second n-type semiconductor region 22b in a range facing the p-type semiconductor region 14 with the insulating region 30 interposed therebetween. The diode 1 has a higher breakdown voltage than a Schottky diode in which the p-type semiconductor region 14 is not disposed on the surface of the n-type semiconductor region 22.

When a forward voltage is applied between the anode and cathode of the diode 1, a current flows from the anode electrode 102 to the cathode electrode 104.
FIG. 3 shows the relationship between the forward voltage V (V) applied between the anode and cathode of the diode 1 and the current density I (A / cm ² ) of the current flowing between the anode and cathode (referred to as voltage / current density characteristics). .) FIG. 3 shows voltage / current density characteristics when the temperature of the diode 1 is 50 ° C., when the temperature is 100 ° C., when the temperature is 150 ° C., and when the temperature is 200 ° C. The diode 1 has a gentle slope in each graph in a range where the forward voltage V (V) is as low as about 2.5 (V) at any temperature. The diode 1 has a steep slope in each graph in a range where the forward voltage V (V) is high at any temperature.

The Schottky diode region J2 having the Schottky diode structure conducts at a lower forward voltage V (V) than the pn junction diode region J1. In a range where the forward voltage V (V) is low, the Schottky diode region J2 is conductive, but the pn junction diode region J1 is not conductive. For this reason, the gradient of the graph is gentle in the range where the forward voltage V (V) is low. In a range where the forward voltage V (V) is high, in addition to the Schottky diode region J2, the pn junction diode region J1 having a pn junction diode structure is conductive. For this reason, in the range where the forward voltage V (V) is high, the gradient of the graph becomes steep, and the current density I (A / cm ² ) increases.

FIG. 4 shows a state where only the Schottky diode region J2 is conducting when the forward voltage is applied. The current flows from the Schottky electrode 2 b to the cathode electrode 4 through the Schottky junction Jb, the second n-type semiconductor region 22 b, and the cathode region 10. Since the diode 1 includes the insulating region 30, the current flowing through the Schottky junction Jb does not flow into the first n-type semiconductor region 22 a below the p-type semiconductor region 14. Since the current flowing through the Schottky junction Jb does not flow into the first n-type semiconductor region 22a, the potential of the first n-type semiconductor region 22a is unlikely to rise. It is easy to apply a sufficient voltage exceeding the forward voltage drop to the pn junction 13. As shown in FIG. 3, when the forward voltage is about 3 (V), the pn junction 13 becomes conductive, and a current flows through the pn junction diode region J1. The current flows from the ohmic electrode 2 a to the cathode electrode 4 through the ohmic junction Ja, the p-type semiconductor region 14, the first n-type semiconductor region 22 a, and the cathode region 10. According to the diode 1, the current density I (A / cm ² ) can be increased in a range where the forward voltage V (V) is high, and the forward resistance can be reduced.

  According to the diode 1 of this embodiment, a current can flow even when the forward voltage V (V) is low due to the Schottky diode region J2, and the forward voltage V (V can be obtained by utilizing the pn junction diode region J1. ) Can be reduced in a high range.

Furthermore, as shown in FIG. 20, the current density of a general Schottky diode is highly dependent on temperature, particularly in the range where the forward voltage V (V) is high. In the range where the forward voltage temperature V (V) is high, the variation in the forward resistance based on the temperature becomes large. That is, the Schottky diode is easily affected by temperature. On the other hand, as shown in FIG. 21, a general pn junction diode is hardly affected by temperature even if the forward voltage V (V) is in a high range.
According to the diode 1 of the present embodiment, the pn junction diode region J1 having the structure of the pn junction diode conducts in the range where the forward voltage V (V) is high. As a result, the diode 1 is hardly affected by temperature in a range where the forward voltage V (V) is high.

  Further, the insulating region 30 of the diode 1 is disposed along a boundary 14c between a range where the Schottky junction Jb exists and a range where the pn junction 13 exists when viewed in plan. In the entire first n-type semiconductor region 22a located below the p-type semiconductor region 14, the phenomenon that the current flowing through the Schottky junction Jb flows is suppressed. Most of the pn junction 13 composed of the p-type semiconductor region 14 and the first n-type semiconductor region 22a can be used as a pn junction diode. The forward resistance in the range where the forward voltage is high is significantly reduced.

  In the diode 1, a plurality of p-type semiconductor regions 14 are distributed in the semiconductor substrate 3. When a reverse voltage is applied, the depletion layer can be extended from the plurality of pn junctions 13. The breakdown voltage of the diode 1 can be further improved.

  Further, the insulating region 30 of the diode 1 extends until it reaches the cathode region 10. In the diode 1, the insulating region 30 separates the second n-type semiconductor region 22 b located below the Schottky junction Jb and the first n-type semiconductor region 22 a located below the p-type semiconductor region 14. The current flowing through the Schottky junction Jb does not flow into the first n-type semiconductor region 22a. The electric current flowing through the Schottky junction Jb does not increase the potential of the first n-type semiconductor region 22a. A sufficient voltage exceeding the forward voltage drop can be applied to the pn junction 13 composed of the p-type semiconductor region 14 and the first n-type semiconductor region 22a.

  The diode 1 of this embodiment includes a Schottky electrode 2 b that is in contact with the surface of the n-type semiconductor region 22. The diode 1 also includes an ohmic electrode 2 a that is in contact with the surface of the p-type semiconductor region 14. There is almost no potential difference between the p-type semiconductor region 14 and the ohmic electrode 2a. Therefore, the potential difference of the pn junction 13 composed of the p-type semiconductor region 14 and the first n-type semiconductor region 22a can be increased. Even in a range where the forward voltage V (V) is relatively low, the pn junction 13 can function as a pn junction diode.

Next, with reference to FIGS. 5 to 8, a characteristic process in the method for manufacturing the diode 1 will be described.
First, an n ⁺ type SiC substrate to be the cathode region 10 is prepared. The concentration of the n-type impurity in the cathode region 10 is 1 × 10 ¹⁸ / cm ³ . The thickness of the cathode region 10 is 350 μm. Next, as shown in FIG. 5, an n-type semiconductor region 22 having a thickness of 15 μm is grown on the surface of the n ⁺ -type cathode region 10. Crystal growth is performed at a temperature of 1500 ° C. SiH ₄ , C ₃ H ₈ , N ₂ , H ₂ or the like is used as a material for crystal growth. Thereby, an n-type semiconductor region 22 having an n-type impurity concentration of 5 × 10 ¹⁵ / cm ³ is formed. In this specification, the cathode region 10 and the n-type semiconductor region 22 are collectively referred to as a semiconductor substrate 3.

Next, as shown in FIG. 6, a mask M having an opening on the surface 3 a of the semiconductor substrate 3 is formed. A p-type impurity having a low diffusion coefficient such as Al is ion-implanted into the n-type semiconductor region 22 from the opening of the mask M. In order to activate the implanted p-type impurity, heat treatment is performed at 1600 ° C., for example. As a result, the concentration of the p-type impurity is 1 × 10 ²⁰ / cm ³ in the opening of the mask M, and the surface 3a has a width of 2.0 μm (the length in the horizontal direction shown in FIG. 2) and 5.0 μm. And a p-type semiconductor region 14 extending from the surface 3a to a depth of 0.3 to 1.0 [mu] m. Next, the mask M is removed.

  Next, as shown in FIG. 7, a trench T is formed at a boundary 14c between the range where the Schottky junction Jb exists and the range where the pn junction 13 exists. The trench T is performed by dry etching (ICP or the like), for example. The trench T is formed until reaching the cathode region 10 from the surface 3a. Next, an insulating film such as an oxide film or a nitride film is formed in the trench T by the CVD method. For example, an oxide film is formed in the trench T by plasma CVD. Thereby, the insulating region 30 is formed. The insulating region 30 divides the n-type semiconductor region 22 into a first n-type semiconductor region 22a and a second n-type semiconductor region 22b.

  Next, a Ni layer is laminated on the surface 3a by electron beam evaporation. As shown in FIG. 8, the stacked body is patterned so that the stacked body remains only on the surface of the p-type semiconductor region 14. An ohmic electrode 2a that forms an ohmic junction Ja with the p-type semiconductor region 14 is formed by a laminate on the surface of the p-type semiconductor region 14.

Next, molybdenum is deposited by electron beam evaporation over the entire surface exposed to the surface side at the time shown in FIG. 8 to form the Schottky electrode 2b as shown in FIG. A Schottky electrode 2b that forms a Schottky junction Jb with the second n-type semiconductor region 22b is formed, and the Schottky electrode 2b and the ohmic electrode 2a are connected. The anode electrode 2 is formed by the ohmic electrode 2a and the Schottky electrode 2b. The surface of the anode electrode 2 is flattened.
Next, a Ni layer is deposited on the back surface 3 b of the semiconductor substrate 3. Heat treatment is performed to form the cathode electrode 4.

  The insulating region 30 of the diode 1 of this embodiment extends from the surface 3 a of the semiconductor substrate 3 in the depth direction. As shown in FIG. 7, the insulating region 30 is obtained by forming a trench T by etching from the surface 3 a of the semiconductor substrate 3 and filling the trench T with an insulator. Therefore, according to the diode 1 of the present embodiment, the insulating region 30 can be easily formed.

  In the present embodiment, as shown in FIG. 2, the case where a plurality of p-type semiconductor regions 14 are formed in a stripe shape with the longitudinal direction aligned when viewed in plan has been described. As shown in FIG. 9, the p-type semiconductor region 14 may be formed in a plurality of island shapes in plan view. Also in this case, the insulating region 30 is preferably formed so as to surround the p-type semiconductor region 14.

  Further, in this embodiment, as shown in FIG. 1, in this embodiment, when the insulating region 30 is viewed in plan, the boundary 14c between the range in which the Schottky junction Jb exists and the range in which the pn junction 13 exists exists. Explained the case of contact. However, the configuration of the insulating region is not limited to this embodiment. For example, an insulating region 31 extending from the bottom surface of the p-type semiconductor region 14 to the cathode region 10 may be formed as in the diode 1a shown in FIG. The right side surface 31b (an example of the first side surface) of the insulating region 31 faces the n-type semiconductor region 22 located below the Schottky junction Jb. The left side surface 31 a (an example of the second side surface) of the insulating region 31 faces the n-type semiconductor region 22 located below the pn junction 13. The insulating region 31 can also suppress the current flowing through the Schottky junction Jb from flowing into the n-type semiconductor region 22 located below the p-type semiconductor region 14 when a forward voltage is applied. The insulating region 31 is preferably formed near the periphery of the p-type semiconductor region 14 (close to the boundary between the range where the Schottky junction Jb exists and the range where the pn junction 13 exists) when viewed in plan.

  Further, an insulating region 32 extending into the n-type semiconductor region 22 located below the p-type semiconductor region 14 may be formed as in the diode 1b shown in FIG. The insulating region 32 is not in contact with the bottom surface of the p-type semiconductor region 14. The insulating region 32 does not extend until the cathode region 10 is reached. The right side surface 32b (an example of the first side surface) of the insulating region 32 faces the n-type semiconductor region 22 located below the Schottky junction Jb. The left side surface 32 a (an example of the second side surface) of the insulating region 31 faces the n-type semiconductor region 22 located below the pn junction 13. The insulating region 31 can also suppress the current flowing through the Schottky junction Jb from flowing into the n-type semiconductor region 22 located below the p-type semiconductor region 14 when a forward voltage is applied. Note that the insulating region 32 may be in contact with the bottom surface of the p-type semiconductor region 14. Alternatively, the insulating region 32 may extend until it reaches the cathode region 10. The insulating region 32 is preferably formed near the periphery of the p-type semiconductor region 14 when viewed in plan.

  Further, as in the diode 1c shown in FIG. 12, an insulating region 33 extending into the n-type semiconductor region 22 located below the Schottky junction Jb may be formed. The insulating region 33 is not in contact with the Schottky junction Jb. Further, the insulating region 33 does not extend until the cathode region 10 is reached. The insulating region 33 is separated from the side surface 14 c of the p-type semiconductor region 14. The right side surface 33b (an example of the first side surface) of the insulating region 33 faces the n-type semiconductor region 22 located below the Schottky junction Jb. The left side surface 33 a (an example of the second side surface) of the insulating region 33 faces the n-type semiconductor region 22 located below the pn junction 13. The insulating region 33 can also suppress the current flowing through the Schottky junction Jb from flowing into the n-type semiconductor region 22 located below the p-type semiconductor region 14 when a forward voltage is applied. The insulating region 33 may be in contact with the Schottky junction Jb. Further, the insulating region 33 may extend until reaching the cathode region 10. The insulating region 33 is preferably formed near the periphery of the p-type semiconductor region 14 when viewed in plan.

(Second embodiment)
FIG. 13 shows a cross-sectional view of the main part of a diode 1d in which the structure of a Schottky diode and the structure of a pn junction diode are mixed. A feature of the diode 1 d of the present embodiment is that the p-type semiconductor region 14 a is disposed on the surface 3 a of the semiconductor substrate 3. In FIG. 13, the same components as those of the diode 1 shown in FIG. 1 are denoted by the same reference numerals and description thereof is omitted.

  The diode 1 d includes a plurality of p-type semiconductor regions 14 a formed on the surface of the n-type semiconductor region 22. A surface 3 a of the semiconductor substrate 3 in a range where the p-type semiconductor region 14 a is disposed is a pn junction 13. On the upper surface of each p-type semiconductor region 14a, an ohmic electrode 2a that is in ohmic contact with the p-type semiconductor region 14a is formed. A Schottky electrode 2b is formed which is in Schottky junction Jb with the n-type semiconductor region 22 in a range where the p-type semiconductor region 14a is not disposed. An anode electrode 2 is formed by the ohmic electrode 2a and the Schottky electrode 2b. The surface of the anode electrode 2 is flattened.

  In the pn junction diode region J1 of the diode 1d, the cathode electrode 4, the cathode region 10, the n-type semiconductor region 22, the p-type semiconductor region 14a, and the ohmic electrode 2a are sequentially stacked. In the Schottky diode region J2, the cathode electrode 4, the cathode region 10, the n-type semiconductor region 22, and the Schottky electrode 2b are sequentially stacked.

  The diode 1d of the present embodiment includes an insulating region 34 provided at the boundary between a range where the Schottky junction Jb exists and a range where the pn junction 13 exists when viewed in plan. The insulating region 34 extends from the surface 3 a of the semiconductor substrate 3 until it reaches the cathode region 10. The insulating region 34 divides the n-type semiconductor region 22 into a first n-type semiconductor region 22a and a second n-type semiconductor region 22b. The first n-type semiconductor region 22a is located below the p-type semiconductor region 14 in the pn junction diode region J1, and is in contact with the left side surface 34a (an example of the second side surface) of the insulating region 34. The first n-type semiconductor region 22a is in pn junction 13 with the p-type semiconductor region 14a. The second n-type semiconductor region 22b is located below the Schottky junction Jb in the Schottky diode region J2, and is in contact with the right side surface 34b (an example of the first side surface) of the insulating region 34. The insulating region 34 surrounds the first n-type semiconductor region 22a when viewed in plan. Therefore, the Schottky diode region J2 extends outside the insulating region 34 when viewed in plan. A pn junction diode region J1 extends inside the insulating region.

  According to the diode 1d, when a forward voltage is applied, the current flowing through the Schottky junction Jb does not flow into the first n-type semiconductor region 22a located below the p-type semiconductor region 14a. A voltage exceeding the forward voltage drop of the pn junction 13 is easily applied.

  In this embodiment, the case where the insulating region 34 extends from the surface 3a of the semiconductor substrate 3 to the cathode region 10 has been described. However, the configuration of the insulating region is not limited to this embodiment. For example, like the diode 1e shown in FIG. 14, an insulating region 35 extending into the n-type semiconductor region 22 located below the p-type semiconductor region 14a may be formed. The insulating region 35 is not in contact with the bottom surface of the p-type semiconductor region 14a. The insulating region 35 does not extend until it reaches the cathode region 10. The right side surface 35b (an example of the first side surface) of the insulating region 35 faces the n-type semiconductor region 22 located below the Schottky junction Jb. The left side surface 35 a (an example of the second side surface) of the insulating region 35 faces the n-type semiconductor region 22 located below the pn junction 13. The insulating region 35 can also prevent the current flowing through the Schottky junction Jb from flowing into the n-type semiconductor region 22 located below the p-type semiconductor region 14a when a forward voltage is applied. Note that the insulating region 35 may be in contact with the bottom surface of the p-type semiconductor region 14a. Alternatively, the insulating region 35 may extend until it reaches the cathode region 10. The insulating region 35 is preferably formed near the periphery of the p-type semiconductor region 14a when viewed in plan.

  Further, as in the diode 1 f shown in FIG. 15, an insulating region 36 extending into the n-type semiconductor region 22 located below the Schottky junction Jb may be formed. The insulating region 36 is not in contact with the Schottky junction Jb. Further, the insulating region 36 does not extend until reaching the cathode region 10. The insulating region 36 is separated from the lower side of the formation region of the p-type semiconductor region 14a. A right side surface 36b (an example of a first side surface) of the insulating region 36 faces the n-type semiconductor region 22 located below the Schottky junction Jb. The left side surface 36 a (an example of the second side surface) of the insulating region 36 faces the n-type semiconductor region 22 located below the pn junction 13. The insulating region 36 can also prevent the current flowing through the Schottky junction Jb from flowing into the n-type semiconductor region 22 located below the p-type semiconductor region 14a when a forward voltage is applied. Note that the insulating region 36 may be in contact with the Schottky junction Jb. Further, the insulating region 36 may extend until reaching the cathode region 10. The insulating region 36 is preferably formed near the lower portion of the p-type semiconductor region 14a when viewed in plan.

(Third embodiment)
FIG. 16 is a cross-sectional view of a main part of a J diode 1g in which the structure of a Schottky diode and the structure of a pn junction diode are mixed. A feature of the diode 1g of the present embodiment is that the insulating region 37 penetrates the p-type semiconductor region 14. In FIG. 16, components equivalent to those of the diode 1 shown in FIG. 1 are denoted by the same reference numerals and description thereof is omitted.

  The diode 1g of the present embodiment includes an insulating region 37 that penetrates the p-type semiconductor region 14. The insulating region 37 is formed near the periphery of the p-type semiconductor region 14. The insulating region 37 extends from the surface 3 a of the semiconductor substrate 3 until it reaches the cathode region 10. The insulating region 37 divides the n-type semiconductor region 22 into a first n-type semiconductor region 22a and a second n-type semiconductor region 22b. The first n-type semiconductor region 22a is located below the p-type semiconductor region 14 in the pn junction diode region J1, and is in contact with the left side surface 37a (an example of the second side surface) of the insulating region 37. The first n-type semiconductor region 22 a is in pn junction 13 with the p-type semiconductor region 14. The second n-type semiconductor region 22b is located below the Schottky junction Jb in the Schottky diode region J2, and is in contact with the right side surface 37b (an example of the first side surface) of the insulating region 37. The p-type semiconductor region 14 is divided by the insulating region 37 into a first p-type semiconductor region 14a in the range included in the pn junction diode region J1 and a second p-type semiconductor region 14b in the range included in the Schottky diode region J2. Has been. In the diode 1g, the ohmic electrode 2a extends across the surface of the first p-type semiconductor region 14a, the surface of the insulating region 37, and the surface of the second p-type semiconductor region 14b.

  In the diode 1g of this embodiment, the second n-type semiconductor region 22b and the second p-type semiconductor region 14b located below the Schottky junction Jb are in contact with each other. The depletion layer can be expanded from the pn junction surface 15 of the second n-type semiconductor region 22b and the second p-type semiconductor region 14b. A depletion layer easily spreads in the vicinity of the Schottky junction Jb, and a high breakdown voltage can be secured.

  In the insulating region 37 of the diode 1g, for example, after forming a p-type diffusion layer on the surface of the n-type semiconductor region 22, a groove penetrating the p-type diffusion layer is formed from the surface 3a, and the groove is filled with an insulating film. Can be easily formed.

  As in the diode 1h shown in FIG. 17, the insulating region 37 and the p-type diffusion region 16 may be separated from each other. When a reverse voltage is applied, the depletion layer can be expanded from the pn junction between the p-type diffusion region 16 and the second n-type semiconductor region 22b. When a reverse voltage is applied, the depletion layer tends to spread near the Schottky junction Jb. However, according to this configuration, the area of the Schottky junction Jb tends to decrease when the p-type diffusion region 16 is formed. Therefore, the p-type diffusion region, which is pn-junction with the second n-type semiconductor region 22b located below the Schottky junction Jb, is more in contact with the insulating region 37 like the second p-type semiconductor region 14b shown in FIG. preferable. However, when a sufficient area of the Schottky junction Jb can be secured, the configuration shown in FIG. 17 may be used. The same applies to the case where the p-type semiconductor region 14a is disposed on the surface 3a of the semiconductor substrate 3 as in the diode 1j shown in FIG.

  In the present embodiment, as shown in FIG. 16, the ohmic electrode 2a has been described as extending over the surface of the first p-type semiconductor region 14a, the surface of the insulating region 37, and the surface of the second p-type semiconductor region 14b. . However, the ohmic electrode 2a may not be in contact with the surface of the insulating region 37 and the surface of the second p-type semiconductor region 14b. Even if the second p-type semiconductor region 14b is in contact with the Schottky electrode 2b, the depletion layer can be expanded from the pn junction of the second n-type semiconductor region 22b and the second p-type semiconductor region 14b.

In the first to third embodiments, the case where the semiconductor substrate 3 is SiC has been described. However, the semiconductor substrate 3 may be formed of other materials such as Si.
In the first to third embodiments, an ohmic electrode 2a having an ohmic junction Ja in the p-type semiconductor region 14 and a Schottky electrode 2b having a Schottky junction Jb in the n-type semiconductor region 22 are formed. However, the present invention allows a configuration in which the anode electrode 2 does not include the ohmic electrode 2a. If at least the insulating region described in the first to third embodiments is provided, the pn junction diode region J1 can be utilized.

Further, the insulating region 30 may be formed until reaching the back surface 3 b of the semiconductor substrate 3.
In the first to third embodiments, the case where the surface of the thick Schottky electrode 2b is planarized has been described. However, the Schottky electrode 2b may be a thin molybdenum film, for example. In this case, it is preferable to form a surface wiring with aluminum or the like on the molybdenum film and planarize the surface of the surface wiring.

As mentioned above, although the Example of this invention was described in detail, these are only illustrations and do not limit a claim. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

1: Diode 2: Anode electrode 2a: Ohmic electrode 2b: Schottky electrode 3: Semiconductor substrate 3a: Front surface 3b: Back surface 4: Cathode electrode 10: Cathode region 13: pn junction 14: p-type semiconductor region 22: n-type semiconductor region 22a: first n-type semiconductor region 22b: second n-type semiconductor region 30: insulating region 30a: left side 30b: right side J1: pn junction diode region J2: Schottky diode region Ja: ohmic junction Jb: Schottky junction

Claims (7)

an n-type semiconductor region;
A p-type semiconductor region provided on a part of the surface of the n-type semiconductor region;
A surface electrode in contact with the surface of the n-type semiconductor region and the surface of the p-type semiconductor region, and at least a Schottky junction with the surface of the n-type semiconductor region;
An insulating region having a first side surface and a second side surface in contact with the n-type semiconductor region,
The first side surface of the insulating region is opposed to the n-type semiconductor region located below a Schottky junction between the surface of the n-type semiconductor region and the surface electrode,
The second side surface of the insulating region is a diode facing the n-type semiconductor region located below a pn junction between the n-type semiconductor region and the p-type semiconductor region.   2. The diode according to claim 1, wherein the insulating region is disposed along a boundary portion between a range where the Schottky junction exists and a range where the pn junction exists when viewed in a plan view. The n-type semiconductor region and the p-type semiconductor region are provided in a semiconductor substrate,
The n-type semiconductor region and the p-type semiconductor region are repeated along at least one direction in the surface layer portion of the semiconductor substrate,
The diode according to claim 1, wherein the surface electrode is provided on the semiconductor substrate.   4. The diode according to claim 3, wherein the insulating region extends from the surface of the semiconductor substrate to a position deeper than the p-type semiconductor region.   The diode according to claim 4, wherein the insulating region penetrates the p-type semiconductor region. An n-type high-concentration semiconductor region that is provided in contact with the back surface of the n-type semiconductor region and has a higher impurity concentration than the n-type semiconductor region;
A back electrode electrically connected to the back surface of the n-type high concentration semiconductor region, and
The diode according to claim 3, wherein the insulating region extends from the surface of the semiconductor substrate to reach the n-type high concentration semiconductor region. The surface electrode has a first surface electrode and a second surface electrode,
The first surface electrode is a Schottky junction with the n-type semiconductor region;
The diode according to claim 1, wherein the second surface electrode is in ohmic contact with the p-type semiconductor region.

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