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JP2010258030A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method Download PDF

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JP2010258030A
JP2010258030A JP2009103061A JP2009103061A JP2010258030A JP 2010258030 A JP2010258030 A JP 2010258030A JP 2009103061 A JP2009103061 A JP 2009103061A JP 2009103061 A JP2009103061 A JP 2009103061A JP 2010258030 A JP2010258030 A JP 2010258030A
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electrode
substrate
chip
semiconductor device
conductive filler
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JP5168221B2 (en
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Akira Komichiguchi
暁 小路口
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NEC Corp
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Abstract

【課題】気泡発生剤等の混入物を用いずに、高い導通性を確保しながら簡便に半導体チップを基板上にフリップチップ実装することができ、作動の信頼性及び品質が向上した半導体装置の製造方法を提供する。
【解決手段】半導体チップ３を基板２上にフリップチップ実装して半導体装置を製造する方法であって、チップ電極３ａと基板電極２ａとのうち少なくともいずれか一方の電極の表面に導電性の突起部１０、１１を形成する工程と、両電極が対向するように基板上に半導体チップをセットすると共に、基板と半導体チップとの間に導電性フィラーＦが含有された樹脂４を供給する工程と、両電極の間に電圧を印加して突起部に電界を局所的に集中させ、導電性フィラーを突起部側に引き寄せると共に、電極対向方向に沿わせながら両電極間に局在化させる工程と、樹脂を硬化させて、半導体チップと基板とを一体的に固定する工程と、を備えている半導体装置製造方法。
【選択図】図８A semiconductor device in which a semiconductor chip can be simply flip-chip mounted on a substrate while ensuring high conductivity without using a contaminant such as a bubble generating agent, and the reliability and quality of operation are improved. A manufacturing method is provided.
A method of manufacturing a semiconductor device by flip-chip mounting a semiconductor chip (3) on a substrate (2), wherein a conductive protrusion is formed on a surface of at least one of a chip electrode (3a) and a substrate electrode (2a). Forming the portions 10 and 11, and setting the semiconductor chip on the substrate so that both electrodes face each other, and supplying the resin 4 containing the conductive filler F between the substrate and the semiconductor chip; Applying a voltage between the two electrodes to locally concentrate the electric field on the protrusion, attracting the conductive filler toward the protrusion, and localizing between the two electrodes along the electrode facing direction; And a step of curing the resin and integrally fixing the semiconductor chip and the substrate.
[Selection] Figure 8

Description

本発明は、基板上に半導体チップが実装された半導体装置を製造する半導体装置製造方法に関するものである。   The present invention relates to a semiconductor device manufacturing method for manufacturing a semiconductor device having a semiconductor chip mounted on a substrate.

近年の電子機器の高密度化、高機能化の傾向に対応する半導体装置の実装技術の１つとして、半導体チップを裏返しにして基板上に実装するフリップチップ実装が実用化されている。
このフリップチップ実装としては、各種の方法が知られているが、例えば、導電性粒子及び気泡発生剤が含有された樹脂を利用して、基板上に半導体チップをフリップチップ実装する方法が知られている（特許文献１参照）。 As one of semiconductor device mounting technologies that respond to the trend toward higher density and higher functionality of electronic devices in recent years, flip chip mounting in which a semiconductor chip is turned over and mounted on a substrate has been put into practical use.
Various methods are known as flip chip mounting. For example, a method of flip chip mounting a semiconductor chip on a substrate using a resin containing conductive particles and a bubble generating agent is known. (See Patent Document 1).

この方法は、まず樹脂を間に挟んだ状態で基板上に半導体チップを配置させる。すると、樹脂に含まれている導電性粒子が、電極との濡れ性により、互いに対向している半導体チップ側の電極と基板側の電極との間に集まり、両電極間の導通を確保する。その後、樹脂を加熱して、導電性粒子を溶融させると共に樹脂を硬化させる。これにより、基板と半導体チップとの強固な固定と、両電極間の導通とを簡便に図ることが可能とされている。
通常、濡れ性だけで対向する電極間の十分な導通性と非対向する電極間の絶縁性とを同時に確保するには、導電性粒子の局在性に不十分さが残るが、上記方法では気泡発生剤が含有された樹脂を利用している。そのため、加熱時に気泡を発生させることができ、この気泡の対流によって、対向する電極間に導電性粒子の局在化を促進させることが可能とされている。 In this method, first, a semiconductor chip is placed on a substrate with a resin interposed therebetween. Then, the conductive particles contained in the resin gather between the electrode on the semiconductor chip side and the electrode on the substrate side facing each other due to wettability with the electrode, thereby ensuring conduction between the electrodes. Thereafter, the resin is heated to melt the conductive particles and cure the resin. Thereby, it is possible to easily achieve firm fixation between the substrate and the semiconductor chip and conduction between both electrodes.
Usually, in order to ensure sufficient conductivity between opposing electrodes and insulation between non-opposing electrodes at the same time with only wettability, insufficient localization remains in the conductive particles. A resin containing a bubble generating agent is used. Therefore, it is possible to generate bubbles during heating, and it is possible to promote localization of conductive particles between the opposing electrodes by the convection of the bubbles.

特開２００８−１７２２１５号公報JP 2008-172215 A

しかしながら、上述した従来の方法は、加熱時に気泡を発生させてしまうので、この気泡によって両電極間の導通接続部にボイドが生じてしまう恐れがあった。また、加熱時に気泡発生剤が分解されずに残滓として残ってしまう恐れもあった。従って、これらボイドや残滓によって、導電性能の低下を招いてしまい易かった。   However, since the conventional method described above generates bubbles during heating, there is a possibility that voids are generated in the conductive connection portion between both electrodes due to the bubbles. In addition, the bubble generating agent may be left as a residue without being decomposed during heating. Therefore, these voids and residues are likely to cause a decrease in conductive performance.

本発明は、このような事情に考慮してなされたもので、その目的は、気泡発生剤等の混入物を用いずに、高い導通性を確保しながら簡便に半導体チップを基板上にフリップチップ実装することができ、作動の信頼性及び品質が向上した半導体装置を製造することができる半導体装置製造方法を提供することである。   The present invention has been made in view of such circumstances, and its purpose is to easily flip a semiconductor chip onto a substrate while ensuring high conductivity without using a contaminant such as a bubble generating agent. It is an object of the present invention to provide a semiconductor device manufacturing method that can be mounted and can manufacture a semiconductor device with improved operational reliability and quality.

本発明は、前記課題を解決するために以下の手段を提供する。
本発明に係る半導体装置製造方法は、チップ電極を有する半導体チップを、基板電極を有する基板上にフリップチップ実装して半導体装置を製造する方法であって、前記チップ電極と前記基板電極とのうち少なくともいずれか一方の電極の表面に導電性の突起部を形成する形成工程と、前記チップ電極と前記基板電極とが対向するように前記基板上に前記半導体チップをセットすると共に、基板と半導体チップとの間に導電性フィラーが含有された樹脂を供給するセット工程と、前記チップ電極と前記基板電極との間に電圧を印加して前記突起部に電界を局所的に集中させ、前記導電性フィラーを突起部側に引き寄せると共に、電極対向方向に沿わせながら両電極間に局在化させる電圧印加工程と、前記樹脂を硬化させて、前記半導体チップと前記基板とを一体的に固定する固定工程と、を備えていることを特徴とする。 The present invention provides the following means in order to solve the above problems.
A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device by flip-chip mounting a semiconductor chip having a chip electrode on a substrate having a substrate electrode, and includes the chip electrode and the substrate electrode. Forming a conductive protrusion on the surface of at least one of the electrodes, setting the semiconductor chip on the substrate so that the chip electrode and the substrate electrode face each other, and the substrate and the semiconductor chip A step of supplying a resin containing a conductive filler, and applying a voltage between the chip electrode and the substrate electrode to locally concentrate an electric field on the protruding portion, so that the conductive A voltage application step of drawing the filler toward the protruding portion side and localizing between both electrodes along the electrode facing direction, and curing the resin, the semiconductor chip Characterized in that it and a fixing step of fixing integrally with said substrate.

本発明に係る半導体装置製造方法によれば、電圧印加時に電界を突起部に局所的に集中させることができるので、導電性フィラーを突起部側に引き寄せることができる。そして、引き寄せた導電性フィラーを、電極対向方向に沿わせながら対向するチップ電極と基板電極との間に局在化させることができる。従って、局在化した導電性フィラーを介して、互いに対向するチップ電極と基板電極とを導通させることができる。しかも、引き寄せた導電性フィラーの一部を、濡れ性の効果により突起部が形成された電極に密着させることができる。特に、突起部によって表面積が大きく確保されているので、濡れ性の効果が高まり、突起部が形成された電極に多くの導電性フィラーが密着させることができる。従って、両電極の安定した導通性能を実現することができる。   According to the semiconductor device manufacturing method of the present invention, the electric field can be locally concentrated on the protruding portion when a voltage is applied, so that the conductive filler can be drawn toward the protruding portion side. Then, the attracted conductive filler can be localized between the chip electrode and the substrate electrode facing each other along the electrode facing direction. Therefore, the chip electrode and the substrate electrode facing each other can be made conductive through the localized conductive filler. In addition, part of the drawn conductive filler can be brought into close contact with the electrode on which the protrusion is formed due to the wettability effect. In particular, since a large surface area is secured by the protrusions, the effect of wettability is enhanced, and many conductive fillers can be brought into close contact with the electrode on which the protrusions are formed. Therefore, stable conduction performance of both electrodes can be realized.

特に、従来のように気泡発生剤等の混入物によってボイドや残滓の可能性があった方法とは異なり、突起部を形成し、その後電圧印加を行うだけの簡便な方法で、対向するチップ電極と基板電極との導通性を安定に確保できると共に絶縁不良を防止することができる。従って、作動の信頼性及び品質が向上した半導体装置を得ることができる。
更に、対向するチップ電極と基板電極との間に導電性フィラーを局在化させることができるので、非対向状態にあるチップ電極と基板電極との間に導電性フィラーが集まり難い。従って、非対向状態にあるチップ電極と基板電極との間を、確実に絶縁状態にし易い。この点においても、半導体装置の作動の信頼性を高めることができる。 In particular, unlike the conventional method in which a void or a residue may be generated due to a contaminant such as a bubble generating agent, the tip electrode is opposed by a simple method of forming a protrusion and then applying a voltage. In addition, it is possible to stably ensure electrical conductivity between the substrate electrode and the substrate electrode and to prevent insulation failure. Therefore, a semiconductor device with improved operational reliability and quality can be obtained.
Furthermore, since the conductive filler can be localized between the chip electrode and the substrate electrode facing each other, it is difficult for the conductive filler to collect between the chip electrode and the substrate electrode in a non-facing state. Therefore, it is easy to ensure an insulation state between the chip electrode and the substrate electrode in the non-opposing state. Also in this point, the reliability of the operation of the semiconductor device can be improved.

本発明に係る半導体装置の一実施形態を示す部分断面図である。It is a fragmentary sectional view showing one embodiment of a semiconductor device concerning the present invention. 図１に示す半導体装置を製造する際のフローチャートである。2 is a flowchart for manufacturing the semiconductor device shown in FIG. 1. 図１に示す半導体装置を製造する際の一工程図であって、基板側の基板電極の表面に突起部を形成した状態を示す図である。FIG. 2 is a process diagram when the semiconductor device shown in FIG. 1 is manufactured, and shows a state in which a protrusion is formed on the surface of a substrate electrode on the substrate side. 図１に示す半導体装置を製造する際の一工程図であって、半導体チップ側のチップ電極の表面に突起部を形成した状態を示す図である。FIG. 2 is a process diagram when the semiconductor device shown in FIG. 1 is manufactured, and shows a state in which protrusions are formed on the surface of a chip electrode on the semiconductor chip side. 図３に示す基板上に導電性フィラーが含有された樹脂を供給した状態を示す図である。It is a figure which shows the state which supplied resin containing the conductive filler on the board | substrate shown in FIG. 図５に示す導電性フィラーの拡大断面図である。It is an expanded sectional view of the conductive filler shown in FIG. 図５に示す状態の後、樹脂を間に挟んで半導体チップを基板上にセットした状態を示す図である。It is a figure which shows the state which set the semiconductor chip on the board | substrate on both sides of resin after the state shown in FIG. 図７に示す状態の後、チップ電極と基板電極との間に電圧を印加している状態を示す図である。It is a figure which shows the state which is applying the voltage between a chip electrode and a board | substrate electrode after the state shown in FIG. 図８に示す状態の後、チップ電極と基板電極との間に局在化した導電性フィラーを加熱により溶融した状態を示す図である。It is a figure which shows the state which fuse | melted the conductive filler localized between the chip electrode and the board | substrate electrode after the state shown in FIG. 8 by heating.

以下、本発明に係る半導体装置製造方法の一実施形態を、図１から図９を参照して説明する。はじめに半導体装置について、簡単に説明する。
図１に示すように、本実施形態の半導体装置１は、複数の基板電極２ａを有する基板２上に、複数のチップ電極３ａを有する半導体チップ３がフリップチップ実装されたものである。この際、基板２と半導体チップ３とは、硬化した樹脂４によって一体的に固定されている。そのため、半導体チップ３は、ぐらつくことなく、高い剛性で強固に実装された状態となっている。
また、互いに対向するチップ電極３ａと基板電極２ａとは、後述する複数の導電性フィラーＦが溶融した導通部５を介して電気的に接続されている。これにより、互いに対向するチップ電極３ａと基板電極２ａとは、安定した導通性が確保されている。
なお、非対向のチップ電極３ａと基板電極２ａとに関しては、確実に絶縁された状態となっている。 Hereinafter, an embodiment of a semiconductor device manufacturing method according to the present invention will be described with reference to FIGS. First, a semiconductor device will be briefly described.
As shown in FIG. 1, the semiconductor device 1 of this embodiment is obtained by flip-chip mounting a semiconductor chip 3 having a plurality of chip electrodes 3a on a substrate 2 having a plurality of substrate electrodes 2a. At this time, the substrate 2 and the semiconductor chip 3 are integrally fixed by the cured resin 4. Therefore, the semiconductor chip 3 is in a state of being firmly mounted with high rigidity without wobbling.
Further, the chip electrode 3a and the substrate electrode 2a facing each other are electrically connected through a conduction portion 5 in which a plurality of conductive fillers F described later are melted. Thereby, stable electrical conductivity is secured between the chip electrode 3a and the substrate electrode 2a facing each other.
Note that the non-facing chip electrode 3a and the substrate electrode 2a are reliably insulated.

次に、このように構成された半導体装置１を製造する半導体装置製造方法について、図２に示すフローチャートを参照しながら、以下に説明する。
本実施形態の製造方法は、形成工程（Ｓ１）と、セット工程（Ｓ２）と、電圧印加工程（Ｓ３）と、加熱工程（Ｓ４）と、固定工程（Ｓ５）と、を順に行って製造する方法である。これら各工程について、詳細に説明する。 Next, a semiconductor device manufacturing method for manufacturing the semiconductor device 1 configured as described above will be described below with reference to the flowchart shown in FIG.
The manufacturing method of the present embodiment is manufactured by sequentially performing the forming step (S1), the setting step (S2), the voltage applying step (S3), the heating step (S4), and the fixing step (S5). Is the method. Each of these steps will be described in detail.

まず、図３に示すように、基板電極２ａの表面に導電性の突起部１０を形成する形成工程（Ｓ１）を行う。本実施形態では、先端が先鋭化するように三角状の突起部１０を形成すると共に、基板電極２ａの表面全体に亘って複数形成する場合を例に挙げて説明する。なお、突起部１０を形成する方法としては、例えば、結晶成長法、電気マイグレーションや結晶析出法等が挙げられる。
また、本実施形態では、基板電極２ａだけに突起部１０を形成するのではく、図４に示すように、チップ電極３ａの表面にも同様に突起部１１を形成する。この場合も、やはり先端が先鋭化するように三角状の突起部１１を形成すると共に、チップ電極３ａの表面全体に亘って複数形成する。
この時点で、形成工程（Ｓ１）が終了する。 First, as shown in FIG. 3, a formation process (S1) for forming conductive protrusions 10 on the surface of the substrate electrode 2a is performed. In the present embodiment, a case where the triangular protrusions 10 are formed so that the tips are sharpened and a plurality of protrusions 10 are formed over the entire surface of the substrate electrode 2a will be described as an example. Examples of the method for forming the protrusion 10 include a crystal growth method, an electric migration method, a crystal precipitation method, and the like.
In the present embodiment, the protrusions 10 are not formed only on the substrate electrode 2a, but the protrusions 11 are similarly formed on the surface of the chip electrode 3a as shown in FIG. Also in this case, the triangular protrusion 11 is formed so that the tip is sharpened, and a plurality of protrusions 11 are formed over the entire surface of the chip electrode 3a.
At this point, the forming step (S1) is finished.

次に、チップ電極３ａと基板電極２ａとが対向するように基板２上に半導体チップ３をセットすると共に、基板２と半導体チップ３との間に導電性フィラーＦが含有された樹脂４を供給するセット工程（Ｓ２）を行う。
具体的には、図５に示すように、流動性のある状態の樹脂４の中に導電性フィラーＦを所定比率混合させた後、導電性フィラーＦを含有する樹脂４を基板２上に塗布等により供給する。この際、導電性フィラーＦとしては、図６に示すように、金属コアｆ１の表面に電界配向性を有する被膜ｆ２がコーティングされた球形状のものを用いる。また、樹脂４としては、後に硬化するもの、例えば光硬化性或いは熱硬化性の樹脂を用いる。 Next, the semiconductor chip 3 is set on the substrate 2 so that the chip electrode 3 a and the substrate electrode 2 a face each other, and the resin 4 containing the conductive filler F is supplied between the substrate 2 and the semiconductor chip 3. A setting step (S2) is performed.
Specifically, as shown in FIG. 5, the conductive filler F is mixed in a predetermined ratio with the fluid resin 4, and then the resin 4 containing the conductive filler F is applied onto the substrate 2. Supply by etc. At this time, as the conductive filler F, as shown in FIG. 6, a spherical one in which the surface of the metal core f1 is coated with a film f2 having electric field orientation is used. Further, as the resin 4, a resin that is cured later, for example, a photo-curing or thermosetting resin is used.

そして、樹脂４を供給した後、図７に示すように、チップ電極３ａが基板２側に向くように半導体チップ３を裏返しにすると共に、間に樹脂４を挟んで状態で半導体チップ３を基板２上にセットする。この際、複数のチップ電極３ａと複数の基板電極２ａとがそれぞれ対向するように、半導体チップ３をセットする。
この時点で、セット工程（Ｓ２）が終了する。 Then, after supplying the resin 4, as shown in FIG. 7, the semiconductor chip 3 is turned over so that the chip electrode 3a faces toward the substrate 2, and the semiconductor chip 3 is placed on the substrate with the resin 4 interposed therebetween. Set on 2. At this time, the semiconductor chip 3 is set so that the plurality of chip electrodes 3a and the plurality of substrate electrodes 2a face each other.
At this point, the setting process (S2) is completed.

次に、チップ電極３ａと基板電極２ａとの間に所定の電圧を印加する電圧印加工程（Ｓ３）を行う。
具体的には、図８に示すように、電流計１５を介在させた状態で各チップ電極３ａを電源１６の負極側に接続すると共に、各基板電極２ａを電源１６の正極側に接続する。このように回路を形成した後、チップ電極３ａと基板電極２ａとの間に所定の電圧を印加する。すると、電界が突起部１０、１１に局所的に集中するので、導電性フィラーＦを突起部１０、１１に引き寄せて自己集合させることができる。ところで、この際電界は、対向しているチップ電極３ａと基板電極２ａとを結ぶ電極対向方向に作用する。そのため、突起部１０、１１に引き寄せた導電性フィラーＦを、電極対向方向に沿わせながら両電極２ａ、３ａ間に局在化させることができる。これにより、局在化した導電性フィラーＦを介して、互いに対向するチップ電極３ａと基板電極２ａとを導通させることができる。 Next, a voltage application step (S3) is performed in which a predetermined voltage is applied between the chip electrode 3a and the substrate electrode 2a.
Specifically, as shown in FIG. 8, each chip electrode 3 a is connected to the negative side of the power source 16 with the ammeter 15 interposed, and each substrate electrode 2 a is connected to the positive side of the power source 16. After the circuit is formed in this way, a predetermined voltage is applied between the chip electrode 3a and the substrate electrode 2a. Then, since the electric field is locally concentrated on the protrusions 10 and 11, the conductive filler F can be attracted to the protrusions 10 and 11 to be self-assembled. Incidentally, at this time, the electric field acts in an electrode facing direction connecting the chip electrode 3a and the substrate electrode 2a facing each other. Therefore, the conductive filler F attracted to the protrusions 10 and 11 can be localized between the electrodes 2a and 3a along the electrode facing direction. As a result, the chip electrode 3a and the substrate electrode 2a facing each other can be conducted through the localized conductive filler F.

しかも、引き寄せられた導電性フィラーＦの一部は、濡れ性の効果により突起部１０、１１が形成されたチップ電極３ａ及び基板電極２ａにそれぞれ密着する。特に、突起部１０、１１によって表面積が大きく確保されているので、濡れ性の効果が高まり、突起部１０、１１が形成されたチップ電極３ａ及び基板電極２ａには多くの導電性フィラーＦが密着した状態となる。従って、導通性をより確実なものとすることができ、安定した導通性能を実現することができる。
この時点で、電圧印加工程（Ｓ３）が終了する。 Moreover, some of the attracted conductive fillers F are in close contact with the chip electrode 3a and the substrate electrode 2a on which the protrusions 10 and 11 are formed due to the wettability effect. In particular, since a large surface area is secured by the protrusions 10 and 11, the effect of wettability is enhanced, and a large amount of conductive filler F adheres to the chip electrode 3a and the substrate electrode 2a on which the protrusions 10 and 11 are formed. It will be in the state. Therefore, the conductivity can be made more reliable, and a stable conduction performance can be realized.
At this point, the voltage application step (S3) is completed.

次に、図９に示すように、導電性フィラーＦを加熱して溶融させる加熱工程（Ｓ４）を行う。
このように溶融させることで、対向しているチップ電極３ａと基板電極２ａとの間に局在化されている導電性フィラーＦを一体化させて導通部５とすることができる。従って、対向するチップ電極３ａと基板電極２ａとの導通性の安定化を図ることができる。 Next, as shown in FIG. 9, a heating step (S4) for heating and melting the conductive filler F is performed.
By melting in this way, the conductive filler F localized between the chip electrode 3a and the substrate electrode 2a facing each other can be integrated to form the conductive portion 5. Therefore, it is possible to stabilize the electrical conductivity between the chip electrode 3a and the substrate electrode 2a facing each other.

そして、最後に半導体チップ３と基板２との間に供給した樹脂４を硬化させて、半導体チップ３と基板２とを一体的に固定する固定工程（Ｓ５）を行う。
この際、光硬化性の樹脂４を採用している場合には、紫外線等の光を照射することで樹脂４を硬化させる。また、熱硬化性の樹脂４を採用している場合には、所定の温度まで加熱することで樹脂４を硬化させる。いずれにしても、樹脂４の種類に応じた方法により樹脂４を硬化させれば良い。
その結果、基板２上に半導体チップ３がフリップチップ実装された図１に示す半導体装置１を得ることができる。 Finally, the resin 4 supplied between the semiconductor chip 3 and the substrate 2 is cured, and a fixing step (S5) for fixing the semiconductor chip 3 and the substrate 2 integrally is performed.
At this time, when the photocurable resin 4 is employed, the resin 4 is cured by irradiating light such as ultraviolet rays. Further, when the thermosetting resin 4 is employed, the resin 4 is cured by heating to a predetermined temperature. In any case, the resin 4 may be cured by a method according to the type of the resin 4.
As a result, the semiconductor device 1 shown in FIG. 1 in which the semiconductor chip 3 is flip-chip mounted on the substrate 2 can be obtained.

特に、本実施形態の製造方法によれば、従来のように気泡発生剤等の混入物によりボイドや残滓の可能性があった方法とは異なり、突起部１０、１１を形成し、その後電圧印加を行うだけの簡便な方法で、対向するチップ電極３ａと基板電極２ａとの導通性を安定に確保できると共に絶縁不良を防止することができる。従って、作動の信頼性及び品質が向上した半導体装置１を得ることができる。
また、対向するチップ電極３ａと基板電極２ａとの間に導電性フィラーＦを局在化させることができるので、非対向状態にあるチップ電極３ａと基板電極２ａとの間に導電性フィラーＦが集まり難い。従って、非対向状態にあるチップ電極３ａと基板電極２ａとの間を、確実に絶縁状態にし易い。この点においても、半導体装置１の作動の信頼性を高めることができる。 In particular, according to the manufacturing method of the present embodiment, unlike the conventional method in which there is a possibility of voids or residues due to the inclusion of a bubble generating agent or the like, the protrusions 10 and 11 are formed, and then voltage application is performed. With this simple method, the electrical conductivity between the chip electrode 3a and the substrate electrode 2a facing each other can be stably ensured and insulation failure can be prevented. Therefore, the semiconductor device 1 with improved operational reliability and quality can be obtained.
In addition, since the conductive filler F can be localized between the chip electrode 3a and the substrate electrode 2a facing each other, the conductive filler F is interposed between the chip electrode 3a and the substrate electrode 2a in the non-facing state. It's hard to get together. Therefore, the chip electrode 3a and the substrate electrode 2a in the non-opposing state are easily insulated from each other. Also in this point, the reliability of the operation of the semiconductor device 1 can be improved.

更に、表面に電界配向性を有する被膜ｆ２が形成された導電性フィラーＦを用いるので、電圧印加によって発生した電界の方向、即ち、電極対向方向に沿って導電性フィラーＦをより積極的に配向させることができる。従って、対向するチップ電極３ａと基板電極２ａとの間に、導電性フィラーＦをより効率良く確実に局在化させることができる。
なお、突起部１０、１１によって電界の方向が強調されているので、電界配向性を有する被膜ｆ２の膜厚を薄くしたとしても、確実な導通性を確保することができる。加えて、加熱工程（Ｓ４）によって導電性フィラーＦを溶融させるので、導電性能が金属より劣る電界配向性の被膜ｆ２を分解若しくは除去することができる。従って、この点においても、高い導電性能を実現した半導体装置１を得ることができる。 Further, since the conductive filler F having the electric field orientation film f2 formed on the surface is used, the conductive filler F is more positively oriented along the direction of the electric field generated by the voltage application, that is, the electrode facing direction. Can be made. Therefore, the conductive filler F can be localized more efficiently and reliably between the chip electrode 3a and the substrate electrode 2a facing each other.
Since the direction of the electric field is emphasized by the protrusions 10 and 11, reliable conductivity can be ensured even if the film f2 having electric field orientation is thinned. In addition, since the conductive filler F is melted by the heating step (S4), the electric field orientation film f2 whose conductivity is inferior to that of metal can be decomposed or removed. Therefore, also in this respect, the semiconductor device 1 that realizes high conductive performance can be obtained.

また、本実施形態では、先端が先鋭化した三角状に突起部１０、１１を形成しているので、電界を突起部１０、１１の先端により集中させることができ、導電性フィラーＦをより引き寄せ易くすることができる。従って、対向するチップ電極３ａと基板電極２ａとの間の導通性をより確実なものにすることができる。
加えて、本実施形態では、チップ電極３ａ及び基板電極２ａの表面全体に亘って突起部１０、１１を複数形成しているで、さらに効率良く導電性フィラーＦを引き寄せることができ、対向するチップ電極３ａと基板電極２ａとの間により集中的に局在化させることができる。また、表面積をできるだけ大きくすることができるので、突起部１０、１１に引き寄せられた導電性フィラーＦをチップ電極３ａ及び基板電極２ａに密着させ易い。これらの点においても、チップ電極３ａと基板電極２ａとの導通性を確実にすることができる。 Moreover, in this embodiment, since the projections 10 and 11 are formed in a triangular shape with sharpened tips, the electric field can be concentrated on the tips of the projections 10 and 11 and the conductive filler F is attracted more. Can be made easier. Therefore, the electrical conductivity between the chip electrode 3a and the substrate electrode 2a facing each other can be further ensured.
In addition, in the present embodiment, the plurality of protrusions 10 and 11 are formed over the entire surface of the chip electrode 3a and the substrate electrode 2a, so that the conductive filler F can be drawn more efficiently, and the opposing chip Localization can be more concentrated between the electrode 3a and the substrate electrode 2a. Further, since the surface area can be increased as much as possible, the conductive filler F attracted to the protrusions 10 and 11 can be easily brought into close contact with the chip electrode 3a and the substrate electrode 2a. Also in these points, the electrical conductivity between the chip electrode 3a and the substrate electrode 2a can be ensured.

なお、本発明の技術範囲は上記実施の形態に限定されるものではなく、本発明の趣旨を逸脱しない範囲において種々の変更を加えることが可能である。   The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention.

例えば、上記実施形態では、三角状の突起部１０、１１を形成した場合を例に挙げて説明したが、この場合に限定されるものではなく、突起部１０、１１の形状は自由に設計して構わない。また、突起部１０、１１の数に関しても、自由に設計して構わない。
また、上記実施形態では、基板電極２ａ及びチップ電極３ａのそれぞれに突起部１０、１１を形成した場合を例に挙げたが、基板電極２ａ側にだけ形成しても構わないし、チップ電極３ａ側にだけ形成しても構わない。いずれにしても少なくともいずれか一方の電極の表面に突起部を形成すれば良い。 For example, in the above embodiment, the case where the triangular protrusions 10 and 11 are formed has been described as an example. However, the present invention is not limited to this case, and the shape of the protrusions 10 and 11 can be freely designed. It doesn't matter. Further, the number of the protrusions 10 and 11 may be freely designed.
In the above embodiment, the case where the protrusions 10 and 11 are formed on each of the substrate electrode 2a and the chip electrode 3a is taken as an example, but it may be formed only on the substrate electrode 2a side, or on the chip electrode 3a side. You may form only. In any case, a protrusion may be formed on the surface of at least one of the electrodes.

また、突起部１０、１１の表面に、アーク放電法、レーザ蒸発法、化学気相成長法等といった代表的手法を用いて、カーボンナノチューブ（CNT：Carbon nanotube）の束を形成しても構わない。こうすることで、表面積をさらに大きくして濡れ性の効果を格段に高めることができるので、導通性を飛躍的に向上させることができる。   Further, a bundle of carbon nanotubes (CNT) may be formed on the surfaces of the protrusions 10 and 11 using a typical method such as an arc discharge method, a laser evaporation method, or a chemical vapor deposition method. . By doing so, the surface area can be further increased and the wettability effect can be greatly enhanced, so that the electrical conductivity can be drastically improved.

Ｆ…導電性フィラー
ｆ２…電界配向性の被膜
１…半導体装置
２…基板
２ａ…基板電極
３…半導体チップ
３ａ…チップ電極
４…樹脂
１０、１１…突起部 F ... conductive filler f2 ... electric field orientation coating 1 ... semiconductor device 2 ... substrate 2a ... substrate electrode 3 ... semiconductor chip 3a ... chip electrode 4 ... resin 10, 11 ... projection

Claims (5)

チップ電極を有する半導体チップを、基板電極を有する基板上にフリップチップ実装して半導体装置を製造する方法であって、
前記チップ電極と前記基板電極とのうち少なくともいずれか一方の電極の表面に導電性の突起部を形成する形成工程と、
前記チップ電極と前記基板電極とが対向するように前記基板上に前記半導体チップをセットすると共に、基板と半導体チップとの間に導電性フィラーが含有された樹脂を供給するセット工程と、
前記チップ電極と前記基板電極との間に電圧を印加して前記突起部に電界を局所的に集中させ、前記導電性フィラーを突起部側に引き寄せると共に、電極対向方向に沿わせながら両電極間に局在化させる電圧印加工程と、
前記樹脂を硬化させて、前記半導体チップと前記基板とを一体的に固定する固定工程と、を備えていることを特徴とする半導体装置製造方法。 A method of manufacturing a semiconductor device by flip-chip mounting a semiconductor chip having a chip electrode on a substrate having a substrate electrode,
Forming a conductive protrusion on the surface of at least one of the chip electrode and the substrate electrode; and
Setting the semiconductor chip on the substrate so that the chip electrode and the substrate electrode face each other, and supplying a resin containing a conductive filler between the substrate and the semiconductor chip; and
A voltage is applied between the chip electrode and the substrate electrode to locally concentrate the electric field on the protrusion, pulling the conductive filler toward the protrusion, and between the two electrodes along the electrode facing direction. A voltage application step for localizing to,
A semiconductor device manufacturing method comprising: a fixing step of curing the resin to integrally fix the semiconductor chip and the substrate. 請求項１に記載の半導体装置製造方法において、
前記形成工程の際、先端が先鋭化するように前記突起部を形成することを特徴とする半導体装置製造方法。 In the semiconductor device manufacturing method according to claim 1,
In the forming step, the protrusion is formed so that the tip is sharpened. 請求項１又は２に記載の半導体装置製造方法において、
前記形成工程の際、前記一方の電極の表面全体に亘って前記突起部を複数形成することを特徴とする半導体装置製造方法。 In the semiconductor device manufacturing method according to claim 1 or 2,
In the forming step, a plurality of the protruding portions are formed over the entire surface of the one electrode. 請求項１から３のいずれか１項に記載の半導体装置製造方法において、
前記電圧印加工程と前記固定工程との間に、前記導電性フィラーを加熱して溶融させる加熱工程を備えていることを特徴とする半導体装置製造方法。 In the semiconductor device manufacturing method according to any one of claims 1 to 3,
A method for manufacturing a semiconductor device, comprising a heating step of heating and melting the conductive filler between the voltage application step and the fixing step. 請求項１から４のいずれか１項に記載の半導体装置製造方法において、
前記導電性フィラーとして、表面に電界配向性を有する被膜が形成されたものを用いることを特徴とする半導体装置製造方法。 In the semiconductor device manufacturing method according to any one of claims 1 to 4,
A method for manufacturing a semiconductor device, characterized in that a conductive film having a film having electric field orientation is formed on the surface.
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