JP2010251558A - Solid-state imaging device - Google Patents

Abstract

A solid-state imaging device capable of reducing the influence of power supply noise supplied from an electrode of a semiconductor substrate having a through electrode and power supply noise generated from the semiconductor substrate side.
An image pickup device 21 formed on a first main surface of a semiconductor substrate 10, a solder ball 18 formed on a second main surface opposite to the first main surface of the substrate 10, and a substrate 10 An insulating film 35 formed in the through hole formed in the through hole, a through electrode 37 formed on the insulating film 35 in the through hole, and the through electrode 37 on the first main surface of the substrate 10. And an internal electrode 32. When viewed from a direction perpendicular to the first main surface of the substrate 10, the outer shape of the insulating film 35 and the substrate 10 is larger than the outer shape of the internal electrode 32.
[Selection] Figure 2

Description

  The present invention relates to a solid-state imaging device having a through electrode formed on a semiconductor substrate, for example, a camera module.

  Along with miniaturization of electronic equipment, semiconductor devices to be mounted need to be miniaturized and highly integrated. In the second half of the 1990s, practical application of a wafer level CSP (Wafer Level Chip Scale Package) has started (for example, see Non-Patent Document 1). The flip chip method eliminates the lead wires, and the substrate and the semiconductor chip are joined by bumps with the semiconductor chip surface facing downward.

  On the other hand, the development of stacked packages (multi-chip packages) in which a plurality of semiconductor chips are three-dimensionally stacked to achieve a significant reduction in size has been carried out since the late 1990s, and a package using through electrodes has been proposed. (For example, refer to Patent Document 1). The study of wafer level CSP for optical elements begins around 2000.

  Non-Patent Document 2 describes a structure of glass + adhesive layer + image sensor + penetrating electrode and a cross-sectional photograph actually created by Koyanagi et al. Similarly, Patent Document 2 and Patent Document 3 also disclose a cross-sectional structure of an optical element including a through electrode and a light-transmitting support substrate.

  However, since the through electrode proposed in all these documents is formed in the silicon semiconductor substrate, it penetrates from the pad due to the coupling between the through electrode and the silicon semiconductor substrate and the high grounding resistance around the through electrode. There is a problem that the power supplied through the electrodes is deteriorated or, on the contrary, a desired good voltage waveform cannot be formed due to power noise generated from the silicon semiconductor substrate side.

JP-A-10-223833 US Pat. No. 6,489,675 JP 2007-53149 A

Nikkei Micro Devices April 1998 P28, P164, P176 International Electron Devices Meeting 1999 Technical Digest pp.879-882

  The present invention provides a solid-state imaging device capable of reducing the influence of power supply noise supplied from an electrode of a semiconductor substrate having a through electrode and power supply noise generated from the semiconductor substrate side.

  A solid-state imaging device according to an embodiment of the present invention is formed on an image sensor formed on a first main surface of a semiconductor substrate, and on a second main surface facing the first main surface of the semiconductor substrate. An external terminal, an insulating film formed in a through hole formed in the semiconductor substrate, a through electrode formed on the insulating film in the through hole and electrically connected to the external terminal, A first electrode formed on the through electrode on the first main surface of the semiconductor substrate, and when viewed from a direction perpendicular to the first main surface of the semiconductor substrate, the insulation The outer shape of the film in contact with the semiconductor substrate is larger than the outer shape of the first electrode.

  A solid-state imaging device according to another embodiment of the present invention is formed on an image sensor formed on a first main surface of a semiconductor substrate, and on a second main surface facing the first main surface of the semiconductor substrate. An external terminal formed in the through-hole formed in the semiconductor substrate and electrically connected to the external terminal; and the through-electrode on the first main surface of the semiconductor substrate. A first electrode formed; a semiconductor region formed on the semiconductor substrate so as to surround at least a part of an outer periphery of the through electrode; and a semiconductor region formed on the semiconductor region and electrically connected to the semiconductor region And a ground potential is supplied to the semiconductor region through the wiring.

  ADVANTAGE OF THE INVENTION According to this invention, the solid-state imaging device which can reduce the influence by the deterioration of the power supply supplied from the electrode of the semiconductor substrate which has a penetration electrode, and the power supply noise generate | occur | produced from the semiconductor substrate side can be provided.

It is sectional drawing which shows the structure of the camera module of 1st Embodiment of this invention. It is sectional drawing to which the part of the silicon semiconductor substrate and glass substrate in the camera module of 1st Embodiment was expanded. It is the figure which looked at the peripheral circuit part in FIG. 2 from the pad opening part side. It is a figure which shows the manufacturing method of the penetration electrode in the camera module of 1st Embodiment. It is a figure which shows the manufacturing method of the penetration electrode in the camera module of 1st Embodiment. It is sectional drawing which shows the structure of the camera module of 2nd Embodiment of this invention. It is the figure which looked at the peripheral circuit part in FIG. 6 from the pad opening part side. It is sectional drawing which shows the structure of the camera module of 3rd Embodiment of this invention. It is the figure which looked at the peripheral circuit part in FIG. 8 from the pad opening part side.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Here, a camera module is taken as an example of the solid-state imaging device. In the description, common parts are denoted by common reference symbols throughout the drawings.

[First Embodiment]
First, the camera module according to the first embodiment of the present invention will be described.

  FIG. 1 is a cross-sectional view showing the configuration of the camera module of the first embodiment. On a first main surface of a silicon semiconductor substrate (imaging element chip) 10 on which an imaging element (not shown) is formed, a light transmissive support substrate, for example, a glass substrate 12 is formed via an adhesive 11. Yes. An IR (infrared) cut filter 14 is disposed on the glass substrate 12 via an adhesive 13. Furthermore, a lens holder 17 including an imaging lens 16 is disposed on the IR cut filter 14 with an adhesive 15 interposed therebetween.

  Further, on the second main surface of the silicon semiconductor substrate 10 facing the first main surface, external terminals (electrodes), for example, solder balls 18 are formed. A light shielding and electromagnetic shield 19 is disposed around the silicon semiconductor substrate 10 and the glass substrate 12. The light shielding / electromagnetic shield 19 is bonded to the lens holder 17 with an adhesive 20. With such a structure, the camera module 100 is formed.

  The camera module 100 is directly mounted (COB: Chip On Board) via a solder ball 18 on a mounting substrate 200 made of, for example, resin or ceramic.

  Next, the cross-sectional structures of the silicon semiconductor substrate 10 and the glass substrate 12 in FIG. 1 will be described in detail.

  FIG. 2 is an enlarged cross-sectional view of the silicon semiconductor substrate and the glass substrate in the camera module of the first embodiment. The camera module includes an imaging pixel unit in which the imaging element 21 is formed and a peripheral circuit unit that processes a signal output from the imaging pixel unit.

  The imaging pixel unit of the camera module has the following configuration.

  An element isolation insulating layer (for example, STI (Shallow Trench Isolation)) 22 and an element region isolated by the element isolation insulating layer 22 are disposed on the first main surface of the silicon semiconductor substrate 10. An image sensor 21 including a photodiode and a transistor is formed in the element region.

  An interlayer insulating film 23 is formed on the first main surface on which the imaging element 21 is formed, and an interlayer insulating film 24 is formed on the interlayer insulating film 23. Further, a wiring 25 is formed in the interlayer insulating film 24.

  A passivation film 26 is formed on the interlayer insulating film 24, and a base layer 27 is formed on the passivation film 26. On the base layer 27, color filters 28 are arranged so as to correspond to the image sensor 21.

  An overcoat 29 is formed on the color filter 28, and a microlens 30 is formed on the overcoat 29 so as to correspond to the imaging element 21 (or the color filter 28). Further, a cavity 31 is formed on the microlens 30, and a light transmissive support substrate (transparent substrate), for example, a glass substrate 12 is disposed on the cavity 31.

  In the peripheral circuit portion of the camera module, the following through electrodes and electrode pads are formed. An interlayer insulating film 23 is formed on the first main surface of the silicon semiconductor substrate 10, and an internal electrode (first electrode) 32 is formed on the interlayer insulating film 23.

  A through hole is formed from the second main surface of the silicon semiconductor substrate 10 to the interlayer insulating film 23 via the first main surface. An insulating film 35 is formed on the side surface and the bottom surface of the through hole. An insulating film 36 is formed on the second main surface of the silicon semiconductor substrate 10.

  A through electrode (conductor layer) 37 is formed on the inner surface of the through hole (on the insulating film 35 and on the surface of the internal electrode 32 on the through hole side) and on the insulating film 36. The internal electrode 32 is electrically connected to a peripheral circuit (not shown) formed in the imaging element 21 or the peripheral circuit unit.

  A protective film such as a solder resist 38 is formed on the through electrode 37 and the insulating film 36 on the second main surface. Further, a part of the solder resist 38 on the through electrode 37 is opened on the second main surface, and the solder ball 18 is formed on the exposed through electrode 37. A through electrode 37 formed in the through hole electrically connects the solder ball 18 to the image sensor 21 or a peripheral circuit.

  The solder resist 38 is made of, for example, a phenol resin, a polyimide resin, an amine resin, or the like. For the solder ball 18, Sn—Pg (eutectic), 95 Pb—Sn (high lead high melting point solder), Pb free solder, Sn—Ag, Sn—Cu, Sn—Ag—Cu, or the like is used.

  An element surface electrode (second electrode) 33 is formed on the internal electrode 32 with an interlayer insulating film 24 interposed therebetween. In the interlayer insulating film 24 between the internal electrode 32 and the element surface electrode 33, a contact plug 34 for electrically connecting these electrodes is formed. The element surface electrode 33 is used, for example, for voltage application and signal readout via the contact plug 34 and the internal electrode 32. In particular, during the die sort test, a test needle is applied to the element surface electrode 33.

  Further, a passivation film 26 is formed on the element surface electrode 33. A base layer 27 is formed on the passivation film 26, and an overcoat 29 is formed on the base layer 27. Furthermore, a styrene resin layer 39 is formed on the overcoat 29.

  The passivation film 26, the base layer 27, the overcoat 29, and the styrenic resin layer 39 disposed on the element surface electrode 33 are opened to form a pad opening 40. A glass substrate 12 is formed on the styrene resin layer 39 and the element surface electrode 33 with an adhesive 11 interposed therebetween. The adhesive 11 is patterned and is not disposed on the image sensor 21 (or on the microlens 30).

  FIG. 3 is a view of the peripheral circuit portion in FIG. 2 as viewed from the pad opening side, and is a plan view showing a layout of the insulating film 35, the internal electrode 32, and the through electrode 37. As shown in the drawing, an internal electrode 32 is disposed inside the insulating film 35, and a through electrode 37 is disposed inside the internal electrode 32.

  The insulating film 35 disposed between the through electrode 37 and the silicon semiconductor substrate 10 in the through hole insulates the through electrode 37 and the silicon semiconductor substrate 10. As shown in FIGS. 2 and 3, the thickness of the insulating film 35 is about 300 to 1000 nm in the direction parallel to the first main surface of the silicon semiconductor substrate 10, and its outer shape is outside the outer shape of the internal electrode 32. Is located.

  With such a structure, the capacitance between the through electrode 37 and the silicon semiconductor substrate 10 can be reduced as compared with the conventional example in which a thin insulating film is disposed between the through electrode and the silicon semiconductor substrate. The time constant can be reduced. Thereby, it is possible to prevent the power supplied from the solder ball 18 from being deteriorated, and to reduce the influence of the power noise generated from the silicon semiconductor substrate 10 side. Thereby, a desired good power supply voltage can be supplied to the image sensor 21 and the peripheral circuit.

Next, a manufacturing method of the through electrode 37 in the first embodiment will be described below.
4 and 5 are diagrams illustrating a method of manufacturing a through electrode in the camera module of the first embodiment.

  First, as shown in FIG. 4, a through hole is processed in the silicon semiconductor substrate 10, and then an insulating film 35 is formed in the through hole. Further, an insulating film 36 is formed on the second main surface of the silicon semiconductor substrate 10.

  Subsequently, as shown in FIG. 5, a through hole 41 reaching the internal electrode 32 is opened in the insulating films 36, 35, and 23. Further, as shown in FIG. 2, the through electrode 37 is formed on the side surface and the bottom surface of the through hole 41 and on the second main surface of the substrate 10. Thereby, the internal electrode 32 and the through electrode 37 are electrically connected. Thereafter, solder resist 38 and solder balls 18 are formed.

  As described above, according to the first embodiment, it is possible to reduce the capacitance between the through electrode and the silicon semiconductor substrate by forming a thick insulating film between the through electrode and the silicon semiconductor substrate. it can. As a result, the time constant of the through electrode can be reduced, and the influence of the power supply voltage supplied from the external terminal and conversely the power supply noise generated from the semiconductor substrate side can be significantly reduced. Thereby, a solid-state imaging device with high reliability can be provided.

[Second Embodiment]
A camera module according to a second embodiment of the present invention will be described. In the second embodiment, a semiconductor region connected to the ground potential is formed in the silicon semiconductor substrate 10 so as to surround the outer periphery of the through electrode 37.

  FIG. 6 is a cross-sectional view showing the configuration of the camera module of the second embodiment. FIG. 7 is a view of the peripheral circuit portion in FIG. 6 as viewed from the pad opening side, and is a plan view showing a layout of the ground region (semiconductor region) 42, the internal electrode 32, and the through electrode 37.

  The imaging pixel portion of the camera module is the same as that in the first embodiment. Hereinafter, the structure of the peripheral circuit unit will be described.

  As shown in FIG. 6, an interlayer insulating film 23 is formed on the first main surface of the silicon semiconductor substrate 10, and an internal electrode (first electrode) 32 is formed on the interlayer insulating film 23. A through hole is formed from the second main surface of the silicon semiconductor substrate 10 to the interlayer insulating film 23 via the first main surface. An insulating film 45 is formed on the side surface of the through hole and on the second main surface of the silicon semiconductor substrate 10.

  Further, a through electrode (conductor layer) 37 is formed on the inner surface of the through hole (on the insulating film 45 and the surface on the through hole side of the internal electrode 32) and on the insulating film 45 of the second main surface. ing. The internal electrode 32 is electrically connected to a peripheral circuit (not shown) formed in the imaging element 21 or the peripheral circuit unit.

  A ground region 42 is formed on the first main surface of the silicon semiconductor substrate 10 so as to surround the outer periphery of the through electrode 37. The ground region 42 is formed of a diffusion layer having a high impurity concentration, and is disposed in the vicinity of the through electrode 37, for example, at a position of several μm to several tens of μm from the through electrode 37. Although FIG. 7 shows an example in which the ground region 42 is formed so as to surround the entire outer periphery of the through electrode 37, the ground region 42 may be formed in only a part of the outer periphery of the through electrode 37.

  Further, wirings 43 and contact plugs 44 connected to the ground region 42 are formed in the interlayer insulating films 23 and 24 on the ground region 42. A reference potential such as a ground potential is supplied to the ground region 42. For this reason, the ground region 42 is connected to the solder ball 18 having the ground potential via, for example, the wiring 43 and the contact plug 44.

  In the conventional structure that does not have the ground region 42, the silicon semiconductor substrate around the through electrode 37 has a high ground resistance, that is, is connected to the ground with a high resistance. The silicon semiconductor substrate around the electrode 37 has a low ground resistance, and the potential is stable.

  For this reason, as in the first embodiment, it is possible to prevent the power supplied from the solder ball 18 from being deteriorated, and to reduce the influence of the power supply noise generated from the silicon semiconductor substrate 10 side. Thereby, a desired good power supply voltage can be supplied to the image sensor 21 and the peripheral circuit.

  As described above, according to the second embodiment, by reducing the ground resistance around the through electrode, the time constant of the through electrode is reduced, the power supply voltage supplied from the external terminal is deteriorated, and conversely the semiconductor The influence of power supply noise generated from the substrate side can be significantly reduced. Thereby, a solid-state imaging device with high reliability can be provided.

[Third Embodiment]
A camera module according to a third embodiment of the present invention will be described. The third embodiment is a combination of the features of the first embodiment and the second embodiment. In the third embodiment, a thick insulating film is formed between the through electrode 37 and the silicon semiconductor substrate 10, and a ground region 42 connected to the ground potential is formed so as to surround the through electrode 37. Has been.

  FIG. 8 is a cross-sectional view showing the configuration of the camera module of the third embodiment. FIG. 9 is a view of the peripheral circuit portion in FIG. 8 as viewed from the pad opening side, and is a plan view showing the layout of the ground region 42, the insulating film 35, the internal electrode 32, and the through electrode 37.

  As shown in the drawing, a thick insulating film 35 is formed between the through electrode 37 and the silicon semiconductor substrate 10. Further, a ground region 42 connected to the ground potential is formed on the first main surface of the silicon semiconductor substrate 10 so as to surround the through electrode 37. Other configurations are the same as the configurations of the first and second embodiments.

  According to the third embodiment, it is possible to provide a solid-state imaging device that has a greater effect than the first and second embodiments and is more reliable than the first and second embodiments.

  In addition, each of the above-described embodiments can be implemented not only independently but also in an appropriate combination. Furthermore, the above-described embodiments include inventions at various stages, and the inventions at various stages can be extracted by appropriately combining a plurality of constituent elements disclosed in the embodiments.

  DESCRIPTION OF SYMBOLS 10 ... Silicon semiconductor substrate, 11 ... Adhesive, 12 ... Glass substrate, 13 ... Adhesive, 14 ... IR (infrared) cut filter, 15 ... Adhesive, 16 ... Imaging lens, 17 ... Lens holder, 18 ... Solder ball ( External terminal), 19 ... Light shielding and electromagnetic shield, 20 ... Adhesive, 21 ... Imaging element, 22 ... Element isolation insulating layer, 23 ... Interlayer insulating film, 24 ... Interlayer insulating film, 25 ... Wiring, 26 ... Passivation film, 27 DESCRIPTION OF SYMBOLS ... Base layer, 28 ... Color filter, 29 ... Overcoat, 30 ... Micro lens, 31 ... Cavity, 32 ... Internal electrode (1st electrode), 33 ... Element surface electrode (2nd electrode), 34 ... Contact plug 35 ... Insulating film, 36 ... Insulating film, 37 ... Through electrode (conductor layer), 38 ... Solder resist, 39 ... Styrenic resin layer, 40 ... Pad opening, 41 ... Through hole, 4 ... contact region (semiconductor region), 43 ... wire, 44 ... contact plug, 45 ... insulating film, 100 ... camera module, 200 ... mounting board.

Claims (5)

An image sensor formed on the first main surface of the semiconductor substrate;
An external terminal formed on a second main surface facing the first main surface of the semiconductor substrate;
An insulating film formed in a through hole formed in the semiconductor substrate;
A through electrode formed on the insulating film in the through hole and electrically connected to the external terminal;
A first electrode formed on the through electrode on the first main surface of the semiconductor substrate,
A solid-state imaging device, wherein an outer shape of the insulating film and the semiconductor substrate in contact with each other is larger than an outer shape of the first electrode when viewed from a direction perpendicular to the first main surface of the semiconductor substrate. A semiconductor region formed in the semiconductor substrate so as to surround at least a part of the outer periphery of the through electrode;
A wiring formed on the semiconductor region and electrically connected to the semiconductor region;
The solid-state imaging device according to claim 1, wherein a ground potential is supplied to the semiconductor region through the wiring. An image sensor formed on the first main surface of the semiconductor substrate;
An external terminal formed on a second main surface facing the first main surface of the semiconductor substrate;
A through electrode formed in a through hole formed in the semiconductor substrate and electrically connected to the external terminal;
A first electrode formed on the through electrode on the first main surface of the semiconductor substrate;
A semiconductor region formed in the semiconductor substrate so as to surround at least a part of the outer periphery of the through electrode;
A wiring formed on the semiconductor region and electrically connected to the semiconductor region;
A solid-state imaging device, wherein a ground potential is supplied to the semiconductor region through the wiring. An interlayer insulating film formed on the first electrode and on the first main surface of the semiconductor substrate;
A second electrode formed on the interlayer insulating film;
A passivation film formed on the second electrode and the interlayer insulating film and having an opening in which a part of the second electrode is opened;
A contact plug connected between the second electrode and the first electrode;
The solid-state imaging device according to claim 1, further comprising: A color filter disposed on the image sensor so as to correspond to the image sensor;
A microlens disposed on the color filter;
The solid-state imaging device according to claim 1, further comprising:

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